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v6.2
  1// SPDX-License-Identifier: GPL-2.0-only
  2/*
  3 *  Oki MSM6242 RTC Driver
  4 *
  5 *  Copyright 2009 Geert Uytterhoeven
  6 *
  7 *  Based on the A2000 TOD code in arch/m68k/amiga/config.c
  8 *  Copyright (C) 1993 Hamish Macdonald
  9 */
 10
 11#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
 12
 13#include <linux/delay.h>
 14#include <linux/io.h>
 15#include <linux/kernel.h>
 16#include <linux/module.h>
 17#include <linux/platform_device.h>
 18#include <linux/rtc.h>
 19#include <linux/slab.h>
 20
 21
 22enum {
 23	MSM6242_SECOND1		= 0x0,	/* 1-second digit register */
 24	MSM6242_SECOND10	= 0x1,	/* 10-second digit register */
 25	MSM6242_MINUTE1		= 0x2,	/* 1-minute digit register */
 26	MSM6242_MINUTE10	= 0x3,	/* 10-minute digit register */
 27	MSM6242_HOUR1		= 0x4,	/* 1-hour digit register */
 28	MSM6242_HOUR10		= 0x5,	/* PM/AM, 10-hour digit register */
 29	MSM6242_DAY1		= 0x6,	/* 1-day digit register */
 30	MSM6242_DAY10		= 0x7,	/* 10-day digit register */
 31	MSM6242_MONTH1		= 0x8,	/* 1-month digit register */
 32	MSM6242_MONTH10		= 0x9,	/* 10-month digit register */
 33	MSM6242_YEAR1		= 0xa,	/* 1-year digit register */
 34	MSM6242_YEAR10		= 0xb,	/* 10-year digit register */
 35	MSM6242_WEEK		= 0xc,	/* Week register */
 36	MSM6242_CD		= 0xd,	/* Control Register D */
 37	MSM6242_CE		= 0xe,	/* Control Register E */
 38	MSM6242_CF		= 0xf,	/* Control Register F */
 39};
 40
 41#define MSM6242_HOUR10_AM	(0 << 2)
 42#define MSM6242_HOUR10_PM	(1 << 2)
 43#define MSM6242_HOUR10_HR_MASK	(3 << 0)
 44
 45#define MSM6242_WEEK_SUNDAY	0
 46#define MSM6242_WEEK_MONDAY	1
 47#define MSM6242_WEEK_TUESDAY	2
 48#define MSM6242_WEEK_WEDNESDAY	3
 49#define MSM6242_WEEK_THURSDAY	4
 50#define MSM6242_WEEK_FRIDAY	5
 51#define MSM6242_WEEK_SATURDAY	6
 52
 53#define MSM6242_CD_30_S_ADJ	(1 << 3)	/* 30-second adjustment */
 54#define MSM6242_CD_IRQ_FLAG	(1 << 2)
 55#define MSM6242_CD_BUSY		(1 << 1)
 56#define MSM6242_CD_HOLD		(1 << 0)
 57
 58#define MSM6242_CE_T_MASK	(3 << 2)
 59#define MSM6242_CE_T_64HZ	(0 << 2)	/* period 1/64 second */
 60#define MSM6242_CE_T_1HZ	(1 << 2)	/* period 1 second */
 61#define MSM6242_CE_T_1MINUTE	(2 << 2)	/* period 1 minute */
 62#define MSM6242_CE_T_1HOUR	(3 << 2)	/* period 1 hour */
 63
 64#define MSM6242_CE_ITRPT_STND	(1 << 1)
 65#define MSM6242_CE_MASK		(1 << 0)	/* STD.P output control */
 66
 67#define MSM6242_CF_TEST		(1 << 3)
 68#define MSM6242_CF_12H		(0 << 2)
 69#define MSM6242_CF_24H		(1 << 2)
 70#define MSM6242_CF_STOP		(1 << 1)
 71#define MSM6242_CF_REST		(1 << 0)	/* reset */
 72
 73
 74struct msm6242_priv {
 75	u32 __iomem *regs;
 76	struct rtc_device *rtc;
 77};
 78
 79static inline unsigned int msm6242_read(struct msm6242_priv *priv,
 80				       unsigned int reg)
 81{
 82	return __raw_readl(&priv->regs[reg]) & 0xf;
 83}
 84
 85static inline void msm6242_write(struct msm6242_priv *priv, unsigned int val,
 86				unsigned int reg)
 87{
 88	__raw_writel(val, &priv->regs[reg]);
 89}
 90
 
 
 
 
 
 
 
 
 
 
 
 
 91static void msm6242_lock(struct msm6242_priv *priv)
 92{
 93	int cnt = 5;
 94
 95	msm6242_write(priv, MSM6242_CD_HOLD|MSM6242_CD_IRQ_FLAG, MSM6242_CD);
 96
 97	while ((msm6242_read(priv, MSM6242_CD) & MSM6242_CD_BUSY) && cnt) {
 98		msm6242_write(priv, MSM6242_CD_IRQ_FLAG, MSM6242_CD);
 99		udelay(70);
100		msm6242_write(priv, MSM6242_CD_HOLD|MSM6242_CD_IRQ_FLAG, MSM6242_CD);
101		cnt--;
102	}
103
104	if (!cnt)
105		pr_warn("timed out waiting for RTC (0x%x)\n",
106			msm6242_read(priv, MSM6242_CD));
107}
108
109static void msm6242_unlock(struct msm6242_priv *priv)
110{
111	msm6242_write(priv, MSM6242_CD_IRQ_FLAG, MSM6242_CD);
112}
113
114static int msm6242_read_time(struct device *dev, struct rtc_time *tm)
115{
116	struct msm6242_priv *priv = dev_get_drvdata(dev);
117
118	msm6242_lock(priv);
119
120	tm->tm_sec  = msm6242_read(priv, MSM6242_SECOND10) * 10 +
121		      msm6242_read(priv, MSM6242_SECOND1);
122	tm->tm_min  = msm6242_read(priv, MSM6242_MINUTE10) * 10 +
123		      msm6242_read(priv, MSM6242_MINUTE1);
124	tm->tm_hour = (msm6242_read(priv, MSM6242_HOUR10) &
125		       MSM6242_HOUR10_HR_MASK) * 10 +
126		      msm6242_read(priv, MSM6242_HOUR1);
127	tm->tm_mday = msm6242_read(priv, MSM6242_DAY10) * 10 +
128		      msm6242_read(priv, MSM6242_DAY1);
129	tm->tm_wday = msm6242_read(priv, MSM6242_WEEK);
130	tm->tm_mon  = msm6242_read(priv, MSM6242_MONTH10) * 10 +
131		      msm6242_read(priv, MSM6242_MONTH1) - 1;
132	tm->tm_year = msm6242_read(priv, MSM6242_YEAR10) * 10 +
133		      msm6242_read(priv, MSM6242_YEAR1);
134	if (tm->tm_year <= 69)
135		tm->tm_year += 100;
136
137	if (!(msm6242_read(priv, MSM6242_CF) & MSM6242_CF_24H)) {
138		unsigned int pm = msm6242_read(priv, MSM6242_HOUR10) &
139				  MSM6242_HOUR10_PM;
140		if (!pm && tm->tm_hour == 12)
141			tm->tm_hour = 0;
142		else if (pm && tm->tm_hour != 12)
143			tm->tm_hour += 12;
144	}
145
146	msm6242_unlock(priv);
147
148	return 0;
149}
150
151static int msm6242_set_time(struct device *dev, struct rtc_time *tm)
152{
153	struct msm6242_priv *priv = dev_get_drvdata(dev);
154
155	msm6242_lock(priv);
156
157	msm6242_write(priv, tm->tm_sec / 10, MSM6242_SECOND10);
158	msm6242_write(priv, tm->tm_sec % 10, MSM6242_SECOND1);
159	msm6242_write(priv, tm->tm_min / 10, MSM6242_MINUTE10);
160	msm6242_write(priv, tm->tm_min % 10, MSM6242_MINUTE1);
161	if (msm6242_read(priv, MSM6242_CF) & MSM6242_CF_24H)
162		msm6242_write(priv, tm->tm_hour / 10, MSM6242_HOUR10);
163	else if (tm->tm_hour >= 12)
164		msm6242_write(priv, MSM6242_HOUR10_PM + (tm->tm_hour - 12) / 10,
165			      MSM6242_HOUR10);
166	else
167		msm6242_write(priv, tm->tm_hour / 10, MSM6242_HOUR10);
168	msm6242_write(priv, tm->tm_hour % 10, MSM6242_HOUR1);
169	msm6242_write(priv, tm->tm_mday / 10, MSM6242_DAY10);
170	msm6242_write(priv, tm->tm_mday % 10, MSM6242_DAY1);
171	if (tm->tm_wday != -1)
172		msm6242_write(priv, tm->tm_wday, MSM6242_WEEK);
173	msm6242_write(priv, (tm->tm_mon + 1) / 10, MSM6242_MONTH10);
174	msm6242_write(priv, (tm->tm_mon + 1) % 10, MSM6242_MONTH1);
175	if (tm->tm_year >= 100)
176		tm->tm_year -= 100;
177	msm6242_write(priv, tm->tm_year / 10, MSM6242_YEAR10);
178	msm6242_write(priv, tm->tm_year % 10, MSM6242_YEAR1);
179
180	msm6242_unlock(priv);
181	return 0;
182}
183
184static const struct rtc_class_ops msm6242_rtc_ops = {
185	.read_time	= msm6242_read_time,
186	.set_time	= msm6242_set_time,
187};
188
189static int __init msm6242_rtc_probe(struct platform_device *pdev)
190{
191	struct resource *res;
192	struct msm6242_priv *priv;
193	struct rtc_device *rtc;
194
195	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
196	if (!res)
197		return -ENODEV;
198
199	priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
200	if (!priv)
201		return -ENOMEM;
202
203	priv->regs = devm_ioremap(&pdev->dev, res->start, resource_size(res));
204	if (!priv->regs)
205		return -ENOMEM;
206	platform_set_drvdata(pdev, priv);
207
208	rtc = devm_rtc_device_register(&pdev->dev, "rtc-msm6242",
209				&msm6242_rtc_ops, THIS_MODULE);
210	if (IS_ERR(rtc))
211		return PTR_ERR(rtc);
212
213	priv->rtc = rtc;
214	return 0;
215}
216
217static struct platform_driver msm6242_rtc_driver = {
218	.driver	= {
219		.name	= "rtc-msm6242",
220	},
221};
222
223module_platform_driver_probe(msm6242_rtc_driver, msm6242_rtc_probe);
224
225MODULE_AUTHOR("Geert Uytterhoeven <geert@linux-m68k.org>");
226MODULE_LICENSE("GPL");
227MODULE_DESCRIPTION("Oki MSM6242 RTC driver");
228MODULE_ALIAS("platform:rtc-msm6242");
v4.17
 
  1/*
  2 *  Oki MSM6242 RTC Driver
  3 *
  4 *  Copyright 2009 Geert Uytterhoeven
  5 *
  6 *  Based on the A2000 TOD code in arch/m68k/amiga/config.c
  7 *  Copyright (C) 1993 Hamish Macdonald
  8 */
  9
 10#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
 11
 12#include <linux/delay.h>
 13#include <linux/io.h>
 14#include <linux/kernel.h>
 15#include <linux/module.h>
 16#include <linux/platform_device.h>
 17#include <linux/rtc.h>
 18#include <linux/slab.h>
 19
 20
 21enum {
 22	MSM6242_SECOND1		= 0x0,	/* 1-second digit register */
 23	MSM6242_SECOND10	= 0x1,	/* 10-second digit register */
 24	MSM6242_MINUTE1		= 0x2,	/* 1-minute digit register */
 25	MSM6242_MINUTE10	= 0x3,	/* 10-minute digit register */
 26	MSM6242_HOUR1		= 0x4,	/* 1-hour digit register */
 27	MSM6242_HOUR10		= 0x5,	/* PM/AM, 10-hour digit register */
 28	MSM6242_DAY1		= 0x6,	/* 1-day digit register */
 29	MSM6242_DAY10		= 0x7,	/* 10-day digit register */
 30	MSM6242_MONTH1		= 0x8,	/* 1-month digit register */
 31	MSM6242_MONTH10		= 0x9,	/* 10-month digit register */
 32	MSM6242_YEAR1		= 0xa,	/* 1-year digit register */
 33	MSM6242_YEAR10		= 0xb,	/* 10-year digit register */
 34	MSM6242_WEEK		= 0xc,	/* Week register */
 35	MSM6242_CD		= 0xd,	/* Control Register D */
 36	MSM6242_CE		= 0xe,	/* Control Register E */
 37	MSM6242_CF		= 0xf,	/* Control Register F */
 38};
 39
 40#define MSM6242_HOUR10_AM	(0 << 2)
 41#define MSM6242_HOUR10_PM	(1 << 2)
 42#define MSM6242_HOUR10_HR_MASK	(3 << 0)
 43
 44#define MSM6242_WEEK_SUNDAY	0
 45#define MSM6242_WEEK_MONDAY	1
 46#define MSM6242_WEEK_TUESDAY	2
 47#define MSM6242_WEEK_WEDNESDAY	3
 48#define MSM6242_WEEK_THURSDAY	4
 49#define MSM6242_WEEK_FRIDAY	5
 50#define MSM6242_WEEK_SATURDAY	6
 51
 52#define MSM6242_CD_30_S_ADJ	(1 << 3)	/* 30-second adjustment */
 53#define MSM6242_CD_IRQ_FLAG	(1 << 2)
 54#define MSM6242_CD_BUSY		(1 << 1)
 55#define MSM6242_CD_HOLD		(1 << 0)
 56
 57#define MSM6242_CE_T_MASK	(3 << 2)
 58#define MSM6242_CE_T_64HZ	(0 << 2)	/* period 1/64 second */
 59#define MSM6242_CE_T_1HZ	(1 << 2)	/* period 1 second */
 60#define MSM6242_CE_T_1MINUTE	(2 << 2)	/* period 1 minute */
 61#define MSM6242_CE_T_1HOUR	(3 << 2)	/* period 1 hour */
 62
 63#define MSM6242_CE_ITRPT_STND	(1 << 1)
 64#define MSM6242_CE_MASK		(1 << 0)	/* STD.P output control */
 65
 66#define MSM6242_CF_TEST		(1 << 3)
 67#define MSM6242_CF_12H		(0 << 2)
 68#define MSM6242_CF_24H		(1 << 2)
 69#define MSM6242_CF_STOP		(1 << 1)
 70#define MSM6242_CF_REST		(1 << 0)	/* reset */
 71
 72
 73struct msm6242_priv {
 74	u32 __iomem *regs;
 75	struct rtc_device *rtc;
 76};
 77
 78static inline unsigned int msm6242_read(struct msm6242_priv *priv,
 79				       unsigned int reg)
 80{
 81	return __raw_readl(&priv->regs[reg]) & 0xf;
 82}
 83
 84static inline void msm6242_write(struct msm6242_priv *priv, unsigned int val,
 85				unsigned int reg)
 86{
 87	__raw_writel(val, &priv->regs[reg]);
 88}
 89
 90static inline void msm6242_set(struct msm6242_priv *priv, unsigned int val,
 91			       unsigned int reg)
 92{
 93	msm6242_write(priv, msm6242_read(priv, reg) | val, reg);
 94}
 95
 96static inline void msm6242_clear(struct msm6242_priv *priv, unsigned int val,
 97				 unsigned int reg)
 98{
 99	msm6242_write(priv, msm6242_read(priv, reg) & ~val, reg);
100}
101
102static void msm6242_lock(struct msm6242_priv *priv)
103{
104	int cnt = 5;
105
106	msm6242_set(priv, MSM6242_CD_HOLD, MSM6242_CD);
107
108	while ((msm6242_read(priv, MSM6242_CD) & MSM6242_CD_BUSY) && cnt) {
109		msm6242_clear(priv, MSM6242_CD_HOLD, MSM6242_CD);
110		udelay(70);
111		msm6242_set(priv, MSM6242_CD_HOLD, MSM6242_CD);
112		cnt--;
113	}
114
115	if (!cnt)
116		pr_warn("timed out waiting for RTC (0x%x)\n",
117			msm6242_read(priv, MSM6242_CD));
118}
119
120static void msm6242_unlock(struct msm6242_priv *priv)
121{
122	msm6242_clear(priv, MSM6242_CD_HOLD, MSM6242_CD);
123}
124
125static int msm6242_read_time(struct device *dev, struct rtc_time *tm)
126{
127	struct msm6242_priv *priv = dev_get_drvdata(dev);
128
129	msm6242_lock(priv);
130
131	tm->tm_sec  = msm6242_read(priv, MSM6242_SECOND10) * 10 +
132		      msm6242_read(priv, MSM6242_SECOND1);
133	tm->tm_min  = msm6242_read(priv, MSM6242_MINUTE10) * 10 +
134		      msm6242_read(priv, MSM6242_MINUTE1);
135	tm->tm_hour = (msm6242_read(priv, MSM6242_HOUR10 & 3)) * 10 +
 
136		      msm6242_read(priv, MSM6242_HOUR1);
137	tm->tm_mday = msm6242_read(priv, MSM6242_DAY10) * 10 +
138		      msm6242_read(priv, MSM6242_DAY1);
139	tm->tm_wday = msm6242_read(priv, MSM6242_WEEK);
140	tm->tm_mon  = msm6242_read(priv, MSM6242_MONTH10) * 10 +
141		      msm6242_read(priv, MSM6242_MONTH1) - 1;
142	tm->tm_year = msm6242_read(priv, MSM6242_YEAR10) * 10 +
143		      msm6242_read(priv, MSM6242_YEAR1);
144	if (tm->tm_year <= 69)
145		tm->tm_year += 100;
146
147	if (!(msm6242_read(priv, MSM6242_CF) & MSM6242_CF_24H)) {
148		unsigned int pm = msm6242_read(priv, MSM6242_HOUR10) &
149				  MSM6242_HOUR10_PM;
150		if (!pm && tm->tm_hour == 12)
151			tm->tm_hour = 0;
152		else if (pm && tm->tm_hour != 12)
153			tm->tm_hour += 12;
154	}
155
156	msm6242_unlock(priv);
157
158	return 0;
159}
160
161static int msm6242_set_time(struct device *dev, struct rtc_time *tm)
162{
163	struct msm6242_priv *priv = dev_get_drvdata(dev);
164
165	msm6242_lock(priv);
166
167	msm6242_write(priv, tm->tm_sec / 10, MSM6242_SECOND10);
168	msm6242_write(priv, tm->tm_sec % 10, MSM6242_SECOND1);
169	msm6242_write(priv, tm->tm_min / 10, MSM6242_MINUTE10);
170	msm6242_write(priv, tm->tm_min % 10, MSM6242_MINUTE1);
171	if (msm6242_read(priv, MSM6242_CF) & MSM6242_CF_24H)
172		msm6242_write(priv, tm->tm_hour / 10, MSM6242_HOUR10);
173	else if (tm->tm_hour >= 12)
174		msm6242_write(priv, MSM6242_HOUR10_PM + (tm->tm_hour - 12) / 10,
175			      MSM6242_HOUR10);
176	else
177		msm6242_write(priv, tm->tm_hour / 10, MSM6242_HOUR10);
178	msm6242_write(priv, tm->tm_hour % 10, MSM6242_HOUR1);
179	msm6242_write(priv, tm->tm_mday / 10, MSM6242_DAY10);
180	msm6242_write(priv, tm->tm_mday % 10, MSM6242_DAY1);
181	if (tm->tm_wday != -1)
182		msm6242_write(priv, tm->tm_wday, MSM6242_WEEK);
183	msm6242_write(priv, (tm->tm_mon + 1) / 10, MSM6242_MONTH10);
184	msm6242_write(priv, (tm->tm_mon + 1) % 10, MSM6242_MONTH1);
185	if (tm->tm_year >= 100)
186		tm->tm_year -= 100;
187	msm6242_write(priv, tm->tm_year / 10, MSM6242_YEAR10);
188	msm6242_write(priv, tm->tm_year % 10, MSM6242_YEAR1);
189
190	msm6242_unlock(priv);
191	return 0;
192}
193
194static const struct rtc_class_ops msm6242_rtc_ops = {
195	.read_time	= msm6242_read_time,
196	.set_time	= msm6242_set_time,
197};
198
199static int __init msm6242_rtc_probe(struct platform_device *pdev)
200{
201	struct resource *res;
202	struct msm6242_priv *priv;
203	struct rtc_device *rtc;
204
205	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
206	if (!res)
207		return -ENODEV;
208
209	priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
210	if (!priv)
211		return -ENOMEM;
212
213	priv->regs = devm_ioremap(&pdev->dev, res->start, resource_size(res));
214	if (!priv->regs)
215		return -ENOMEM;
216	platform_set_drvdata(pdev, priv);
217
218	rtc = devm_rtc_device_register(&pdev->dev, "rtc-msm6242",
219				&msm6242_rtc_ops, THIS_MODULE);
220	if (IS_ERR(rtc))
221		return PTR_ERR(rtc);
222
223	priv->rtc = rtc;
224	return 0;
225}
226
227static struct platform_driver msm6242_rtc_driver = {
228	.driver	= {
229		.name	= "rtc-msm6242",
230	},
231};
232
233module_platform_driver_probe(msm6242_rtc_driver, msm6242_rtc_probe);
234
235MODULE_AUTHOR("Geert Uytterhoeven <geert@linux-m68k.org>");
236MODULE_LICENSE("GPL");
237MODULE_DESCRIPTION("Oki MSM6242 RTC driver");
238MODULE_ALIAS("platform:rtc-msm6242");