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v6.2
  1/* SPDX-License-Identifier: GPL-2.0 OR MIT */
  2/*
  3 * Copyright 2014-2022 Advanced Micro Devices, Inc.
  4 *
  5 * Permission is hereby granted, free of charge, to any person obtaining a
  6 * copy of this software and associated documentation files (the "Software"),
  7 * to deal in the Software without restriction, including without limitation
  8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  9 * and/or sell copies of the Software, and to permit persons to whom the
 10 * Software is furnished to do so, subject to the following conditions:
 11 *
 12 * The above copyright notice and this permission notice shall be included in
 13 * all copies or substantial portions of the Software.
 14 *
 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 18 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
 19 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
 20 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 21 * OTHER DEALINGS IN THE SOFTWARE.
 22 */
 23
 24#ifndef __KFD_TOPOLOGY_H__
 25#define __KFD_TOPOLOGY_H__
 26
 27#include <linux/types.h>
 28#include <linux/list.h>
 29#include <linux/kfd_sysfs.h>
 30#include "kfd_crat.h"
 31
 32#define KFD_TOPOLOGY_PUBLIC_NAME_SIZE 32
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 33
 34struct kfd_node_properties {
 35	uint64_t hive_id;
 36	uint32_t cpu_cores_count;
 37	uint32_t simd_count;
 38	uint32_t mem_banks_count;
 39	uint32_t caches_count;
 40	uint32_t io_links_count;
 41	uint32_t p2p_links_count;
 42	uint32_t cpu_core_id_base;
 43	uint32_t simd_id_base;
 44	uint32_t capability;
 45	uint32_t max_waves_per_simd;
 46	uint32_t lds_size_in_kb;
 47	uint32_t gds_size_in_kb;
 48	uint32_t num_gws;
 49	uint32_t wave_front_size;
 50	uint32_t array_count;
 51	uint32_t simd_arrays_per_engine;
 52	uint32_t cu_per_simd_array;
 53	uint32_t simd_per_cu;
 54	uint32_t max_slots_scratch_cu;
 55	uint32_t engine_id;
 56	uint32_t gfx_target_version;
 57	uint32_t vendor_id;
 58	uint32_t device_id;
 59	uint32_t location_id;
 60	uint32_t domain;
 61	uint32_t max_engine_clk_fcompute;
 62	uint32_t max_engine_clk_ccompute;
 63	int32_t  drm_render_minor;
 64	uint32_t num_sdma_engines;
 65	uint32_t num_sdma_xgmi_engines;
 66	uint32_t num_sdma_queues_per_engine;
 67	uint32_t num_cp_queues;
 68	char name[KFD_TOPOLOGY_PUBLIC_NAME_SIZE];
 69};
 70
 
 
 
 
 
 
 
 
 
 
 
 71struct kfd_mem_properties {
 72	struct list_head	list;
 73	uint32_t		heap_type;
 74	uint64_t		size_in_bytes;
 75	uint32_t		flags;
 76	uint32_t		width;
 77	uint32_t		mem_clk_max;
 78	struct kfd_dev		*gpu;
 79	struct kobject		*kobj;
 80	struct attribute	attr;
 81};
 82
 83#define CACHE_SIBLINGMAP_SIZE 64
 
 
 
 
 84
 85struct kfd_cache_properties {
 86	struct list_head	list;
 87	uint32_t		processor_id_low;
 88	uint32_t		cache_level;
 89	uint32_t		cache_size;
 90	uint32_t		cacheline_size;
 91	uint32_t		cachelines_per_tag;
 92	uint32_t		cache_assoc;
 93	uint32_t		cache_latency;
 94	uint32_t		cache_type;
 95	uint8_t			sibling_map[CACHE_SIBLINGMAP_SIZE];
 96	struct kfd_dev		*gpu;
 97	struct kobject		*kobj;
 98	struct attribute	attr;
 99	uint32_t		sibling_map_size;
100};
101
102struct kfd_iolink_properties {
103	struct list_head	list;
104	uint32_t		iolink_type;
105	uint32_t		ver_maj;
106	uint32_t		ver_min;
107	uint32_t		node_from;
108	uint32_t		node_to;
109	uint32_t		weight;
110	uint32_t		min_latency;
111	uint32_t		max_latency;
112	uint32_t		min_bandwidth;
113	uint32_t		max_bandwidth;
114	uint32_t		rec_transfer_size;
115	uint32_t		flags;
116	struct kfd_dev		*gpu;
117	struct kobject		*kobj;
118	struct attribute	attr;
119};
120
121struct kfd_perf_properties {
122	struct list_head	list;
123	char			block_name[16];
124	uint32_t		max_concurrent;
125	struct attribute_group	*attr_group;
126};
127
128struct kfd_topology_device {
129	struct list_head		list;
130	uint32_t			gpu_id;
131	uint32_t			proximity_domain;
132	struct kfd_node_properties	node_props;
133	struct list_head		mem_props;
 
134	struct list_head		cache_props;
 
135	struct list_head		io_link_props;
136	struct list_head		p2p_link_props;
137	struct list_head		perf_props;
138	struct kfd_dev			*gpu;
139	struct kobject			*kobj_node;
140	struct kobject			*kobj_mem;
141	struct kobject			*kobj_cache;
142	struct kobject			*kobj_iolink;
143	struct kobject			*kobj_p2plink;
144	struct kobject			*kobj_perf;
145	struct attribute		attr_gpuid;
146	struct attribute		attr_name;
147	struct attribute		attr_props;
148	uint8_t				oem_id[CRAT_OEMID_LENGTH];
149	uint8_t				oem_table_id[CRAT_OEMTABLEID_LENGTH];
150	uint32_t			oem_revision;
151};
152
153struct kfd_system_properties {
154	uint32_t		num_devices;     /* Number of H-NUMA nodes */
155	uint32_t		generation_count;
156	uint64_t		platform_oem;
157	uint64_t		platform_id;
158	uint64_t		platform_rev;
159	struct kobject		*kobj_topology;
160	struct kobject		*kobj_nodes;
161	struct attribute	attr_genid;
162	struct attribute	attr_props;
163};
164
165struct kfd_topology_device *kfd_create_topology_device(
166		struct list_head *device_list);
167void kfd_release_topology_device_list(struct list_head *device_list);
168
169#endif /* __KFD_TOPOLOGY_H__ */
v4.17
 
  1/*
  2 * Copyright 2014 Advanced Micro Devices, Inc.
  3 *
  4 * Permission is hereby granted, free of charge, to any person obtaining a
  5 * copy of this software and associated documentation files (the "Software"),
  6 * to deal in the Software without restriction, including without limitation
  7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  8 * and/or sell copies of the Software, and to permit persons to whom the
  9 * Software is furnished to do so, subject to the following conditions:
 10 *
 11 * The above copyright notice and this permission notice shall be included in
 12 * all copies or substantial portions of the Software.
 13 *
 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 20 * OTHER DEALINGS IN THE SOFTWARE.
 21 */
 22
 23#ifndef __KFD_TOPOLOGY_H__
 24#define __KFD_TOPOLOGY_H__
 25
 26#include <linux/types.h>
 27#include <linux/list.h>
 
 28#include "kfd_crat.h"
 29
 30#define KFD_TOPOLOGY_PUBLIC_NAME_SIZE 128
 31
 32#define HSA_CAP_HOT_PLUGGABLE			0x00000001
 33#define HSA_CAP_ATS_PRESENT			0x00000002
 34#define HSA_CAP_SHARED_WITH_GRAPHICS		0x00000004
 35#define HSA_CAP_QUEUE_SIZE_POW2			0x00000008
 36#define HSA_CAP_QUEUE_SIZE_32BIT		0x00000010
 37#define HSA_CAP_QUEUE_IDLE_EVENT		0x00000020
 38#define HSA_CAP_VA_LIMIT			0x00000040
 39#define HSA_CAP_WATCH_POINTS_SUPPORTED		0x00000080
 40#define HSA_CAP_WATCH_POINTS_TOTALBITS_MASK	0x00000f00
 41#define HSA_CAP_WATCH_POINTS_TOTALBITS_SHIFT	8
 42#define HSA_CAP_DOORBELL_TYPE_TOTALBITS_MASK	0x00003000
 43#define HSA_CAP_DOORBELL_TYPE_TOTALBITS_SHIFT	12
 44#define HSA_CAP_RESERVED			0xffffc000
 45
 46#define HSA_CAP_DOORBELL_TYPE_PRE_1_0		0x0
 47#define HSA_CAP_DOORBELL_TYPE_1_0		0x1
 48#define HSA_CAP_AQL_QUEUE_DOUBLE_MAP		0x00004000
 49
 50struct kfd_node_properties {
 
 51	uint32_t cpu_cores_count;
 52	uint32_t simd_count;
 53	uint32_t mem_banks_count;
 54	uint32_t caches_count;
 55	uint32_t io_links_count;
 
 56	uint32_t cpu_core_id_base;
 57	uint32_t simd_id_base;
 58	uint32_t capability;
 59	uint32_t max_waves_per_simd;
 60	uint32_t lds_size_in_kb;
 61	uint32_t gds_size_in_kb;
 
 62	uint32_t wave_front_size;
 63	uint32_t array_count;
 64	uint32_t simd_arrays_per_engine;
 65	uint32_t cu_per_simd_array;
 66	uint32_t simd_per_cu;
 67	uint32_t max_slots_scratch_cu;
 68	uint32_t engine_id;
 
 69	uint32_t vendor_id;
 70	uint32_t device_id;
 71	uint32_t location_id;
 
 72	uint32_t max_engine_clk_fcompute;
 73	uint32_t max_engine_clk_ccompute;
 74	int32_t  drm_render_minor;
 75	uint16_t marketing_name[KFD_TOPOLOGY_PUBLIC_NAME_SIZE];
 
 
 
 
 76};
 77
 78#define HSA_MEM_HEAP_TYPE_SYSTEM	0
 79#define HSA_MEM_HEAP_TYPE_FB_PUBLIC	1
 80#define HSA_MEM_HEAP_TYPE_FB_PRIVATE	2
 81#define HSA_MEM_HEAP_TYPE_GPU_GDS	3
 82#define HSA_MEM_HEAP_TYPE_GPU_LDS	4
 83#define HSA_MEM_HEAP_TYPE_GPU_SCRATCH	5
 84
 85#define HSA_MEM_FLAGS_HOT_PLUGGABLE	0x00000001
 86#define HSA_MEM_FLAGS_NON_VOLATILE	0x00000002
 87#define HSA_MEM_FLAGS_RESERVED		0xfffffffc
 88
 89struct kfd_mem_properties {
 90	struct list_head	list;
 91	uint32_t		heap_type;
 92	uint64_t		size_in_bytes;
 93	uint32_t		flags;
 94	uint32_t		width;
 95	uint32_t		mem_clk_max;
 
 96	struct kobject		*kobj;
 97	struct attribute	attr;
 98};
 99
100#define HSA_CACHE_TYPE_DATA		0x00000001
101#define HSA_CACHE_TYPE_INSTRUCTION	0x00000002
102#define HSA_CACHE_TYPE_CPU		0x00000004
103#define HSA_CACHE_TYPE_HSACU		0x00000008
104#define HSA_CACHE_TYPE_RESERVED		0xfffffff0
105
106struct kfd_cache_properties {
107	struct list_head	list;
108	uint32_t		processor_id_low;
109	uint32_t		cache_level;
110	uint32_t		cache_size;
111	uint32_t		cacheline_size;
112	uint32_t		cachelines_per_tag;
113	uint32_t		cache_assoc;
114	uint32_t		cache_latency;
115	uint32_t		cache_type;
116	uint8_t			sibling_map[CRAT_SIBLINGMAP_SIZE];
 
117	struct kobject		*kobj;
118	struct attribute	attr;
 
119};
120
121struct kfd_iolink_properties {
122	struct list_head	list;
123	uint32_t		iolink_type;
124	uint32_t		ver_maj;
125	uint32_t		ver_min;
126	uint32_t		node_from;
127	uint32_t		node_to;
128	uint32_t		weight;
129	uint32_t		min_latency;
130	uint32_t		max_latency;
131	uint32_t		min_bandwidth;
132	uint32_t		max_bandwidth;
133	uint32_t		rec_transfer_size;
134	uint32_t		flags;
 
135	struct kobject		*kobj;
136	struct attribute	attr;
137};
138
139struct kfd_perf_properties {
140	struct list_head	list;
141	char			block_name[16];
142	uint32_t		max_concurrent;
143	struct attribute_group	*attr_group;
144};
145
146struct kfd_topology_device {
147	struct list_head		list;
148	uint32_t			gpu_id;
149	uint32_t			proximity_domain;
150	struct kfd_node_properties	node_props;
151	struct list_head		mem_props;
152	uint32_t			cache_count;
153	struct list_head		cache_props;
154	uint32_t			io_link_count;
155	struct list_head		io_link_props;
 
156	struct list_head		perf_props;
157	struct kfd_dev			*gpu;
158	struct kobject			*kobj_node;
159	struct kobject			*kobj_mem;
160	struct kobject			*kobj_cache;
161	struct kobject			*kobj_iolink;
 
162	struct kobject			*kobj_perf;
163	struct attribute		attr_gpuid;
164	struct attribute		attr_name;
165	struct attribute		attr_props;
166	uint8_t				oem_id[CRAT_OEMID_LENGTH];
167	uint8_t				oem_table_id[CRAT_OEMTABLEID_LENGTH];
168	uint32_t			oem_revision;
169};
170
171struct kfd_system_properties {
172	uint32_t		num_devices;     /* Number of H-NUMA nodes */
173	uint32_t		generation_count;
174	uint64_t		platform_oem;
175	uint64_t		platform_id;
176	uint64_t		platform_rev;
177	struct kobject		*kobj_topology;
178	struct kobject		*kobj_nodes;
179	struct attribute	attr_genid;
180	struct attribute	attr_props;
181};
182
183struct kfd_topology_device *kfd_create_topology_device(
184		struct list_head *device_list);
185void kfd_release_topology_device_list(struct list_head *device_list);
186
187#endif /* __KFD_TOPOLOGY_H__ */