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1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Copyright (C) 2013 TangoTec Ltd.
4 * Author: Baruch Siach <baruch@tkos.co.il>
5 *
6 * Driver for the Xtensa LX4 GPIO32 Option
7 *
8 * Documentation: Xtensa LX4 Microprocessor Data Book, Section 2.22
9 *
10 * GPIO32 is a standard optional extension to the Xtensa architecture core that
11 * provides preconfigured output and input ports for intra SoC signaling. The
12 * GPIO32 option is implemented as 32bit Tensilica Instruction Extension (TIE)
13 * output state called EXPSTATE, and 32bit input wire called IMPWIRE. This
14 * driver treats input and output states as two distinct devices.
15 *
16 * Access to GPIO32 specific instructions is controlled by the CPENABLE
17 * (Coprocessor Enable Bits) register. By default Xtensa Linux startup code
18 * disables access to all coprocessors. This driver sets the CPENABLE bit
19 * corresponding to GPIO32 before any GPIO32 specific instruction, and restores
20 * CPENABLE state after that.
21 *
22 * This driver is currently incompatible with SMP. The GPIO32 extension is not
23 * guaranteed to be available in all cores. Moreover, each core controls a
24 * different set of IO wires. A theoretical SMP aware version of this driver
25 * would need to have a per core workqueue to do the actual GPIO manipulation.
26 */
27
28#include <linux/err.h>
29#include <linux/module.h>
30#include <linux/gpio/driver.h>
31#include <linux/bitops.h>
32#include <linux/platform_device.h>
33
34#include <asm/coprocessor.h> /* CPENABLE read/write macros */
35
36#ifndef XCHAL_CP_ID_XTIOP
37#error GPIO32 option is not enabled for your xtensa core variant
38#endif
39
40#if XCHAL_HAVE_CP
41
42static inline unsigned long enable_cp(unsigned long *cpenable)
43{
44 unsigned long flags;
45
46 local_irq_save(flags);
47 *cpenable = xtensa_get_sr(cpenable);
48 xtensa_set_sr(*cpenable | BIT(XCHAL_CP_ID_XTIOP), cpenable);
49 return flags;
50}
51
52static inline void disable_cp(unsigned long flags, unsigned long cpenable)
53{
54 xtensa_set_sr(cpenable, cpenable);
55 local_irq_restore(flags);
56}
57
58#else
59
60static inline unsigned long enable_cp(unsigned long *cpenable)
61{
62 *cpenable = 0; /* avoid uninitialized value warning */
63 return 0;
64}
65
66static inline void disable_cp(unsigned long flags, unsigned long cpenable)
67{
68}
69
70#endif /* XCHAL_HAVE_CP */
71
72static int xtensa_impwire_get_direction(struct gpio_chip *gc, unsigned offset)
73{
74 return GPIO_LINE_DIRECTION_IN; /* input only */
75}
76
77static int xtensa_impwire_get_value(struct gpio_chip *gc, unsigned offset)
78{
79 unsigned long flags, saved_cpenable;
80 u32 impwire;
81
82 flags = enable_cp(&saved_cpenable);
83 __asm__ __volatile__("read_impwire %0" : "=a" (impwire));
84 disable_cp(flags, saved_cpenable);
85
86 return !!(impwire & BIT(offset));
87}
88
89static void xtensa_impwire_set_value(struct gpio_chip *gc, unsigned offset,
90 int value)
91{
92 BUG(); /* output only; should never be called */
93}
94
95static int xtensa_expstate_get_direction(struct gpio_chip *gc, unsigned offset)
96{
97 return GPIO_LINE_DIRECTION_OUT; /* output only */
98}
99
100static int xtensa_expstate_get_value(struct gpio_chip *gc, unsigned offset)
101{
102 unsigned long flags, saved_cpenable;
103 u32 expstate;
104
105 flags = enable_cp(&saved_cpenable);
106 __asm__ __volatile__("rur.expstate %0" : "=a" (expstate));
107 disable_cp(flags, saved_cpenable);
108
109 return !!(expstate & BIT(offset));
110}
111
112static void xtensa_expstate_set_value(struct gpio_chip *gc, unsigned offset,
113 int value)
114{
115 unsigned long flags, saved_cpenable;
116 u32 mask = BIT(offset);
117 u32 val = value ? BIT(offset) : 0;
118
119 flags = enable_cp(&saved_cpenable);
120 __asm__ __volatile__("wrmsk_expstate %0, %1"
121 :: "a" (val), "a" (mask));
122 disable_cp(flags, saved_cpenable);
123}
124
125static struct gpio_chip impwire_chip = {
126 .label = "impwire",
127 .base = -1,
128 .ngpio = 32,
129 .get_direction = xtensa_impwire_get_direction,
130 .get = xtensa_impwire_get_value,
131 .set = xtensa_impwire_set_value,
132};
133
134static struct gpio_chip expstate_chip = {
135 .label = "expstate",
136 .base = -1,
137 .ngpio = 32,
138 .get_direction = xtensa_expstate_get_direction,
139 .get = xtensa_expstate_get_value,
140 .set = xtensa_expstate_set_value,
141};
142
143static int xtensa_gpio_probe(struct platform_device *pdev)
144{
145 int ret;
146
147 ret = gpiochip_add_data(&impwire_chip, NULL);
148 if (ret)
149 return ret;
150 return gpiochip_add_data(&expstate_chip, NULL);
151}
152
153static struct platform_driver xtensa_gpio_driver = {
154 .driver = {
155 .name = "xtensa-gpio",
156 },
157 .probe = xtensa_gpio_probe,
158};
159
160static int __init xtensa_gpio_init(void)
161{
162 struct platform_device *pdev;
163
164 pdev = platform_device_register_simple("xtensa-gpio", 0, NULL, 0);
165 if (IS_ERR(pdev))
166 return PTR_ERR(pdev);
167
168 return platform_driver_register(&xtensa_gpio_driver);
169}
170device_initcall(xtensa_gpio_init);
171
172MODULE_AUTHOR("Baruch Siach <baruch@tkos.co.il>");
173MODULE_DESCRIPTION("Xtensa LX4 GPIO32 driver");
174MODULE_LICENSE("GPL");
1/*
2 * Copyright (C) 2013 TangoTec Ltd.
3 * Author: Baruch Siach <baruch@tkos.co.il>
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
8 *
9 * Driver for the Xtensa LX4 GPIO32 Option
10 *
11 * Documentation: Xtensa LX4 Microprocessor Data Book, Section 2.22
12 *
13 * GPIO32 is a standard optional extension to the Xtensa architecture core that
14 * provides preconfigured output and input ports for intra SoC signaling. The
15 * GPIO32 option is implemented as 32bit Tensilica Instruction Extension (TIE)
16 * output state called EXPSTATE, and 32bit input wire called IMPWIRE. This
17 * driver treats input and output states as two distinct devices.
18 *
19 * Access to GPIO32 specific instructions is controlled by the CPENABLE
20 * (Coprocessor Enable Bits) register. By default Xtensa Linux startup code
21 * disables access to all coprocessors. This driver sets the CPENABLE bit
22 * corresponding to GPIO32 before any GPIO32 specific instruction, and restores
23 * CPENABLE state after that.
24 *
25 * This driver is currently incompatible with SMP. The GPIO32 extension is not
26 * guaranteed to be available in all cores. Moreover, each core controls a
27 * different set of IO wires. A theoretical SMP aware version of this driver
28 * would need to have a per core workqueue to do the actual GPIO manipulation.
29 */
30
31#include <linux/err.h>
32#include <linux/module.h>
33#include <linux/gpio.h>
34#include <linux/bitops.h>
35#include <linux/platform_device.h>
36
37#include <asm/coprocessor.h> /* CPENABLE read/write macros */
38
39#ifndef XCHAL_CP_ID_XTIOP
40#error GPIO32 option is not enabled for your xtensa core variant
41#endif
42
43#if XCHAL_HAVE_CP
44
45static inline unsigned long enable_cp(unsigned long *cpenable)
46{
47 unsigned long flags;
48
49 local_irq_save(flags);
50 RSR_CPENABLE(*cpenable);
51 WSR_CPENABLE(*cpenable | BIT(XCHAL_CP_ID_XTIOP));
52
53 return flags;
54}
55
56static inline void disable_cp(unsigned long flags, unsigned long cpenable)
57{
58 WSR_CPENABLE(cpenable);
59 local_irq_restore(flags);
60}
61
62#else
63
64static inline unsigned long enable_cp(unsigned long *cpenable)
65{
66 *cpenable = 0; /* avoid uninitialized value warning */
67 return 0;
68}
69
70static inline void disable_cp(unsigned long flags, unsigned long cpenable)
71{
72}
73
74#endif /* XCHAL_HAVE_CP */
75
76static int xtensa_impwire_get_direction(struct gpio_chip *gc, unsigned offset)
77{
78 return 1; /* input only */
79}
80
81static int xtensa_impwire_get_value(struct gpio_chip *gc, unsigned offset)
82{
83 unsigned long flags, saved_cpenable;
84 u32 impwire;
85
86 flags = enable_cp(&saved_cpenable);
87 __asm__ __volatile__("read_impwire %0" : "=a" (impwire));
88 disable_cp(flags, saved_cpenable);
89
90 return !!(impwire & BIT(offset));
91}
92
93static void xtensa_impwire_set_value(struct gpio_chip *gc, unsigned offset,
94 int value)
95{
96 BUG(); /* output only; should never be called */
97}
98
99static int xtensa_expstate_get_direction(struct gpio_chip *gc, unsigned offset)
100{
101 return 0; /* output only */
102}
103
104static int xtensa_expstate_get_value(struct gpio_chip *gc, unsigned offset)
105{
106 unsigned long flags, saved_cpenable;
107 u32 expstate;
108
109 flags = enable_cp(&saved_cpenable);
110 __asm__ __volatile__("rur.expstate %0" : "=a" (expstate));
111 disable_cp(flags, saved_cpenable);
112
113 return !!(expstate & BIT(offset));
114}
115
116static void xtensa_expstate_set_value(struct gpio_chip *gc, unsigned offset,
117 int value)
118{
119 unsigned long flags, saved_cpenable;
120 u32 mask = BIT(offset);
121 u32 val = value ? BIT(offset) : 0;
122
123 flags = enable_cp(&saved_cpenable);
124 __asm__ __volatile__("wrmsk_expstate %0, %1"
125 :: "a" (val), "a" (mask));
126 disable_cp(flags, saved_cpenable);
127}
128
129static struct gpio_chip impwire_chip = {
130 .label = "impwire",
131 .base = -1,
132 .ngpio = 32,
133 .get_direction = xtensa_impwire_get_direction,
134 .get = xtensa_impwire_get_value,
135 .set = xtensa_impwire_set_value,
136};
137
138static struct gpio_chip expstate_chip = {
139 .label = "expstate",
140 .base = -1,
141 .ngpio = 32,
142 .get_direction = xtensa_expstate_get_direction,
143 .get = xtensa_expstate_get_value,
144 .set = xtensa_expstate_set_value,
145};
146
147static int xtensa_gpio_probe(struct platform_device *pdev)
148{
149 int ret;
150
151 ret = gpiochip_add_data(&impwire_chip, NULL);
152 if (ret)
153 return ret;
154 return gpiochip_add_data(&expstate_chip, NULL);
155}
156
157static struct platform_driver xtensa_gpio_driver = {
158 .driver = {
159 .name = "xtensa-gpio",
160 },
161 .probe = xtensa_gpio_probe,
162};
163
164static int __init xtensa_gpio_init(void)
165{
166 struct platform_device *pdev;
167
168 pdev = platform_device_register_simple("xtensa-gpio", 0, NULL, 0);
169 if (IS_ERR(pdev))
170 return PTR_ERR(pdev);
171
172 return platform_driver_register(&xtensa_gpio_driver);
173}
174device_initcall(xtensa_gpio_init);
175
176MODULE_AUTHOR("Baruch Siach <baruch@tkos.co.il>");
177MODULE_DESCRIPTION("Xtensa LX4 GPIO32 driver");
178MODULE_LICENSE("GPL");