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1/* SPDX-License-Identifier: GPL-2.0 */
2/*
3 * Copyright IBM Corp. 1999, 2012
4 * Author(s): Hartmut Penner <hp@de.ibm.com>,
5 * Martin Schwidefsky <schwidefsky@de.ibm.com>,
6 * Denis Joseph Barrow,
7 */
8
9#ifndef _ASM_S390_LOWCORE_H
10#define _ASM_S390_LOWCORE_H
11
12#include <linux/types.h>
13#include <asm/ptrace.h>
14#include <asm/cpu.h>
15#include <asm/types.h>
16
17#define LC_ORDER 1
18#define LC_PAGES 2
19
20struct pgm_tdb {
21 u64 data[32];
22};
23
24struct lowcore {
25 __u8 pad_0x0000[0x0014-0x0000]; /* 0x0000 */
26 __u32 ipl_parmblock_ptr; /* 0x0014 */
27 __u8 pad_0x0018[0x0080-0x0018]; /* 0x0018 */
28 __u32 ext_params; /* 0x0080 */
29 union {
30 struct {
31 __u16 ext_cpu_addr; /* 0x0084 */
32 __u16 ext_int_code; /* 0x0086 */
33 };
34 __u32 ext_int_code_addr;
35 };
36 __u32 svc_int_code; /* 0x0088 */
37 union {
38 struct {
39 __u16 pgm_ilc; /* 0x008c */
40 __u16 pgm_code; /* 0x008e */
41 };
42 __u32 pgm_int_code;
43 };
44 __u32 data_exc_code; /* 0x0090 */
45 __u16 mon_class_num; /* 0x0094 */
46 union {
47 struct {
48 __u8 per_code; /* 0x0096 */
49 __u8 per_atmid; /* 0x0097 */
50 };
51 __u16 per_code_combined;
52 };
53 __u64 per_address; /* 0x0098 */
54 __u8 exc_access_id; /* 0x00a0 */
55 __u8 per_access_id; /* 0x00a1 */
56 __u8 op_access_id; /* 0x00a2 */
57 __u8 ar_mode_id; /* 0x00a3 */
58 __u8 pad_0x00a4[0x00a8-0x00a4]; /* 0x00a4 */
59 __u64 trans_exc_code; /* 0x00a8 */
60 __u64 monitor_code; /* 0x00b0 */
61 union {
62 struct {
63 __u16 subchannel_id; /* 0x00b8 */
64 __u16 subchannel_nr; /* 0x00ba */
65 __u32 io_int_parm; /* 0x00bc */
66 __u32 io_int_word; /* 0x00c0 */
67 };
68 struct tpi_info tpi_info; /* 0x00b8 */
69 };
70 __u8 pad_0x00c4[0x00c8-0x00c4]; /* 0x00c4 */
71 __u32 stfl_fac_list; /* 0x00c8 */
72 __u8 pad_0x00cc[0x00e8-0x00cc]; /* 0x00cc */
73 __u64 mcck_interruption_code; /* 0x00e8 */
74 __u8 pad_0x00f0[0x00f4-0x00f0]; /* 0x00f0 */
75 __u32 external_damage_code; /* 0x00f4 */
76 __u64 failing_storage_address; /* 0x00f8 */
77 __u8 pad_0x0100[0x0110-0x0100]; /* 0x0100 */
78 __u64 pgm_last_break; /* 0x0110 */
79 __u8 pad_0x0118[0x0120-0x0118]; /* 0x0118 */
80 psw_t restart_old_psw; /* 0x0120 */
81 psw_t external_old_psw; /* 0x0130 */
82 psw_t svc_old_psw; /* 0x0140 */
83 psw_t program_old_psw; /* 0x0150 */
84 psw_t mcck_old_psw; /* 0x0160 */
85 psw_t io_old_psw; /* 0x0170 */
86 __u8 pad_0x0180[0x01a0-0x0180]; /* 0x0180 */
87 psw_t restart_psw; /* 0x01a0 */
88 psw_t external_new_psw; /* 0x01b0 */
89 psw_t svc_new_psw; /* 0x01c0 */
90 psw_t program_new_psw; /* 0x01d0 */
91 psw_t mcck_new_psw; /* 0x01e0 */
92 psw_t io_new_psw; /* 0x01f0 */
93
94 /* Save areas. */
95 __u64 save_area_sync[8]; /* 0x0200 */
96 __u64 save_area_async[8]; /* 0x0240 */
97 __u64 save_area_restart[1]; /* 0x0280 */
98
99 /* CPU flags. */
100 __u64 cpu_flags; /* 0x0288 */
101
102 /* Return psws. */
103 psw_t return_psw; /* 0x0290 */
104 psw_t return_mcck_psw; /* 0x02a0 */
105
106 __u64 last_break; /* 0x02b0 */
107
108 /* CPU accounting and timing values. */
109 __u64 sys_enter_timer; /* 0x02b8 */
110 __u64 mcck_enter_timer; /* 0x02c0 */
111 __u64 exit_timer; /* 0x02c8 */
112 __u64 user_timer; /* 0x02d0 */
113 __u64 guest_timer; /* 0x02d8 */
114 __u64 system_timer; /* 0x02e0 */
115 __u64 hardirq_timer; /* 0x02e8 */
116 __u64 softirq_timer; /* 0x02f0 */
117 __u64 steal_timer; /* 0x02f8 */
118 __u64 avg_steal_timer; /* 0x0300 */
119 __u64 last_update_timer; /* 0x0308 */
120 __u64 last_update_clock; /* 0x0310 */
121 __u64 int_clock; /* 0x0318*/
122 __u64 mcck_clock; /* 0x0320 */
123 __u64 clock_comparator; /* 0x0328 */
124 __u64 boot_clock[2]; /* 0x0330 */
125
126 /* Current process. */
127 __u64 current_task; /* 0x0340 */
128 __u64 kernel_stack; /* 0x0348 */
129
130 /* Interrupt, DAT-off and restartstack. */
131 __u64 async_stack; /* 0x0350 */
132 __u64 nodat_stack; /* 0x0358 */
133 __u64 restart_stack; /* 0x0360 */
134 __u64 mcck_stack; /* 0x0368 */
135 /* Restart function and parameter. */
136 __u64 restart_fn; /* 0x0370 */
137 __u64 restart_data; /* 0x0378 */
138 __u32 restart_source; /* 0x0380 */
139 __u32 restart_flags; /* 0x0384 */
140
141 /* Address space pointer. */
142 __u64 kernel_asce; /* 0x0388 */
143 __u64 user_asce; /* 0x0390 */
144
145 /*
146 * The lpp and current_pid fields form a
147 * 64-bit value that is set as program
148 * parameter with the LPP instruction.
149 */
150 __u32 lpp; /* 0x0398 */
151 __u32 current_pid; /* 0x039c */
152
153 /* SMP info area */
154 __u32 cpu_nr; /* 0x03a0 */
155 __u32 softirq_pending; /* 0x03a4 */
156 __s32 preempt_count; /* 0x03a8 */
157 __u32 spinlock_lockval; /* 0x03ac */
158 __u32 spinlock_index; /* 0x03b0 */
159 __u32 fpu_flags; /* 0x03b4 */
160 __u64 percpu_offset; /* 0x03b8 */
161 __u8 pad_0x03c0[0x03c8-0x03c0]; /* 0x03c0 */
162 __u64 machine_flags; /* 0x03c8 */
163 __u64 gmap; /* 0x03d0 */
164 __u8 pad_0x03d8[0x0400-0x03d8]; /* 0x03d8 */
165
166 __u32 return_lpswe; /* 0x0400 */
167 __u32 return_mcck_lpswe; /* 0x0404 */
168 __u8 pad_0x040a[0x0e00-0x0408]; /* 0x0408 */
169
170 /*
171 * 0xe00 contains the address of the IPL Parameter Information
172 * block. Dump tools need IPIB for IPL after dump.
173 * Note: do not change the position of any fields in 0x0e00-0x0f00
174 */
175 __u64 ipib; /* 0x0e00 */
176 __u32 ipib_checksum; /* 0x0e08 */
177 __u64 vmcore_info; /* 0x0e0c */
178 __u8 pad_0x0e14[0x0e18-0x0e14]; /* 0x0e14 */
179 __u64 os_info; /* 0x0e18 */
180 __u8 pad_0x0e20[0x11b0-0x0e20]; /* 0x0e20 */
181
182 /* Pointer to the machine check extended save area */
183 __u64 mcesad; /* 0x11b0 */
184
185 /* 64 bit extparam used for pfault/diag 250: defined by architecture */
186 __u64 ext_params2; /* 0x11B8 */
187 __u8 pad_0x11c0[0x1200-0x11C0]; /* 0x11C0 */
188
189 /* CPU register save area: defined by architecture */
190 __u64 floating_pt_save_area[16]; /* 0x1200 */
191 __u64 gpregs_save_area[16]; /* 0x1280 */
192 psw_t psw_save_area; /* 0x1300 */
193 __u8 pad_0x1310[0x1318-0x1310]; /* 0x1310 */
194 __u32 prefixreg_save_area; /* 0x1318 */
195 __u32 fpt_creg_save_area; /* 0x131c */
196 __u8 pad_0x1320[0x1324-0x1320]; /* 0x1320 */
197 __u32 tod_progreg_save_area; /* 0x1324 */
198 __u32 cpu_timer_save_area[2]; /* 0x1328 */
199 __u32 clock_comp_save_area[2]; /* 0x1330 */
200 __u64 last_break_save_area; /* 0x1338 */
201 __u32 access_regs_save_area[16]; /* 0x1340 */
202 __u64 cregs_save_area[16]; /* 0x1380 */
203 __u8 pad_0x1400[0x1500-0x1400]; /* 0x1400 */
204 /* Cryptography-counter designation */
205 __u64 ccd; /* 0x1500 */
206 /* AI-extension counter designation */
207 __u64 aicd; /* 0x1508 */
208 __u8 pad_0x1510[0x1800-0x1510]; /* 0x1510 */
209
210 /* Transaction abort diagnostic block */
211 struct pgm_tdb pgm_tdb; /* 0x1800 */
212 __u8 pad_0x1900[0x2000-0x1900]; /* 0x1900 */
213} __packed __aligned(8192);
214
215#define S390_lowcore (*((struct lowcore *) 0))
216
217extern struct lowcore *lowcore_ptr[];
218
219static inline void set_prefix(__u32 address)
220{
221 asm volatile("spx %0" : : "Q" (address) : "memory");
222}
223
224static inline __u32 store_prefix(void)
225{
226 __u32 address;
227
228 asm volatile("stpx %0" : "=Q" (address));
229 return address;
230}
231
232#endif /* _ASM_S390_LOWCORE_H */
1/* SPDX-License-Identifier: GPL-2.0 */
2/*
3 * Copyright IBM Corp. 1999, 2012
4 * Author(s): Hartmut Penner <hp@de.ibm.com>,
5 * Martin Schwidefsky <schwidefsky@de.ibm.com>,
6 * Denis Joseph Barrow,
7 */
8
9#ifndef _ASM_S390_LOWCORE_H
10#define _ASM_S390_LOWCORE_H
11
12#include <linux/types.h>
13#include <asm/ptrace.h>
14#include <asm/cpu.h>
15#include <asm/types.h>
16
17#define LC_ORDER 1
18#define LC_PAGES 2
19
20struct lowcore {
21 __u8 pad_0x0000[0x0014-0x0000]; /* 0x0000 */
22 __u32 ipl_parmblock_ptr; /* 0x0014 */
23 __u8 pad_0x0018[0x0080-0x0018]; /* 0x0018 */
24 __u32 ext_params; /* 0x0080 */
25 __u16 ext_cpu_addr; /* 0x0084 */
26 __u16 ext_int_code; /* 0x0086 */
27 __u16 svc_ilc; /* 0x0088 */
28 __u16 svc_code; /* 0x008a */
29 __u16 pgm_ilc; /* 0x008c */
30 __u16 pgm_code; /* 0x008e */
31 __u32 data_exc_code; /* 0x0090 */
32 __u16 mon_class_num; /* 0x0094 */
33 __u8 per_code; /* 0x0096 */
34 __u8 per_atmid; /* 0x0097 */
35 __u64 per_address; /* 0x0098 */
36 __u8 exc_access_id; /* 0x00a0 */
37 __u8 per_access_id; /* 0x00a1 */
38 __u8 op_access_id; /* 0x00a2 */
39 __u8 ar_mode_id; /* 0x00a3 */
40 __u8 pad_0x00a4[0x00a8-0x00a4]; /* 0x00a4 */
41 __u64 trans_exc_code; /* 0x00a8 */
42 __u64 monitor_code; /* 0x00b0 */
43 __u16 subchannel_id; /* 0x00b8 */
44 __u16 subchannel_nr; /* 0x00ba */
45 __u32 io_int_parm; /* 0x00bc */
46 __u32 io_int_word; /* 0x00c0 */
47 __u8 pad_0x00c4[0x00c8-0x00c4]; /* 0x00c4 */
48 __u32 stfl_fac_list; /* 0x00c8 */
49 __u8 pad_0x00cc[0x00e8-0x00cc]; /* 0x00cc */
50 __u64 mcck_interruption_code; /* 0x00e8 */
51 __u8 pad_0x00f0[0x00f4-0x00f0]; /* 0x00f0 */
52 __u32 external_damage_code; /* 0x00f4 */
53 __u64 failing_storage_address; /* 0x00f8 */
54 __u8 pad_0x0100[0x0110-0x0100]; /* 0x0100 */
55 __u64 breaking_event_addr; /* 0x0110 */
56 __u8 pad_0x0118[0x0120-0x0118]; /* 0x0118 */
57 psw_t restart_old_psw; /* 0x0120 */
58 psw_t external_old_psw; /* 0x0130 */
59 psw_t svc_old_psw; /* 0x0140 */
60 psw_t program_old_psw; /* 0x0150 */
61 psw_t mcck_old_psw; /* 0x0160 */
62 psw_t io_old_psw; /* 0x0170 */
63 __u8 pad_0x0180[0x01a0-0x0180]; /* 0x0180 */
64 psw_t restart_psw; /* 0x01a0 */
65 psw_t external_new_psw; /* 0x01b0 */
66 psw_t svc_new_psw; /* 0x01c0 */
67 psw_t program_new_psw; /* 0x01d0 */
68 psw_t mcck_new_psw; /* 0x01e0 */
69 psw_t io_new_psw; /* 0x01f0 */
70
71 /* Save areas. */
72 __u64 save_area_sync[8]; /* 0x0200 */
73 __u64 save_area_async[8]; /* 0x0240 */
74 __u64 save_area_restart[1]; /* 0x0280 */
75
76 /* CPU flags. */
77 __u64 cpu_flags; /* 0x0288 */
78
79 /* Return psws. */
80 psw_t return_psw; /* 0x0290 */
81 psw_t return_mcck_psw; /* 0x02a0 */
82
83 /* CPU accounting and timing values. */
84 __u64 sync_enter_timer; /* 0x02b0 */
85 __u64 async_enter_timer; /* 0x02b8 */
86 __u64 mcck_enter_timer; /* 0x02c0 */
87 __u64 exit_timer; /* 0x02c8 */
88 __u64 user_timer; /* 0x02d0 */
89 __u64 guest_timer; /* 0x02d8 */
90 __u64 system_timer; /* 0x02e0 */
91 __u64 hardirq_timer; /* 0x02e8 */
92 __u64 softirq_timer; /* 0x02f0 */
93 __u64 steal_timer; /* 0x02f8 */
94 __u64 last_update_timer; /* 0x0300 */
95 __u64 last_update_clock; /* 0x0308 */
96 __u64 int_clock; /* 0x0310 */
97 __u64 mcck_clock; /* 0x0318 */
98 __u64 clock_comparator; /* 0x0320 */
99 __u64 boot_clock[2]; /* 0x0328 */
100
101 /* Current process. */
102 __u64 current_task; /* 0x0338 */
103 __u64 kernel_stack; /* 0x0340 */
104
105 /* Interrupt, panic and restart stack. */
106 __u64 async_stack; /* 0x0348 */
107 __u64 panic_stack; /* 0x0350 */
108 __u64 restart_stack; /* 0x0358 */
109
110 /* Restart function and parameter. */
111 __u64 restart_fn; /* 0x0360 */
112 __u64 restart_data; /* 0x0368 */
113 __u64 restart_source; /* 0x0370 */
114
115 /* Address space pointer. */
116 __u64 kernel_asce; /* 0x0378 */
117 __u64 user_asce; /* 0x0380 */
118 __u64 vdso_asce; /* 0x0388 */
119
120 /*
121 * The lpp and current_pid fields form a
122 * 64-bit value that is set as program
123 * parameter with the LPP instruction.
124 */
125 __u32 lpp; /* 0x0390 */
126 __u32 current_pid; /* 0x0394 */
127
128 /* SMP info area */
129 __u32 cpu_nr; /* 0x0398 */
130 __u32 softirq_pending; /* 0x039c */
131 __u32 preempt_count; /* 0x03a0 */
132 __u32 spinlock_lockval; /* 0x03a4 */
133 __u32 spinlock_index; /* 0x03a8 */
134 __u32 fpu_flags; /* 0x03ac */
135 __u64 percpu_offset; /* 0x03b0 */
136 __u64 vdso_per_cpu_data; /* 0x03b8 */
137 __u64 machine_flags; /* 0x03c0 */
138 __u64 gmap; /* 0x03c8 */
139 __u8 pad_0x03d0[0x0400-0x03d0]; /* 0x03d0 */
140
141 /* br %r1 trampoline */
142 __u16 br_r1_trampoline; /* 0x0400 */
143 __u8 pad_0x0402[0x0e00-0x0402]; /* 0x0402 */
144
145 /*
146 * 0xe00 contains the address of the IPL Parameter Information
147 * block. Dump tools need IPIB for IPL after dump.
148 * Note: do not change the position of any fields in 0x0e00-0x0f00
149 */
150 __u64 ipib; /* 0x0e00 */
151 __u32 ipib_checksum; /* 0x0e08 */
152 __u64 vmcore_info; /* 0x0e0c */
153 __u8 pad_0x0e14[0x0e18-0x0e14]; /* 0x0e14 */
154 __u64 os_info; /* 0x0e18 */
155 __u8 pad_0x0e20[0x0f00-0x0e20]; /* 0x0e20 */
156
157 /* Extended facility list */
158 __u64 stfle_fac_list[16]; /* 0x0f00 */
159 __u64 alt_stfle_fac_list[16]; /* 0x0f80 */
160 __u8 pad_0x1000[0x11b0-0x1000]; /* 0x1000 */
161
162 /* Pointer to the machine check extended save area */
163 __u64 mcesad; /* 0x11b0 */
164
165 /* 64 bit extparam used for pfault/diag 250: defined by architecture */
166 __u64 ext_params2; /* 0x11B8 */
167 __u8 pad_0x11c0[0x1200-0x11C0]; /* 0x11C0 */
168
169 /* CPU register save area: defined by architecture */
170 __u64 floating_pt_save_area[16]; /* 0x1200 */
171 __u64 gpregs_save_area[16]; /* 0x1280 */
172 psw_t psw_save_area; /* 0x1300 */
173 __u8 pad_0x1310[0x1318-0x1310]; /* 0x1310 */
174 __u32 prefixreg_save_area; /* 0x1318 */
175 __u32 fpt_creg_save_area; /* 0x131c */
176 __u8 pad_0x1320[0x1324-0x1320]; /* 0x1320 */
177 __u32 tod_progreg_save_area; /* 0x1324 */
178 __u32 cpu_timer_save_area[2]; /* 0x1328 */
179 __u32 clock_comp_save_area[2]; /* 0x1330 */
180 __u8 pad_0x1338[0x1340-0x1338]; /* 0x1338 */
181 __u32 access_regs_save_area[16]; /* 0x1340 */
182 __u64 cregs_save_area[16]; /* 0x1380 */
183 __u8 pad_0x1400[0x1800-0x1400]; /* 0x1400 */
184
185 /* Transaction abort diagnostic block */
186 __u8 pgm_tdb[256]; /* 0x1800 */
187 __u8 pad_0x1900[0x2000-0x1900]; /* 0x1900 */
188} __packed;
189
190#define S390_lowcore (*((struct lowcore *) 0))
191
192extern struct lowcore *lowcore_ptr[];
193
194static inline void set_prefix(__u32 address)
195{
196 asm volatile("spx %0" : : "Q" (address) : "memory");
197}
198
199static inline __u32 store_prefix(void)
200{
201 __u32 address;
202
203 asm volatile("stpx %0" : "=Q" (address));
204 return address;
205}
206
207#endif /* _ASM_S390_LOWCORE_H */