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1// SPDX-License-Identifier: GPL-2.0-or-later
2/*
3 * GE SBC610 Device Tree Source
4 *
5 * Copyright 2008 GE Intelligent Platforms Embedded Systems, Inc.
6 *
7 * Based on: SBS CM6 Device Tree Source
8 * Copyright 2007 SBS Technologies GmbH & Co. KG
9 * And: mpc8641_hpcn.dts (MPC8641 HPCN Device Tree Source)
10 * Copyright 2006 Freescale Semiconductor Inc.
11 */
12
13/*
14 * Compiled with dtc -I dts -O dtb -o gef_sbc610.dtb gef_sbc610.dts
15 */
16
17/include/ "mpc8641si-pre.dtsi"
18
19/ {
20 model = "GEF_SBC610";
21 compatible = "gef,sbc610";
22
23 memory {
24 device_type = "memory";
25 reg = <0x0 0x40000000>; // set by uboot
26 };
27
28 lbc: localbus@fef05000 {
29 reg = <0xfef05000 0x1000>;
30
31 ranges = <0 0 0xff000000 0x01000000 // 16MB Boot flash
32 1 0 0xe8000000 0x08000000 // Paged Flash 0
33 2 0 0xe0000000 0x08000000 // Paged Flash 1
34 3 0 0xfc100000 0x00020000 // NVRAM
35 4 0 0xfc000000 0x00008000 // FPGA
36 5 0 0xfc008000 0x00008000 // AFIX FPGA
37 6 0 0xfd000000 0x00800000 // IO FPGA (8-bit)
38 7 0 0xfd800000 0x00800000>; // IO FPGA (32-bit)
39
40 /* flash@0,0 is a mirror of part of the memory in flash@1,0
41 flash@0,0 {
42 compatible = "gef,sbc610-firmware-mirror", "cfi-flash";
43 reg = <0x0 0x0 0x1000000>;
44 bank-width = <4>;
45 device-width = <2>;
46 #address-cells = <1>;
47 #size-cells = <1>;
48 partition@0 {
49 label = "firmware";
50 reg = <0x0 0x1000000>;
51 read-only;
52 };
53 };
54 */
55
56 flash@1,0 {
57 compatible = "gef,sbc610-paged-flash", "cfi-flash";
58 reg = <0x1 0x0 0x8000000>;
59 bank-width = <4>;
60 device-width = <2>;
61 #address-cells = <1>;
62 #size-cells = <1>;
63 partition@0 {
64 label = "user";
65 reg = <0x0 0x7800000>;
66 };
67 partition@7800000 {
68 label = "firmware";
69 reg = <0x7800000 0x800000>;
70 read-only;
71 };
72 };
73
74 nvram@3,0 {
75 device_type = "nvram";
76 compatible = "simtek,stk14ca8";
77 reg = <0x3 0x0 0x20000>;
78 };
79
80 fpga@4,0 {
81 compatible = "gef,fpga-regs";
82 reg = <0x4 0x0 0x40>;
83 };
84
85 wdt@4,2000 {
86 compatible = "gef,fpga-wdt";
87 reg = <0x4 0x2000 0x8>;
88 interrupts = <0x1a 0x4>;
89 interrupt-parent = <&gef_pic>;
90 };
91 /* Second watchdog available, driver currently supports one.
92 wdt@4,2010 {
93 compatible = "gef,fpga-wdt";
94 reg = <0x4 0x2010 0x8>;
95 interrupts = <0x1b 0x4>;
96 interrupt-parent = <&gef_pic>;
97 };
98 */
99 gef_pic: pic@4,4000 {
100 #interrupt-cells = <1>;
101 interrupt-controller;
102 compatible = "gef,fpga-pic";
103 reg = <0x4 0x4000 0x20>;
104 interrupts = <0x8 0x9 0 0>;
105
106 };
107 gef_gpio: gpio@7,14000 {
108 #gpio-cells = <2>;
109 compatible = "gef,sbc610-gpio";
110 reg = <0x7 0x14000 0x24>;
111 gpio-controller;
112 };
113 };
114
115 soc: soc@fef00000 {
116 ranges = <0x0 0xfef00000 0x00100000>;
117
118 i2c@3000 {
119 hwmon@48 {
120 compatible = "national,lm92";
121 reg = <0x48>;
122 };
123
124 hwmon@4c {
125 compatible = "adi,adt7461";
126 reg = <0x4c>;
127 };
128
129 rtc@51 {
130 compatible = "epson,rx8581";
131 reg = <0x00000051>;
132 };
133
134 eti@6b {
135 compatible = "dallas,ds1682";
136 reg = <0x6b>;
137 };
138 };
139
140 enet0: ethernet@24000 {
141 tbi-handle = <&tbi0>;
142 phy-handle = <&phy0>;
143 phy-connection-type = "gmii";
144 };
145
146 mdio@24520 {
147 phy0: ethernet-phy@0 {
148 interrupt-parent = <&gef_pic>;
149 interrupts = <0x9 0x4>;
150 reg = <1>;
151 };
152 phy2: ethernet-phy@2 {
153 interrupt-parent = <&gef_pic>;
154 interrupts = <0x8 0x4>;
155 reg = <3>;
156 };
157 tbi0: tbi-phy@11 {
158 reg = <0x11>;
159 device_type = "tbi-phy";
160 };
161 };
162
163 enet1: ethernet@26000 {
164 tbi-handle = <&tbi2>;
165 phy-handle = <&phy2>;
166 phy-connection-type = "gmii";
167 };
168
169 mdio@26520 {
170 tbi2: tbi-phy@11 {
171 reg = <0x11>;
172 device_type = "tbi-phy";
173 };
174 };
175
176 enet2: ethernet@25000 {
177 status = "disabled";
178 };
179
180 mdio@25520 {
181 status = "disabled";
182 };
183
184 enet3: ethernet@27000 {
185 status = "disabled";
186 };
187
188 mdio@27520 {
189 status = "disabled";
190 };
191 };
192
193 pci0: pcie@fef08000 {
194 reg = <0xfef08000 0x1000>;
195 ranges = <0x02000000 0x0 0x80000000 0x80000000 0x0 0x40000000
196 0x01000000 0x0 0x00000000 0xfe000000 0x0 0x00400000>;
197
198 pcie@0 {
199 ranges = <0x02000000 0x0 0x80000000
200 0x02000000 0x0 0x80000000
201 0x0 0x40000000
202
203 0x01000000 0x0 0x00000000
204 0x01000000 0x0 0x00000000
205 0x0 0x00400000>;
206 };
207 };
208
209 pci1: pcie@fef09000 {
210 status = "disabled";
211 };
212};
213
214/include/ "mpc8641si-post.dtsi"
1/*
2 * GE SBC610 Device Tree Source
3 *
4 * Copyright 2008 GE Intelligent Platforms Embedded Systems, Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
10 *
11 * Based on: SBS CM6 Device Tree Source
12 * Copyright 2007 SBS Technologies GmbH & Co. KG
13 * And: mpc8641_hpcn.dts (MPC8641 HPCN Device Tree Source)
14 * Copyright 2006 Freescale Semiconductor Inc.
15 */
16
17/*
18 * Compiled with dtc -I dts -O dtb -o gef_sbc610.dtb gef_sbc610.dts
19 */
20
21/include/ "mpc8641si-pre.dtsi"
22
23/ {
24 model = "GEF_SBC610";
25 compatible = "gef,sbc610";
26
27 memory {
28 device_type = "memory";
29 reg = <0x0 0x40000000>; // set by uboot
30 };
31
32 lbc: localbus@fef05000 {
33 reg = <0xfef05000 0x1000>;
34
35 ranges = <0 0 0xff000000 0x01000000 // 16MB Boot flash
36 1 0 0xe8000000 0x08000000 // Paged Flash 0
37 2 0 0xe0000000 0x08000000 // Paged Flash 1
38 3 0 0xfc100000 0x00020000 // NVRAM
39 4 0 0xfc000000 0x00008000 // FPGA
40 5 0 0xfc008000 0x00008000 // AFIX FPGA
41 6 0 0xfd000000 0x00800000 // IO FPGA (8-bit)
42 7 0 0xfd800000 0x00800000>; // IO FPGA (32-bit)
43
44 /* flash@0,0 is a mirror of part of the memory in flash@1,0
45 flash@0,0 {
46 compatible = "gef,sbc610-firmware-mirror", "cfi-flash";
47 reg = <0x0 0x0 0x1000000>;
48 bank-width = <4>;
49 device-width = <2>;
50 #address-cells = <1>;
51 #size-cells = <1>;
52 partition@0 {
53 label = "firmware";
54 reg = <0x0 0x1000000>;
55 read-only;
56 };
57 };
58 */
59
60 flash@1,0 {
61 compatible = "gef,sbc610-paged-flash", "cfi-flash";
62 reg = <0x1 0x0 0x8000000>;
63 bank-width = <4>;
64 device-width = <2>;
65 #address-cells = <1>;
66 #size-cells = <1>;
67 partition@0 {
68 label = "user";
69 reg = <0x0 0x7800000>;
70 };
71 partition@7800000 {
72 label = "firmware";
73 reg = <0x7800000 0x800000>;
74 read-only;
75 };
76 };
77
78 nvram@3,0 {
79 device_type = "nvram";
80 compatible = "simtek,stk14ca8";
81 reg = <0x3 0x0 0x20000>;
82 };
83
84 fpga@4,0 {
85 compatible = "gef,fpga-regs";
86 reg = <0x4 0x0 0x40>;
87 };
88
89 wdt@4,2000 {
90 compatible = "gef,fpga-wdt";
91 reg = <0x4 0x2000 0x8>;
92 interrupts = <0x1a 0x4>;
93 interrupt-parent = <&gef_pic>;
94 };
95 /* Second watchdog available, driver currently supports one.
96 wdt@4,2010 {
97 compatible = "gef,fpga-wdt";
98 reg = <0x4 0x2010 0x8>;
99 interrupts = <0x1b 0x4>;
100 interrupt-parent = <&gef_pic>;
101 };
102 */
103 gef_pic: pic@4,4000 {
104 #interrupt-cells = <1>;
105 interrupt-controller;
106 compatible = "gef,fpga-pic";
107 reg = <0x4 0x4000 0x20>;
108 interrupts = <0x8 0x9 0 0>;
109
110 };
111 gef_gpio: gpio@7,14000 {
112 #gpio-cells = <2>;
113 compatible = "gef,sbc610-gpio";
114 reg = <0x7 0x14000 0x24>;
115 gpio-controller;
116 };
117 };
118
119 soc: soc@fef00000 {
120 ranges = <0x0 0xfef00000 0x00100000>;
121
122 i2c@3000 {
123 hwmon@48 {
124 compatible = "national,lm92";
125 reg = <0x48>;
126 };
127
128 hwmon@4c {
129 compatible = "adi,adt7461";
130 reg = <0x4c>;
131 };
132
133 rtc@51 {
134 compatible = "epson,rx8581";
135 reg = <0x00000051>;
136 };
137
138 eti@6b {
139 compatible = "dallas,ds1682";
140 reg = <0x6b>;
141 };
142 };
143
144 enet0: ethernet@24000 {
145 tbi-handle = <&tbi0>;
146 phy-handle = <&phy0>;
147 phy-connection-type = "gmii";
148 };
149
150 mdio@24520 {
151 phy0: ethernet-phy@0 {
152 interrupt-parent = <&gef_pic>;
153 interrupts = <0x9 0x4>;
154 reg = <1>;
155 };
156 phy2: ethernet-phy@2 {
157 interrupt-parent = <&gef_pic>;
158 interrupts = <0x8 0x4>;
159 reg = <3>;
160 };
161 tbi0: tbi-phy@11 {
162 reg = <0x11>;
163 device_type = "tbi-phy";
164 };
165 };
166
167 enet1: ethernet@26000 {
168 tbi-handle = <&tbi2>;
169 phy-handle = <&phy2>;
170 phy-connection-type = "gmii";
171 };
172
173 mdio@26520 {
174 tbi2: tbi-phy@11 {
175 reg = <0x11>;
176 device_type = "tbi-phy";
177 };
178 };
179
180 enet2: ethernet@25000 {
181 status = "disabled";
182 };
183
184 mdio@25520 {
185 status = "disabled";
186 };
187
188 enet3: ethernet@27000 {
189 status = "disabled";
190 };
191
192 mdio@27520 {
193 status = "disabled";
194 };
195 };
196
197 pci0: pcie@fef08000 {
198 reg = <0xfef08000 0x1000>;
199 ranges = <0x02000000 0x0 0x80000000 0x80000000 0x0 0x40000000
200 0x01000000 0x0 0x00000000 0xfe000000 0x0 0x00400000>;
201
202 pcie@0 {
203 ranges = <0x02000000 0x0 0x80000000
204 0x02000000 0x0 0x80000000
205 0x0 0x40000000
206
207 0x01000000 0x0 0x00000000
208 0x01000000 0x0 0x00000000
209 0x0 0x00400000>;
210 };
211 };
212
213 pci1: pcie@fef09000 {
214 status = "disabled";
215 };
216};
217
218/include/ "mpc8641si-post.dtsi"