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1// SPDX-License-Identifier: GPL-2.0
2/dts-v1/;
3
4#include <dt-bindings/input/input.h>
5#include <dt-bindings/thermal/thermal.h>
6
7#include "tegra20.dtsi"
8#include "tegra20-cpu-opp.dtsi"
9#include "tegra20-cpu-opp-microvolt.dtsi"
10
11/ {
12 model = "Toshiba AC100 / Dynabook AZ";
13 compatible = "compal,paz00", "nvidia,tegra20";
14
15 aliases {
16 mmc0 = &sdmmc4; /* eMMC */
17 mmc1 = &sdmmc1; /* MicroSD */
18 rtc0 = "/i2c@7000d000/tps6586x@34";
19 rtc1 = "/rtc@7000e000";
20 serial0 = &uarta;
21 serial1 = &uartc;
22 };
23
24 chosen {
25 stdout-path = "serial0:115200n8";
26 };
27
28 memory@0 {
29 reg = <0x00000000 0x20000000>;
30 };
31
32 host1x@50000000 {
33 dc@54200000 {
34 rgb {
35 status = "okay";
36
37 nvidia,panel = <&panel>;
38 };
39 };
40
41 hdmi@54280000 {
42 status = "okay";
43
44 vdd-supply = <&hdmi_vdd_reg>;
45 pll-supply = <&hdmi_pll_reg>;
46
47 nvidia,ddc-i2c-bus = <&hdmi_ddc>;
48 nvidia,hpd-gpio = <&gpio TEGRA_GPIO(N, 7)
49 GPIO_ACTIVE_HIGH>;
50 };
51 };
52
53 pinmux@70000014 {
54 pinctrl-names = "default";
55 pinctrl-0 = <&state_default>;
56
57 state_default: pinmux {
58 ata {
59 nvidia,pins = "ata", "atc", "atd", "ate",
60 "dap2", "gmb", "gmc", "gmd", "spia",
61 "spib", "spic", "spid", "spie";
62 nvidia,function = "gmi";
63 };
64 atb {
65 nvidia,pins = "atb", "gma", "gme";
66 nvidia,function = "sdio4";
67 };
68 cdev1 {
69 nvidia,pins = "cdev1";
70 nvidia,function = "plla_out";
71 };
72 cdev2 {
73 nvidia,pins = "cdev2";
74 nvidia,function = "pllp_out4";
75 };
76 crtp {
77 nvidia,pins = "crtp";
78 nvidia,function = "crt";
79 };
80 csus {
81 nvidia,pins = "csus";
82 nvidia,function = "pllc_out1";
83 };
84 dap1 {
85 nvidia,pins = "dap1";
86 nvidia,function = "dap1";
87 };
88 dap3 {
89 nvidia,pins = "dap3";
90 nvidia,function = "dap3";
91 };
92 dap4 {
93 nvidia,pins = "dap4";
94 nvidia,function = "dap4";
95 };
96 ddc {
97 nvidia,pins = "ddc";
98 nvidia,function = "i2c2";
99 };
100 dta {
101 nvidia,pins = "dta", "dtb", "dtc", "dtd", "dte";
102 nvidia,function = "rsvd1";
103 };
104 dtf {
105 nvidia,pins = "dtf";
106 nvidia,function = "i2c3";
107 };
108 gpu {
109 nvidia,pins = "gpu", "sdb", "sdd";
110 nvidia,function = "pwm";
111 };
112 gpu7 {
113 nvidia,pins = "gpu7";
114 nvidia,function = "rtck";
115 };
116 gpv {
117 nvidia,pins = "gpv", "slxa", "slxk";
118 nvidia,function = "pcie";
119 };
120 hdint {
121 nvidia,pins = "hdint", "pta";
122 nvidia,function = "hdmi";
123 };
124 i2cp {
125 nvidia,pins = "i2cp";
126 nvidia,function = "i2cp";
127 };
128 irrx {
129 nvidia,pins = "irrx", "irtx";
130 nvidia,function = "uarta";
131 };
132 kbca {
133 nvidia,pins = "kbca", "kbcc", "kbce", "kbcf";
134 nvidia,function = "kbc";
135 };
136 kbcb {
137 nvidia,pins = "kbcb", "kbcd";
138 nvidia,function = "sdio2";
139 };
140 lcsn {
141 nvidia,pins = "lcsn", "ld0", "ld1", "ld2",
142 "ld3", "ld4", "ld5", "ld6", "ld7",
143 "ld8", "ld9", "ld10", "ld11", "ld12",
144 "ld13", "ld14", "ld15", "ld16", "ld17",
145 "ldc", "ldi", "lhp0", "lhp1", "lhp2",
146 "lhs", "lm0", "lm1", "lpp", "lpw0",
147 "lpw1", "lpw2", "lsc0", "lsc1", "lsck",
148 "lsda", "lsdi", "lspi", "lvp0", "lvp1",
149 "lvs";
150 nvidia,function = "displaya";
151 };
152 owc {
153 nvidia,pins = "owc";
154 nvidia,function = "owr";
155 };
156 pmc {
157 nvidia,pins = "pmc";
158 nvidia,function = "pwr_on";
159 };
160 rm {
161 nvidia,pins = "rm";
162 nvidia,function = "i2c1";
163 };
164 sdc {
165 nvidia,pins = "sdc";
166 nvidia,function = "twc";
167 };
168 sdio1 {
169 nvidia,pins = "sdio1";
170 nvidia,function = "sdio1";
171 };
172 slxc {
173 nvidia,pins = "slxc", "slxd";
174 nvidia,function = "spi4";
175 };
176 spdi {
177 nvidia,pins = "spdi", "spdo";
178 nvidia,function = "rsvd2";
179 };
180 spif {
181 nvidia,pins = "spif", "uac";
182 nvidia,function = "rsvd4";
183 };
184 spig {
185 nvidia,pins = "spig", "spih";
186 nvidia,function = "spi2_alt";
187 };
188 uaa {
189 nvidia,pins = "uaa", "uab", "uda";
190 nvidia,function = "ulpi";
191 };
192 uad {
193 nvidia,pins = "uad";
194 nvidia,function = "spdif";
195 };
196 uca {
197 nvidia,pins = "uca", "ucb";
198 nvidia,function = "uartc";
199 };
200 conf_ata {
201 nvidia,pins = "ata", "atb", "atc", "atd", "ate",
202 "cdev1", "cdev2", "dap1", "dap2", "dtf",
203 "gma", "gmb", "gmc", "gmd", "gme",
204 "gpu", "gpu7", "gpv", "i2cp", "pta",
205 "rm", "sdio1", "slxk", "spdo", "uac",
206 "uda";
207 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
208 nvidia,tristate = <TEGRA_PIN_DISABLE>;
209 };
210 conf_ck32 {
211 nvidia,pins = "ck32", "ddrc", "pmca", "pmcb",
212 "pmcc", "pmcd", "pmce", "xm2c", "xm2d";
213 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
214 };
215 conf_crtp {
216 nvidia,pins = "crtp", "dap3", "dap4", "dtb",
217 "dtc", "dte", "slxa", "slxc", "slxd",
218 "spdi";
219 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
220 nvidia,tristate = <TEGRA_PIN_ENABLE>;
221 };
222 conf_csus {
223 nvidia,pins = "csus", "spia", "spib", "spid",
224 "spif";
225 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
226 nvidia,tristate = <TEGRA_PIN_ENABLE>;
227 };
228 conf_ddc {
229 nvidia,pins = "ddc", "irrx", "irtx", "kbca",
230 "kbcb", "kbcc", "kbcd", "kbce", "kbcf",
231 "spic", "spig", "uaa", "uab";
232 nvidia,pull = <TEGRA_PIN_PULL_UP>;
233 nvidia,tristate = <TEGRA_PIN_DISABLE>;
234 };
235 conf_dta {
236 nvidia,pins = "dta", "dtd", "owc", "sdc", "sdd",
237 "spie", "spih", "uad", "uca", "ucb";
238 nvidia,pull = <TEGRA_PIN_PULL_UP>;
239 nvidia,tristate = <TEGRA_PIN_ENABLE>;
240 };
241 conf_hdint {
242 nvidia,pins = "hdint", "ld0", "ld1", "ld2",
243 "ld3", "ld4", "ld5", "ld6", "ld7",
244 "ld8", "ld9", "ld10", "ld11", "ld12",
245 "ld13", "ld14", "ld15", "ld16", "ld17",
246 "ldc", "ldi", "lhs", "lsc0", "lspi",
247 "lvs", "pmc";
248 nvidia,tristate = <TEGRA_PIN_DISABLE>;
249 };
250 conf_lc {
251 nvidia,pins = "lc", "ls";
252 nvidia,pull = <TEGRA_PIN_PULL_UP>;
253 };
254 conf_lcsn {
255 nvidia,pins = "lcsn", "lhp0", "lhp1", "lhp2",
256 "lm0", "lm1", "lpp", "lpw0", "lpw1",
257 "lpw2", "lsc1", "lsck", "lsda", "lsdi",
258 "lvp0", "lvp1", "sdb";
259 nvidia,tristate = <TEGRA_PIN_ENABLE>;
260 };
261 conf_ld17_0 {
262 nvidia,pins = "ld17_0", "ld19_18", "ld21_20",
263 "ld23_22";
264 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
265 };
266 };
267 };
268
269 spdif@70002400 {
270 status = "okay";
271
272 nvidia,fixed-parent-rate;
273 };
274
275 i2s@70002800 {
276 status = "okay";
277
278 nvidia,fixed-parent-rate;
279 };
280
281 serial@70006000 {
282 status = "okay";
283 };
284
285 serial@70006200 {
286 status = "okay";
287 };
288
289 pwm: pwm@7000a000 {
290 status = "okay";
291 };
292
293 lvds_ddc: i2c@7000c000 {
294 status = "okay";
295 clock-frequency = <400000>;
296
297 alc5632: alc5632@1e {
298 compatible = "realtek,alc5632";
299 reg = <0x1e>;
300 gpio-controller;
301 #gpio-cells = <2>;
302 };
303 };
304
305 hdmi_ddc: i2c@7000c400 {
306 status = "okay";
307 clock-frequency = <100000>;
308 };
309
310 nvec@7000c500 {
311 compatible = "nvidia,nvec";
312 reg = <0x7000c500 0x100>;
313 interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>;
314 #address-cells = <1>;
315 #size-cells = <0>;
316 clock-frequency = <80000>;
317 request-gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_HIGH>;
318 slave-addr = <138>;
319 clocks = <&tegra_car TEGRA20_CLK_I2C3>,
320 <&tegra_car TEGRA20_CLK_PLL_P_OUT3>;
321 clock-names = "div-clk", "fast-clk";
322 resets = <&tegra_car 67>;
323 reset-names = "i2c";
324 };
325
326 memory-controller@7000f400 {
327 nvidia,use-ram-code;
328
329 emc-tables@0 {
330 nvidia,ram-code = <0x0>;
331 #address-cells = <1>;
332 #size-cells = <0>;
333 reg = <0>;
334
335 emc-table@166500 {
336 reg = <166500>;
337 compatible = "nvidia,tegra20-emc-table";
338 clock-frequency = <166500>;
339 nvidia,emc-registers = <0x0000000a 0x00000016
340 0x00000008 0x00000003 0x00000004 0x00000004
341 0x00000002 0x0000000c 0x00000003 0x00000003
342 0x00000002 0x00000001 0x00000004 0x00000005
343 0x00000004 0x00000009 0x0000000d 0x000004df
344 0x00000000 0x00000003 0x00000003 0x00000003
345 0x00000003 0x00000001 0x0000000a 0x000000c8
346 0x00000003 0x00000006 0x00000004 0x00000008
347 0x00000002 0x00000000 0x00000000 0x00000002
348 0x00000000 0x00000000 0x00000083 0xe03b0323
349 0x007fe010 0x00001414 0x00000000 0x00000000
350 0x00000000 0x00000000 0x00000000 0x00000000>;
351 };
352
353 emc-table@333000 {
354 reg = <333000>;
355 compatible = "nvidia,tegra20-emc-table";
356 clock-frequency = <333000>;
357 nvidia,emc-registers = <0x00000018 0x00000033
358 0x00000012 0x00000004 0x00000004 0x00000005
359 0x00000003 0x0000000c 0x00000006 0x00000006
360 0x00000003 0x00000001 0x00000004 0x00000005
361 0x00000004 0x00000009 0x0000000d 0x00000bff
362 0x00000000 0x00000003 0x00000003 0x00000006
363 0x00000006 0x00000001 0x00000011 0x000000c8
364 0x00000003 0x0000000e 0x00000007 0x00000008
365 0x00000002 0x00000000 0x00000000 0x00000002
366 0x00000000 0x00000000 0x00000083 0xf0440303
367 0x007fe010 0x00001414 0x00000000 0x00000000
368 0x00000000 0x00000000 0x00000000 0x00000000>;
369 };
370 };
371 };
372
373 i2c@7000d000 {
374 status = "okay";
375 clock-frequency = <400000>;
376
377 pmic: tps6586x@34 {
378 compatible = "ti,tps6586x";
379 reg = <0x34>;
380 interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
381
382 #gpio-cells = <2>;
383 gpio-controller;
384
385 sys-supply = <&p5valw_reg>;
386 vin-sm0-supply = <&sys_reg>;
387 vin-sm1-supply = <&sys_reg>;
388 vin-sm2-supply = <&sys_reg>;
389 vinldo01-supply = <&sm2_reg>;
390 vinldo23-supply = <&sm2_reg>;
391 vinldo4-supply = <&sm2_reg>;
392 vinldo678-supply = <&sm2_reg>;
393 vinldo9-supply = <&sm2_reg>;
394
395 regulators {
396 sys_reg: sys {
397 regulator-name = "vdd_sys";
398 regulator-always-on;
399 };
400
401 core_vdd_reg: sm0 {
402 regulator-name = "+1.2vs_sm0,vdd_core";
403 regulator-min-microvolt = <950000>;
404 regulator-max-microvolt = <1300000>;
405 regulator-coupled-with = <&rtc_vdd_reg &cpu_vdd_reg>;
406 regulator-coupled-max-spread = <170000 550000>;
407 regulator-always-on;
408
409 nvidia,tegra-core-regulator;
410 };
411
412 cpu_vdd_reg: sm1 {
413 regulator-name = "+1.0vs_sm1,vdd_cpu";
414 regulator-min-microvolt = <750000>;
415 regulator-max-microvolt = <1100000>;
416 regulator-coupled-with = <&core_vdd_reg &rtc_vdd_reg>;
417 regulator-coupled-max-spread = <550000 550000>;
418 regulator-always-on;
419
420 nvidia,tegra-cpu-regulator;
421 };
422
423 sm2_reg: sm2 {
424 regulator-name = "+3.7vs_sm2,vin_ldo*";
425 regulator-min-microvolt = <3700000>;
426 regulator-max-microvolt = <3700000>;
427 regulator-always-on;
428 };
429
430 /* LDO0 is not connected to anything */
431
432 ldo1 {
433 regulator-name = "+1.1vs_ldo1,avdd_pll*";
434 regulator-min-microvolt = <1100000>;
435 regulator-max-microvolt = <1100000>;
436 regulator-always-on;
437 };
438
439 rtc_vdd_reg: ldo2 {
440 regulator-name = "+1.2vs_ldo2,vdd_rtc";
441 regulator-min-microvolt = <950000>;
442 regulator-max-microvolt = <1300000>;
443 regulator-coupled-with = <&core_vdd_reg &cpu_vdd_reg>;
444 regulator-coupled-max-spread = <170000 550000>;
445 regulator-always-on;
446
447 nvidia,tegra-rtc-regulator;
448 };
449
450 ldo3 {
451 regulator-name = "+3.3vs_ldo3,avdd_usb*";
452 regulator-min-microvolt = <3300000>;
453 regulator-max-microvolt = <3300000>;
454 regulator-always-on;
455 };
456
457 ldo4 {
458 regulator-name = "+1.8vs_ldo4,avdd_osc,vddio_sys";
459 regulator-min-microvolt = <1800000>;
460 regulator-max-microvolt = <1800000>;
461 regulator-always-on;
462 };
463
464 ldo5 {
465 regulator-name = "+2.85vs_ldo5,vcore_mmc";
466 regulator-min-microvolt = <2850000>;
467 regulator-max-microvolt = <2850000>;
468 regulator-always-on;
469 };
470
471 ldo6 {
472 /*
473 * Research indicates this should be
474 * 1.8v; other boards that use this
475 * rail for the same purpose need it
476 * set to 1.8v. The schematic signal
477 * name is incorrect; perhaps copied
478 * from an incorrect NVIDIA reference.
479 */
480 regulator-name = "+2.85vs_ldo6,avdd_vdac";
481 regulator-min-microvolt = <1800000>;
482 regulator-max-microvolt = <1800000>;
483 };
484
485 hdmi_vdd_reg: ldo7 {
486 regulator-name = "+3.3vs_ldo7,avdd_hdmi";
487 regulator-min-microvolt = <3300000>;
488 regulator-max-microvolt = <3300000>;
489 };
490
491 hdmi_pll_reg: ldo8 {
492 regulator-name = "+1.8vs_ldo8,avdd_hdmi_pll";
493 regulator-min-microvolt = <1800000>;
494 regulator-max-microvolt = <1800000>;
495 };
496
497 ldo9 {
498 regulator-name = "+2.85vs_ldo9,vdd_ddr_rx";
499 regulator-min-microvolt = <2850000>;
500 regulator-max-microvolt = <2850000>;
501 regulator-always-on;
502 };
503
504 ldo_rtc {
505 regulator-name = "+3.3vs_rtc";
506 regulator-min-microvolt = <3300000>;
507 regulator-max-microvolt = <3300000>;
508 regulator-always-on;
509 };
510 };
511 };
512
513 adt7461: temperature-sensor@4c {
514 compatible = "adi,adt7461";
515 reg = <0x4c>;
516
517 interrupt-parent = <&gpio>;
518 interrupts = <TEGRA_GPIO(N, 6) IRQ_TYPE_EDGE_FALLING>;
519
520 #thermal-sensor-cells = <1>;
521 };
522 };
523
524 pmc@7000e400 {
525 nvidia,invert-interrupt;
526 nvidia,suspend-mode = <1>;
527 nvidia,cpu-pwr-good-time = <2000>;
528 nvidia,cpu-pwr-off-time = <0>;
529 nvidia,core-pwr-good-time = <3845 3845>;
530 nvidia,core-pwr-off-time = <0>;
531 nvidia,sys-clock-req-active-high;
532 core-supply = <&core_vdd_reg>;
533 };
534
535 usb@c5000000 {
536 compatible = "nvidia,tegra20-udc";
537 status = "okay";
538 dr_mode = "peripheral";
539 };
540
541 usb-phy@c5000000 {
542 status = "okay";
543 };
544
545 usb@c5004000 {
546 status = "okay";
547 };
548
549 usb-phy@c5004000 {
550 status = "okay";
551 nvidia,phy-reset-gpio = <&gpio TEGRA_GPIO(V, 0)
552 GPIO_ACTIVE_LOW>;
553 };
554
555 usb@c5008000 {
556 status = "okay";
557 };
558
559 usb-phy@c5008000 {
560 status = "okay";
561 };
562
563 sdmmc1: mmc@c8000000 {
564 status = "okay";
565 cd-gpios = <&gpio TEGRA_GPIO(V, 5) GPIO_ACTIVE_LOW>;
566 wp-gpios = <&gpio TEGRA_GPIO(H, 1) GPIO_ACTIVE_HIGH>;
567 power-gpios = <&gpio TEGRA_GPIO(V, 1) GPIO_ACTIVE_HIGH>;
568 bus-width = <4>;
569 };
570
571 sdmmc4: mmc@c8000600 {
572 status = "okay";
573 bus-width = <8>;
574 non-removable;
575 };
576
577 backlight: backlight {
578 compatible = "pwm-backlight";
579
580 enable-gpios = <&gpio TEGRA_GPIO(U, 4) GPIO_ACTIVE_HIGH>;
581 pwms = <&pwm 0 5000000>;
582
583 brightness-levels = <0 16 32 48 64 80 96 112 128 144 160 176 192 208 224 240 255>;
584 default-brightness-level = <10>;
585
586 /* close enough */
587 power-supply = <&vdd_pnl_reg>;
588 };
589
590 clk32k_in: clock-32k {
591 compatible = "fixed-clock";
592 clock-frequency = <32768>;
593 #clock-cells = <0>;
594 };
595
596 gpio-keys {
597 compatible = "gpio-keys";
598
599 key-wakeup {
600 label = "Wakeup";
601 gpios = <&gpio TEGRA_GPIO(J, 7) GPIO_ACTIVE_LOW>;
602 linux,code = <KEY_WAKEUP>;
603 wakeup-source;
604 };
605 };
606
607 gpio-leds {
608 compatible = "gpio-leds";
609
610 led-0 {
611 label = "wifi-led";
612 gpios = <&gpio TEGRA_GPIO(D, 0) GPIO_ACTIVE_HIGH>;
613 linux,default-trigger = "rfkill0";
614 };
615 };
616
617 panel: panel {
618 compatible = "samsung,ltn101nt05";
619
620 ddc-i2c-bus = <&lvds_ddc>;
621 power-supply = <&vdd_pnl_reg>;
622 enable-gpios = <&gpio TEGRA_GPIO(M, 6) GPIO_ACTIVE_HIGH>;
623
624 backlight = <&backlight>;
625 };
626
627 p5valw_reg: regulator-5v0alw {
628 compatible = "regulator-fixed";
629 regulator-name = "+5valw";
630 regulator-min-microvolt = <5000000>;
631 regulator-max-microvolt = <5000000>;
632 regulator-always-on;
633 };
634
635 vdd_pnl_reg: regulator-3v0 {
636 compatible = "regulator-fixed";
637 regulator-name = "+3VS,vdd_pnl";
638 regulator-min-microvolt = <3300000>;
639 regulator-max-microvolt = <3300000>;
640 regulator-boot-on;
641 gpio = <&gpio TEGRA_GPIO(A, 4) GPIO_ACTIVE_HIGH>;
642 enable-active-high;
643 };
644
645 sound {
646 compatible = "nvidia,tegra-audio-alc5632-paz00",
647 "nvidia,tegra-audio-alc5632";
648
649 nvidia,model = "Compal PAZ00";
650
651 nvidia,audio-routing =
652 "Int Spk", "SPKOUT",
653 "Int Spk", "SPKOUTN",
654 "Headset Mic", "MICBIAS1",
655 "MIC1", "Headset Mic",
656 "Headset Stereophone", "HPR",
657 "Headset Stereophone", "HPL",
658 "DMICDAT", "Digital Mic";
659
660 nvidia,audio-codec = <&alc5632>;
661 nvidia,i2s-controller = <&tegra_i2s1>;
662 nvidia,hp-det-gpios = <&gpio TEGRA_GPIO(W, 2)
663 GPIO_ACTIVE_HIGH>;
664
665 clocks = <&tegra_car TEGRA20_CLK_PLL_A>,
666 <&tegra_car TEGRA20_CLK_PLL_A_OUT0>,
667 <&tegra_car TEGRA20_CLK_CDEV1>;
668 clock-names = "pll_a", "pll_a_out0", "mclk";
669 };
670
671 cpus {
672 cpu0: cpu@0 {
673 cpu-supply = <&cpu_vdd_reg>;
674 operating-points-v2 = <&cpu0_opp_table>;
675 #cooling-cells = <2>;
676 };
677
678 cpu1: cpu@1 {
679 cpu-supply = <&cpu_vdd_reg>;
680 operating-points-v2 = <&cpu0_opp_table>;
681 #cooling-cells = <2>;
682 };
683 };
684
685 thermal-zones {
686 cpu-thermal {
687 polling-delay-passive = <500>; /* milliseconds */
688 polling-delay = <1500>; /* milliseconds */
689
690 thermal-sensors = <&adt7461 1>;
691
692 trips {
693 trip0: cpu-alert0 {
694 /* start throttling at 80C */
695 temperature = <80000>;
696 hysteresis = <200>;
697 type = "passive";
698 };
699
700 trip1: cpu-crit {
701 /* shut down at 85C */
702 temperature = <85000>;
703 hysteresis = <2000>;
704 type = "critical";
705 };
706 };
707
708 cooling-maps {
709 map0 {
710 trip = <&trip0>;
711 cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
712 <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
713 };
714 };
715 };
716 };
717};
718
719&emc_icc_dvfs_opp_table {
720 /delete-node/ opp-760000000;
721};
1// SPDX-License-Identifier: GPL-2.0
2/dts-v1/;
3
4#include <dt-bindings/input/input.h>
5#include "tegra20.dtsi"
6
7/ {
8 model = "Toshiba AC100 / Dynabook AZ";
9 compatible = "compal,paz00", "nvidia,tegra20";
10
11 aliases {
12 rtc0 = "/i2c@7000d000/tps6586x@34";
13 rtc1 = "/rtc@7000e000";
14 serial0 = &uarta;
15 serial1 = &uartc;
16 };
17
18 chosen {
19 stdout-path = "serial0:115200n8";
20 };
21
22 memory {
23 reg = <0x00000000 0x20000000>;
24 };
25
26 host1x@50000000 {
27 dc@54200000 {
28 rgb {
29 status = "okay";
30
31 nvidia,panel = <&panel>;
32 };
33 };
34
35 hdmi@54280000 {
36 status = "okay";
37
38 vdd-supply = <&hdmi_vdd_reg>;
39 pll-supply = <&hdmi_pll_reg>;
40
41 nvidia,ddc-i2c-bus = <&hdmi_ddc>;
42 nvidia,hpd-gpio = <&gpio TEGRA_GPIO(N, 7)
43 GPIO_ACTIVE_HIGH>;
44 };
45 };
46
47 pinmux@70000014 {
48 pinctrl-names = "default";
49 pinctrl-0 = <&state_default>;
50
51 state_default: pinmux {
52 ata {
53 nvidia,pins = "ata", "atc", "atd", "ate",
54 "dap2", "gmb", "gmc", "gmd", "spia",
55 "spib", "spic", "spid", "spie";
56 nvidia,function = "gmi";
57 };
58 atb {
59 nvidia,pins = "atb", "gma", "gme";
60 nvidia,function = "sdio4";
61 };
62 cdev1 {
63 nvidia,pins = "cdev1";
64 nvidia,function = "plla_out";
65 };
66 cdev2 {
67 nvidia,pins = "cdev2";
68 nvidia,function = "pllp_out4";
69 };
70 crtp {
71 nvidia,pins = "crtp";
72 nvidia,function = "crt";
73 };
74 csus {
75 nvidia,pins = "csus";
76 nvidia,function = "pllc_out1";
77 };
78 dap1 {
79 nvidia,pins = "dap1";
80 nvidia,function = "dap1";
81 };
82 dap3 {
83 nvidia,pins = "dap3";
84 nvidia,function = "dap3";
85 };
86 dap4 {
87 nvidia,pins = "dap4";
88 nvidia,function = "dap4";
89 };
90 ddc {
91 nvidia,pins = "ddc";
92 nvidia,function = "i2c2";
93 };
94 dta {
95 nvidia,pins = "dta", "dtb", "dtc", "dtd", "dte";
96 nvidia,function = "rsvd1";
97 };
98 dtf {
99 nvidia,pins = "dtf";
100 nvidia,function = "i2c3";
101 };
102 gpu {
103 nvidia,pins = "gpu", "sdb", "sdd";
104 nvidia,function = "pwm";
105 };
106 gpu7 {
107 nvidia,pins = "gpu7";
108 nvidia,function = "rtck";
109 };
110 gpv {
111 nvidia,pins = "gpv", "slxa", "slxk";
112 nvidia,function = "pcie";
113 };
114 hdint {
115 nvidia,pins = "hdint", "pta";
116 nvidia,function = "hdmi";
117 };
118 i2cp {
119 nvidia,pins = "i2cp";
120 nvidia,function = "i2cp";
121 };
122 irrx {
123 nvidia,pins = "irrx", "irtx";
124 nvidia,function = "uarta";
125 };
126 kbca {
127 nvidia,pins = "kbca", "kbcc", "kbce", "kbcf";
128 nvidia,function = "kbc";
129 };
130 kbcb {
131 nvidia,pins = "kbcb", "kbcd";
132 nvidia,function = "sdio2";
133 };
134 lcsn {
135 nvidia,pins = "lcsn", "ld0", "ld1", "ld2",
136 "ld3", "ld4", "ld5", "ld6", "ld7",
137 "ld8", "ld9", "ld10", "ld11", "ld12",
138 "ld13", "ld14", "ld15", "ld16", "ld17",
139 "ldc", "ldi", "lhp0", "lhp1", "lhp2",
140 "lhs", "lm0", "lm1", "lpp", "lpw0",
141 "lpw1", "lpw2", "lsc0", "lsc1", "lsck",
142 "lsda", "lsdi", "lspi", "lvp0", "lvp1",
143 "lvs";
144 nvidia,function = "displaya";
145 };
146 owc {
147 nvidia,pins = "owc";
148 nvidia,function = "owr";
149 };
150 pmc {
151 nvidia,pins = "pmc";
152 nvidia,function = "pwr_on";
153 };
154 rm {
155 nvidia,pins = "rm";
156 nvidia,function = "i2c1";
157 };
158 sdc {
159 nvidia,pins = "sdc";
160 nvidia,function = "twc";
161 };
162 sdio1 {
163 nvidia,pins = "sdio1";
164 nvidia,function = "sdio1";
165 };
166 slxc {
167 nvidia,pins = "slxc", "slxd";
168 nvidia,function = "spi4";
169 };
170 spdi {
171 nvidia,pins = "spdi", "spdo";
172 nvidia,function = "rsvd2";
173 };
174 spif {
175 nvidia,pins = "spif", "uac";
176 nvidia,function = "rsvd4";
177 };
178 spig {
179 nvidia,pins = "spig", "spih";
180 nvidia,function = "spi2_alt";
181 };
182 uaa {
183 nvidia,pins = "uaa", "uab", "uda";
184 nvidia,function = "ulpi";
185 };
186 uad {
187 nvidia,pins = "uad";
188 nvidia,function = "spdif";
189 };
190 uca {
191 nvidia,pins = "uca", "ucb";
192 nvidia,function = "uartc";
193 };
194 conf_ata {
195 nvidia,pins = "ata", "atb", "atc", "atd", "ate",
196 "cdev1", "cdev2", "dap1", "dap2", "dtf",
197 "gma", "gmb", "gmc", "gmd", "gme",
198 "gpu", "gpu7", "gpv", "i2cp", "pta",
199 "rm", "sdio1", "slxk", "spdo", "uac",
200 "uda";
201 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
202 nvidia,tristate = <TEGRA_PIN_DISABLE>;
203 };
204 conf_ck32 {
205 nvidia,pins = "ck32", "ddrc", "pmca", "pmcb",
206 "pmcc", "pmcd", "pmce", "xm2c", "xm2d";
207 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
208 };
209 conf_crtp {
210 nvidia,pins = "crtp", "dap3", "dap4", "dtb",
211 "dtc", "dte", "slxa", "slxc", "slxd",
212 "spdi";
213 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
214 nvidia,tristate = <TEGRA_PIN_ENABLE>;
215 };
216 conf_csus {
217 nvidia,pins = "csus", "spia", "spib", "spid",
218 "spif";
219 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
220 nvidia,tristate = <TEGRA_PIN_ENABLE>;
221 };
222 conf_ddc {
223 nvidia,pins = "ddc", "irrx", "irtx", "kbca",
224 "kbcb", "kbcc", "kbcd", "kbce", "kbcf",
225 "spic", "spig", "uaa", "uab";
226 nvidia,pull = <TEGRA_PIN_PULL_UP>;
227 nvidia,tristate = <TEGRA_PIN_DISABLE>;
228 };
229 conf_dta {
230 nvidia,pins = "dta", "dtd", "owc", "sdc", "sdd",
231 "spie", "spih", "uad", "uca", "ucb";
232 nvidia,pull = <TEGRA_PIN_PULL_UP>;
233 nvidia,tristate = <TEGRA_PIN_ENABLE>;
234 };
235 conf_hdint {
236 nvidia,pins = "hdint", "ld0", "ld1", "ld2",
237 "ld3", "ld4", "ld5", "ld6", "ld7",
238 "ld8", "ld9", "ld10", "ld11", "ld12",
239 "ld13", "ld14", "ld15", "ld16", "ld17",
240 "ldc", "ldi", "lhs", "lsc0", "lspi",
241 "lvs", "pmc";
242 nvidia,tristate = <TEGRA_PIN_DISABLE>;
243 };
244 conf_lc {
245 nvidia,pins = "lc", "ls";
246 nvidia,pull = <TEGRA_PIN_PULL_UP>;
247 };
248 conf_lcsn {
249 nvidia,pins = "lcsn", "lhp0", "lhp1", "lhp2",
250 "lm0", "lm1", "lpp", "lpw0", "lpw1",
251 "lpw2", "lsc1", "lsck", "lsda", "lsdi",
252 "lvp0", "lvp1", "sdb";
253 nvidia,tristate = <TEGRA_PIN_ENABLE>;
254 };
255 conf_ld17_0 {
256 nvidia,pins = "ld17_0", "ld19_18", "ld21_20",
257 "ld23_22";
258 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
259 };
260 };
261 };
262
263 i2s@70002800 {
264 status = "okay";
265 };
266
267 serial@70006000 {
268 status = "okay";
269 };
270
271 serial@70006200 {
272 status = "okay";
273 };
274
275 pwm: pwm@7000a000 {
276 status = "okay";
277 };
278
279 lvds_ddc: i2c@7000c000 {
280 status = "okay";
281 clock-frequency = <400000>;
282
283 alc5632: alc5632@1e {
284 compatible = "realtek,alc5632";
285 reg = <0x1e>;
286 gpio-controller;
287 #gpio-cells = <2>;
288 };
289 };
290
291 hdmi_ddc: i2c@7000c400 {
292 status = "okay";
293 clock-frequency = <100000>;
294 };
295
296 nvec@7000c500 {
297 compatible = "nvidia,nvec";
298 reg = <0x7000c500 0x100>;
299 interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>;
300 #address-cells = <1>;
301 #size-cells = <0>;
302 clock-frequency = <80000>;
303 request-gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_HIGH>;
304 slave-addr = <138>;
305 clocks = <&tegra_car TEGRA20_CLK_I2C3>,
306 <&tegra_car TEGRA20_CLK_PLL_P_OUT3>;
307 clock-names = "div-clk", "fast-clk";
308 resets = <&tegra_car 67>;
309 reset-names = "i2c";
310 };
311
312 i2c@7000d000 {
313 status = "okay";
314 clock-frequency = <400000>;
315
316 pmic: tps6586x@34 {
317 compatible = "ti,tps6586x";
318 reg = <0x34>;
319 interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
320
321 #gpio-cells = <2>;
322 gpio-controller;
323
324 sys-supply = <&p5valw_reg>;
325 vin-sm0-supply = <&sys_reg>;
326 vin-sm1-supply = <&sys_reg>;
327 vin-sm2-supply = <&sys_reg>;
328 vinldo01-supply = <&sm2_reg>;
329 vinldo23-supply = <&sm2_reg>;
330 vinldo4-supply = <&sm2_reg>;
331 vinldo678-supply = <&sm2_reg>;
332 vinldo9-supply = <&sm2_reg>;
333
334 regulators {
335 sys_reg: sys {
336 regulator-name = "vdd_sys";
337 regulator-always-on;
338 };
339
340 sm0 {
341 regulator-name = "+1.2vs_sm0,vdd_core";
342 regulator-min-microvolt = <1200000>;
343 regulator-max-microvolt = <1200000>;
344 regulator-always-on;
345 };
346
347 sm1 {
348 regulator-name = "+1.0vs_sm1,vdd_cpu";
349 regulator-min-microvolt = <1000000>;
350 regulator-max-microvolt = <1000000>;
351 regulator-always-on;
352 };
353
354 sm2_reg: sm2 {
355 regulator-name = "+3.7vs_sm2,vin_ldo*";
356 regulator-min-microvolt = <3700000>;
357 regulator-max-microvolt = <3700000>;
358 regulator-always-on;
359 };
360
361 /* LDO0 is not connected to anything */
362
363 ldo1 {
364 regulator-name = "+1.1vs_ldo1,avdd_pll*";
365 regulator-min-microvolt = <1100000>;
366 regulator-max-microvolt = <1100000>;
367 regulator-always-on;
368 };
369
370 ldo2 {
371 regulator-name = "+1.2vs_ldo2,vdd_rtc";
372 regulator-min-microvolt = <1200000>;
373 regulator-max-microvolt = <1200000>;
374 };
375
376 ldo3 {
377 regulator-name = "+3.3vs_ldo3,avdd_usb*";
378 regulator-min-microvolt = <3300000>;
379 regulator-max-microvolt = <3300000>;
380 regulator-always-on;
381 };
382
383 ldo4 {
384 regulator-name = "+1.8vs_ldo4,avdd_osc,vddio_sys";
385 regulator-min-microvolt = <1800000>;
386 regulator-max-microvolt = <1800000>;
387 regulator-always-on;
388 };
389
390 ldo5 {
391 regulator-name = "+2.85vs_ldo5,vcore_mmc";
392 regulator-min-microvolt = <2850000>;
393 regulator-max-microvolt = <2850000>;
394 regulator-always-on;
395 };
396
397 ldo6 {
398 /*
399 * Research indicates this should be
400 * 1.8v; other boards that use this
401 * rail for the same purpose need it
402 * set to 1.8v. The schematic signal
403 * name is incorrect; perhaps copied
404 * from an incorrect NVIDIA reference.
405 */
406 regulator-name = "+2.85vs_ldo6,avdd_vdac";
407 regulator-min-microvolt = <1800000>;
408 regulator-max-microvolt = <1800000>;
409 };
410
411 hdmi_vdd_reg: ldo7 {
412 regulator-name = "+3.3vs_ldo7,avdd_hdmi";
413 regulator-min-microvolt = <3300000>;
414 regulator-max-microvolt = <3300000>;
415 };
416
417 hdmi_pll_reg: ldo8 {
418 regulator-name = "+1.8vs_ldo8,avdd_hdmi_pll";
419 regulator-min-microvolt = <1800000>;
420 regulator-max-microvolt = <1800000>;
421 };
422
423 ldo9 {
424 regulator-name = "+2.85vs_ldo9,vdd_ddr_rx";
425 regulator-min-microvolt = <2850000>;
426 regulator-max-microvolt = <2850000>;
427 regulator-always-on;
428 };
429
430 ldo_rtc {
431 regulator-name = "+3.3vs_rtc";
432 regulator-min-microvolt = <3300000>;
433 regulator-max-microvolt = <3300000>;
434 regulator-always-on;
435 };
436 };
437 };
438
439 adt7461@4c {
440 compatible = "adi,adt7461";
441 reg = <0x4c>;
442 };
443 };
444
445 pmc@7000e400 {
446 nvidia,invert-interrupt;
447 nvidia,suspend-mode = <1>;
448 nvidia,cpu-pwr-good-time = <2000>;
449 nvidia,cpu-pwr-off-time = <0>;
450 nvidia,core-pwr-good-time = <3845 3845>;
451 nvidia,core-pwr-off-time = <0>;
452 nvidia,sys-clock-req-active-high;
453 };
454
455 usb@c5000000 {
456 compatible = "nvidia,tegra20-udc";
457 status = "okay";
458 dr_mode = "peripheral";
459 };
460
461 usb-phy@c5000000 {
462 status = "okay";
463 };
464
465 usb@c5004000 {
466 status = "okay";
467 nvidia,phy-reset-gpio = <&gpio TEGRA_GPIO(V, 0)
468 GPIO_ACTIVE_LOW>;
469 };
470
471 usb-phy@c5004000 {
472 status = "okay";
473 nvidia,phy-reset-gpio = <&gpio TEGRA_GPIO(V, 0)
474 GPIO_ACTIVE_LOW>;
475 };
476
477 usb@c5008000 {
478 status = "okay";
479 };
480
481 usb-phy@c5008000 {
482 status = "okay";
483 };
484
485 sdhci@c8000000 {
486 status = "okay";
487 cd-gpios = <&gpio TEGRA_GPIO(V, 5) GPIO_ACTIVE_LOW>;
488 wp-gpios = <&gpio TEGRA_GPIO(H, 1) GPIO_ACTIVE_HIGH>;
489 power-gpios = <&gpio TEGRA_GPIO(V, 1) GPIO_ACTIVE_HIGH>;
490 bus-width = <4>;
491 };
492
493 sdhci@c8000600 {
494 status = "okay";
495 bus-width = <8>;
496 non-removable;
497 };
498
499 backlight: backlight {
500 compatible = "pwm-backlight";
501
502 enable-gpios = <&gpio TEGRA_GPIO(U, 4) GPIO_ACTIVE_HIGH>;
503 pwms = <&pwm 0 5000000>;
504
505 brightness-levels = <0 16 32 48 64 80 96 112 128 144 160 176 192 208 224 240 255>;
506 default-brightness-level = <10>;
507
508 backlight-boot-off;
509 };
510
511 clocks {
512 compatible = "simple-bus";
513 #address-cells = <1>;
514 #size-cells = <0>;
515
516 clk32k_in: clock@0 {
517 compatible = "fixed-clock";
518 reg = <0>;
519 #clock-cells = <0>;
520 clock-frequency = <32768>;
521 };
522 };
523
524 gpio-keys {
525 compatible = "gpio-keys";
526
527 power {
528 label = "Power";
529 gpios = <&gpio TEGRA_GPIO(J, 7) GPIO_ACTIVE_LOW>;
530 linux,code = <KEY_POWER>;
531 wakeup-source;
532 };
533 };
534
535 gpio-leds {
536 compatible = "gpio-leds";
537
538 wifi {
539 label = "wifi-led";
540 gpios = <&gpio TEGRA_GPIO(D, 0) GPIO_ACTIVE_HIGH>;
541 linux,default-trigger = "rfkill0";
542 };
543 };
544
545 panel: panel {
546 compatible = "samsung,ltn101nt05", "simple-panel";
547
548 ddc-i2c-bus = <&lvds_ddc>;
549 power-supply = <&vdd_pnl_reg>;
550 enable-gpios = <&gpio TEGRA_GPIO(M, 6) GPIO_ACTIVE_HIGH>;
551
552 backlight = <&backlight>;
553 };
554
555 regulators {
556 compatible = "simple-bus";
557 #address-cells = <1>;
558 #size-cells = <0>;
559
560 p5valw_reg: regulator@0 {
561 compatible = "regulator-fixed";
562 reg = <0>;
563 regulator-name = "+5valw";
564 regulator-min-microvolt = <5000000>;
565 regulator-max-microvolt = <5000000>;
566 regulator-always-on;
567 };
568
569 vdd_pnl_reg: regulator@1 {
570 compatible = "regulator-fixed";
571 reg = <1>;
572 regulator-name = "+3VS,vdd_pnl";
573 regulator-min-microvolt = <3300000>;
574 regulator-max-microvolt = <3300000>;
575 regulator-boot-on;
576 gpio = <&gpio TEGRA_GPIO(A, 4) GPIO_ACTIVE_HIGH>;
577 enable-active-high;
578 };
579 };
580
581 sound {
582 compatible = "nvidia,tegra-audio-alc5632-paz00",
583 "nvidia,tegra-audio-alc5632";
584
585 nvidia,model = "Compal PAZ00";
586
587 nvidia,audio-routing =
588 "Int Spk", "SPKOUT",
589 "Int Spk", "SPKOUTN",
590 "Headset Mic", "MICBIAS1",
591 "MIC1", "Headset Mic",
592 "Headset Stereophone", "HPR",
593 "Headset Stereophone", "HPL",
594 "DMICDAT", "Digital Mic";
595
596 nvidia,audio-codec = <&alc5632>;
597 nvidia,i2s-controller = <&tegra_i2s1>;
598 nvidia,hp-det-gpios = <&gpio TEGRA_GPIO(W, 2)
599 GPIO_ACTIVE_HIGH>;
600
601 clocks = <&tegra_car TEGRA20_CLK_PLL_A>,
602 <&tegra_car TEGRA20_CLK_PLL_A_OUT0>,
603 <&tegra_car TEGRA20_CLK_CDEV1>;
604 clock-names = "pll_a", "pll_a_out0", "mclk";
605 };
606};