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1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * Copyright 2016 Broadcom Limited
4 */
5
6#include <linux/device.h>
7#include <linux/io.h>
8#include <linux/ioport.h>
9#include <linux/module.h>
10#include <linux/of.h>
11#include <linux/of_address.h>
12#include <linux/platform_device.h>
13#include <linux/slab.h>
14
15#include "spi-bcm-qspi.h"
16
17#define INTR_BASE_BIT_SHIFT 0x02
18#define INTR_COUNT 0x07
19
20struct bcm_iproc_intc {
21 struct bcm_qspi_soc_intc soc_intc;
22 struct platform_device *pdev;
23 void __iomem *int_reg;
24 void __iomem *int_status_reg;
25 spinlock_t soclock;
26 bool big_endian;
27};
28
29static u32 bcm_iproc_qspi_get_l2_int_status(struct bcm_qspi_soc_intc *soc_intc)
30{
31 struct bcm_iproc_intc *priv =
32 container_of(soc_intc, struct bcm_iproc_intc, soc_intc);
33 void __iomem *mmio = priv->int_status_reg;
34 int i;
35 u32 val = 0, sts = 0;
36
37 for (i = 0; i < INTR_COUNT; i++) {
38 if (bcm_qspi_readl(priv->big_endian, mmio + (i * 4)))
39 val |= 1UL << i;
40 }
41
42 if (val & INTR_MSPI_DONE_MASK)
43 sts |= MSPI_DONE;
44
45 if (val & BSPI_LR_INTERRUPTS_ALL)
46 sts |= BSPI_DONE;
47
48 if (val & BSPI_LR_INTERRUPTS_ERROR)
49 sts |= BSPI_ERR;
50
51 return sts;
52}
53
54static void bcm_iproc_qspi_int_ack(struct bcm_qspi_soc_intc *soc_intc, int type)
55{
56 struct bcm_iproc_intc *priv =
57 container_of(soc_intc, struct bcm_iproc_intc, soc_intc);
58 void __iomem *mmio = priv->int_status_reg;
59 u32 mask = get_qspi_mask(type);
60 int i;
61
62 for (i = 0; i < INTR_COUNT; i++) {
63 if (mask & (1UL << i))
64 bcm_qspi_writel(priv->big_endian, 1, mmio + (i * 4));
65 }
66}
67
68static void bcm_iproc_qspi_int_set(struct bcm_qspi_soc_intc *soc_intc, int type,
69 bool en)
70{
71 struct bcm_iproc_intc *priv =
72 container_of(soc_intc, struct bcm_iproc_intc, soc_intc);
73 void __iomem *mmio = priv->int_reg;
74 u32 mask = get_qspi_mask(type);
75 u32 val;
76 unsigned long flags;
77
78 spin_lock_irqsave(&priv->soclock, flags);
79
80 val = bcm_qspi_readl(priv->big_endian, mmio);
81
82 if (en)
83 val = val | (mask << INTR_BASE_BIT_SHIFT);
84 else
85 val = val & ~(mask << INTR_BASE_BIT_SHIFT);
86
87 bcm_qspi_writel(priv->big_endian, val, mmio);
88
89 spin_unlock_irqrestore(&priv->soclock, flags);
90}
91
92static int bcm_iproc_probe(struct platform_device *pdev)
93{
94 struct device *dev = &pdev->dev;
95 struct bcm_iproc_intc *priv;
96 struct bcm_qspi_soc_intc *soc_intc;
97 struct resource *res;
98
99 priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
100 if (!priv)
101 return -ENOMEM;
102 soc_intc = &priv->soc_intc;
103 priv->pdev = pdev;
104
105 spin_lock_init(&priv->soclock);
106
107 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "intr_regs");
108 priv->int_reg = devm_ioremap_resource(dev, res);
109 if (IS_ERR(priv->int_reg))
110 return PTR_ERR(priv->int_reg);
111
112 res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
113 "intr_status_reg");
114 priv->int_status_reg = devm_ioremap_resource(dev, res);
115 if (IS_ERR(priv->int_status_reg))
116 return PTR_ERR(priv->int_status_reg);
117
118 priv->big_endian = of_device_is_big_endian(dev->of_node);
119
120 bcm_iproc_qspi_int_ack(soc_intc, MSPI_BSPI_DONE);
121 bcm_iproc_qspi_int_set(soc_intc, MSPI_BSPI_DONE, false);
122
123 soc_intc->bcm_qspi_int_ack = bcm_iproc_qspi_int_ack;
124 soc_intc->bcm_qspi_int_set = bcm_iproc_qspi_int_set;
125 soc_intc->bcm_qspi_get_int_status = bcm_iproc_qspi_get_l2_int_status;
126
127 return bcm_qspi_probe(pdev, soc_intc);
128}
129
130static int bcm_iproc_remove(struct platform_device *pdev)
131{
132 bcm_qspi_remove(pdev);
133
134 return 0;
135}
136
137static const struct of_device_id bcm_iproc_of_match[] = {
138 { .compatible = "brcm,spi-nsp-qspi" },
139 { .compatible = "brcm,spi-ns2-qspi" },
140 {},
141};
142MODULE_DEVICE_TABLE(of, bcm_iproc_of_match);
143
144static struct platform_driver bcm_iproc_driver = {
145 .probe = bcm_iproc_probe,
146 .remove = bcm_iproc_remove,
147 .driver = {
148 .name = "bcm_iproc",
149 .pm = &bcm_qspi_pm_ops,
150 .of_match_table = bcm_iproc_of_match,
151 }
152};
153module_platform_driver(bcm_iproc_driver);
154
155MODULE_LICENSE("GPL v2");
156MODULE_AUTHOR("Kamal Dasu");
157MODULE_DESCRIPTION("SPI flash driver for Broadcom iProc SoCs");
1/*
2 * Copyright 2016 Broadcom Limited
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 *
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
12 */
13
14#include <linux/device.h>
15#include <linux/io.h>
16#include <linux/ioport.h>
17#include <linux/module.h>
18#include <linux/of.h>
19#include <linux/of_address.h>
20#include <linux/platform_device.h>
21#include <linux/slab.h>
22
23#include "spi-bcm-qspi.h"
24
25#define INTR_BASE_BIT_SHIFT 0x02
26#define INTR_COUNT 0x07
27
28struct bcm_iproc_intc {
29 struct bcm_qspi_soc_intc soc_intc;
30 struct platform_device *pdev;
31 void __iomem *int_reg;
32 void __iomem *int_status_reg;
33 spinlock_t soclock;
34 bool big_endian;
35};
36
37static u32 bcm_iproc_qspi_get_l2_int_status(struct bcm_qspi_soc_intc *soc_intc)
38{
39 struct bcm_iproc_intc *priv =
40 container_of(soc_intc, struct bcm_iproc_intc, soc_intc);
41 void __iomem *mmio = priv->int_status_reg;
42 int i;
43 u32 val = 0, sts = 0;
44
45 for (i = 0; i < INTR_COUNT; i++) {
46 if (bcm_qspi_readl(priv->big_endian, mmio + (i * 4)))
47 val |= 1UL << i;
48 }
49
50 if (val & INTR_MSPI_DONE_MASK)
51 sts |= MSPI_DONE;
52
53 if (val & BSPI_LR_INTERRUPTS_ALL)
54 sts |= BSPI_DONE;
55
56 if (val & BSPI_LR_INTERRUPTS_ERROR)
57 sts |= BSPI_ERR;
58
59 return sts;
60}
61
62static void bcm_iproc_qspi_int_ack(struct bcm_qspi_soc_intc *soc_intc, int type)
63{
64 struct bcm_iproc_intc *priv =
65 container_of(soc_intc, struct bcm_iproc_intc, soc_intc);
66 void __iomem *mmio = priv->int_status_reg;
67 u32 mask = get_qspi_mask(type);
68 int i;
69
70 for (i = 0; i < INTR_COUNT; i++) {
71 if (mask & (1UL << i))
72 bcm_qspi_writel(priv->big_endian, 1, mmio + (i * 4));
73 }
74}
75
76static void bcm_iproc_qspi_int_set(struct bcm_qspi_soc_intc *soc_intc, int type,
77 bool en)
78{
79 struct bcm_iproc_intc *priv =
80 container_of(soc_intc, struct bcm_iproc_intc, soc_intc);
81 void __iomem *mmio = priv->int_reg;
82 u32 mask = get_qspi_mask(type);
83 u32 val;
84 unsigned long flags;
85
86 spin_lock_irqsave(&priv->soclock, flags);
87
88 val = bcm_qspi_readl(priv->big_endian, mmio);
89
90 if (en)
91 val = val | (mask << INTR_BASE_BIT_SHIFT);
92 else
93 val = val & ~(mask << INTR_BASE_BIT_SHIFT);
94
95 bcm_qspi_writel(priv->big_endian, val, mmio);
96
97 spin_unlock_irqrestore(&priv->soclock, flags);
98}
99
100static int bcm_iproc_probe(struct platform_device *pdev)
101{
102 struct device *dev = &pdev->dev;
103 struct bcm_iproc_intc *priv;
104 struct bcm_qspi_soc_intc *soc_intc;
105 struct resource *res;
106
107 priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
108 if (!priv)
109 return -ENOMEM;
110 soc_intc = &priv->soc_intc;
111 priv->pdev = pdev;
112
113 spin_lock_init(&priv->soclock);
114
115 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "intr_regs");
116 priv->int_reg = devm_ioremap_resource(dev, res);
117 if (IS_ERR(priv->int_reg))
118 return PTR_ERR(priv->int_reg);
119
120 res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
121 "intr_status_reg");
122 priv->int_status_reg = devm_ioremap_resource(dev, res);
123 if (IS_ERR(priv->int_status_reg))
124 return PTR_ERR(priv->int_status_reg);
125
126 priv->big_endian = of_device_is_big_endian(dev->of_node);
127
128 bcm_iproc_qspi_int_ack(soc_intc, MSPI_BSPI_DONE);
129 bcm_iproc_qspi_int_set(soc_intc, MSPI_BSPI_DONE, false);
130
131 soc_intc->bcm_qspi_int_ack = bcm_iproc_qspi_int_ack;
132 soc_intc->bcm_qspi_int_set = bcm_iproc_qspi_int_set;
133 soc_intc->bcm_qspi_get_int_status = bcm_iproc_qspi_get_l2_int_status;
134
135 return bcm_qspi_probe(pdev, soc_intc);
136}
137
138static int bcm_iproc_remove(struct platform_device *pdev)
139{
140 return bcm_qspi_remove(pdev);
141}
142
143static const struct of_device_id bcm_iproc_of_match[] = {
144 { .compatible = "brcm,spi-nsp-qspi" },
145 { .compatible = "brcm,spi-ns2-qspi" },
146 {},
147};
148MODULE_DEVICE_TABLE(of, bcm_iproc_of_match);
149
150static struct platform_driver bcm_iproc_driver = {
151 .probe = bcm_iproc_probe,
152 .remove = bcm_iproc_remove,
153 .driver = {
154 .name = "bcm_iproc",
155 .pm = &bcm_qspi_pm_ops,
156 .of_match_table = bcm_iproc_of_match,
157 }
158};
159module_platform_driver(bcm_iproc_driver);
160
161MODULE_LICENSE("GPL v2");
162MODULE_AUTHOR("Kamal Dasu");
163MODULE_DESCRIPTION("SPI flash driver for Broadcom iProc SoCs");