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1// SPDX-License-Identifier: GPL-2.0
2/* Copyright (c) 2018, Intel Corporation. */
3
4/* The driver transmit and receive code */
5
6#include <linux/mm.h>
7#include <linux/netdevice.h>
8#include <linux/prefetch.h>
9#include <linux/bpf_trace.h>
10#include <net/dsfield.h>
11#include <net/mpls.h>
12#include <net/xdp.h>
13#include "ice_txrx_lib.h"
14#include "ice_lib.h"
15#include "ice.h"
16#include "ice_trace.h"
17#include "ice_dcb_lib.h"
18#include "ice_xsk.h"
19#include "ice_eswitch.h"
20
21#define ICE_RX_HDR_SIZE 256
22
23#define FDIR_DESC_RXDID 0x40
24#define ICE_FDIR_CLEAN_DELAY 10
25
26/**
27 * ice_prgm_fdir_fltr - Program a Flow Director filter
28 * @vsi: VSI to send dummy packet
29 * @fdir_desc: flow director descriptor
30 * @raw_packet: allocated buffer for flow director
31 */
32int
33ice_prgm_fdir_fltr(struct ice_vsi *vsi, struct ice_fltr_desc *fdir_desc,
34 u8 *raw_packet)
35{
36 struct ice_tx_buf *tx_buf, *first;
37 struct ice_fltr_desc *f_desc;
38 struct ice_tx_desc *tx_desc;
39 struct ice_tx_ring *tx_ring;
40 struct device *dev;
41 dma_addr_t dma;
42 u32 td_cmd;
43 u16 i;
44
45 /* VSI and Tx ring */
46 if (!vsi)
47 return -ENOENT;
48 tx_ring = vsi->tx_rings[0];
49 if (!tx_ring || !tx_ring->desc)
50 return -ENOENT;
51 dev = tx_ring->dev;
52
53 /* we are using two descriptors to add/del a filter and we can wait */
54 for (i = ICE_FDIR_CLEAN_DELAY; ICE_DESC_UNUSED(tx_ring) < 2; i--) {
55 if (!i)
56 return -EAGAIN;
57 msleep_interruptible(1);
58 }
59
60 dma = dma_map_single(dev, raw_packet, ICE_FDIR_MAX_RAW_PKT_SIZE,
61 DMA_TO_DEVICE);
62
63 if (dma_mapping_error(dev, dma))
64 return -EINVAL;
65
66 /* grab the next descriptor */
67 i = tx_ring->next_to_use;
68 first = &tx_ring->tx_buf[i];
69 f_desc = ICE_TX_FDIRDESC(tx_ring, i);
70 memcpy(f_desc, fdir_desc, sizeof(*f_desc));
71
72 i++;
73 i = (i < tx_ring->count) ? i : 0;
74 tx_desc = ICE_TX_DESC(tx_ring, i);
75 tx_buf = &tx_ring->tx_buf[i];
76
77 i++;
78 tx_ring->next_to_use = (i < tx_ring->count) ? i : 0;
79
80 memset(tx_buf, 0, sizeof(*tx_buf));
81 dma_unmap_len_set(tx_buf, len, ICE_FDIR_MAX_RAW_PKT_SIZE);
82 dma_unmap_addr_set(tx_buf, dma, dma);
83
84 tx_desc->buf_addr = cpu_to_le64(dma);
85 td_cmd = ICE_TXD_LAST_DESC_CMD | ICE_TX_DESC_CMD_DUMMY |
86 ICE_TX_DESC_CMD_RE;
87
88 tx_buf->tx_flags = ICE_TX_FLAGS_DUMMY_PKT;
89 tx_buf->raw_buf = raw_packet;
90
91 tx_desc->cmd_type_offset_bsz =
92 ice_build_ctob(td_cmd, 0, ICE_FDIR_MAX_RAW_PKT_SIZE, 0);
93
94 /* Force memory write to complete before letting h/w know
95 * there are new descriptors to fetch.
96 */
97 wmb();
98
99 /* mark the data descriptor to be watched */
100 first->next_to_watch = tx_desc;
101
102 writel(tx_ring->next_to_use, tx_ring->tail);
103
104 return 0;
105}
106
107/**
108 * ice_unmap_and_free_tx_buf - Release a Tx buffer
109 * @ring: the ring that owns the buffer
110 * @tx_buf: the buffer to free
111 */
112static void
113ice_unmap_and_free_tx_buf(struct ice_tx_ring *ring, struct ice_tx_buf *tx_buf)
114{
115 if (tx_buf->skb) {
116 if (tx_buf->tx_flags & ICE_TX_FLAGS_DUMMY_PKT)
117 devm_kfree(ring->dev, tx_buf->raw_buf);
118 else if (ice_ring_is_xdp(ring))
119 page_frag_free(tx_buf->raw_buf);
120 else
121 dev_kfree_skb_any(tx_buf->skb);
122 if (dma_unmap_len(tx_buf, len))
123 dma_unmap_single(ring->dev,
124 dma_unmap_addr(tx_buf, dma),
125 dma_unmap_len(tx_buf, len),
126 DMA_TO_DEVICE);
127 } else if (dma_unmap_len(tx_buf, len)) {
128 dma_unmap_page(ring->dev,
129 dma_unmap_addr(tx_buf, dma),
130 dma_unmap_len(tx_buf, len),
131 DMA_TO_DEVICE);
132 }
133
134 tx_buf->next_to_watch = NULL;
135 tx_buf->skb = NULL;
136 dma_unmap_len_set(tx_buf, len, 0);
137 /* tx_buf must be completely set up in the transmit path */
138}
139
140static struct netdev_queue *txring_txq(const struct ice_tx_ring *ring)
141{
142 return netdev_get_tx_queue(ring->netdev, ring->q_index);
143}
144
145/**
146 * ice_clean_tx_ring - Free any empty Tx buffers
147 * @tx_ring: ring to be cleaned
148 */
149void ice_clean_tx_ring(struct ice_tx_ring *tx_ring)
150{
151 u32 size;
152 u16 i;
153
154 if (ice_ring_is_xdp(tx_ring) && tx_ring->xsk_pool) {
155 ice_xsk_clean_xdp_ring(tx_ring);
156 goto tx_skip_free;
157 }
158
159 /* ring already cleared, nothing to do */
160 if (!tx_ring->tx_buf)
161 return;
162
163 /* Free all the Tx ring sk_buffs */
164 for (i = 0; i < tx_ring->count; i++)
165 ice_unmap_and_free_tx_buf(tx_ring, &tx_ring->tx_buf[i]);
166
167tx_skip_free:
168 memset(tx_ring->tx_buf, 0, sizeof(*tx_ring->tx_buf) * tx_ring->count);
169
170 size = ALIGN(tx_ring->count * sizeof(struct ice_tx_desc),
171 PAGE_SIZE);
172 /* Zero out the descriptor ring */
173 memset(tx_ring->desc, 0, size);
174
175 tx_ring->next_to_use = 0;
176 tx_ring->next_to_clean = 0;
177 tx_ring->next_dd = ICE_RING_QUARTER(tx_ring) - 1;
178 tx_ring->next_rs = ICE_RING_QUARTER(tx_ring) - 1;
179
180 if (!tx_ring->netdev)
181 return;
182
183 /* cleanup Tx queue statistics */
184 netdev_tx_reset_queue(txring_txq(tx_ring));
185}
186
187/**
188 * ice_free_tx_ring - Free Tx resources per queue
189 * @tx_ring: Tx descriptor ring for a specific queue
190 *
191 * Free all transmit software resources
192 */
193void ice_free_tx_ring(struct ice_tx_ring *tx_ring)
194{
195 u32 size;
196
197 ice_clean_tx_ring(tx_ring);
198 devm_kfree(tx_ring->dev, tx_ring->tx_buf);
199 tx_ring->tx_buf = NULL;
200
201 if (tx_ring->desc) {
202 size = ALIGN(tx_ring->count * sizeof(struct ice_tx_desc),
203 PAGE_SIZE);
204 dmam_free_coherent(tx_ring->dev, size,
205 tx_ring->desc, tx_ring->dma);
206 tx_ring->desc = NULL;
207 }
208}
209
210/**
211 * ice_clean_tx_irq - Reclaim resources after transmit completes
212 * @tx_ring: Tx ring to clean
213 * @napi_budget: Used to determine if we are in netpoll
214 *
215 * Returns true if there's any budget left (e.g. the clean is finished)
216 */
217static bool ice_clean_tx_irq(struct ice_tx_ring *tx_ring, int napi_budget)
218{
219 unsigned int total_bytes = 0, total_pkts = 0;
220 unsigned int budget = ICE_DFLT_IRQ_WORK;
221 struct ice_vsi *vsi = tx_ring->vsi;
222 s16 i = tx_ring->next_to_clean;
223 struct ice_tx_desc *tx_desc;
224 struct ice_tx_buf *tx_buf;
225
226 /* get the bql data ready */
227 netdev_txq_bql_complete_prefetchw(txring_txq(tx_ring));
228
229 tx_buf = &tx_ring->tx_buf[i];
230 tx_desc = ICE_TX_DESC(tx_ring, i);
231 i -= tx_ring->count;
232
233 prefetch(&vsi->state);
234
235 do {
236 struct ice_tx_desc *eop_desc = tx_buf->next_to_watch;
237
238 /* if next_to_watch is not set then there is no work pending */
239 if (!eop_desc)
240 break;
241
242 /* follow the guidelines of other drivers */
243 prefetchw(&tx_buf->skb->users);
244
245 smp_rmb(); /* prevent any other reads prior to eop_desc */
246
247 ice_trace(clean_tx_irq, tx_ring, tx_desc, tx_buf);
248 /* if the descriptor isn't done, no work yet to do */
249 if (!(eop_desc->cmd_type_offset_bsz &
250 cpu_to_le64(ICE_TX_DESC_DTYPE_DESC_DONE)))
251 break;
252
253 /* clear next_to_watch to prevent false hangs */
254 tx_buf->next_to_watch = NULL;
255
256 /* update the statistics for this packet */
257 total_bytes += tx_buf->bytecount;
258 total_pkts += tx_buf->gso_segs;
259
260 /* free the skb */
261 napi_consume_skb(tx_buf->skb, napi_budget);
262
263 /* unmap skb header data */
264 dma_unmap_single(tx_ring->dev,
265 dma_unmap_addr(tx_buf, dma),
266 dma_unmap_len(tx_buf, len),
267 DMA_TO_DEVICE);
268
269 /* clear tx_buf data */
270 tx_buf->skb = NULL;
271 dma_unmap_len_set(tx_buf, len, 0);
272
273 /* unmap remaining buffers */
274 while (tx_desc != eop_desc) {
275 ice_trace(clean_tx_irq_unmap, tx_ring, tx_desc, tx_buf);
276 tx_buf++;
277 tx_desc++;
278 i++;
279 if (unlikely(!i)) {
280 i -= tx_ring->count;
281 tx_buf = tx_ring->tx_buf;
282 tx_desc = ICE_TX_DESC(tx_ring, 0);
283 }
284
285 /* unmap any remaining paged data */
286 if (dma_unmap_len(tx_buf, len)) {
287 dma_unmap_page(tx_ring->dev,
288 dma_unmap_addr(tx_buf, dma),
289 dma_unmap_len(tx_buf, len),
290 DMA_TO_DEVICE);
291 dma_unmap_len_set(tx_buf, len, 0);
292 }
293 }
294 ice_trace(clean_tx_irq_unmap_eop, tx_ring, tx_desc, tx_buf);
295
296 /* move us one more past the eop_desc for start of next pkt */
297 tx_buf++;
298 tx_desc++;
299 i++;
300 if (unlikely(!i)) {
301 i -= tx_ring->count;
302 tx_buf = tx_ring->tx_buf;
303 tx_desc = ICE_TX_DESC(tx_ring, 0);
304 }
305
306 prefetch(tx_desc);
307
308 /* update budget accounting */
309 budget--;
310 } while (likely(budget));
311
312 i += tx_ring->count;
313 tx_ring->next_to_clean = i;
314
315 ice_update_tx_ring_stats(tx_ring, total_pkts, total_bytes);
316 netdev_tx_completed_queue(txring_txq(tx_ring), total_pkts, total_bytes);
317
318#define TX_WAKE_THRESHOLD ((s16)(DESC_NEEDED * 2))
319 if (unlikely(total_pkts && netif_carrier_ok(tx_ring->netdev) &&
320 (ICE_DESC_UNUSED(tx_ring) >= TX_WAKE_THRESHOLD))) {
321 /* Make sure that anybody stopping the queue after this
322 * sees the new next_to_clean.
323 */
324 smp_mb();
325 if (netif_tx_queue_stopped(txring_txq(tx_ring)) &&
326 !test_bit(ICE_VSI_DOWN, vsi->state)) {
327 netif_tx_wake_queue(txring_txq(tx_ring));
328 ++tx_ring->ring_stats->tx_stats.restart_q;
329 }
330 }
331
332 return !!budget;
333}
334
335/**
336 * ice_setup_tx_ring - Allocate the Tx descriptors
337 * @tx_ring: the Tx ring to set up
338 *
339 * Return 0 on success, negative on error
340 */
341int ice_setup_tx_ring(struct ice_tx_ring *tx_ring)
342{
343 struct device *dev = tx_ring->dev;
344 u32 size;
345
346 if (!dev)
347 return -ENOMEM;
348
349 /* warn if we are about to overwrite the pointer */
350 WARN_ON(tx_ring->tx_buf);
351 tx_ring->tx_buf =
352 devm_kcalloc(dev, sizeof(*tx_ring->tx_buf), tx_ring->count,
353 GFP_KERNEL);
354 if (!tx_ring->tx_buf)
355 return -ENOMEM;
356
357 /* round up to nearest page */
358 size = ALIGN(tx_ring->count * sizeof(struct ice_tx_desc),
359 PAGE_SIZE);
360 tx_ring->desc = dmam_alloc_coherent(dev, size, &tx_ring->dma,
361 GFP_KERNEL);
362 if (!tx_ring->desc) {
363 dev_err(dev, "Unable to allocate memory for the Tx descriptor ring, size=%d\n",
364 size);
365 goto err;
366 }
367
368 tx_ring->next_to_use = 0;
369 tx_ring->next_to_clean = 0;
370 tx_ring->ring_stats->tx_stats.prev_pkt = -1;
371 return 0;
372
373err:
374 devm_kfree(dev, tx_ring->tx_buf);
375 tx_ring->tx_buf = NULL;
376 return -ENOMEM;
377}
378
379/**
380 * ice_clean_rx_ring - Free Rx buffers
381 * @rx_ring: ring to be cleaned
382 */
383void ice_clean_rx_ring(struct ice_rx_ring *rx_ring)
384{
385 struct device *dev = rx_ring->dev;
386 u32 size;
387 u16 i;
388
389 /* ring already cleared, nothing to do */
390 if (!rx_ring->rx_buf)
391 return;
392
393 if (rx_ring->skb) {
394 dev_kfree_skb(rx_ring->skb);
395 rx_ring->skb = NULL;
396 }
397
398 if (rx_ring->xsk_pool) {
399 ice_xsk_clean_rx_ring(rx_ring);
400 goto rx_skip_free;
401 }
402
403 /* Free all the Rx ring sk_buffs */
404 for (i = 0; i < rx_ring->count; i++) {
405 struct ice_rx_buf *rx_buf = &rx_ring->rx_buf[i];
406
407 if (!rx_buf->page)
408 continue;
409
410 /* Invalidate cache lines that may have been written to by
411 * device so that we avoid corrupting memory.
412 */
413 dma_sync_single_range_for_cpu(dev, rx_buf->dma,
414 rx_buf->page_offset,
415 rx_ring->rx_buf_len,
416 DMA_FROM_DEVICE);
417
418 /* free resources associated with mapping */
419 dma_unmap_page_attrs(dev, rx_buf->dma, ice_rx_pg_size(rx_ring),
420 DMA_FROM_DEVICE, ICE_RX_DMA_ATTR);
421 __page_frag_cache_drain(rx_buf->page, rx_buf->pagecnt_bias);
422
423 rx_buf->page = NULL;
424 rx_buf->page_offset = 0;
425 }
426
427rx_skip_free:
428 if (rx_ring->xsk_pool)
429 memset(rx_ring->xdp_buf, 0, array_size(rx_ring->count, sizeof(*rx_ring->xdp_buf)));
430 else
431 memset(rx_ring->rx_buf, 0, array_size(rx_ring->count, sizeof(*rx_ring->rx_buf)));
432
433 /* Zero out the descriptor ring */
434 size = ALIGN(rx_ring->count * sizeof(union ice_32byte_rx_desc),
435 PAGE_SIZE);
436 memset(rx_ring->desc, 0, size);
437
438 rx_ring->next_to_alloc = 0;
439 rx_ring->next_to_clean = 0;
440 rx_ring->next_to_use = 0;
441}
442
443/**
444 * ice_free_rx_ring - Free Rx resources
445 * @rx_ring: ring to clean the resources from
446 *
447 * Free all receive software resources
448 */
449void ice_free_rx_ring(struct ice_rx_ring *rx_ring)
450{
451 u32 size;
452
453 ice_clean_rx_ring(rx_ring);
454 if (rx_ring->vsi->type == ICE_VSI_PF)
455 if (xdp_rxq_info_is_reg(&rx_ring->xdp_rxq))
456 xdp_rxq_info_unreg(&rx_ring->xdp_rxq);
457 rx_ring->xdp_prog = NULL;
458 if (rx_ring->xsk_pool) {
459 kfree(rx_ring->xdp_buf);
460 rx_ring->xdp_buf = NULL;
461 } else {
462 kfree(rx_ring->rx_buf);
463 rx_ring->rx_buf = NULL;
464 }
465
466 if (rx_ring->desc) {
467 size = ALIGN(rx_ring->count * sizeof(union ice_32byte_rx_desc),
468 PAGE_SIZE);
469 dmam_free_coherent(rx_ring->dev, size,
470 rx_ring->desc, rx_ring->dma);
471 rx_ring->desc = NULL;
472 }
473}
474
475/**
476 * ice_setup_rx_ring - Allocate the Rx descriptors
477 * @rx_ring: the Rx ring to set up
478 *
479 * Return 0 on success, negative on error
480 */
481int ice_setup_rx_ring(struct ice_rx_ring *rx_ring)
482{
483 struct device *dev = rx_ring->dev;
484 u32 size;
485
486 if (!dev)
487 return -ENOMEM;
488
489 /* warn if we are about to overwrite the pointer */
490 WARN_ON(rx_ring->rx_buf);
491 rx_ring->rx_buf =
492 kcalloc(rx_ring->count, sizeof(*rx_ring->rx_buf), GFP_KERNEL);
493 if (!rx_ring->rx_buf)
494 return -ENOMEM;
495
496 /* round up to nearest page */
497 size = ALIGN(rx_ring->count * sizeof(union ice_32byte_rx_desc),
498 PAGE_SIZE);
499 rx_ring->desc = dmam_alloc_coherent(dev, size, &rx_ring->dma,
500 GFP_KERNEL);
501 if (!rx_ring->desc) {
502 dev_err(dev, "Unable to allocate memory for the Rx descriptor ring, size=%d\n",
503 size);
504 goto err;
505 }
506
507 rx_ring->next_to_use = 0;
508 rx_ring->next_to_clean = 0;
509
510 if (ice_is_xdp_ena_vsi(rx_ring->vsi))
511 WRITE_ONCE(rx_ring->xdp_prog, rx_ring->vsi->xdp_prog);
512
513 if (rx_ring->vsi->type == ICE_VSI_PF &&
514 !xdp_rxq_info_is_reg(&rx_ring->xdp_rxq))
515 if (xdp_rxq_info_reg(&rx_ring->xdp_rxq, rx_ring->netdev,
516 rx_ring->q_index, rx_ring->q_vector->napi.napi_id))
517 goto err;
518 return 0;
519
520err:
521 kfree(rx_ring->rx_buf);
522 rx_ring->rx_buf = NULL;
523 return -ENOMEM;
524}
525
526static unsigned int
527ice_rx_frame_truesize(struct ice_rx_ring *rx_ring, unsigned int __maybe_unused size)
528{
529 unsigned int truesize;
530
531#if (PAGE_SIZE < 8192)
532 truesize = ice_rx_pg_size(rx_ring) / 2; /* Must be power-of-2 */
533#else
534 truesize = rx_ring->rx_offset ?
535 SKB_DATA_ALIGN(rx_ring->rx_offset + size) +
536 SKB_DATA_ALIGN(sizeof(struct skb_shared_info)) :
537 SKB_DATA_ALIGN(size);
538#endif
539 return truesize;
540}
541
542/**
543 * ice_run_xdp - Executes an XDP program on initialized xdp_buff
544 * @rx_ring: Rx ring
545 * @xdp: xdp_buff used as input to the XDP program
546 * @xdp_prog: XDP program to run
547 * @xdp_ring: ring to be used for XDP_TX action
548 *
549 * Returns any of ICE_XDP_{PASS, CONSUMED, TX, REDIR}
550 */
551static int
552ice_run_xdp(struct ice_rx_ring *rx_ring, struct xdp_buff *xdp,
553 struct bpf_prog *xdp_prog, struct ice_tx_ring *xdp_ring)
554{
555 int err;
556 u32 act;
557
558 act = bpf_prog_run_xdp(xdp_prog, xdp);
559 switch (act) {
560 case XDP_PASS:
561 return ICE_XDP_PASS;
562 case XDP_TX:
563 if (static_branch_unlikely(&ice_xdp_locking_key))
564 spin_lock(&xdp_ring->tx_lock);
565 err = ice_xmit_xdp_ring(xdp->data, xdp->data_end - xdp->data, xdp_ring);
566 if (static_branch_unlikely(&ice_xdp_locking_key))
567 spin_unlock(&xdp_ring->tx_lock);
568 if (err == ICE_XDP_CONSUMED)
569 goto out_failure;
570 return err;
571 case XDP_REDIRECT:
572 err = xdp_do_redirect(rx_ring->netdev, xdp, xdp_prog);
573 if (err)
574 goto out_failure;
575 return ICE_XDP_REDIR;
576 default:
577 bpf_warn_invalid_xdp_action(rx_ring->netdev, xdp_prog, act);
578 fallthrough;
579 case XDP_ABORTED:
580out_failure:
581 trace_xdp_exception(rx_ring->netdev, xdp_prog, act);
582 fallthrough;
583 case XDP_DROP:
584 return ICE_XDP_CONSUMED;
585 }
586}
587
588/**
589 * ice_xdp_xmit - submit packets to XDP ring for transmission
590 * @dev: netdev
591 * @n: number of XDP frames to be transmitted
592 * @frames: XDP frames to be transmitted
593 * @flags: transmit flags
594 *
595 * Returns number of frames successfully sent. Failed frames
596 * will be free'ed by XDP core.
597 * For error cases, a negative errno code is returned and no-frames
598 * are transmitted (caller must handle freeing frames).
599 */
600int
601ice_xdp_xmit(struct net_device *dev, int n, struct xdp_frame **frames,
602 u32 flags)
603{
604 struct ice_netdev_priv *np = netdev_priv(dev);
605 unsigned int queue_index = smp_processor_id();
606 struct ice_vsi *vsi = np->vsi;
607 struct ice_tx_ring *xdp_ring;
608 int nxmit = 0, i;
609
610 if (test_bit(ICE_VSI_DOWN, vsi->state))
611 return -ENETDOWN;
612
613 if (!ice_is_xdp_ena_vsi(vsi))
614 return -ENXIO;
615
616 if (unlikely(flags & ~XDP_XMIT_FLAGS_MASK))
617 return -EINVAL;
618
619 if (static_branch_unlikely(&ice_xdp_locking_key)) {
620 queue_index %= vsi->num_xdp_txq;
621 xdp_ring = vsi->xdp_rings[queue_index];
622 spin_lock(&xdp_ring->tx_lock);
623 } else {
624 /* Generally, should not happen */
625 if (unlikely(queue_index >= vsi->num_xdp_txq))
626 return -ENXIO;
627 xdp_ring = vsi->xdp_rings[queue_index];
628 }
629
630 for (i = 0; i < n; i++) {
631 struct xdp_frame *xdpf = frames[i];
632 int err;
633
634 err = ice_xmit_xdp_ring(xdpf->data, xdpf->len, xdp_ring);
635 if (err != ICE_XDP_TX)
636 break;
637 nxmit++;
638 }
639
640 if (unlikely(flags & XDP_XMIT_FLUSH))
641 ice_xdp_ring_update_tail(xdp_ring);
642
643 if (static_branch_unlikely(&ice_xdp_locking_key))
644 spin_unlock(&xdp_ring->tx_lock);
645
646 return nxmit;
647}
648
649/**
650 * ice_alloc_mapped_page - recycle or make a new page
651 * @rx_ring: ring to use
652 * @bi: rx_buf struct to modify
653 *
654 * Returns true if the page was successfully allocated or
655 * reused.
656 */
657static bool
658ice_alloc_mapped_page(struct ice_rx_ring *rx_ring, struct ice_rx_buf *bi)
659{
660 struct page *page = bi->page;
661 dma_addr_t dma;
662
663 /* since we are recycling buffers we should seldom need to alloc */
664 if (likely(page))
665 return true;
666
667 /* alloc new page for storage */
668 page = dev_alloc_pages(ice_rx_pg_order(rx_ring));
669 if (unlikely(!page)) {
670 rx_ring->ring_stats->rx_stats.alloc_page_failed++;
671 return false;
672 }
673
674 /* map page for use */
675 dma = dma_map_page_attrs(rx_ring->dev, page, 0, ice_rx_pg_size(rx_ring),
676 DMA_FROM_DEVICE, ICE_RX_DMA_ATTR);
677
678 /* if mapping failed free memory back to system since
679 * there isn't much point in holding memory we can't use
680 */
681 if (dma_mapping_error(rx_ring->dev, dma)) {
682 __free_pages(page, ice_rx_pg_order(rx_ring));
683 rx_ring->ring_stats->rx_stats.alloc_page_failed++;
684 return false;
685 }
686
687 bi->dma = dma;
688 bi->page = page;
689 bi->page_offset = rx_ring->rx_offset;
690 page_ref_add(page, USHRT_MAX - 1);
691 bi->pagecnt_bias = USHRT_MAX;
692
693 return true;
694}
695
696/**
697 * ice_alloc_rx_bufs - Replace used receive buffers
698 * @rx_ring: ring to place buffers on
699 * @cleaned_count: number of buffers to replace
700 *
701 * Returns false if all allocations were successful, true if any fail. Returning
702 * true signals to the caller that we didn't replace cleaned_count buffers and
703 * there is more work to do.
704 *
705 * First, try to clean "cleaned_count" Rx buffers. Then refill the cleaned Rx
706 * buffers. Then bump tail at most one time. Grouping like this lets us avoid
707 * multiple tail writes per call.
708 */
709bool ice_alloc_rx_bufs(struct ice_rx_ring *rx_ring, u16 cleaned_count)
710{
711 union ice_32b_rx_flex_desc *rx_desc;
712 u16 ntu = rx_ring->next_to_use;
713 struct ice_rx_buf *bi;
714
715 /* do nothing if no valid netdev defined */
716 if ((!rx_ring->netdev && rx_ring->vsi->type != ICE_VSI_CTRL) ||
717 !cleaned_count)
718 return false;
719
720 /* get the Rx descriptor and buffer based on next_to_use */
721 rx_desc = ICE_RX_DESC(rx_ring, ntu);
722 bi = &rx_ring->rx_buf[ntu];
723
724 do {
725 /* if we fail here, we have work remaining */
726 if (!ice_alloc_mapped_page(rx_ring, bi))
727 break;
728
729 /* sync the buffer for use by the device */
730 dma_sync_single_range_for_device(rx_ring->dev, bi->dma,
731 bi->page_offset,
732 rx_ring->rx_buf_len,
733 DMA_FROM_DEVICE);
734
735 /* Refresh the desc even if buffer_addrs didn't change
736 * because each write-back erases this info.
737 */
738 rx_desc->read.pkt_addr = cpu_to_le64(bi->dma + bi->page_offset);
739
740 rx_desc++;
741 bi++;
742 ntu++;
743 if (unlikely(ntu == rx_ring->count)) {
744 rx_desc = ICE_RX_DESC(rx_ring, 0);
745 bi = rx_ring->rx_buf;
746 ntu = 0;
747 }
748
749 /* clear the status bits for the next_to_use descriptor */
750 rx_desc->wb.status_error0 = 0;
751
752 cleaned_count--;
753 } while (cleaned_count);
754
755 if (rx_ring->next_to_use != ntu)
756 ice_release_rx_desc(rx_ring, ntu);
757
758 return !!cleaned_count;
759}
760
761/**
762 * ice_rx_buf_adjust_pg_offset - Prepare Rx buffer for reuse
763 * @rx_buf: Rx buffer to adjust
764 * @size: Size of adjustment
765 *
766 * Update the offset within page so that Rx buf will be ready to be reused.
767 * For systems with PAGE_SIZE < 8192 this function will flip the page offset
768 * so the second half of page assigned to Rx buffer will be used, otherwise
769 * the offset is moved by "size" bytes
770 */
771static void
772ice_rx_buf_adjust_pg_offset(struct ice_rx_buf *rx_buf, unsigned int size)
773{
774#if (PAGE_SIZE < 8192)
775 /* flip page offset to other buffer */
776 rx_buf->page_offset ^= size;
777#else
778 /* move offset up to the next cache line */
779 rx_buf->page_offset += size;
780#endif
781}
782
783/**
784 * ice_can_reuse_rx_page - Determine if page can be reused for another Rx
785 * @rx_buf: buffer containing the page
786 * @rx_buf_pgcnt: rx_buf page refcount pre xdp_do_redirect() call
787 *
788 * If page is reusable, we have a green light for calling ice_reuse_rx_page,
789 * which will assign the current buffer to the buffer that next_to_alloc is
790 * pointing to; otherwise, the DMA mapping needs to be destroyed and
791 * page freed
792 */
793static bool
794ice_can_reuse_rx_page(struct ice_rx_buf *rx_buf, int rx_buf_pgcnt)
795{
796 unsigned int pagecnt_bias = rx_buf->pagecnt_bias;
797 struct page *page = rx_buf->page;
798
799 /* avoid re-using remote and pfmemalloc pages */
800 if (!dev_page_is_reusable(page))
801 return false;
802
803#if (PAGE_SIZE < 8192)
804 /* if we are only owner of page we can reuse it */
805 if (unlikely((rx_buf_pgcnt - pagecnt_bias) > 1))
806 return false;
807#else
808#define ICE_LAST_OFFSET \
809 (SKB_WITH_OVERHEAD(PAGE_SIZE) - ICE_RXBUF_2048)
810 if (rx_buf->page_offset > ICE_LAST_OFFSET)
811 return false;
812#endif /* PAGE_SIZE < 8192) */
813
814 /* If we have drained the page fragment pool we need to update
815 * the pagecnt_bias and page count so that we fully restock the
816 * number of references the driver holds.
817 */
818 if (unlikely(pagecnt_bias == 1)) {
819 page_ref_add(page, USHRT_MAX - 1);
820 rx_buf->pagecnt_bias = USHRT_MAX;
821 }
822
823 return true;
824}
825
826/**
827 * ice_add_rx_frag - Add contents of Rx buffer to sk_buff as a frag
828 * @rx_ring: Rx descriptor ring to transact packets on
829 * @rx_buf: buffer containing page to add
830 * @skb: sk_buff to place the data into
831 * @size: packet length from rx_desc
832 *
833 * This function will add the data contained in rx_buf->page to the skb.
834 * It will just attach the page as a frag to the skb.
835 * The function will then update the page offset.
836 */
837static void
838ice_add_rx_frag(struct ice_rx_ring *rx_ring, struct ice_rx_buf *rx_buf,
839 struct sk_buff *skb, unsigned int size)
840{
841#if (PAGE_SIZE >= 8192)
842 unsigned int truesize = SKB_DATA_ALIGN(size + rx_ring->rx_offset);
843#else
844 unsigned int truesize = ice_rx_pg_size(rx_ring) / 2;
845#endif
846
847 if (!size)
848 return;
849 skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, rx_buf->page,
850 rx_buf->page_offset, size, truesize);
851
852 /* page is being used so we must update the page offset */
853 ice_rx_buf_adjust_pg_offset(rx_buf, truesize);
854}
855
856/**
857 * ice_reuse_rx_page - page flip buffer and store it back on the ring
858 * @rx_ring: Rx descriptor ring to store buffers on
859 * @old_buf: donor buffer to have page reused
860 *
861 * Synchronizes page for reuse by the adapter
862 */
863static void
864ice_reuse_rx_page(struct ice_rx_ring *rx_ring, struct ice_rx_buf *old_buf)
865{
866 u16 nta = rx_ring->next_to_alloc;
867 struct ice_rx_buf *new_buf;
868
869 new_buf = &rx_ring->rx_buf[nta];
870
871 /* update, and store next to alloc */
872 nta++;
873 rx_ring->next_to_alloc = (nta < rx_ring->count) ? nta : 0;
874
875 /* Transfer page from old buffer to new buffer.
876 * Move each member individually to avoid possible store
877 * forwarding stalls and unnecessary copy of skb.
878 */
879 new_buf->dma = old_buf->dma;
880 new_buf->page = old_buf->page;
881 new_buf->page_offset = old_buf->page_offset;
882 new_buf->pagecnt_bias = old_buf->pagecnt_bias;
883}
884
885/**
886 * ice_get_rx_buf - Fetch Rx buffer and synchronize data for use
887 * @rx_ring: Rx descriptor ring to transact packets on
888 * @size: size of buffer to add to skb
889 * @rx_buf_pgcnt: rx_buf page refcount
890 *
891 * This function will pull an Rx buffer from the ring and synchronize it
892 * for use by the CPU.
893 */
894static struct ice_rx_buf *
895ice_get_rx_buf(struct ice_rx_ring *rx_ring, const unsigned int size,
896 int *rx_buf_pgcnt)
897{
898 struct ice_rx_buf *rx_buf;
899
900 rx_buf = &rx_ring->rx_buf[rx_ring->next_to_clean];
901 *rx_buf_pgcnt =
902#if (PAGE_SIZE < 8192)
903 page_count(rx_buf->page);
904#else
905 0;
906#endif
907 prefetchw(rx_buf->page);
908
909 if (!size)
910 return rx_buf;
911 /* we are reusing so sync this buffer for CPU use */
912 dma_sync_single_range_for_cpu(rx_ring->dev, rx_buf->dma,
913 rx_buf->page_offset, size,
914 DMA_FROM_DEVICE);
915
916 /* We have pulled a buffer for use, so decrement pagecnt_bias */
917 rx_buf->pagecnt_bias--;
918
919 return rx_buf;
920}
921
922/**
923 * ice_build_skb - Build skb around an existing buffer
924 * @rx_ring: Rx descriptor ring to transact packets on
925 * @rx_buf: Rx buffer to pull data from
926 * @xdp: xdp_buff pointing to the data
927 *
928 * This function builds an skb around an existing Rx buffer, taking care
929 * to set up the skb correctly and avoid any memcpy overhead.
930 */
931static struct sk_buff *
932ice_build_skb(struct ice_rx_ring *rx_ring, struct ice_rx_buf *rx_buf,
933 struct xdp_buff *xdp)
934{
935 u8 metasize = xdp->data - xdp->data_meta;
936#if (PAGE_SIZE < 8192)
937 unsigned int truesize = ice_rx_pg_size(rx_ring) / 2;
938#else
939 unsigned int truesize = SKB_DATA_ALIGN(sizeof(struct skb_shared_info)) +
940 SKB_DATA_ALIGN(xdp->data_end -
941 xdp->data_hard_start);
942#endif
943 struct sk_buff *skb;
944
945 /* Prefetch first cache line of first page. If xdp->data_meta
946 * is unused, this points exactly as xdp->data, otherwise we
947 * likely have a consumer accessing first few bytes of meta
948 * data, and then actual data.
949 */
950 net_prefetch(xdp->data_meta);
951 /* build an skb around the page buffer */
952 skb = napi_build_skb(xdp->data_hard_start, truesize);
953 if (unlikely(!skb))
954 return NULL;
955
956 /* must to record Rx queue, otherwise OS features such as
957 * symmetric queue won't work
958 */
959 skb_record_rx_queue(skb, rx_ring->q_index);
960
961 /* update pointers within the skb to store the data */
962 skb_reserve(skb, xdp->data - xdp->data_hard_start);
963 __skb_put(skb, xdp->data_end - xdp->data);
964 if (metasize)
965 skb_metadata_set(skb, metasize);
966
967 /* buffer is used by skb, update page_offset */
968 ice_rx_buf_adjust_pg_offset(rx_buf, truesize);
969
970 return skb;
971}
972
973/**
974 * ice_construct_skb - Allocate skb and populate it
975 * @rx_ring: Rx descriptor ring to transact packets on
976 * @rx_buf: Rx buffer to pull data from
977 * @xdp: xdp_buff pointing to the data
978 *
979 * This function allocates an skb. It then populates it with the page
980 * data from the current receive descriptor, taking care to set up the
981 * skb correctly.
982 */
983static struct sk_buff *
984ice_construct_skb(struct ice_rx_ring *rx_ring, struct ice_rx_buf *rx_buf,
985 struct xdp_buff *xdp)
986{
987 unsigned int metasize = xdp->data - xdp->data_meta;
988 unsigned int size = xdp->data_end - xdp->data;
989 unsigned int headlen;
990 struct sk_buff *skb;
991
992 /* prefetch first cache line of first page */
993 net_prefetch(xdp->data_meta);
994
995 /* allocate a skb to store the frags */
996 skb = __napi_alloc_skb(&rx_ring->q_vector->napi,
997 ICE_RX_HDR_SIZE + metasize,
998 GFP_ATOMIC | __GFP_NOWARN);
999 if (unlikely(!skb))
1000 return NULL;
1001
1002 skb_record_rx_queue(skb, rx_ring->q_index);
1003 /* Determine available headroom for copy */
1004 headlen = size;
1005 if (headlen > ICE_RX_HDR_SIZE)
1006 headlen = eth_get_headlen(skb->dev, xdp->data, ICE_RX_HDR_SIZE);
1007
1008 /* align pull length to size of long to optimize memcpy performance */
1009 memcpy(__skb_put(skb, headlen + metasize), xdp->data_meta,
1010 ALIGN(headlen + metasize, sizeof(long)));
1011
1012 if (metasize) {
1013 skb_metadata_set(skb, metasize);
1014 __skb_pull(skb, metasize);
1015 }
1016
1017 /* if we exhaust the linear part then add what is left as a frag */
1018 size -= headlen;
1019 if (size) {
1020#if (PAGE_SIZE >= 8192)
1021 unsigned int truesize = SKB_DATA_ALIGN(size);
1022#else
1023 unsigned int truesize = ice_rx_pg_size(rx_ring) / 2;
1024#endif
1025 skb_add_rx_frag(skb, 0, rx_buf->page,
1026 rx_buf->page_offset + headlen, size, truesize);
1027 /* buffer is used by skb, update page_offset */
1028 ice_rx_buf_adjust_pg_offset(rx_buf, truesize);
1029 } else {
1030 /* buffer is unused, reset bias back to rx_buf; data was copied
1031 * onto skb's linear part so there's no need for adjusting
1032 * page offset and we can reuse this buffer as-is
1033 */
1034 rx_buf->pagecnt_bias++;
1035 }
1036
1037 return skb;
1038}
1039
1040/**
1041 * ice_put_rx_buf - Clean up used buffer and either recycle or free
1042 * @rx_ring: Rx descriptor ring to transact packets on
1043 * @rx_buf: Rx buffer to pull data from
1044 * @rx_buf_pgcnt: Rx buffer page count pre xdp_do_redirect()
1045 *
1046 * This function will update next_to_clean and then clean up the contents
1047 * of the rx_buf. It will either recycle the buffer or unmap it and free
1048 * the associated resources.
1049 */
1050static void
1051ice_put_rx_buf(struct ice_rx_ring *rx_ring, struct ice_rx_buf *rx_buf,
1052 int rx_buf_pgcnt)
1053{
1054 u16 ntc = rx_ring->next_to_clean + 1;
1055
1056 /* fetch, update, and store next to clean */
1057 ntc = (ntc < rx_ring->count) ? ntc : 0;
1058 rx_ring->next_to_clean = ntc;
1059
1060 if (!rx_buf)
1061 return;
1062
1063 if (ice_can_reuse_rx_page(rx_buf, rx_buf_pgcnt)) {
1064 /* hand second half of page back to the ring */
1065 ice_reuse_rx_page(rx_ring, rx_buf);
1066 } else {
1067 /* we are not reusing the buffer so unmap it */
1068 dma_unmap_page_attrs(rx_ring->dev, rx_buf->dma,
1069 ice_rx_pg_size(rx_ring), DMA_FROM_DEVICE,
1070 ICE_RX_DMA_ATTR);
1071 __page_frag_cache_drain(rx_buf->page, rx_buf->pagecnt_bias);
1072 }
1073
1074 /* clear contents of buffer_info */
1075 rx_buf->page = NULL;
1076}
1077
1078/**
1079 * ice_is_non_eop - process handling of non-EOP buffers
1080 * @rx_ring: Rx ring being processed
1081 * @rx_desc: Rx descriptor for current buffer
1082 *
1083 * If the buffer is an EOP buffer, this function exits returning false,
1084 * otherwise return true indicating that this is in fact a non-EOP buffer.
1085 */
1086static bool
1087ice_is_non_eop(struct ice_rx_ring *rx_ring, union ice_32b_rx_flex_desc *rx_desc)
1088{
1089 /* if we are the last buffer then there is nothing else to do */
1090#define ICE_RXD_EOF BIT(ICE_RX_FLEX_DESC_STATUS0_EOF_S)
1091 if (likely(ice_test_staterr(rx_desc->wb.status_error0, ICE_RXD_EOF)))
1092 return false;
1093
1094 rx_ring->ring_stats->rx_stats.non_eop_descs++;
1095
1096 return true;
1097}
1098
1099/**
1100 * ice_clean_rx_irq - Clean completed descriptors from Rx ring - bounce buf
1101 * @rx_ring: Rx descriptor ring to transact packets on
1102 * @budget: Total limit on number of packets to process
1103 *
1104 * This function provides a "bounce buffer" approach to Rx interrupt
1105 * processing. The advantage to this is that on systems that have
1106 * expensive overhead for IOMMU access this provides a means of avoiding
1107 * it by maintaining the mapping of the page to the system.
1108 *
1109 * Returns amount of work completed
1110 */
1111int ice_clean_rx_irq(struct ice_rx_ring *rx_ring, int budget)
1112{
1113 unsigned int total_rx_bytes = 0, total_rx_pkts = 0, frame_sz = 0;
1114 u16 cleaned_count = ICE_DESC_UNUSED(rx_ring);
1115 unsigned int offset = rx_ring->rx_offset;
1116 struct ice_tx_ring *xdp_ring = NULL;
1117 unsigned int xdp_res, xdp_xmit = 0;
1118 struct sk_buff *skb = rx_ring->skb;
1119 struct bpf_prog *xdp_prog = NULL;
1120 struct xdp_buff xdp;
1121 bool failure;
1122
1123 /* Frame size depend on rx_ring setup when PAGE_SIZE=4K */
1124#if (PAGE_SIZE < 8192)
1125 frame_sz = ice_rx_frame_truesize(rx_ring, 0);
1126#endif
1127 xdp_init_buff(&xdp, frame_sz, &rx_ring->xdp_rxq);
1128
1129 xdp_prog = READ_ONCE(rx_ring->xdp_prog);
1130 if (xdp_prog)
1131 xdp_ring = rx_ring->xdp_ring;
1132
1133 /* start the loop to process Rx packets bounded by 'budget' */
1134 while (likely(total_rx_pkts < (unsigned int)budget)) {
1135 union ice_32b_rx_flex_desc *rx_desc;
1136 struct ice_rx_buf *rx_buf;
1137 unsigned char *hard_start;
1138 unsigned int size;
1139 u16 stat_err_bits;
1140 int rx_buf_pgcnt;
1141 u16 vlan_tag = 0;
1142 u16 rx_ptype;
1143
1144 /* get the Rx desc from Rx ring based on 'next_to_clean' */
1145 rx_desc = ICE_RX_DESC(rx_ring, rx_ring->next_to_clean);
1146
1147 /* status_error_len will always be zero for unused descriptors
1148 * because it's cleared in cleanup, and overlaps with hdr_addr
1149 * which is always zero because packet split isn't used, if the
1150 * hardware wrote DD then it will be non-zero
1151 */
1152 stat_err_bits = BIT(ICE_RX_FLEX_DESC_STATUS0_DD_S);
1153 if (!ice_test_staterr(rx_desc->wb.status_error0, stat_err_bits))
1154 break;
1155
1156 /* This memory barrier is needed to keep us from reading
1157 * any other fields out of the rx_desc until we know the
1158 * DD bit is set.
1159 */
1160 dma_rmb();
1161
1162 ice_trace(clean_rx_irq, rx_ring, rx_desc);
1163 if (rx_desc->wb.rxdid == FDIR_DESC_RXDID || !rx_ring->netdev) {
1164 struct ice_vsi *ctrl_vsi = rx_ring->vsi;
1165
1166 if (rx_desc->wb.rxdid == FDIR_DESC_RXDID &&
1167 ctrl_vsi->vf)
1168 ice_vc_fdir_irq_handler(ctrl_vsi, rx_desc);
1169 ice_put_rx_buf(rx_ring, NULL, 0);
1170 cleaned_count++;
1171 continue;
1172 }
1173
1174 size = le16_to_cpu(rx_desc->wb.pkt_len) &
1175 ICE_RX_FLX_DESC_PKT_LEN_M;
1176
1177 /* retrieve a buffer from the ring */
1178 rx_buf = ice_get_rx_buf(rx_ring, size, &rx_buf_pgcnt);
1179
1180 if (!size) {
1181 xdp.data = NULL;
1182 xdp.data_end = NULL;
1183 xdp.data_hard_start = NULL;
1184 xdp.data_meta = NULL;
1185 goto construct_skb;
1186 }
1187
1188 hard_start = page_address(rx_buf->page) + rx_buf->page_offset -
1189 offset;
1190 xdp_prepare_buff(&xdp, hard_start, offset, size, true);
1191#if (PAGE_SIZE > 4096)
1192 /* At larger PAGE_SIZE, frame_sz depend on len size */
1193 xdp.frame_sz = ice_rx_frame_truesize(rx_ring, size);
1194#endif
1195
1196 if (!xdp_prog)
1197 goto construct_skb;
1198
1199 xdp_res = ice_run_xdp(rx_ring, &xdp, xdp_prog, xdp_ring);
1200 if (!xdp_res)
1201 goto construct_skb;
1202 if (xdp_res & (ICE_XDP_TX | ICE_XDP_REDIR)) {
1203 xdp_xmit |= xdp_res;
1204 ice_rx_buf_adjust_pg_offset(rx_buf, xdp.frame_sz);
1205 } else {
1206 rx_buf->pagecnt_bias++;
1207 }
1208 total_rx_bytes += size;
1209 total_rx_pkts++;
1210
1211 cleaned_count++;
1212 ice_put_rx_buf(rx_ring, rx_buf, rx_buf_pgcnt);
1213 continue;
1214construct_skb:
1215 if (skb) {
1216 ice_add_rx_frag(rx_ring, rx_buf, skb, size);
1217 } else if (likely(xdp.data)) {
1218 if (ice_ring_uses_build_skb(rx_ring))
1219 skb = ice_build_skb(rx_ring, rx_buf, &xdp);
1220 else
1221 skb = ice_construct_skb(rx_ring, rx_buf, &xdp);
1222 }
1223 /* exit if we failed to retrieve a buffer */
1224 if (!skb) {
1225 rx_ring->ring_stats->rx_stats.alloc_buf_failed++;
1226 if (rx_buf)
1227 rx_buf->pagecnt_bias++;
1228 break;
1229 }
1230
1231 ice_put_rx_buf(rx_ring, rx_buf, rx_buf_pgcnt);
1232 cleaned_count++;
1233
1234 /* skip if it is NOP desc */
1235 if (ice_is_non_eop(rx_ring, rx_desc))
1236 continue;
1237
1238 stat_err_bits = BIT(ICE_RX_FLEX_DESC_STATUS0_RXE_S);
1239 if (unlikely(ice_test_staterr(rx_desc->wb.status_error0,
1240 stat_err_bits))) {
1241 dev_kfree_skb_any(skb);
1242 continue;
1243 }
1244
1245 vlan_tag = ice_get_vlan_tag_from_rx_desc(rx_desc);
1246
1247 /* pad the skb if needed, to make a valid ethernet frame */
1248 if (eth_skb_pad(skb)) {
1249 skb = NULL;
1250 continue;
1251 }
1252
1253 /* probably a little skewed due to removing CRC */
1254 total_rx_bytes += skb->len;
1255
1256 /* populate checksum, VLAN, and protocol */
1257 rx_ptype = le16_to_cpu(rx_desc->wb.ptype_flex_flags0) &
1258 ICE_RX_FLEX_DESC_PTYPE_M;
1259
1260 ice_process_skb_fields(rx_ring, rx_desc, skb, rx_ptype);
1261
1262 ice_trace(clean_rx_irq_indicate, rx_ring, rx_desc, skb);
1263 /* send completed skb up the stack */
1264 ice_receive_skb(rx_ring, skb, vlan_tag);
1265 skb = NULL;
1266
1267 /* update budget accounting */
1268 total_rx_pkts++;
1269 }
1270
1271 /* return up to cleaned_count buffers to hardware */
1272 failure = ice_alloc_rx_bufs(rx_ring, cleaned_count);
1273
1274 if (xdp_prog)
1275 ice_finalize_xdp_rx(xdp_ring, xdp_xmit);
1276 rx_ring->skb = skb;
1277
1278 if (rx_ring->ring_stats)
1279 ice_update_rx_ring_stats(rx_ring, total_rx_pkts,
1280 total_rx_bytes);
1281
1282 /* guarantee a trip back through this routine if there was a failure */
1283 return failure ? budget : (int)total_rx_pkts;
1284}
1285
1286static void __ice_update_sample(struct ice_q_vector *q_vector,
1287 struct ice_ring_container *rc,
1288 struct dim_sample *sample,
1289 bool is_tx)
1290{
1291 u64 packets = 0, bytes = 0;
1292
1293 if (is_tx) {
1294 struct ice_tx_ring *tx_ring;
1295
1296 ice_for_each_tx_ring(tx_ring, *rc) {
1297 struct ice_ring_stats *ring_stats;
1298
1299 ring_stats = tx_ring->ring_stats;
1300 if (!ring_stats)
1301 continue;
1302 packets += ring_stats->stats.pkts;
1303 bytes += ring_stats->stats.bytes;
1304 }
1305 } else {
1306 struct ice_rx_ring *rx_ring;
1307
1308 ice_for_each_rx_ring(rx_ring, *rc) {
1309 struct ice_ring_stats *ring_stats;
1310
1311 ring_stats = rx_ring->ring_stats;
1312 if (!ring_stats)
1313 continue;
1314 packets += ring_stats->stats.pkts;
1315 bytes += ring_stats->stats.bytes;
1316 }
1317 }
1318
1319 dim_update_sample(q_vector->total_events, packets, bytes, sample);
1320 sample->comp_ctr = 0;
1321
1322 /* if dim settings get stale, like when not updated for 1
1323 * second or longer, force it to start again. This addresses the
1324 * frequent case of an idle queue being switched to by the
1325 * scheduler. The 1,000 here means 1,000 milliseconds.
1326 */
1327 if (ktime_ms_delta(sample->time, rc->dim.start_sample.time) >= 1000)
1328 rc->dim.state = DIM_START_MEASURE;
1329}
1330
1331/**
1332 * ice_net_dim - Update net DIM algorithm
1333 * @q_vector: the vector associated with the interrupt
1334 *
1335 * Create a DIM sample and notify net_dim() so that it can possibly decide
1336 * a new ITR value based on incoming packets, bytes, and interrupts.
1337 *
1338 * This function is a no-op if the ring is not configured to dynamic ITR.
1339 */
1340static void ice_net_dim(struct ice_q_vector *q_vector)
1341{
1342 struct ice_ring_container *tx = &q_vector->tx;
1343 struct ice_ring_container *rx = &q_vector->rx;
1344
1345 if (ITR_IS_DYNAMIC(tx)) {
1346 struct dim_sample dim_sample;
1347
1348 __ice_update_sample(q_vector, tx, &dim_sample, true);
1349 net_dim(&tx->dim, dim_sample);
1350 }
1351
1352 if (ITR_IS_DYNAMIC(rx)) {
1353 struct dim_sample dim_sample;
1354
1355 __ice_update_sample(q_vector, rx, &dim_sample, false);
1356 net_dim(&rx->dim, dim_sample);
1357 }
1358}
1359
1360/**
1361 * ice_buildreg_itr - build value for writing to the GLINT_DYN_CTL register
1362 * @itr_idx: interrupt throttling index
1363 * @itr: interrupt throttling value in usecs
1364 */
1365static u32 ice_buildreg_itr(u16 itr_idx, u16 itr)
1366{
1367 /* The ITR value is reported in microseconds, and the register value is
1368 * recorded in 2 microsecond units. For this reason we only need to
1369 * shift by the GLINT_DYN_CTL_INTERVAL_S - ICE_ITR_GRAN_S to apply this
1370 * granularity as a shift instead of division. The mask makes sure the
1371 * ITR value is never odd so we don't accidentally write into the field
1372 * prior to the ITR field.
1373 */
1374 itr &= ICE_ITR_MASK;
1375
1376 return GLINT_DYN_CTL_INTENA_M | GLINT_DYN_CTL_CLEARPBA_M |
1377 (itr_idx << GLINT_DYN_CTL_ITR_INDX_S) |
1378 (itr << (GLINT_DYN_CTL_INTERVAL_S - ICE_ITR_GRAN_S));
1379}
1380
1381/**
1382 * ice_enable_interrupt - re-enable MSI-X interrupt
1383 * @q_vector: the vector associated with the interrupt to enable
1384 *
1385 * If the VSI is down, the interrupt will not be re-enabled. Also,
1386 * when enabling the interrupt always reset the wb_on_itr to false
1387 * and trigger a software interrupt to clean out internal state.
1388 */
1389static void ice_enable_interrupt(struct ice_q_vector *q_vector)
1390{
1391 struct ice_vsi *vsi = q_vector->vsi;
1392 bool wb_en = q_vector->wb_on_itr;
1393 u32 itr_val;
1394
1395 if (test_bit(ICE_DOWN, vsi->state))
1396 return;
1397
1398 /* trigger an ITR delayed software interrupt when exiting busy poll, to
1399 * make sure to catch any pending cleanups that might have been missed
1400 * due to interrupt state transition. If busy poll or poll isn't
1401 * enabled, then don't update ITR, and just enable the interrupt.
1402 */
1403 if (!wb_en) {
1404 itr_val = ice_buildreg_itr(ICE_ITR_NONE, 0);
1405 } else {
1406 q_vector->wb_on_itr = false;
1407
1408 /* do two things here with a single write. Set up the third ITR
1409 * index to be used for software interrupt moderation, and then
1410 * trigger a software interrupt with a rate limit of 20K on
1411 * software interrupts, this will help avoid high interrupt
1412 * loads due to frequently polling and exiting polling.
1413 */
1414 itr_val = ice_buildreg_itr(ICE_IDX_ITR2, ICE_ITR_20K);
1415 itr_val |= GLINT_DYN_CTL_SWINT_TRIG_M |
1416 ICE_IDX_ITR2 << GLINT_DYN_CTL_SW_ITR_INDX_S |
1417 GLINT_DYN_CTL_SW_ITR_INDX_ENA_M;
1418 }
1419 wr32(&vsi->back->hw, GLINT_DYN_CTL(q_vector->reg_idx), itr_val);
1420}
1421
1422/**
1423 * ice_set_wb_on_itr - set WB_ON_ITR for this q_vector
1424 * @q_vector: q_vector to set WB_ON_ITR on
1425 *
1426 * We need to tell hardware to write-back completed descriptors even when
1427 * interrupts are disabled. Descriptors will be written back on cache line
1428 * boundaries without WB_ON_ITR enabled, but if we don't enable WB_ON_ITR
1429 * descriptors may not be written back if they don't fill a cache line until
1430 * the next interrupt.
1431 *
1432 * This sets the write-back frequency to whatever was set previously for the
1433 * ITR indices. Also, set the INTENA_MSK bit to make sure hardware knows we
1434 * aren't meddling with the INTENA_M bit.
1435 */
1436static void ice_set_wb_on_itr(struct ice_q_vector *q_vector)
1437{
1438 struct ice_vsi *vsi = q_vector->vsi;
1439
1440 /* already in wb_on_itr mode no need to change it */
1441 if (q_vector->wb_on_itr)
1442 return;
1443
1444 /* use previously set ITR values for all of the ITR indices by
1445 * specifying ICE_ITR_NONE, which will vary in adaptive (AIM) mode and
1446 * be static in non-adaptive mode (user configured)
1447 */
1448 wr32(&vsi->back->hw, GLINT_DYN_CTL(q_vector->reg_idx),
1449 ((ICE_ITR_NONE << GLINT_DYN_CTL_ITR_INDX_S) &
1450 GLINT_DYN_CTL_ITR_INDX_M) | GLINT_DYN_CTL_INTENA_MSK_M |
1451 GLINT_DYN_CTL_WB_ON_ITR_M);
1452
1453 q_vector->wb_on_itr = true;
1454}
1455
1456/**
1457 * ice_napi_poll - NAPI polling Rx/Tx cleanup routine
1458 * @napi: napi struct with our devices info in it
1459 * @budget: amount of work driver is allowed to do this pass, in packets
1460 *
1461 * This function will clean all queues associated with a q_vector.
1462 *
1463 * Returns the amount of work done
1464 */
1465int ice_napi_poll(struct napi_struct *napi, int budget)
1466{
1467 struct ice_q_vector *q_vector =
1468 container_of(napi, struct ice_q_vector, napi);
1469 struct ice_tx_ring *tx_ring;
1470 struct ice_rx_ring *rx_ring;
1471 bool clean_complete = true;
1472 int budget_per_ring;
1473 int work_done = 0;
1474
1475 /* Since the actual Tx work is minimal, we can give the Tx a larger
1476 * budget and be more aggressive about cleaning up the Tx descriptors.
1477 */
1478 ice_for_each_tx_ring(tx_ring, q_vector->tx) {
1479 bool wd;
1480
1481 if (tx_ring->xsk_pool)
1482 wd = ice_xmit_zc(tx_ring);
1483 else if (ice_ring_is_xdp(tx_ring))
1484 wd = true;
1485 else
1486 wd = ice_clean_tx_irq(tx_ring, budget);
1487
1488 if (!wd)
1489 clean_complete = false;
1490 }
1491
1492 /* Handle case where we are called by netpoll with a budget of 0 */
1493 if (unlikely(budget <= 0))
1494 return budget;
1495
1496 /* normally we have 1 Rx ring per q_vector */
1497 if (unlikely(q_vector->num_ring_rx > 1))
1498 /* We attempt to distribute budget to each Rx queue fairly, but
1499 * don't allow the budget to go below 1 because that would exit
1500 * polling early.
1501 */
1502 budget_per_ring = max_t(int, budget / q_vector->num_ring_rx, 1);
1503 else
1504 /* Max of 1 Rx ring in this q_vector so give it the budget */
1505 budget_per_ring = budget;
1506
1507 ice_for_each_rx_ring(rx_ring, q_vector->rx) {
1508 int cleaned;
1509
1510 /* A dedicated path for zero-copy allows making a single
1511 * comparison in the irq context instead of many inside the
1512 * ice_clean_rx_irq function and makes the codebase cleaner.
1513 */
1514 cleaned = rx_ring->xsk_pool ?
1515 ice_clean_rx_irq_zc(rx_ring, budget_per_ring) :
1516 ice_clean_rx_irq(rx_ring, budget_per_ring);
1517 work_done += cleaned;
1518 /* if we clean as many as budgeted, we must not be done */
1519 if (cleaned >= budget_per_ring)
1520 clean_complete = false;
1521 }
1522
1523 /* If work not completed, return budget and polling will return */
1524 if (!clean_complete) {
1525 /* Set the writeback on ITR so partial completions of
1526 * cache-lines will still continue even if we're polling.
1527 */
1528 ice_set_wb_on_itr(q_vector);
1529 return budget;
1530 }
1531
1532 /* Exit the polling mode, but don't re-enable interrupts if stack might
1533 * poll us due to busy-polling
1534 */
1535 if (napi_complete_done(napi, work_done)) {
1536 ice_net_dim(q_vector);
1537 ice_enable_interrupt(q_vector);
1538 } else {
1539 ice_set_wb_on_itr(q_vector);
1540 }
1541
1542 return min_t(int, work_done, budget - 1);
1543}
1544
1545/**
1546 * __ice_maybe_stop_tx - 2nd level check for Tx stop conditions
1547 * @tx_ring: the ring to be checked
1548 * @size: the size buffer we want to assure is available
1549 *
1550 * Returns -EBUSY if a stop is needed, else 0
1551 */
1552static int __ice_maybe_stop_tx(struct ice_tx_ring *tx_ring, unsigned int size)
1553{
1554 netif_tx_stop_queue(txring_txq(tx_ring));
1555 /* Memory barrier before checking head and tail */
1556 smp_mb();
1557
1558 /* Check again in a case another CPU has just made room available. */
1559 if (likely(ICE_DESC_UNUSED(tx_ring) < size))
1560 return -EBUSY;
1561
1562 /* A reprieve! - use start_queue because it doesn't call schedule */
1563 netif_tx_start_queue(txring_txq(tx_ring));
1564 ++tx_ring->ring_stats->tx_stats.restart_q;
1565 return 0;
1566}
1567
1568/**
1569 * ice_maybe_stop_tx - 1st level check for Tx stop conditions
1570 * @tx_ring: the ring to be checked
1571 * @size: the size buffer we want to assure is available
1572 *
1573 * Returns 0 if stop is not needed
1574 */
1575static int ice_maybe_stop_tx(struct ice_tx_ring *tx_ring, unsigned int size)
1576{
1577 if (likely(ICE_DESC_UNUSED(tx_ring) >= size))
1578 return 0;
1579
1580 return __ice_maybe_stop_tx(tx_ring, size);
1581}
1582
1583/**
1584 * ice_tx_map - Build the Tx descriptor
1585 * @tx_ring: ring to send buffer on
1586 * @first: first buffer info buffer to use
1587 * @off: pointer to struct that holds offload parameters
1588 *
1589 * This function loops over the skb data pointed to by *first
1590 * and gets a physical address for each memory location and programs
1591 * it and the length into the transmit descriptor.
1592 */
1593static void
1594ice_tx_map(struct ice_tx_ring *tx_ring, struct ice_tx_buf *first,
1595 struct ice_tx_offload_params *off)
1596{
1597 u64 td_offset, td_tag, td_cmd;
1598 u16 i = tx_ring->next_to_use;
1599 unsigned int data_len, size;
1600 struct ice_tx_desc *tx_desc;
1601 struct ice_tx_buf *tx_buf;
1602 struct sk_buff *skb;
1603 skb_frag_t *frag;
1604 dma_addr_t dma;
1605 bool kick;
1606
1607 td_tag = off->td_l2tag1;
1608 td_cmd = off->td_cmd;
1609 td_offset = off->td_offset;
1610 skb = first->skb;
1611
1612 data_len = skb->data_len;
1613 size = skb_headlen(skb);
1614
1615 tx_desc = ICE_TX_DESC(tx_ring, i);
1616
1617 if (first->tx_flags & ICE_TX_FLAGS_HW_VLAN) {
1618 td_cmd |= (u64)ICE_TX_DESC_CMD_IL2TAG1;
1619 td_tag = (first->tx_flags & ICE_TX_FLAGS_VLAN_M) >>
1620 ICE_TX_FLAGS_VLAN_S;
1621 }
1622
1623 dma = dma_map_single(tx_ring->dev, skb->data, size, DMA_TO_DEVICE);
1624
1625 tx_buf = first;
1626
1627 for (frag = &skb_shinfo(skb)->frags[0];; frag++) {
1628 unsigned int max_data = ICE_MAX_DATA_PER_TXD_ALIGNED;
1629
1630 if (dma_mapping_error(tx_ring->dev, dma))
1631 goto dma_error;
1632
1633 /* record length, and DMA address */
1634 dma_unmap_len_set(tx_buf, len, size);
1635 dma_unmap_addr_set(tx_buf, dma, dma);
1636
1637 /* align size to end of page */
1638 max_data += -dma & (ICE_MAX_READ_REQ_SIZE - 1);
1639 tx_desc->buf_addr = cpu_to_le64(dma);
1640
1641 /* account for data chunks larger than the hardware
1642 * can handle
1643 */
1644 while (unlikely(size > ICE_MAX_DATA_PER_TXD)) {
1645 tx_desc->cmd_type_offset_bsz =
1646 ice_build_ctob(td_cmd, td_offset, max_data,
1647 td_tag);
1648
1649 tx_desc++;
1650 i++;
1651
1652 if (i == tx_ring->count) {
1653 tx_desc = ICE_TX_DESC(tx_ring, 0);
1654 i = 0;
1655 }
1656
1657 dma += max_data;
1658 size -= max_data;
1659
1660 max_data = ICE_MAX_DATA_PER_TXD_ALIGNED;
1661 tx_desc->buf_addr = cpu_to_le64(dma);
1662 }
1663
1664 if (likely(!data_len))
1665 break;
1666
1667 tx_desc->cmd_type_offset_bsz = ice_build_ctob(td_cmd, td_offset,
1668 size, td_tag);
1669
1670 tx_desc++;
1671 i++;
1672
1673 if (i == tx_ring->count) {
1674 tx_desc = ICE_TX_DESC(tx_ring, 0);
1675 i = 0;
1676 }
1677
1678 size = skb_frag_size(frag);
1679 data_len -= size;
1680
1681 dma = skb_frag_dma_map(tx_ring->dev, frag, 0, size,
1682 DMA_TO_DEVICE);
1683
1684 tx_buf = &tx_ring->tx_buf[i];
1685 }
1686
1687 /* record SW timestamp if HW timestamp is not available */
1688 skb_tx_timestamp(first->skb);
1689
1690 i++;
1691 if (i == tx_ring->count)
1692 i = 0;
1693
1694 /* write last descriptor with RS and EOP bits */
1695 td_cmd |= (u64)ICE_TXD_LAST_DESC_CMD;
1696 tx_desc->cmd_type_offset_bsz =
1697 ice_build_ctob(td_cmd, td_offset, size, td_tag);
1698
1699 /* Force memory writes to complete before letting h/w know there
1700 * are new descriptors to fetch.
1701 *
1702 * We also use this memory barrier to make certain all of the
1703 * status bits have been updated before next_to_watch is written.
1704 */
1705 wmb();
1706
1707 /* set next_to_watch value indicating a packet is present */
1708 first->next_to_watch = tx_desc;
1709
1710 tx_ring->next_to_use = i;
1711
1712 ice_maybe_stop_tx(tx_ring, DESC_NEEDED);
1713
1714 /* notify HW of packet */
1715 kick = __netdev_tx_sent_queue(txring_txq(tx_ring), first->bytecount,
1716 netdev_xmit_more());
1717 if (kick)
1718 /* notify HW of packet */
1719 writel(i, tx_ring->tail);
1720
1721 return;
1722
1723dma_error:
1724 /* clear DMA mappings for failed tx_buf map */
1725 for (;;) {
1726 tx_buf = &tx_ring->tx_buf[i];
1727 ice_unmap_and_free_tx_buf(tx_ring, tx_buf);
1728 if (tx_buf == first)
1729 break;
1730 if (i == 0)
1731 i = tx_ring->count;
1732 i--;
1733 }
1734
1735 tx_ring->next_to_use = i;
1736}
1737
1738/**
1739 * ice_tx_csum - Enable Tx checksum offloads
1740 * @first: pointer to the first descriptor
1741 * @off: pointer to struct that holds offload parameters
1742 *
1743 * Returns 0 or error (negative) if checksum offload can't happen, 1 otherwise.
1744 */
1745static
1746int ice_tx_csum(struct ice_tx_buf *first, struct ice_tx_offload_params *off)
1747{
1748 u32 l4_len = 0, l3_len = 0, l2_len = 0;
1749 struct sk_buff *skb = first->skb;
1750 union {
1751 struct iphdr *v4;
1752 struct ipv6hdr *v6;
1753 unsigned char *hdr;
1754 } ip;
1755 union {
1756 struct tcphdr *tcp;
1757 unsigned char *hdr;
1758 } l4;
1759 __be16 frag_off, protocol;
1760 unsigned char *exthdr;
1761 u32 offset, cmd = 0;
1762 u8 l4_proto = 0;
1763
1764 if (skb->ip_summed != CHECKSUM_PARTIAL)
1765 return 0;
1766
1767 protocol = vlan_get_protocol(skb);
1768
1769 if (eth_p_mpls(protocol)) {
1770 ip.hdr = skb_inner_network_header(skb);
1771 l4.hdr = skb_checksum_start(skb);
1772 } else {
1773 ip.hdr = skb_network_header(skb);
1774 l4.hdr = skb_transport_header(skb);
1775 }
1776
1777 /* compute outer L2 header size */
1778 l2_len = ip.hdr - skb->data;
1779 offset = (l2_len / 2) << ICE_TX_DESC_LEN_MACLEN_S;
1780
1781 /* set the tx_flags to indicate the IP protocol type. this is
1782 * required so that checksum header computation below is accurate.
1783 */
1784 if (ip.v4->version == 4)
1785 first->tx_flags |= ICE_TX_FLAGS_IPV4;
1786 else if (ip.v6->version == 6)
1787 first->tx_flags |= ICE_TX_FLAGS_IPV6;
1788
1789 if (skb->encapsulation) {
1790 bool gso_ena = false;
1791 u32 tunnel = 0;
1792
1793 /* define outer network header type */
1794 if (first->tx_flags & ICE_TX_FLAGS_IPV4) {
1795 tunnel |= (first->tx_flags & ICE_TX_FLAGS_TSO) ?
1796 ICE_TX_CTX_EIPT_IPV4 :
1797 ICE_TX_CTX_EIPT_IPV4_NO_CSUM;
1798 l4_proto = ip.v4->protocol;
1799 } else if (first->tx_flags & ICE_TX_FLAGS_IPV6) {
1800 int ret;
1801
1802 tunnel |= ICE_TX_CTX_EIPT_IPV6;
1803 exthdr = ip.hdr + sizeof(*ip.v6);
1804 l4_proto = ip.v6->nexthdr;
1805 ret = ipv6_skip_exthdr(skb, exthdr - skb->data,
1806 &l4_proto, &frag_off);
1807 if (ret < 0)
1808 return -1;
1809 }
1810
1811 /* define outer transport */
1812 switch (l4_proto) {
1813 case IPPROTO_UDP:
1814 tunnel |= ICE_TXD_CTX_UDP_TUNNELING;
1815 first->tx_flags |= ICE_TX_FLAGS_TUNNEL;
1816 break;
1817 case IPPROTO_GRE:
1818 tunnel |= ICE_TXD_CTX_GRE_TUNNELING;
1819 first->tx_flags |= ICE_TX_FLAGS_TUNNEL;
1820 break;
1821 case IPPROTO_IPIP:
1822 case IPPROTO_IPV6:
1823 first->tx_flags |= ICE_TX_FLAGS_TUNNEL;
1824 l4.hdr = skb_inner_network_header(skb);
1825 break;
1826 default:
1827 if (first->tx_flags & ICE_TX_FLAGS_TSO)
1828 return -1;
1829
1830 skb_checksum_help(skb);
1831 return 0;
1832 }
1833
1834 /* compute outer L3 header size */
1835 tunnel |= ((l4.hdr - ip.hdr) / 4) <<
1836 ICE_TXD_CTX_QW0_EIPLEN_S;
1837
1838 /* switch IP header pointer from outer to inner header */
1839 ip.hdr = skb_inner_network_header(skb);
1840
1841 /* compute tunnel header size */
1842 tunnel |= ((ip.hdr - l4.hdr) / 2) <<
1843 ICE_TXD_CTX_QW0_NATLEN_S;
1844
1845 gso_ena = skb_shinfo(skb)->gso_type & SKB_GSO_PARTIAL;
1846 /* indicate if we need to offload outer UDP header */
1847 if ((first->tx_flags & ICE_TX_FLAGS_TSO) && !gso_ena &&
1848 (skb_shinfo(skb)->gso_type & SKB_GSO_UDP_TUNNEL_CSUM))
1849 tunnel |= ICE_TXD_CTX_QW0_L4T_CS_M;
1850
1851 /* record tunnel offload values */
1852 off->cd_tunnel_params |= tunnel;
1853
1854 /* set DTYP=1 to indicate that it's an Tx context descriptor
1855 * in IPsec tunnel mode with Tx offloads in Quad word 1
1856 */
1857 off->cd_qw1 |= (u64)ICE_TX_DESC_DTYPE_CTX;
1858
1859 /* switch L4 header pointer from outer to inner */
1860 l4.hdr = skb_inner_transport_header(skb);
1861 l4_proto = 0;
1862
1863 /* reset type as we transition from outer to inner headers */
1864 first->tx_flags &= ~(ICE_TX_FLAGS_IPV4 | ICE_TX_FLAGS_IPV6);
1865 if (ip.v4->version == 4)
1866 first->tx_flags |= ICE_TX_FLAGS_IPV4;
1867 if (ip.v6->version == 6)
1868 first->tx_flags |= ICE_TX_FLAGS_IPV6;
1869 }
1870
1871 /* Enable IP checksum offloads */
1872 if (first->tx_flags & ICE_TX_FLAGS_IPV4) {
1873 l4_proto = ip.v4->protocol;
1874 /* the stack computes the IP header already, the only time we
1875 * need the hardware to recompute it is in the case of TSO.
1876 */
1877 if (first->tx_flags & ICE_TX_FLAGS_TSO)
1878 cmd |= ICE_TX_DESC_CMD_IIPT_IPV4_CSUM;
1879 else
1880 cmd |= ICE_TX_DESC_CMD_IIPT_IPV4;
1881
1882 } else if (first->tx_flags & ICE_TX_FLAGS_IPV6) {
1883 cmd |= ICE_TX_DESC_CMD_IIPT_IPV6;
1884 exthdr = ip.hdr + sizeof(*ip.v6);
1885 l4_proto = ip.v6->nexthdr;
1886 if (l4.hdr != exthdr)
1887 ipv6_skip_exthdr(skb, exthdr - skb->data, &l4_proto,
1888 &frag_off);
1889 } else {
1890 return -1;
1891 }
1892
1893 /* compute inner L3 header size */
1894 l3_len = l4.hdr - ip.hdr;
1895 offset |= (l3_len / 4) << ICE_TX_DESC_LEN_IPLEN_S;
1896
1897 /* Enable L4 checksum offloads */
1898 switch (l4_proto) {
1899 case IPPROTO_TCP:
1900 /* enable checksum offloads */
1901 cmd |= ICE_TX_DESC_CMD_L4T_EOFT_TCP;
1902 l4_len = l4.tcp->doff;
1903 offset |= l4_len << ICE_TX_DESC_LEN_L4_LEN_S;
1904 break;
1905 case IPPROTO_UDP:
1906 /* enable UDP checksum offload */
1907 cmd |= ICE_TX_DESC_CMD_L4T_EOFT_UDP;
1908 l4_len = (sizeof(struct udphdr) >> 2);
1909 offset |= l4_len << ICE_TX_DESC_LEN_L4_LEN_S;
1910 break;
1911 case IPPROTO_SCTP:
1912 /* enable SCTP checksum offload */
1913 cmd |= ICE_TX_DESC_CMD_L4T_EOFT_SCTP;
1914 l4_len = sizeof(struct sctphdr) >> 2;
1915 offset |= l4_len << ICE_TX_DESC_LEN_L4_LEN_S;
1916 break;
1917
1918 default:
1919 if (first->tx_flags & ICE_TX_FLAGS_TSO)
1920 return -1;
1921 skb_checksum_help(skb);
1922 return 0;
1923 }
1924
1925 off->td_cmd |= cmd;
1926 off->td_offset |= offset;
1927 return 1;
1928}
1929
1930/**
1931 * ice_tx_prepare_vlan_flags - prepare generic Tx VLAN tagging flags for HW
1932 * @tx_ring: ring to send buffer on
1933 * @first: pointer to struct ice_tx_buf
1934 *
1935 * Checks the skb and set up correspondingly several generic transmit flags
1936 * related to VLAN tagging for the HW, such as VLAN, DCB, etc.
1937 */
1938static void
1939ice_tx_prepare_vlan_flags(struct ice_tx_ring *tx_ring, struct ice_tx_buf *first)
1940{
1941 struct sk_buff *skb = first->skb;
1942
1943 /* nothing left to do, software offloaded VLAN */
1944 if (!skb_vlan_tag_present(skb) && eth_type_vlan(skb->protocol))
1945 return;
1946
1947 /* the VLAN ethertype/tpid is determined by VSI configuration and netdev
1948 * feature flags, which the driver only allows either 802.1Q or 802.1ad
1949 * VLAN offloads exclusively so we only care about the VLAN ID here
1950 */
1951 if (skb_vlan_tag_present(skb)) {
1952 first->tx_flags |= skb_vlan_tag_get(skb) << ICE_TX_FLAGS_VLAN_S;
1953 if (tx_ring->flags & ICE_TX_FLAGS_RING_VLAN_L2TAG2)
1954 first->tx_flags |= ICE_TX_FLAGS_HW_OUTER_SINGLE_VLAN;
1955 else
1956 first->tx_flags |= ICE_TX_FLAGS_HW_VLAN;
1957 }
1958
1959 ice_tx_prepare_vlan_flags_dcb(tx_ring, first);
1960}
1961
1962/**
1963 * ice_tso - computes mss and TSO length to prepare for TSO
1964 * @first: pointer to struct ice_tx_buf
1965 * @off: pointer to struct that holds offload parameters
1966 *
1967 * Returns 0 or error (negative) if TSO can't happen, 1 otherwise.
1968 */
1969static
1970int ice_tso(struct ice_tx_buf *first, struct ice_tx_offload_params *off)
1971{
1972 struct sk_buff *skb = first->skb;
1973 union {
1974 struct iphdr *v4;
1975 struct ipv6hdr *v6;
1976 unsigned char *hdr;
1977 } ip;
1978 union {
1979 struct tcphdr *tcp;
1980 struct udphdr *udp;
1981 unsigned char *hdr;
1982 } l4;
1983 u64 cd_mss, cd_tso_len;
1984 __be16 protocol;
1985 u32 paylen;
1986 u8 l4_start;
1987 int err;
1988
1989 if (skb->ip_summed != CHECKSUM_PARTIAL)
1990 return 0;
1991
1992 if (!skb_is_gso(skb))
1993 return 0;
1994
1995 err = skb_cow_head(skb, 0);
1996 if (err < 0)
1997 return err;
1998
1999 /* cppcheck-suppress unreadVariable */
2000 protocol = vlan_get_protocol(skb);
2001
2002 if (eth_p_mpls(protocol))
2003 ip.hdr = skb_inner_network_header(skb);
2004 else
2005 ip.hdr = skb_network_header(skb);
2006 l4.hdr = skb_checksum_start(skb);
2007
2008 /* initialize outer IP header fields */
2009 if (ip.v4->version == 4) {
2010 ip.v4->tot_len = 0;
2011 ip.v4->check = 0;
2012 } else {
2013 ip.v6->payload_len = 0;
2014 }
2015
2016 if (skb_shinfo(skb)->gso_type & (SKB_GSO_GRE |
2017 SKB_GSO_GRE_CSUM |
2018 SKB_GSO_IPXIP4 |
2019 SKB_GSO_IPXIP6 |
2020 SKB_GSO_UDP_TUNNEL |
2021 SKB_GSO_UDP_TUNNEL_CSUM)) {
2022 if (!(skb_shinfo(skb)->gso_type & SKB_GSO_PARTIAL) &&
2023 (skb_shinfo(skb)->gso_type & SKB_GSO_UDP_TUNNEL_CSUM)) {
2024 l4.udp->len = 0;
2025
2026 /* determine offset of outer transport header */
2027 l4_start = (u8)(l4.hdr - skb->data);
2028
2029 /* remove payload length from outer checksum */
2030 paylen = skb->len - l4_start;
2031 csum_replace_by_diff(&l4.udp->check,
2032 (__force __wsum)htonl(paylen));
2033 }
2034
2035 /* reset pointers to inner headers */
2036
2037 /* cppcheck-suppress unreadVariable */
2038 ip.hdr = skb_inner_network_header(skb);
2039 l4.hdr = skb_inner_transport_header(skb);
2040
2041 /* initialize inner IP header fields */
2042 if (ip.v4->version == 4) {
2043 ip.v4->tot_len = 0;
2044 ip.v4->check = 0;
2045 } else {
2046 ip.v6->payload_len = 0;
2047 }
2048 }
2049
2050 /* determine offset of transport header */
2051 l4_start = (u8)(l4.hdr - skb->data);
2052
2053 /* remove payload length from checksum */
2054 paylen = skb->len - l4_start;
2055
2056 if (skb_shinfo(skb)->gso_type & SKB_GSO_UDP_L4) {
2057 csum_replace_by_diff(&l4.udp->check,
2058 (__force __wsum)htonl(paylen));
2059 /* compute length of UDP segmentation header */
2060 off->header_len = (u8)sizeof(l4.udp) + l4_start;
2061 } else {
2062 csum_replace_by_diff(&l4.tcp->check,
2063 (__force __wsum)htonl(paylen));
2064 /* compute length of TCP segmentation header */
2065 off->header_len = (u8)((l4.tcp->doff * 4) + l4_start);
2066 }
2067
2068 /* update gso_segs and bytecount */
2069 first->gso_segs = skb_shinfo(skb)->gso_segs;
2070 first->bytecount += (first->gso_segs - 1) * off->header_len;
2071
2072 cd_tso_len = skb->len - off->header_len;
2073 cd_mss = skb_shinfo(skb)->gso_size;
2074
2075 /* record cdesc_qw1 with TSO parameters */
2076 off->cd_qw1 |= (u64)(ICE_TX_DESC_DTYPE_CTX |
2077 (ICE_TX_CTX_DESC_TSO << ICE_TXD_CTX_QW1_CMD_S) |
2078 (cd_tso_len << ICE_TXD_CTX_QW1_TSO_LEN_S) |
2079 (cd_mss << ICE_TXD_CTX_QW1_MSS_S));
2080 first->tx_flags |= ICE_TX_FLAGS_TSO;
2081 return 1;
2082}
2083
2084/**
2085 * ice_txd_use_count - estimate the number of descriptors needed for Tx
2086 * @size: transmit request size in bytes
2087 *
2088 * Due to hardware alignment restrictions (4K alignment), we need to
2089 * assume that we can have no more than 12K of data per descriptor, even
2090 * though each descriptor can take up to 16K - 1 bytes of aligned memory.
2091 * Thus, we need to divide by 12K. But division is slow! Instead,
2092 * we decompose the operation into shifts and one relatively cheap
2093 * multiply operation.
2094 *
2095 * To divide by 12K, we first divide by 4K, then divide by 3:
2096 * To divide by 4K, shift right by 12 bits
2097 * To divide by 3, multiply by 85, then divide by 256
2098 * (Divide by 256 is done by shifting right by 8 bits)
2099 * Finally, we add one to round up. Because 256 isn't an exact multiple of
2100 * 3, we'll underestimate near each multiple of 12K. This is actually more
2101 * accurate as we have 4K - 1 of wiggle room that we can fit into the last
2102 * segment. For our purposes this is accurate out to 1M which is orders of
2103 * magnitude greater than our largest possible GSO size.
2104 *
2105 * This would then be implemented as:
2106 * return (((size >> 12) * 85) >> 8) + ICE_DESCS_FOR_SKB_DATA_PTR;
2107 *
2108 * Since multiplication and division are commutative, we can reorder
2109 * operations into:
2110 * return ((size * 85) >> 20) + ICE_DESCS_FOR_SKB_DATA_PTR;
2111 */
2112static unsigned int ice_txd_use_count(unsigned int size)
2113{
2114 return ((size * 85) >> 20) + ICE_DESCS_FOR_SKB_DATA_PTR;
2115}
2116
2117/**
2118 * ice_xmit_desc_count - calculate number of Tx descriptors needed
2119 * @skb: send buffer
2120 *
2121 * Returns number of data descriptors needed for this skb.
2122 */
2123static unsigned int ice_xmit_desc_count(struct sk_buff *skb)
2124{
2125 const skb_frag_t *frag = &skb_shinfo(skb)->frags[0];
2126 unsigned int nr_frags = skb_shinfo(skb)->nr_frags;
2127 unsigned int count = 0, size = skb_headlen(skb);
2128
2129 for (;;) {
2130 count += ice_txd_use_count(size);
2131
2132 if (!nr_frags--)
2133 break;
2134
2135 size = skb_frag_size(frag++);
2136 }
2137
2138 return count;
2139}
2140
2141/**
2142 * __ice_chk_linearize - Check if there are more than 8 buffers per packet
2143 * @skb: send buffer
2144 *
2145 * Note: This HW can't DMA more than 8 buffers to build a packet on the wire
2146 * and so we need to figure out the cases where we need to linearize the skb.
2147 *
2148 * For TSO we need to count the TSO header and segment payload separately.
2149 * As such we need to check cases where we have 7 fragments or more as we
2150 * can potentially require 9 DMA transactions, 1 for the TSO header, 1 for
2151 * the segment payload in the first descriptor, and another 7 for the
2152 * fragments.
2153 */
2154static bool __ice_chk_linearize(struct sk_buff *skb)
2155{
2156 const skb_frag_t *frag, *stale;
2157 int nr_frags, sum;
2158
2159 /* no need to check if number of frags is less than 7 */
2160 nr_frags = skb_shinfo(skb)->nr_frags;
2161 if (nr_frags < (ICE_MAX_BUF_TXD - 1))
2162 return false;
2163
2164 /* We need to walk through the list and validate that each group
2165 * of 6 fragments totals at least gso_size.
2166 */
2167 nr_frags -= ICE_MAX_BUF_TXD - 2;
2168 frag = &skb_shinfo(skb)->frags[0];
2169
2170 /* Initialize size to the negative value of gso_size minus 1. We
2171 * use this as the worst case scenario in which the frag ahead
2172 * of us only provides one byte which is why we are limited to 6
2173 * descriptors for a single transmit as the header and previous
2174 * fragment are already consuming 2 descriptors.
2175 */
2176 sum = 1 - skb_shinfo(skb)->gso_size;
2177
2178 /* Add size of frags 0 through 4 to create our initial sum */
2179 sum += skb_frag_size(frag++);
2180 sum += skb_frag_size(frag++);
2181 sum += skb_frag_size(frag++);
2182 sum += skb_frag_size(frag++);
2183 sum += skb_frag_size(frag++);
2184
2185 /* Walk through fragments adding latest fragment, testing it, and
2186 * then removing stale fragments from the sum.
2187 */
2188 for (stale = &skb_shinfo(skb)->frags[0];; stale++) {
2189 int stale_size = skb_frag_size(stale);
2190
2191 sum += skb_frag_size(frag++);
2192
2193 /* The stale fragment may present us with a smaller
2194 * descriptor than the actual fragment size. To account
2195 * for that we need to remove all the data on the front and
2196 * figure out what the remainder would be in the last
2197 * descriptor associated with the fragment.
2198 */
2199 if (stale_size > ICE_MAX_DATA_PER_TXD) {
2200 int align_pad = -(skb_frag_off(stale)) &
2201 (ICE_MAX_READ_REQ_SIZE - 1);
2202
2203 sum -= align_pad;
2204 stale_size -= align_pad;
2205
2206 do {
2207 sum -= ICE_MAX_DATA_PER_TXD_ALIGNED;
2208 stale_size -= ICE_MAX_DATA_PER_TXD_ALIGNED;
2209 } while (stale_size > ICE_MAX_DATA_PER_TXD);
2210 }
2211
2212 /* if sum is negative we failed to make sufficient progress */
2213 if (sum < 0)
2214 return true;
2215
2216 if (!nr_frags--)
2217 break;
2218
2219 sum -= stale_size;
2220 }
2221
2222 return false;
2223}
2224
2225/**
2226 * ice_chk_linearize - Check if there are more than 8 fragments per packet
2227 * @skb: send buffer
2228 * @count: number of buffers used
2229 *
2230 * Note: Our HW can't scatter-gather more than 8 fragments to build
2231 * a packet on the wire and so we need to figure out the cases where we
2232 * need to linearize the skb.
2233 */
2234static bool ice_chk_linearize(struct sk_buff *skb, unsigned int count)
2235{
2236 /* Both TSO and single send will work if count is less than 8 */
2237 if (likely(count < ICE_MAX_BUF_TXD))
2238 return false;
2239
2240 if (skb_is_gso(skb))
2241 return __ice_chk_linearize(skb);
2242
2243 /* we can support up to 8 data buffers for a single send */
2244 return count != ICE_MAX_BUF_TXD;
2245}
2246
2247/**
2248 * ice_tstamp - set up context descriptor for hardware timestamp
2249 * @tx_ring: pointer to the Tx ring to send buffer on
2250 * @skb: pointer to the SKB we're sending
2251 * @first: Tx buffer
2252 * @off: Tx offload parameters
2253 */
2254static void
2255ice_tstamp(struct ice_tx_ring *tx_ring, struct sk_buff *skb,
2256 struct ice_tx_buf *first, struct ice_tx_offload_params *off)
2257{
2258 s8 idx;
2259
2260 /* only timestamp the outbound packet if the user has requested it */
2261 if (likely(!(skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP)))
2262 return;
2263
2264 if (!tx_ring->ptp_tx)
2265 return;
2266
2267 /* Tx timestamps cannot be sampled when doing TSO */
2268 if (first->tx_flags & ICE_TX_FLAGS_TSO)
2269 return;
2270
2271 /* Grab an open timestamp slot */
2272 idx = ice_ptp_request_ts(tx_ring->tx_tstamps, skb);
2273 if (idx < 0) {
2274 tx_ring->vsi->back->ptp.tx_hwtstamp_skipped++;
2275 return;
2276 }
2277
2278 off->cd_qw1 |= (u64)(ICE_TX_DESC_DTYPE_CTX |
2279 (ICE_TX_CTX_DESC_TSYN << ICE_TXD_CTX_QW1_CMD_S) |
2280 ((u64)idx << ICE_TXD_CTX_QW1_TSO_LEN_S));
2281 first->tx_flags |= ICE_TX_FLAGS_TSYN;
2282}
2283
2284/**
2285 * ice_xmit_frame_ring - Sends buffer on Tx ring
2286 * @skb: send buffer
2287 * @tx_ring: ring to send buffer on
2288 *
2289 * Returns NETDEV_TX_OK if sent, else an error code
2290 */
2291static netdev_tx_t
2292ice_xmit_frame_ring(struct sk_buff *skb, struct ice_tx_ring *tx_ring)
2293{
2294 struct ice_tx_offload_params offload = { 0 };
2295 struct ice_vsi *vsi = tx_ring->vsi;
2296 struct ice_tx_buf *first;
2297 struct ethhdr *eth;
2298 unsigned int count;
2299 int tso, csum;
2300
2301 ice_trace(xmit_frame_ring, tx_ring, skb);
2302
2303 count = ice_xmit_desc_count(skb);
2304 if (ice_chk_linearize(skb, count)) {
2305 if (__skb_linearize(skb))
2306 goto out_drop;
2307 count = ice_txd_use_count(skb->len);
2308 tx_ring->ring_stats->tx_stats.tx_linearize++;
2309 }
2310
2311 /* need: 1 descriptor per page * PAGE_SIZE/ICE_MAX_DATA_PER_TXD,
2312 * + 1 desc for skb_head_len/ICE_MAX_DATA_PER_TXD,
2313 * + 4 desc gap to avoid the cache line where head is,
2314 * + 1 desc for context descriptor,
2315 * otherwise try next time
2316 */
2317 if (ice_maybe_stop_tx(tx_ring, count + ICE_DESCS_PER_CACHE_LINE +
2318 ICE_DESCS_FOR_CTX_DESC)) {
2319 tx_ring->ring_stats->tx_stats.tx_busy++;
2320 return NETDEV_TX_BUSY;
2321 }
2322
2323 /* prefetch for bql data which is infrequently used */
2324 netdev_txq_bql_enqueue_prefetchw(txring_txq(tx_ring));
2325
2326 offload.tx_ring = tx_ring;
2327
2328 /* record the location of the first descriptor for this packet */
2329 first = &tx_ring->tx_buf[tx_ring->next_to_use];
2330 first->skb = skb;
2331 first->bytecount = max_t(unsigned int, skb->len, ETH_ZLEN);
2332 first->gso_segs = 1;
2333 first->tx_flags = 0;
2334
2335 /* prepare the VLAN tagging flags for Tx */
2336 ice_tx_prepare_vlan_flags(tx_ring, first);
2337 if (first->tx_flags & ICE_TX_FLAGS_HW_OUTER_SINGLE_VLAN) {
2338 offload.cd_qw1 |= (u64)(ICE_TX_DESC_DTYPE_CTX |
2339 (ICE_TX_CTX_DESC_IL2TAG2 <<
2340 ICE_TXD_CTX_QW1_CMD_S));
2341 offload.cd_l2tag2 = (first->tx_flags & ICE_TX_FLAGS_VLAN_M) >>
2342 ICE_TX_FLAGS_VLAN_S;
2343 }
2344
2345 /* set up TSO offload */
2346 tso = ice_tso(first, &offload);
2347 if (tso < 0)
2348 goto out_drop;
2349
2350 /* always set up Tx checksum offload */
2351 csum = ice_tx_csum(first, &offload);
2352 if (csum < 0)
2353 goto out_drop;
2354
2355 /* allow CONTROL frames egress from main VSI if FW LLDP disabled */
2356 eth = (struct ethhdr *)skb_mac_header(skb);
2357 if (unlikely((skb->priority == TC_PRIO_CONTROL ||
2358 eth->h_proto == htons(ETH_P_LLDP)) &&
2359 vsi->type == ICE_VSI_PF &&
2360 vsi->port_info->qos_cfg.is_sw_lldp))
2361 offload.cd_qw1 |= (u64)(ICE_TX_DESC_DTYPE_CTX |
2362 ICE_TX_CTX_DESC_SWTCH_UPLINK <<
2363 ICE_TXD_CTX_QW1_CMD_S);
2364
2365 ice_tstamp(tx_ring, skb, first, &offload);
2366 if (ice_is_switchdev_running(vsi->back))
2367 ice_eswitch_set_target_vsi(skb, &offload);
2368
2369 if (offload.cd_qw1 & ICE_TX_DESC_DTYPE_CTX) {
2370 struct ice_tx_ctx_desc *cdesc;
2371 u16 i = tx_ring->next_to_use;
2372
2373 /* grab the next descriptor */
2374 cdesc = ICE_TX_CTX_DESC(tx_ring, i);
2375 i++;
2376 tx_ring->next_to_use = (i < tx_ring->count) ? i : 0;
2377
2378 /* setup context descriptor */
2379 cdesc->tunneling_params = cpu_to_le32(offload.cd_tunnel_params);
2380 cdesc->l2tag2 = cpu_to_le16(offload.cd_l2tag2);
2381 cdesc->rsvd = cpu_to_le16(0);
2382 cdesc->qw1 = cpu_to_le64(offload.cd_qw1);
2383 }
2384
2385 ice_tx_map(tx_ring, first, &offload);
2386 return NETDEV_TX_OK;
2387
2388out_drop:
2389 ice_trace(xmit_frame_ring_drop, tx_ring, skb);
2390 dev_kfree_skb_any(skb);
2391 return NETDEV_TX_OK;
2392}
2393
2394/**
2395 * ice_start_xmit - Selects the correct VSI and Tx queue to send buffer
2396 * @skb: send buffer
2397 * @netdev: network interface device structure
2398 *
2399 * Returns NETDEV_TX_OK if sent, else an error code
2400 */
2401netdev_tx_t ice_start_xmit(struct sk_buff *skb, struct net_device *netdev)
2402{
2403 struct ice_netdev_priv *np = netdev_priv(netdev);
2404 struct ice_vsi *vsi = np->vsi;
2405 struct ice_tx_ring *tx_ring;
2406
2407 tx_ring = vsi->tx_rings[skb->queue_mapping];
2408
2409 /* hardware can't handle really short frames, hardware padding works
2410 * beyond this point
2411 */
2412 if (skb_put_padto(skb, ICE_MIN_TX_LEN))
2413 return NETDEV_TX_OK;
2414
2415 return ice_xmit_frame_ring(skb, tx_ring);
2416}
2417
2418/**
2419 * ice_get_dscp_up - return the UP/TC value for a SKB
2420 * @dcbcfg: DCB config that contains DSCP to UP/TC mapping
2421 * @skb: SKB to query for info to determine UP/TC
2422 *
2423 * This function is to only be called when the PF is in L3 DSCP PFC mode
2424 */
2425static u8 ice_get_dscp_up(struct ice_dcbx_cfg *dcbcfg, struct sk_buff *skb)
2426{
2427 u8 dscp = 0;
2428
2429 if (skb->protocol == htons(ETH_P_IP))
2430 dscp = ipv4_get_dsfield(ip_hdr(skb)) >> 2;
2431 else if (skb->protocol == htons(ETH_P_IPV6))
2432 dscp = ipv6_get_dsfield(ipv6_hdr(skb)) >> 2;
2433
2434 return dcbcfg->dscp_map[dscp];
2435}
2436
2437u16
2438ice_select_queue(struct net_device *netdev, struct sk_buff *skb,
2439 struct net_device *sb_dev)
2440{
2441 struct ice_pf *pf = ice_netdev_to_pf(netdev);
2442 struct ice_dcbx_cfg *dcbcfg;
2443
2444 dcbcfg = &pf->hw.port_info->qos_cfg.local_dcbx_cfg;
2445 if (dcbcfg->pfc_mode == ICE_QOS_MODE_DSCP)
2446 skb->priority = ice_get_dscp_up(dcbcfg, skb);
2447
2448 return netdev_pick_tx(netdev, skb, sb_dev);
2449}
2450
2451/**
2452 * ice_clean_ctrl_tx_irq - interrupt handler for flow director Tx queue
2453 * @tx_ring: tx_ring to clean
2454 */
2455void ice_clean_ctrl_tx_irq(struct ice_tx_ring *tx_ring)
2456{
2457 struct ice_vsi *vsi = tx_ring->vsi;
2458 s16 i = tx_ring->next_to_clean;
2459 int budget = ICE_DFLT_IRQ_WORK;
2460 struct ice_tx_desc *tx_desc;
2461 struct ice_tx_buf *tx_buf;
2462
2463 tx_buf = &tx_ring->tx_buf[i];
2464 tx_desc = ICE_TX_DESC(tx_ring, i);
2465 i -= tx_ring->count;
2466
2467 do {
2468 struct ice_tx_desc *eop_desc = tx_buf->next_to_watch;
2469
2470 /* if next_to_watch is not set then there is no pending work */
2471 if (!eop_desc)
2472 break;
2473
2474 /* prevent any other reads prior to eop_desc */
2475 smp_rmb();
2476
2477 /* if the descriptor isn't done, no work to do */
2478 if (!(eop_desc->cmd_type_offset_bsz &
2479 cpu_to_le64(ICE_TX_DESC_DTYPE_DESC_DONE)))
2480 break;
2481
2482 /* clear next_to_watch to prevent false hangs */
2483 tx_buf->next_to_watch = NULL;
2484 tx_desc->buf_addr = 0;
2485 tx_desc->cmd_type_offset_bsz = 0;
2486
2487 /* move past filter desc */
2488 tx_buf++;
2489 tx_desc++;
2490 i++;
2491 if (unlikely(!i)) {
2492 i -= tx_ring->count;
2493 tx_buf = tx_ring->tx_buf;
2494 tx_desc = ICE_TX_DESC(tx_ring, 0);
2495 }
2496
2497 /* unmap the data header */
2498 if (dma_unmap_len(tx_buf, len))
2499 dma_unmap_single(tx_ring->dev,
2500 dma_unmap_addr(tx_buf, dma),
2501 dma_unmap_len(tx_buf, len),
2502 DMA_TO_DEVICE);
2503 if (tx_buf->tx_flags & ICE_TX_FLAGS_DUMMY_PKT)
2504 devm_kfree(tx_ring->dev, tx_buf->raw_buf);
2505
2506 /* clear next_to_watch to prevent false hangs */
2507 tx_buf->raw_buf = NULL;
2508 tx_buf->tx_flags = 0;
2509 tx_buf->next_to_watch = NULL;
2510 dma_unmap_len_set(tx_buf, len, 0);
2511 tx_desc->buf_addr = 0;
2512 tx_desc->cmd_type_offset_bsz = 0;
2513
2514 /* move past eop_desc for start of next FD desc */
2515 tx_buf++;
2516 tx_desc++;
2517 i++;
2518 if (unlikely(!i)) {
2519 i -= tx_ring->count;
2520 tx_buf = tx_ring->tx_buf;
2521 tx_desc = ICE_TX_DESC(tx_ring, 0);
2522 }
2523
2524 budget--;
2525 } while (likely(budget));
2526
2527 i += tx_ring->count;
2528 tx_ring->next_to_clean = i;
2529
2530 /* re-enable interrupt if needed */
2531 ice_irq_dynamic_ena(&vsi->back->hw, vsi, vsi->q_vectors[0]);
2532}
1// SPDX-License-Identifier: GPL-2.0
2/* Copyright (c) 2018, Intel Corporation. */
3
4/* The driver transmit and receive code */
5
6#include <linux/prefetch.h>
7#include <linux/mm.h>
8#include "ice.h"
9
10#define ICE_RX_HDR_SIZE 256
11
12/**
13 * ice_unmap_and_free_tx_buf - Release a Tx buffer
14 * @ring: the ring that owns the buffer
15 * @tx_buf: the buffer to free
16 */
17static void
18ice_unmap_and_free_tx_buf(struct ice_ring *ring, struct ice_tx_buf *tx_buf)
19{
20 if (tx_buf->skb) {
21 dev_kfree_skb_any(tx_buf->skb);
22 if (dma_unmap_len(tx_buf, len))
23 dma_unmap_single(ring->dev,
24 dma_unmap_addr(tx_buf, dma),
25 dma_unmap_len(tx_buf, len),
26 DMA_TO_DEVICE);
27 } else if (dma_unmap_len(tx_buf, len)) {
28 dma_unmap_page(ring->dev,
29 dma_unmap_addr(tx_buf, dma),
30 dma_unmap_len(tx_buf, len),
31 DMA_TO_DEVICE);
32 }
33
34 tx_buf->next_to_watch = NULL;
35 tx_buf->skb = NULL;
36 dma_unmap_len_set(tx_buf, len, 0);
37 /* tx_buf must be completely set up in the transmit path */
38}
39
40static struct netdev_queue *txring_txq(const struct ice_ring *ring)
41{
42 return netdev_get_tx_queue(ring->netdev, ring->q_index);
43}
44
45/**
46 * ice_clean_tx_ring - Free any empty Tx buffers
47 * @tx_ring: ring to be cleaned
48 */
49void ice_clean_tx_ring(struct ice_ring *tx_ring)
50{
51 unsigned long size;
52 u16 i;
53
54 /* ring already cleared, nothing to do */
55 if (!tx_ring->tx_buf)
56 return;
57
58 /* Free all the Tx ring sk_bufss */
59 for (i = 0; i < tx_ring->count; i++)
60 ice_unmap_and_free_tx_buf(tx_ring, &tx_ring->tx_buf[i]);
61
62 size = sizeof(struct ice_tx_buf) * tx_ring->count;
63 memset(tx_ring->tx_buf, 0, size);
64
65 /* Zero out the descriptor ring */
66 memset(tx_ring->desc, 0, tx_ring->size);
67
68 tx_ring->next_to_use = 0;
69 tx_ring->next_to_clean = 0;
70
71 if (!tx_ring->netdev)
72 return;
73
74 /* cleanup Tx queue statistics */
75 netdev_tx_reset_queue(txring_txq(tx_ring));
76}
77
78/**
79 * ice_free_tx_ring - Free Tx resources per queue
80 * @tx_ring: Tx descriptor ring for a specific queue
81 *
82 * Free all transmit software resources
83 */
84void ice_free_tx_ring(struct ice_ring *tx_ring)
85{
86 ice_clean_tx_ring(tx_ring);
87 devm_kfree(tx_ring->dev, tx_ring->tx_buf);
88 tx_ring->tx_buf = NULL;
89
90 if (tx_ring->desc) {
91 dmam_free_coherent(tx_ring->dev, tx_ring->size,
92 tx_ring->desc, tx_ring->dma);
93 tx_ring->desc = NULL;
94 }
95}
96
97/**
98 * ice_clean_tx_irq - Reclaim resources after transmit completes
99 * @vsi: the VSI we care about
100 * @tx_ring: Tx ring to clean
101 * @napi_budget: Used to determine if we are in netpoll
102 *
103 * Returns true if there's any budget left (e.g. the clean is finished)
104 */
105static bool ice_clean_tx_irq(struct ice_vsi *vsi, struct ice_ring *tx_ring,
106 int napi_budget)
107{
108 unsigned int total_bytes = 0, total_pkts = 0;
109 unsigned int budget = vsi->work_lmt;
110 s16 i = tx_ring->next_to_clean;
111 struct ice_tx_desc *tx_desc;
112 struct ice_tx_buf *tx_buf;
113
114 tx_buf = &tx_ring->tx_buf[i];
115 tx_desc = ICE_TX_DESC(tx_ring, i);
116 i -= tx_ring->count;
117
118 do {
119 struct ice_tx_desc *eop_desc = tx_buf->next_to_watch;
120
121 /* if next_to_watch is not set then there is no work pending */
122 if (!eop_desc)
123 break;
124
125 smp_rmb(); /* prevent any other reads prior to eop_desc */
126
127 /* if the descriptor isn't done, no work yet to do */
128 if (!(eop_desc->cmd_type_offset_bsz &
129 cpu_to_le64(ICE_TX_DESC_DTYPE_DESC_DONE)))
130 break;
131
132 /* clear next_to_watch to prevent false hangs */
133 tx_buf->next_to_watch = NULL;
134
135 /* update the statistics for this packet */
136 total_bytes += tx_buf->bytecount;
137 total_pkts += tx_buf->gso_segs;
138
139 /* free the skb */
140 napi_consume_skb(tx_buf->skb, napi_budget);
141
142 /* unmap skb header data */
143 dma_unmap_single(tx_ring->dev,
144 dma_unmap_addr(tx_buf, dma),
145 dma_unmap_len(tx_buf, len),
146 DMA_TO_DEVICE);
147
148 /* clear tx_buf data */
149 tx_buf->skb = NULL;
150 dma_unmap_len_set(tx_buf, len, 0);
151
152 /* unmap remaining buffers */
153 while (tx_desc != eop_desc) {
154 tx_buf++;
155 tx_desc++;
156 i++;
157 if (unlikely(!i)) {
158 i -= tx_ring->count;
159 tx_buf = tx_ring->tx_buf;
160 tx_desc = ICE_TX_DESC(tx_ring, 0);
161 }
162
163 /* unmap any remaining paged data */
164 if (dma_unmap_len(tx_buf, len)) {
165 dma_unmap_page(tx_ring->dev,
166 dma_unmap_addr(tx_buf, dma),
167 dma_unmap_len(tx_buf, len),
168 DMA_TO_DEVICE);
169 dma_unmap_len_set(tx_buf, len, 0);
170 }
171 }
172
173 /* move us one more past the eop_desc for start of next pkt */
174 tx_buf++;
175 tx_desc++;
176 i++;
177 if (unlikely(!i)) {
178 i -= tx_ring->count;
179 tx_buf = tx_ring->tx_buf;
180 tx_desc = ICE_TX_DESC(tx_ring, 0);
181 }
182
183 prefetch(tx_desc);
184
185 /* update budget accounting */
186 budget--;
187 } while (likely(budget));
188
189 i += tx_ring->count;
190 tx_ring->next_to_clean = i;
191 u64_stats_update_begin(&tx_ring->syncp);
192 tx_ring->stats.bytes += total_bytes;
193 tx_ring->stats.pkts += total_pkts;
194 u64_stats_update_end(&tx_ring->syncp);
195 tx_ring->q_vector->tx.total_bytes += total_bytes;
196 tx_ring->q_vector->tx.total_pkts += total_pkts;
197
198 netdev_tx_completed_queue(txring_txq(tx_ring), total_pkts,
199 total_bytes);
200
201#define TX_WAKE_THRESHOLD ((s16)(DESC_NEEDED * 2))
202 if (unlikely(total_pkts && netif_carrier_ok(tx_ring->netdev) &&
203 (ICE_DESC_UNUSED(tx_ring) >= TX_WAKE_THRESHOLD))) {
204 /* Make sure that anybody stopping the queue after this
205 * sees the new next_to_clean.
206 */
207 smp_mb();
208 if (__netif_subqueue_stopped(tx_ring->netdev,
209 tx_ring->q_index) &&
210 !test_bit(__ICE_DOWN, vsi->state)) {
211 netif_wake_subqueue(tx_ring->netdev,
212 tx_ring->q_index);
213 ++tx_ring->tx_stats.restart_q;
214 }
215 }
216
217 return !!budget;
218}
219
220/**
221 * ice_setup_tx_ring - Allocate the Tx descriptors
222 * @tx_ring: the tx ring to set up
223 *
224 * Return 0 on success, negative on error
225 */
226int ice_setup_tx_ring(struct ice_ring *tx_ring)
227{
228 struct device *dev = tx_ring->dev;
229 int bi_size;
230
231 if (!dev)
232 return -ENOMEM;
233
234 /* warn if we are about to overwrite the pointer */
235 WARN_ON(tx_ring->tx_buf);
236 bi_size = sizeof(struct ice_tx_buf) * tx_ring->count;
237 tx_ring->tx_buf = devm_kzalloc(dev, bi_size, GFP_KERNEL);
238 if (!tx_ring->tx_buf)
239 return -ENOMEM;
240
241 /* round up to nearest 4K */
242 tx_ring->size = tx_ring->count * sizeof(struct ice_tx_desc);
243 tx_ring->size = ALIGN(tx_ring->size, 4096);
244 tx_ring->desc = dmam_alloc_coherent(dev, tx_ring->size, &tx_ring->dma,
245 GFP_KERNEL);
246 if (!tx_ring->desc) {
247 dev_err(dev, "Unable to allocate memory for the Tx descriptor ring, size=%d\n",
248 tx_ring->size);
249 goto err;
250 }
251
252 tx_ring->next_to_use = 0;
253 tx_ring->next_to_clean = 0;
254 return 0;
255
256err:
257 devm_kfree(dev, tx_ring->tx_buf);
258 tx_ring->tx_buf = NULL;
259 return -ENOMEM;
260}
261
262/**
263 * ice_clean_rx_ring - Free Rx buffers
264 * @rx_ring: ring to be cleaned
265 */
266void ice_clean_rx_ring(struct ice_ring *rx_ring)
267{
268 struct device *dev = rx_ring->dev;
269 unsigned long size;
270 u16 i;
271
272 /* ring already cleared, nothing to do */
273 if (!rx_ring->rx_buf)
274 return;
275
276 /* Free all the Rx ring sk_buffs */
277 for (i = 0; i < rx_ring->count; i++) {
278 struct ice_rx_buf *rx_buf = &rx_ring->rx_buf[i];
279
280 if (rx_buf->skb) {
281 dev_kfree_skb(rx_buf->skb);
282 rx_buf->skb = NULL;
283 }
284 if (!rx_buf->page)
285 continue;
286
287 dma_unmap_page(dev, rx_buf->dma, PAGE_SIZE, DMA_FROM_DEVICE);
288 __free_pages(rx_buf->page, 0);
289
290 rx_buf->page = NULL;
291 rx_buf->page_offset = 0;
292 }
293
294 size = sizeof(struct ice_rx_buf) * rx_ring->count;
295 memset(rx_ring->rx_buf, 0, size);
296
297 /* Zero out the descriptor ring */
298 memset(rx_ring->desc, 0, rx_ring->size);
299
300 rx_ring->next_to_alloc = 0;
301 rx_ring->next_to_clean = 0;
302 rx_ring->next_to_use = 0;
303}
304
305/**
306 * ice_free_rx_ring - Free Rx resources
307 * @rx_ring: ring to clean the resources from
308 *
309 * Free all receive software resources
310 */
311void ice_free_rx_ring(struct ice_ring *rx_ring)
312{
313 ice_clean_rx_ring(rx_ring);
314 devm_kfree(rx_ring->dev, rx_ring->rx_buf);
315 rx_ring->rx_buf = NULL;
316
317 if (rx_ring->desc) {
318 dmam_free_coherent(rx_ring->dev, rx_ring->size,
319 rx_ring->desc, rx_ring->dma);
320 rx_ring->desc = NULL;
321 }
322}
323
324/**
325 * ice_setup_rx_ring - Allocate the Rx descriptors
326 * @rx_ring: the rx ring to set up
327 *
328 * Return 0 on success, negative on error
329 */
330int ice_setup_rx_ring(struct ice_ring *rx_ring)
331{
332 struct device *dev = rx_ring->dev;
333 int bi_size;
334
335 if (!dev)
336 return -ENOMEM;
337
338 /* warn if we are about to overwrite the pointer */
339 WARN_ON(rx_ring->rx_buf);
340 bi_size = sizeof(struct ice_rx_buf) * rx_ring->count;
341 rx_ring->rx_buf = devm_kzalloc(dev, bi_size, GFP_KERNEL);
342 if (!rx_ring->rx_buf)
343 return -ENOMEM;
344
345 /* round up to nearest 4K */
346 rx_ring->size = rx_ring->count * sizeof(union ice_32byte_rx_desc);
347 rx_ring->size = ALIGN(rx_ring->size, 4096);
348 rx_ring->desc = dmam_alloc_coherent(dev, rx_ring->size, &rx_ring->dma,
349 GFP_KERNEL);
350 if (!rx_ring->desc) {
351 dev_err(dev, "Unable to allocate memory for the Rx descriptor ring, size=%d\n",
352 rx_ring->size);
353 goto err;
354 }
355
356 rx_ring->next_to_use = 0;
357 rx_ring->next_to_clean = 0;
358 return 0;
359
360err:
361 devm_kfree(dev, rx_ring->rx_buf);
362 rx_ring->rx_buf = NULL;
363 return -ENOMEM;
364}
365
366/**
367 * ice_release_rx_desc - Store the new tail and head values
368 * @rx_ring: ring to bump
369 * @val: new head index
370 */
371static void ice_release_rx_desc(struct ice_ring *rx_ring, u32 val)
372{
373 rx_ring->next_to_use = val;
374
375 /* update next to alloc since we have filled the ring */
376 rx_ring->next_to_alloc = val;
377
378 /* Force memory writes to complete before letting h/w
379 * know there are new descriptors to fetch. (Only
380 * applicable for weak-ordered memory model archs,
381 * such as IA-64).
382 */
383 wmb();
384 writel(val, rx_ring->tail);
385}
386
387/**
388 * ice_alloc_mapped_page - recycle or make a new page
389 * @rx_ring: ring to use
390 * @bi: rx_buf struct to modify
391 *
392 * Returns true if the page was successfully allocated or
393 * reused.
394 */
395static bool ice_alloc_mapped_page(struct ice_ring *rx_ring,
396 struct ice_rx_buf *bi)
397{
398 struct page *page = bi->page;
399 dma_addr_t dma;
400
401 /* since we are recycling buffers we should seldom need to alloc */
402 if (likely(page)) {
403 rx_ring->rx_stats.page_reuse_count++;
404 return true;
405 }
406
407 /* alloc new page for storage */
408 page = alloc_page(GFP_ATOMIC | __GFP_NOWARN);
409 if (unlikely(!page)) {
410 rx_ring->rx_stats.alloc_page_failed++;
411 return false;
412 }
413
414 /* map page for use */
415 dma = dma_map_page(rx_ring->dev, page, 0, PAGE_SIZE, DMA_FROM_DEVICE);
416
417 /* if mapping failed free memory back to system since
418 * there isn't much point in holding memory we can't use
419 */
420 if (dma_mapping_error(rx_ring->dev, dma)) {
421 __free_pages(page, 0);
422 rx_ring->rx_stats.alloc_page_failed++;
423 return false;
424 }
425
426 bi->dma = dma;
427 bi->page = page;
428 bi->page_offset = 0;
429
430 return true;
431}
432
433/**
434 * ice_alloc_rx_bufs - Replace used receive buffers
435 * @rx_ring: ring to place buffers on
436 * @cleaned_count: number of buffers to replace
437 *
438 * Returns false if all allocations were successful, true if any fail
439 */
440bool ice_alloc_rx_bufs(struct ice_ring *rx_ring, u16 cleaned_count)
441{
442 union ice_32b_rx_flex_desc *rx_desc;
443 u16 ntu = rx_ring->next_to_use;
444 struct ice_rx_buf *bi;
445
446 /* do nothing if no valid netdev defined */
447 if (!rx_ring->netdev || !cleaned_count)
448 return false;
449
450 /* get the RX descriptor and buffer based on next_to_use */
451 rx_desc = ICE_RX_DESC(rx_ring, ntu);
452 bi = &rx_ring->rx_buf[ntu];
453
454 do {
455 if (!ice_alloc_mapped_page(rx_ring, bi))
456 goto no_bufs;
457
458 /* Refresh the desc even if buffer_addrs didn't change
459 * because each write-back erases this info.
460 */
461 rx_desc->read.pkt_addr = cpu_to_le64(bi->dma + bi->page_offset);
462
463 rx_desc++;
464 bi++;
465 ntu++;
466 if (unlikely(ntu == rx_ring->count)) {
467 rx_desc = ICE_RX_DESC(rx_ring, 0);
468 bi = rx_ring->rx_buf;
469 ntu = 0;
470 }
471
472 /* clear the status bits for the next_to_use descriptor */
473 rx_desc->wb.status_error0 = 0;
474
475 cleaned_count--;
476 } while (cleaned_count);
477
478 if (rx_ring->next_to_use != ntu)
479 ice_release_rx_desc(rx_ring, ntu);
480
481 return false;
482
483no_bufs:
484 if (rx_ring->next_to_use != ntu)
485 ice_release_rx_desc(rx_ring, ntu);
486
487 /* make sure to come back via polling to try again after
488 * allocation failure
489 */
490 return true;
491}
492
493/**
494 * ice_page_is_reserved - check if reuse is possible
495 * @page: page struct to check
496 */
497static bool ice_page_is_reserved(struct page *page)
498{
499 return (page_to_nid(page) != numa_mem_id()) || page_is_pfmemalloc(page);
500}
501
502/**
503 * ice_add_rx_frag - Add contents of Rx buffer to sk_buff
504 * @rx_buf: buffer containing page to add
505 * @rx_desc: descriptor containing length of buffer written by hardware
506 * @skb: sk_buf to place the data into
507 *
508 * This function will add the data contained in rx_buf->page to the skb.
509 * This is done either through a direct copy if the data in the buffer is
510 * less than the skb header size, otherwise it will just attach the page as
511 * a frag to the skb.
512 *
513 * The function will then update the page offset if necessary and return
514 * true if the buffer can be reused by the adapter.
515 */
516static bool ice_add_rx_frag(struct ice_rx_buf *rx_buf,
517 union ice_32b_rx_flex_desc *rx_desc,
518 struct sk_buff *skb)
519{
520#if (PAGE_SIZE < 8192)
521 unsigned int truesize = ICE_RXBUF_2048;
522#else
523 unsigned int last_offset = PAGE_SIZE - ICE_RXBUF_2048;
524 unsigned int truesize;
525#endif /* PAGE_SIZE < 8192) */
526
527 struct page *page;
528 unsigned int size;
529
530 size = le16_to_cpu(rx_desc->wb.pkt_len) &
531 ICE_RX_FLX_DESC_PKT_LEN_M;
532
533 page = rx_buf->page;
534
535#if (PAGE_SIZE >= 8192)
536 truesize = ALIGN(size, L1_CACHE_BYTES);
537#endif /* PAGE_SIZE >= 8192) */
538
539 /* will the data fit in the skb we allocated? if so, just
540 * copy it as it is pretty small anyway
541 */
542 if (size <= ICE_RX_HDR_SIZE && !skb_is_nonlinear(skb)) {
543 unsigned char *va = page_address(page) + rx_buf->page_offset;
544
545 memcpy(__skb_put(skb, size), va, ALIGN(size, sizeof(long)));
546
547 /* page is not reserved, we can reuse buffer as-is */
548 if (likely(!ice_page_is_reserved(page)))
549 return true;
550
551 /* this page cannot be reused so discard it */
552 __free_pages(page, 0);
553 return false;
554 }
555
556 skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, page,
557 rx_buf->page_offset, size, truesize);
558
559 /* avoid re-using remote pages */
560 if (unlikely(ice_page_is_reserved(page)))
561 return false;
562
563#if (PAGE_SIZE < 8192)
564 /* if we are only owner of page we can reuse it */
565 if (unlikely(page_count(page) != 1))
566 return false;
567
568 /* flip page offset to other buffer */
569 rx_buf->page_offset ^= truesize;
570#else
571 /* move offset up to the next cache line */
572 rx_buf->page_offset += truesize;
573
574 if (rx_buf->page_offset > last_offset)
575 return false;
576#endif /* PAGE_SIZE < 8192) */
577
578 /* Even if we own the page, we are not allowed to use atomic_set()
579 * This would break get_page_unless_zero() users.
580 */
581 get_page(rx_buf->page);
582
583 return true;
584}
585
586/**
587 * ice_reuse_rx_page - page flip buffer and store it back on the ring
588 * @rx_ring: rx descriptor ring to store buffers on
589 * @old_buf: donor buffer to have page reused
590 *
591 * Synchronizes page for reuse by the adapter
592 */
593static void ice_reuse_rx_page(struct ice_ring *rx_ring,
594 struct ice_rx_buf *old_buf)
595{
596 u16 nta = rx_ring->next_to_alloc;
597 struct ice_rx_buf *new_buf;
598
599 new_buf = &rx_ring->rx_buf[nta];
600
601 /* update, and store next to alloc */
602 nta++;
603 rx_ring->next_to_alloc = (nta < rx_ring->count) ? nta : 0;
604
605 /* transfer page from old buffer to new buffer */
606 *new_buf = *old_buf;
607}
608
609/**
610 * ice_fetch_rx_buf - Allocate skb and populate it
611 * @rx_ring: rx descriptor ring to transact packets on
612 * @rx_desc: descriptor containing info written by hardware
613 *
614 * This function allocates an skb on the fly, and populates it with the page
615 * data from the current receive descriptor, taking care to set up the skb
616 * correctly, as well as handling calling the page recycle function if
617 * necessary.
618 */
619static struct sk_buff *ice_fetch_rx_buf(struct ice_ring *rx_ring,
620 union ice_32b_rx_flex_desc *rx_desc)
621{
622 struct ice_rx_buf *rx_buf;
623 struct sk_buff *skb;
624 struct page *page;
625
626 rx_buf = &rx_ring->rx_buf[rx_ring->next_to_clean];
627 page = rx_buf->page;
628 prefetchw(page);
629
630 skb = rx_buf->skb;
631
632 if (likely(!skb)) {
633 u8 *page_addr = page_address(page) + rx_buf->page_offset;
634
635 /* prefetch first cache line of first page */
636 prefetch(page_addr);
637#if L1_CACHE_BYTES < 128
638 prefetch((void *)(page_addr + L1_CACHE_BYTES));
639#endif /* L1_CACHE_BYTES */
640
641 /* allocate a skb to store the frags */
642 skb = __napi_alloc_skb(&rx_ring->q_vector->napi,
643 ICE_RX_HDR_SIZE,
644 GFP_ATOMIC | __GFP_NOWARN);
645 if (unlikely(!skb)) {
646 rx_ring->rx_stats.alloc_buf_failed++;
647 return NULL;
648 }
649
650 /* we will be copying header into skb->data in
651 * pskb_may_pull so it is in our interest to prefetch
652 * it now to avoid a possible cache miss
653 */
654 prefetchw(skb->data);
655
656 skb_record_rx_queue(skb, rx_ring->q_index);
657 } else {
658 /* we are reusing so sync this buffer for CPU use */
659 dma_sync_single_range_for_cpu(rx_ring->dev, rx_buf->dma,
660 rx_buf->page_offset,
661 ICE_RXBUF_2048,
662 DMA_FROM_DEVICE);
663
664 rx_buf->skb = NULL;
665 }
666
667 /* pull page into skb */
668 if (ice_add_rx_frag(rx_buf, rx_desc, skb)) {
669 /* hand second half of page back to the ring */
670 ice_reuse_rx_page(rx_ring, rx_buf);
671 rx_ring->rx_stats.page_reuse_count++;
672 } else {
673 /* we are not reusing the buffer so unmap it */
674 dma_unmap_page(rx_ring->dev, rx_buf->dma, PAGE_SIZE,
675 DMA_FROM_DEVICE);
676 }
677
678 /* clear contents of buffer_info */
679 rx_buf->page = NULL;
680
681 return skb;
682}
683
684/**
685 * ice_pull_tail - ice specific version of skb_pull_tail
686 * @skb: pointer to current skb being adjusted
687 *
688 * This function is an ice specific version of __pskb_pull_tail. The
689 * main difference between this version and the original function is that
690 * this function can make several assumptions about the state of things
691 * that allow for significant optimizations versus the standard function.
692 * As a result we can do things like drop a frag and maintain an accurate
693 * truesize for the skb.
694 */
695static void ice_pull_tail(struct sk_buff *skb)
696{
697 struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[0];
698 unsigned int pull_len;
699 unsigned char *va;
700
701 /* it is valid to use page_address instead of kmap since we are
702 * working with pages allocated out of the lomem pool per
703 * alloc_page(GFP_ATOMIC)
704 */
705 va = skb_frag_address(frag);
706
707 /* we need the header to contain the greater of either ETH_HLEN or
708 * 60 bytes if the skb->len is less than 60 for skb_pad.
709 */
710 pull_len = eth_get_headlen(va, ICE_RX_HDR_SIZE);
711
712 /* align pull length to size of long to optimize memcpy performance */
713 skb_copy_to_linear_data(skb, va, ALIGN(pull_len, sizeof(long)));
714
715 /* update all of the pointers */
716 skb_frag_size_sub(frag, pull_len);
717 frag->page_offset += pull_len;
718 skb->data_len -= pull_len;
719 skb->tail += pull_len;
720}
721
722/**
723 * ice_cleanup_headers - Correct empty headers
724 * @skb: pointer to current skb being fixed
725 *
726 * Also address the case where we are pulling data in on pages only
727 * and as such no data is present in the skb header.
728 *
729 * In addition if skb is not at least 60 bytes we need to pad it so that
730 * it is large enough to qualify as a valid Ethernet frame.
731 *
732 * Returns true if an error was encountered and skb was freed.
733 */
734static bool ice_cleanup_headers(struct sk_buff *skb)
735{
736 /* place header in linear portion of buffer */
737 if (skb_is_nonlinear(skb))
738 ice_pull_tail(skb);
739
740 /* if eth_skb_pad returns an error the skb was freed */
741 if (eth_skb_pad(skb))
742 return true;
743
744 return false;
745}
746
747/**
748 * ice_test_staterr - tests bits in Rx descriptor status and error fields
749 * @rx_desc: pointer to receive descriptor (in le64 format)
750 * @stat_err_bits: value to mask
751 *
752 * This function does some fast chicanery in order to return the
753 * value of the mask which is really only used for boolean tests.
754 * The status_error_len doesn't need to be shifted because it begins
755 * at offset zero.
756 */
757static bool ice_test_staterr(union ice_32b_rx_flex_desc *rx_desc,
758 const u16 stat_err_bits)
759{
760 return !!(rx_desc->wb.status_error0 &
761 cpu_to_le16(stat_err_bits));
762}
763
764/**
765 * ice_is_non_eop - process handling of non-EOP buffers
766 * @rx_ring: Rx ring being processed
767 * @rx_desc: Rx descriptor for current buffer
768 * @skb: Current socket buffer containing buffer in progress
769 *
770 * This function updates next to clean. If the buffer is an EOP buffer
771 * this function exits returning false, otherwise it will place the
772 * sk_buff in the next buffer to be chained and return true indicating
773 * that this is in fact a non-EOP buffer.
774 */
775static bool ice_is_non_eop(struct ice_ring *rx_ring,
776 union ice_32b_rx_flex_desc *rx_desc,
777 struct sk_buff *skb)
778{
779 u32 ntc = rx_ring->next_to_clean + 1;
780
781 /* fetch, update, and store next to clean */
782 ntc = (ntc < rx_ring->count) ? ntc : 0;
783 rx_ring->next_to_clean = ntc;
784
785 prefetch(ICE_RX_DESC(rx_ring, ntc));
786
787 /* if we are the last buffer then there is nothing else to do */
788#define ICE_RXD_EOF BIT(ICE_RX_FLEX_DESC_STATUS0_EOF_S)
789 if (likely(ice_test_staterr(rx_desc, ICE_RXD_EOF)))
790 return false;
791
792 /* place skb in next buffer to be received */
793 rx_ring->rx_buf[ntc].skb = skb;
794 rx_ring->rx_stats.non_eop_descs++;
795
796 return true;
797}
798
799/**
800 * ice_ptype_to_htype - get a hash type
801 * @ptype: the ptype value from the descriptor
802 *
803 * Returns a hash type to be used by skb_set_hash
804 */
805static enum pkt_hash_types ice_ptype_to_htype(u8 __always_unused ptype)
806{
807 return PKT_HASH_TYPE_NONE;
808}
809
810/**
811 * ice_rx_hash - set the hash value in the skb
812 * @rx_ring: descriptor ring
813 * @rx_desc: specific descriptor
814 * @skb: pointer to current skb
815 * @rx_ptype: the ptype value from the descriptor
816 */
817static void
818ice_rx_hash(struct ice_ring *rx_ring, union ice_32b_rx_flex_desc *rx_desc,
819 struct sk_buff *skb, u8 rx_ptype)
820{
821 struct ice_32b_rx_flex_desc_nic *nic_mdid;
822 u32 hash;
823
824 if (!(rx_ring->netdev->features & NETIF_F_RXHASH))
825 return;
826
827 if (rx_desc->wb.rxdid != ICE_RXDID_FLEX_NIC)
828 return;
829
830 nic_mdid = (struct ice_32b_rx_flex_desc_nic *)rx_desc;
831 hash = le32_to_cpu(nic_mdid->rss_hash);
832 skb_set_hash(skb, hash, ice_ptype_to_htype(rx_ptype));
833}
834
835/**
836 * ice_rx_csum - Indicate in skb if checksum is good
837 * @vsi: the VSI we care about
838 * @skb: skb currently being received and modified
839 * @rx_desc: the receive descriptor
840 * @ptype: the packet type decoded by hardware
841 *
842 * skb->protocol must be set before this function is called
843 */
844static void ice_rx_csum(struct ice_vsi *vsi, struct sk_buff *skb,
845 union ice_32b_rx_flex_desc *rx_desc, u8 ptype)
846{
847 struct ice_rx_ptype_decoded decoded;
848 u32 rx_error, rx_status;
849 bool ipv4, ipv6;
850
851 rx_status = le16_to_cpu(rx_desc->wb.status_error0);
852 rx_error = rx_status;
853
854 decoded = ice_decode_rx_desc_ptype(ptype);
855
856 /* Start with CHECKSUM_NONE and by default csum_level = 0 */
857 skb->ip_summed = CHECKSUM_NONE;
858 skb_checksum_none_assert(skb);
859
860 /* check if Rx checksum is enabled */
861 if (!(vsi->netdev->features & NETIF_F_RXCSUM))
862 return;
863
864 /* check if HW has decoded the packet and checksum */
865 if (!(rx_status & BIT(ICE_RX_FLEX_DESC_STATUS0_L3L4P_S)))
866 return;
867
868 if (!(decoded.known && decoded.outer_ip))
869 return;
870
871 ipv4 = (decoded.outer_ip == ICE_RX_PTYPE_OUTER_IP) &&
872 (decoded.outer_ip_ver == ICE_RX_PTYPE_OUTER_IPV4);
873 ipv6 = (decoded.outer_ip == ICE_RX_PTYPE_OUTER_IP) &&
874 (decoded.outer_ip_ver == ICE_RX_PTYPE_OUTER_IPV6);
875
876 if (ipv4 && (rx_error & (BIT(ICE_RX_FLEX_DESC_STATUS0_XSUM_IPE_S) |
877 BIT(ICE_RX_FLEX_DESC_STATUS0_XSUM_EIPE_S))))
878 goto checksum_fail;
879 else if (ipv6 && (rx_status &
880 (BIT(ICE_RX_FLEX_DESC_STATUS0_IPV6EXADD_S))))
881 goto checksum_fail;
882
883 /* check for L4 errors and handle packets that were not able to be
884 * checksummed due to arrival speed
885 */
886 if (rx_error & BIT(ICE_RX_FLEX_DESC_STATUS0_XSUM_L4E_S))
887 goto checksum_fail;
888
889 /* Only report checksum unnecessary for TCP, UDP, or SCTP */
890 switch (decoded.inner_prot) {
891 case ICE_RX_PTYPE_INNER_PROT_TCP:
892 case ICE_RX_PTYPE_INNER_PROT_UDP:
893 case ICE_RX_PTYPE_INNER_PROT_SCTP:
894 skb->ip_summed = CHECKSUM_UNNECESSARY;
895 default:
896 break;
897 }
898 return;
899
900checksum_fail:
901 vsi->back->hw_csum_rx_error++;
902}
903
904/**
905 * ice_process_skb_fields - Populate skb header fields from Rx descriptor
906 * @rx_ring: rx descriptor ring packet is being transacted on
907 * @rx_desc: pointer to the EOP Rx descriptor
908 * @skb: pointer to current skb being populated
909 * @ptype: the packet type decoded by hardware
910 *
911 * This function checks the ring, descriptor, and packet information in
912 * order to populate the hash, checksum, VLAN, protocol, and
913 * other fields within the skb.
914 */
915static void ice_process_skb_fields(struct ice_ring *rx_ring,
916 union ice_32b_rx_flex_desc *rx_desc,
917 struct sk_buff *skb, u8 ptype)
918{
919 ice_rx_hash(rx_ring, rx_desc, skb, ptype);
920
921 /* modifies the skb - consumes the enet header */
922 skb->protocol = eth_type_trans(skb, rx_ring->netdev);
923
924 ice_rx_csum(rx_ring->vsi, skb, rx_desc, ptype);
925}
926
927/**
928 * ice_receive_skb - Send a completed packet up the stack
929 * @rx_ring: rx ring in play
930 * @skb: packet to send up
931 * @vlan_tag: vlan tag for packet
932 *
933 * This function sends the completed packet (via. skb) up the stack using
934 * gro receive functions (with/without vlan tag)
935 */
936static void ice_receive_skb(struct ice_ring *rx_ring, struct sk_buff *skb,
937 u16 vlan_tag)
938{
939 if ((rx_ring->netdev->features & NETIF_F_HW_VLAN_CTAG_RX) &&
940 (vlan_tag & VLAN_VID_MASK)) {
941 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vlan_tag);
942 }
943 napi_gro_receive(&rx_ring->q_vector->napi, skb);
944}
945
946/**
947 * ice_clean_rx_irq - Clean completed descriptors from Rx ring - bounce buf
948 * @rx_ring: rx descriptor ring to transact packets on
949 * @budget: Total limit on number of packets to process
950 *
951 * This function provides a "bounce buffer" approach to Rx interrupt
952 * processing. The advantage to this is that on systems that have
953 * expensive overhead for IOMMU access this provides a means of avoiding
954 * it by maintaining the mapping of the page to the system.
955 *
956 * Returns amount of work completed
957 */
958static int ice_clean_rx_irq(struct ice_ring *rx_ring, int budget)
959{
960 unsigned int total_rx_bytes = 0, total_rx_pkts = 0;
961 u16 cleaned_count = ICE_DESC_UNUSED(rx_ring);
962 bool failure = false;
963
964 /* start the loop to process RX packets bounded by 'budget' */
965 while (likely(total_rx_pkts < (unsigned int)budget)) {
966 union ice_32b_rx_flex_desc *rx_desc;
967 struct sk_buff *skb;
968 u16 stat_err_bits;
969 u16 vlan_tag = 0;
970 u8 rx_ptype;
971
972 /* return some buffers to hardware, one at a time is too slow */
973 if (cleaned_count >= ICE_RX_BUF_WRITE) {
974 failure = failure ||
975 ice_alloc_rx_bufs(rx_ring, cleaned_count);
976 cleaned_count = 0;
977 }
978
979 /* get the RX desc from RX ring based on 'next_to_clean' */
980 rx_desc = ICE_RX_DESC(rx_ring, rx_ring->next_to_clean);
981
982 /* status_error_len will always be zero for unused descriptors
983 * because it's cleared in cleanup, and overlaps with hdr_addr
984 * which is always zero because packet split isn't used, if the
985 * hardware wrote DD then it will be non-zero
986 */
987 stat_err_bits = BIT(ICE_RX_FLEX_DESC_STATUS0_DD_S);
988 if (!ice_test_staterr(rx_desc, stat_err_bits))
989 break;
990
991 /* This memory barrier is needed to keep us from reading
992 * any other fields out of the rx_desc until we know the
993 * DD bit is set.
994 */
995 dma_rmb();
996
997 /* allocate (if needed) and populate skb */
998 skb = ice_fetch_rx_buf(rx_ring, rx_desc);
999 if (!skb)
1000 break;
1001
1002 cleaned_count++;
1003
1004 /* skip if it is NOP desc */
1005 if (ice_is_non_eop(rx_ring, rx_desc, skb))
1006 continue;
1007
1008 stat_err_bits = BIT(ICE_RX_FLEX_DESC_STATUS0_RXE_S);
1009 if (unlikely(ice_test_staterr(rx_desc, stat_err_bits))) {
1010 dev_kfree_skb_any(skb);
1011 continue;
1012 }
1013
1014 rx_ptype = le16_to_cpu(rx_desc->wb.ptype_flex_flags0) &
1015 ICE_RX_FLEX_DESC_PTYPE_M;
1016
1017 stat_err_bits = BIT(ICE_RX_FLEX_DESC_STATUS0_L2TAG1P_S);
1018 if (ice_test_staterr(rx_desc, stat_err_bits))
1019 vlan_tag = le16_to_cpu(rx_desc->wb.l2tag1);
1020
1021 /* correct empty headers and pad skb if needed (to make valid
1022 * ethernet frame
1023 */
1024 if (ice_cleanup_headers(skb)) {
1025 skb = NULL;
1026 continue;
1027 }
1028
1029 /* probably a little skewed due to removing CRC */
1030 total_rx_bytes += skb->len;
1031
1032 /* populate checksum, VLAN, and protocol */
1033 ice_process_skb_fields(rx_ring, rx_desc, skb, rx_ptype);
1034
1035 /* send completed skb up the stack */
1036 ice_receive_skb(rx_ring, skb, vlan_tag);
1037
1038 /* update budget accounting */
1039 total_rx_pkts++;
1040 }
1041
1042 /* update queue and vector specific stats */
1043 u64_stats_update_begin(&rx_ring->syncp);
1044 rx_ring->stats.pkts += total_rx_pkts;
1045 rx_ring->stats.bytes += total_rx_bytes;
1046 u64_stats_update_end(&rx_ring->syncp);
1047 rx_ring->q_vector->rx.total_pkts += total_rx_pkts;
1048 rx_ring->q_vector->rx.total_bytes += total_rx_bytes;
1049
1050 /* guarantee a trip back through this routine if there was a failure */
1051 return failure ? budget : (int)total_rx_pkts;
1052}
1053
1054/**
1055 * ice_napi_poll - NAPI polling Rx/Tx cleanup routine
1056 * @napi: napi struct with our devices info in it
1057 * @budget: amount of work driver is allowed to do this pass, in packets
1058 *
1059 * This function will clean all queues associated with a q_vector.
1060 *
1061 * Returns the amount of work done
1062 */
1063int ice_napi_poll(struct napi_struct *napi, int budget)
1064{
1065 struct ice_q_vector *q_vector =
1066 container_of(napi, struct ice_q_vector, napi);
1067 struct ice_vsi *vsi = q_vector->vsi;
1068 struct ice_pf *pf = vsi->back;
1069 bool clean_complete = true;
1070 int budget_per_ring = 0;
1071 struct ice_ring *ring;
1072 int work_done = 0;
1073
1074 /* Since the actual Tx work is minimal, we can give the Tx a larger
1075 * budget and be more aggressive about cleaning up the Tx descriptors.
1076 */
1077 ice_for_each_ring(ring, q_vector->tx)
1078 if (!ice_clean_tx_irq(vsi, ring, budget))
1079 clean_complete = false;
1080
1081 /* Handle case where we are called by netpoll with a budget of 0 */
1082 if (budget <= 0)
1083 return budget;
1084
1085 /* We attempt to distribute budget to each Rx queue fairly, but don't
1086 * allow the budget to go below 1 because that would exit polling early.
1087 */
1088 if (q_vector->num_ring_rx)
1089 budget_per_ring = max(budget / q_vector->num_ring_rx, 1);
1090
1091 ice_for_each_ring(ring, q_vector->rx) {
1092 int cleaned;
1093
1094 cleaned = ice_clean_rx_irq(ring, budget_per_ring);
1095 work_done += cleaned;
1096 /* if we clean as many as budgeted, we must not be done */
1097 if (cleaned >= budget_per_ring)
1098 clean_complete = false;
1099 }
1100
1101 /* If work not completed, return budget and polling will return */
1102 if (!clean_complete)
1103 return budget;
1104
1105 /* Work is done so exit the polling mode and re-enable the interrupt */
1106 napi_complete_done(napi, work_done);
1107 if (test_bit(ICE_FLAG_MSIX_ENA, pf->flags))
1108 ice_irq_dynamic_ena(&vsi->back->hw, vsi, q_vector);
1109 return 0;
1110}
1111
1112/* helper function for building cmd/type/offset */
1113static __le64
1114build_ctob(u64 td_cmd, u64 td_offset, unsigned int size, u64 td_tag)
1115{
1116 return cpu_to_le64(ICE_TX_DESC_DTYPE_DATA |
1117 (td_cmd << ICE_TXD_QW1_CMD_S) |
1118 (td_offset << ICE_TXD_QW1_OFFSET_S) |
1119 ((u64)size << ICE_TXD_QW1_TX_BUF_SZ_S) |
1120 (td_tag << ICE_TXD_QW1_L2TAG1_S));
1121}
1122
1123/**
1124 * __ice_maybe_stop_tx - 2nd level check for tx stop conditions
1125 * @tx_ring: the ring to be checked
1126 * @size: the size buffer we want to assure is available
1127 *
1128 * Returns -EBUSY if a stop is needed, else 0
1129 */
1130static int __ice_maybe_stop_tx(struct ice_ring *tx_ring, unsigned int size)
1131{
1132 netif_stop_subqueue(tx_ring->netdev, tx_ring->q_index);
1133 /* Memory barrier before checking head and tail */
1134 smp_mb();
1135
1136 /* Check again in a case another CPU has just made room available. */
1137 if (likely(ICE_DESC_UNUSED(tx_ring) < size))
1138 return -EBUSY;
1139
1140 /* A reprieve! - use start_subqueue because it doesn't call schedule */
1141 netif_start_subqueue(tx_ring->netdev, tx_ring->q_index);
1142 ++tx_ring->tx_stats.restart_q;
1143 return 0;
1144}
1145
1146/**
1147 * ice_maybe_stop_tx - 1st level check for tx stop conditions
1148 * @tx_ring: the ring to be checked
1149 * @size: the size buffer we want to assure is available
1150 *
1151 * Returns 0 if stop is not needed
1152 */
1153static int ice_maybe_stop_tx(struct ice_ring *tx_ring, unsigned int size)
1154{
1155 if (likely(ICE_DESC_UNUSED(tx_ring) >= size))
1156 return 0;
1157 return __ice_maybe_stop_tx(tx_ring, size);
1158}
1159
1160/**
1161 * ice_tx_map - Build the Tx descriptor
1162 * @tx_ring: ring to send buffer on
1163 * @first: first buffer info buffer to use
1164 * @off: pointer to struct that holds offload parameters
1165 *
1166 * This function loops over the skb data pointed to by *first
1167 * and gets a physical address for each memory location and programs
1168 * it and the length into the transmit descriptor.
1169 */
1170static void
1171ice_tx_map(struct ice_ring *tx_ring, struct ice_tx_buf *first,
1172 struct ice_tx_offload_params *off)
1173{
1174 u64 td_offset, td_tag, td_cmd;
1175 u16 i = tx_ring->next_to_use;
1176 struct skb_frag_struct *frag;
1177 unsigned int data_len, size;
1178 struct ice_tx_desc *tx_desc;
1179 struct ice_tx_buf *tx_buf;
1180 struct sk_buff *skb;
1181 dma_addr_t dma;
1182
1183 td_tag = off->td_l2tag1;
1184 td_cmd = off->td_cmd;
1185 td_offset = off->td_offset;
1186 skb = first->skb;
1187
1188 data_len = skb->data_len;
1189 size = skb_headlen(skb);
1190
1191 tx_desc = ICE_TX_DESC(tx_ring, i);
1192
1193 if (first->tx_flags & ICE_TX_FLAGS_HW_VLAN) {
1194 td_cmd |= (u64)ICE_TX_DESC_CMD_IL2TAG1;
1195 td_tag = (first->tx_flags & ICE_TX_FLAGS_VLAN_M) >>
1196 ICE_TX_FLAGS_VLAN_S;
1197 }
1198
1199 dma = dma_map_single(tx_ring->dev, skb->data, size, DMA_TO_DEVICE);
1200
1201 tx_buf = first;
1202
1203 for (frag = &skb_shinfo(skb)->frags[0];; frag++) {
1204 unsigned int max_data = ICE_MAX_DATA_PER_TXD_ALIGNED;
1205
1206 if (dma_mapping_error(tx_ring->dev, dma))
1207 goto dma_error;
1208
1209 /* record length, and DMA address */
1210 dma_unmap_len_set(tx_buf, len, size);
1211 dma_unmap_addr_set(tx_buf, dma, dma);
1212
1213 /* align size to end of page */
1214 max_data += -dma & (ICE_MAX_READ_REQ_SIZE - 1);
1215 tx_desc->buf_addr = cpu_to_le64(dma);
1216
1217 /* account for data chunks larger than the hardware
1218 * can handle
1219 */
1220 while (unlikely(size > ICE_MAX_DATA_PER_TXD)) {
1221 tx_desc->cmd_type_offset_bsz =
1222 build_ctob(td_cmd, td_offset, max_data, td_tag);
1223
1224 tx_desc++;
1225 i++;
1226
1227 if (i == tx_ring->count) {
1228 tx_desc = ICE_TX_DESC(tx_ring, 0);
1229 i = 0;
1230 }
1231
1232 dma += max_data;
1233 size -= max_data;
1234
1235 max_data = ICE_MAX_DATA_PER_TXD_ALIGNED;
1236 tx_desc->buf_addr = cpu_to_le64(dma);
1237 }
1238
1239 if (likely(!data_len))
1240 break;
1241
1242 tx_desc->cmd_type_offset_bsz = build_ctob(td_cmd, td_offset,
1243 size, td_tag);
1244
1245 tx_desc++;
1246 i++;
1247
1248 if (i == tx_ring->count) {
1249 tx_desc = ICE_TX_DESC(tx_ring, 0);
1250 i = 0;
1251 }
1252
1253 size = skb_frag_size(frag);
1254 data_len -= size;
1255
1256 dma = skb_frag_dma_map(tx_ring->dev, frag, 0, size,
1257 DMA_TO_DEVICE);
1258
1259 tx_buf = &tx_ring->tx_buf[i];
1260 }
1261
1262 /* record bytecount for BQL */
1263 netdev_tx_sent_queue(txring_txq(tx_ring), first->bytecount);
1264
1265 /* record SW timestamp if HW timestamp is not available */
1266 skb_tx_timestamp(first->skb);
1267
1268 i++;
1269 if (i == tx_ring->count)
1270 i = 0;
1271
1272 /* write last descriptor with RS and EOP bits */
1273 td_cmd |= (u64)(ICE_TX_DESC_CMD_EOP | ICE_TX_DESC_CMD_RS);
1274 tx_desc->cmd_type_offset_bsz =
1275 build_ctob(td_cmd, td_offset, size, td_tag);
1276
1277 /* Force memory writes to complete before letting h/w know there
1278 * are new descriptors to fetch.
1279 *
1280 * We also use this memory barrier to make certain all of the
1281 * status bits have been updated before next_to_watch is written.
1282 */
1283 wmb();
1284
1285 /* set next_to_watch value indicating a packet is present */
1286 first->next_to_watch = tx_desc;
1287
1288 tx_ring->next_to_use = i;
1289
1290 ice_maybe_stop_tx(tx_ring, DESC_NEEDED);
1291
1292 /* notify HW of packet */
1293 if (netif_xmit_stopped(txring_txq(tx_ring)) || !skb->xmit_more) {
1294 writel(i, tx_ring->tail);
1295
1296 /* we need this if more than one processor can write to our tail
1297 * at a time, it synchronizes IO on IA64/Altix systems
1298 */
1299 mmiowb();
1300 }
1301
1302 return;
1303
1304dma_error:
1305 /* clear dma mappings for failed tx_buf map */
1306 for (;;) {
1307 tx_buf = &tx_ring->tx_buf[i];
1308 ice_unmap_and_free_tx_buf(tx_ring, tx_buf);
1309 if (tx_buf == first)
1310 break;
1311 if (i == 0)
1312 i = tx_ring->count;
1313 i--;
1314 }
1315
1316 tx_ring->next_to_use = i;
1317}
1318
1319/**
1320 * ice_tx_csum - Enable Tx checksum offloads
1321 * @first: pointer to the first descriptor
1322 * @off: pointer to struct that holds offload parameters
1323 *
1324 * Returns 0 or error (negative) if checksum offload can't happen, 1 otherwise.
1325 */
1326static
1327int ice_tx_csum(struct ice_tx_buf *first, struct ice_tx_offload_params *off)
1328{
1329 u32 l4_len = 0, l3_len = 0, l2_len = 0;
1330 struct sk_buff *skb = first->skb;
1331 union {
1332 struct iphdr *v4;
1333 struct ipv6hdr *v6;
1334 unsigned char *hdr;
1335 } ip;
1336 union {
1337 struct tcphdr *tcp;
1338 unsigned char *hdr;
1339 } l4;
1340 __be16 frag_off, protocol;
1341 unsigned char *exthdr;
1342 u32 offset, cmd = 0;
1343 u8 l4_proto = 0;
1344
1345 if (skb->ip_summed != CHECKSUM_PARTIAL)
1346 return 0;
1347
1348 ip.hdr = skb_network_header(skb);
1349 l4.hdr = skb_transport_header(skb);
1350
1351 /* compute outer L2 header size */
1352 l2_len = ip.hdr - skb->data;
1353 offset = (l2_len / 2) << ICE_TX_DESC_LEN_MACLEN_S;
1354
1355 if (skb->encapsulation)
1356 return -1;
1357
1358 /* Enable IP checksum offloads */
1359 protocol = vlan_get_protocol(skb);
1360 if (protocol == htons(ETH_P_IP)) {
1361 l4_proto = ip.v4->protocol;
1362 /* the stack computes the IP header already, the only time we
1363 * need the hardware to recompute it is in the case of TSO.
1364 */
1365 if (first->tx_flags & ICE_TX_FLAGS_TSO)
1366 cmd |= ICE_TX_DESC_CMD_IIPT_IPV4_CSUM;
1367 else
1368 cmd |= ICE_TX_DESC_CMD_IIPT_IPV4;
1369
1370 } else if (protocol == htons(ETH_P_IPV6)) {
1371 cmd |= ICE_TX_DESC_CMD_IIPT_IPV6;
1372 exthdr = ip.hdr + sizeof(*ip.v6);
1373 l4_proto = ip.v6->nexthdr;
1374 if (l4.hdr != exthdr)
1375 ipv6_skip_exthdr(skb, exthdr - skb->data, &l4_proto,
1376 &frag_off);
1377 } else {
1378 return -1;
1379 }
1380
1381 /* compute inner L3 header size */
1382 l3_len = l4.hdr - ip.hdr;
1383 offset |= (l3_len / 4) << ICE_TX_DESC_LEN_IPLEN_S;
1384
1385 /* Enable L4 checksum offloads */
1386 switch (l4_proto) {
1387 case IPPROTO_TCP:
1388 /* enable checksum offloads */
1389 cmd |= ICE_TX_DESC_CMD_L4T_EOFT_TCP;
1390 l4_len = l4.tcp->doff;
1391 offset |= l4_len << ICE_TX_DESC_LEN_L4_LEN_S;
1392 break;
1393 case IPPROTO_UDP:
1394 /* enable UDP checksum offload */
1395 cmd |= ICE_TX_DESC_CMD_L4T_EOFT_UDP;
1396 l4_len = (sizeof(struct udphdr) >> 2);
1397 offset |= l4_len << ICE_TX_DESC_LEN_L4_LEN_S;
1398 break;
1399 case IPPROTO_SCTP:
1400 default:
1401 if (first->tx_flags & ICE_TX_FLAGS_TSO)
1402 return -1;
1403 skb_checksum_help(skb);
1404 return 0;
1405 }
1406
1407 off->td_cmd |= cmd;
1408 off->td_offset |= offset;
1409 return 1;
1410}
1411
1412/**
1413 * ice_tx_prepare_vlan_flags - prepare generic TX VLAN tagging flags for HW
1414 * @tx_ring: ring to send buffer on
1415 * @first: pointer to struct ice_tx_buf
1416 *
1417 * Checks the skb and set up correspondingly several generic transmit flags
1418 * related to VLAN tagging for the HW, such as VLAN, DCB, etc.
1419 *
1420 * Returns error code indicate the frame should be dropped upon error and the
1421 * otherwise returns 0 to indicate the flags has been set properly.
1422 */
1423static int
1424ice_tx_prepare_vlan_flags(struct ice_ring *tx_ring, struct ice_tx_buf *first)
1425{
1426 struct sk_buff *skb = first->skb;
1427 __be16 protocol = skb->protocol;
1428
1429 if (protocol == htons(ETH_P_8021Q) &&
1430 !(tx_ring->netdev->features & NETIF_F_HW_VLAN_CTAG_TX)) {
1431 /* when HW VLAN acceleration is turned off by the user the
1432 * stack sets the protocol to 8021q so that the driver
1433 * can take any steps required to support the SW only
1434 * VLAN handling. In our case the driver doesn't need
1435 * to take any further steps so just set the protocol
1436 * to the encapsulated ethertype.
1437 */
1438 skb->protocol = vlan_get_protocol(skb);
1439 goto out;
1440 }
1441
1442 /* if we have a HW VLAN tag being added, default to the HW one */
1443 if (skb_vlan_tag_present(skb)) {
1444 first->tx_flags |= skb_vlan_tag_get(skb) << ICE_TX_FLAGS_VLAN_S;
1445 first->tx_flags |= ICE_TX_FLAGS_HW_VLAN;
1446 } else if (protocol == htons(ETH_P_8021Q)) {
1447 struct vlan_hdr *vhdr, _vhdr;
1448
1449 /* for SW VLAN, check the next protocol and store the tag */
1450 vhdr = (struct vlan_hdr *)skb_header_pointer(skb, ETH_HLEN,
1451 sizeof(_vhdr),
1452 &_vhdr);
1453 if (!vhdr)
1454 return -EINVAL;
1455
1456 first->tx_flags |= ntohs(vhdr->h_vlan_TCI) <<
1457 ICE_TX_FLAGS_VLAN_S;
1458 first->tx_flags |= ICE_TX_FLAGS_SW_VLAN;
1459 }
1460
1461out:
1462 return 0;
1463}
1464
1465/**
1466 * ice_tso - computes mss and TSO length to prepare for TSO
1467 * @first: pointer to struct ice_tx_buf
1468 * @off: pointer to struct that holds offload parameters
1469 *
1470 * Returns 0 or error (negative) if TSO can't happen, 1 otherwise.
1471 */
1472static
1473int ice_tso(struct ice_tx_buf *first, struct ice_tx_offload_params *off)
1474{
1475 struct sk_buff *skb = first->skb;
1476 union {
1477 struct iphdr *v4;
1478 struct ipv6hdr *v6;
1479 unsigned char *hdr;
1480 } ip;
1481 union {
1482 struct tcphdr *tcp;
1483 unsigned char *hdr;
1484 } l4;
1485 u64 cd_mss, cd_tso_len;
1486 u32 paylen, l4_start;
1487 int err;
1488
1489 if (skb->ip_summed != CHECKSUM_PARTIAL)
1490 return 0;
1491
1492 if (!skb_is_gso(skb))
1493 return 0;
1494
1495 err = skb_cow_head(skb, 0);
1496 if (err < 0)
1497 return err;
1498
1499 ip.hdr = skb_network_header(skb);
1500 l4.hdr = skb_transport_header(skb);
1501
1502 /* initialize outer IP header fields */
1503 if (ip.v4->version == 4) {
1504 ip.v4->tot_len = 0;
1505 ip.v4->check = 0;
1506 } else {
1507 ip.v6->payload_len = 0;
1508 }
1509
1510 /* determine offset of transport header */
1511 l4_start = l4.hdr - skb->data;
1512
1513 /* remove payload length from checksum */
1514 paylen = skb->len - l4_start;
1515 csum_replace_by_diff(&l4.tcp->check, (__force __wsum)htonl(paylen));
1516
1517 /* compute length of segmentation header */
1518 off->header_len = (l4.tcp->doff * 4) + l4_start;
1519
1520 /* update gso_segs and bytecount */
1521 first->gso_segs = skb_shinfo(skb)->gso_segs;
1522 first->bytecount = (first->gso_segs - 1) * off->header_len;
1523
1524 cd_tso_len = skb->len - off->header_len;
1525 cd_mss = skb_shinfo(skb)->gso_size;
1526
1527 /* record cdesc_qw1 with TSO parameters */
1528 off->cd_qw1 |= ICE_TX_DESC_DTYPE_CTX |
1529 (ICE_TX_CTX_DESC_TSO << ICE_TXD_CTX_QW1_CMD_S) |
1530 (cd_tso_len << ICE_TXD_CTX_QW1_TSO_LEN_S) |
1531 (cd_mss << ICE_TXD_CTX_QW1_MSS_S);
1532 first->tx_flags |= ICE_TX_FLAGS_TSO;
1533 return 1;
1534}
1535
1536/**
1537 * ice_txd_use_count - estimate the number of descriptors needed for Tx
1538 * @size: transmit request size in bytes
1539 *
1540 * Due to hardware alignment restrictions (4K alignment), we need to
1541 * assume that we can have no more than 12K of data per descriptor, even
1542 * though each descriptor can take up to 16K - 1 bytes of aligned memory.
1543 * Thus, we need to divide by 12K. But division is slow! Instead,
1544 * we decompose the operation into shifts and one relatively cheap
1545 * multiply operation.
1546 *
1547 * To divide by 12K, we first divide by 4K, then divide by 3:
1548 * To divide by 4K, shift right by 12 bits
1549 * To divide by 3, multiply by 85, then divide by 256
1550 * (Divide by 256 is done by shifting right by 8 bits)
1551 * Finally, we add one to round up. Because 256 isn't an exact multiple of
1552 * 3, we'll underestimate near each multiple of 12K. This is actually more
1553 * accurate as we have 4K - 1 of wiggle room that we can fit into the last
1554 * segment. For our purposes this is accurate out to 1M which is orders of
1555 * magnitude greater than our largest possible GSO size.
1556 *
1557 * This would then be implemented as:
1558 * return (((size >> 12) * 85) >> 8) + 1;
1559 *
1560 * Since multiplication and division are commutative, we can reorder
1561 * operations into:
1562 * return ((size * 85) >> 20) + 1;
1563 */
1564static unsigned int ice_txd_use_count(unsigned int size)
1565{
1566 return ((size * 85) >> 20) + 1;
1567}
1568
1569/**
1570 * ice_xmit_desc_count - calculate number of tx descriptors needed
1571 * @skb: send buffer
1572 *
1573 * Returns number of data descriptors needed for this skb.
1574 */
1575static unsigned int ice_xmit_desc_count(struct sk_buff *skb)
1576{
1577 const struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[0];
1578 unsigned int nr_frags = skb_shinfo(skb)->nr_frags;
1579 unsigned int count = 0, size = skb_headlen(skb);
1580
1581 for (;;) {
1582 count += ice_txd_use_count(size);
1583
1584 if (!nr_frags--)
1585 break;
1586
1587 size = skb_frag_size(frag++);
1588 }
1589
1590 return count;
1591}
1592
1593/**
1594 * __ice_chk_linearize - Check if there are more than 8 buffers per packet
1595 * @skb: send buffer
1596 *
1597 * Note: This HW can't DMA more than 8 buffers to build a packet on the wire
1598 * and so we need to figure out the cases where we need to linearize the skb.
1599 *
1600 * For TSO we need to count the TSO header and segment payload separately.
1601 * As such we need to check cases where we have 7 fragments or more as we
1602 * can potentially require 9 DMA transactions, 1 for the TSO header, 1 for
1603 * the segment payload in the first descriptor, and another 7 for the
1604 * fragments.
1605 */
1606static bool __ice_chk_linearize(struct sk_buff *skb)
1607{
1608 const struct skb_frag_struct *frag, *stale;
1609 int nr_frags, sum;
1610
1611 /* no need to check if number of frags is less than 7 */
1612 nr_frags = skb_shinfo(skb)->nr_frags;
1613 if (nr_frags < (ICE_MAX_BUF_TXD - 1))
1614 return false;
1615
1616 /* We need to walk through the list and validate that each group
1617 * of 6 fragments totals at least gso_size.
1618 */
1619 nr_frags -= ICE_MAX_BUF_TXD - 2;
1620 frag = &skb_shinfo(skb)->frags[0];
1621
1622 /* Initialize size to the negative value of gso_size minus 1. We
1623 * use this as the worst case scenerio in which the frag ahead
1624 * of us only provides one byte which is why we are limited to 6
1625 * descriptors for a single transmit as the header and previous
1626 * fragment are already consuming 2 descriptors.
1627 */
1628 sum = 1 - skb_shinfo(skb)->gso_size;
1629
1630 /* Add size of frags 0 through 4 to create our initial sum */
1631 sum += skb_frag_size(frag++);
1632 sum += skb_frag_size(frag++);
1633 sum += skb_frag_size(frag++);
1634 sum += skb_frag_size(frag++);
1635 sum += skb_frag_size(frag++);
1636
1637 /* Walk through fragments adding latest fragment, testing it, and
1638 * then removing stale fragments from the sum.
1639 */
1640 stale = &skb_shinfo(skb)->frags[0];
1641 for (;;) {
1642 sum += skb_frag_size(frag++);
1643
1644 /* if sum is negative we failed to make sufficient progress */
1645 if (sum < 0)
1646 return true;
1647
1648 if (!nr_frags--)
1649 break;
1650
1651 sum -= skb_frag_size(stale++);
1652 }
1653
1654 return false;
1655}
1656
1657/**
1658 * ice_chk_linearize - Check if there are more than 8 fragments per packet
1659 * @skb: send buffer
1660 * @count: number of buffers used
1661 *
1662 * Note: Our HW can't scatter-gather more than 8 fragments to build
1663 * a packet on the wire and so we need to figure out the cases where we
1664 * need to linearize the skb.
1665 */
1666static bool ice_chk_linearize(struct sk_buff *skb, unsigned int count)
1667{
1668 /* Both TSO and single send will work if count is less than 8 */
1669 if (likely(count < ICE_MAX_BUF_TXD))
1670 return false;
1671
1672 if (skb_is_gso(skb))
1673 return __ice_chk_linearize(skb);
1674
1675 /* we can support up to 8 data buffers for a single send */
1676 return count != ICE_MAX_BUF_TXD;
1677}
1678
1679/**
1680 * ice_xmit_frame_ring - Sends buffer on Tx ring
1681 * @skb: send buffer
1682 * @tx_ring: ring to send buffer on
1683 *
1684 * Returns NETDEV_TX_OK if sent, else an error code
1685 */
1686static netdev_tx_t
1687ice_xmit_frame_ring(struct sk_buff *skb, struct ice_ring *tx_ring)
1688{
1689 struct ice_tx_offload_params offload = { 0 };
1690 struct ice_tx_buf *first;
1691 unsigned int count;
1692 int tso, csum;
1693
1694 count = ice_xmit_desc_count(skb);
1695 if (ice_chk_linearize(skb, count)) {
1696 if (__skb_linearize(skb))
1697 goto out_drop;
1698 count = ice_txd_use_count(skb->len);
1699 tx_ring->tx_stats.tx_linearize++;
1700 }
1701
1702 /* need: 1 descriptor per page * PAGE_SIZE/ICE_MAX_DATA_PER_TXD,
1703 * + 1 desc for skb_head_len/ICE_MAX_DATA_PER_TXD,
1704 * + 4 desc gap to avoid the cache line where head is,
1705 * + 1 desc for context descriptor,
1706 * otherwise try next time
1707 */
1708 if (ice_maybe_stop_tx(tx_ring, count + 4 + 1)) {
1709 tx_ring->tx_stats.tx_busy++;
1710 return NETDEV_TX_BUSY;
1711 }
1712
1713 offload.tx_ring = tx_ring;
1714
1715 /* record the location of the first descriptor for this packet */
1716 first = &tx_ring->tx_buf[tx_ring->next_to_use];
1717 first->skb = skb;
1718 first->bytecount = max_t(unsigned int, skb->len, ETH_ZLEN);
1719 first->gso_segs = 1;
1720 first->tx_flags = 0;
1721
1722 /* prepare the VLAN tagging flags for Tx */
1723 if (ice_tx_prepare_vlan_flags(tx_ring, first))
1724 goto out_drop;
1725
1726 /* set up TSO offload */
1727 tso = ice_tso(first, &offload);
1728 if (tso < 0)
1729 goto out_drop;
1730
1731 /* always set up Tx checksum offload */
1732 csum = ice_tx_csum(first, &offload);
1733 if (csum < 0)
1734 goto out_drop;
1735
1736 if (tso || offload.cd_tunnel_params) {
1737 struct ice_tx_ctx_desc *cdesc;
1738 int i = tx_ring->next_to_use;
1739
1740 /* grab the next descriptor */
1741 cdesc = ICE_TX_CTX_DESC(tx_ring, i);
1742 i++;
1743 tx_ring->next_to_use = (i < tx_ring->count) ? i : 0;
1744
1745 /* setup context descriptor */
1746 cdesc->tunneling_params = cpu_to_le32(offload.cd_tunnel_params);
1747 cdesc->l2tag2 = cpu_to_le16(offload.cd_l2tag2);
1748 cdesc->rsvd = cpu_to_le16(0);
1749 cdesc->qw1 = cpu_to_le64(offload.cd_qw1);
1750 }
1751
1752 ice_tx_map(tx_ring, first, &offload);
1753 return NETDEV_TX_OK;
1754
1755out_drop:
1756 dev_kfree_skb_any(skb);
1757 return NETDEV_TX_OK;
1758}
1759
1760/**
1761 * ice_start_xmit - Selects the correct VSI and Tx queue to send buffer
1762 * @skb: send buffer
1763 * @netdev: network interface device structure
1764 *
1765 * Returns NETDEV_TX_OK if sent, else an error code
1766 */
1767netdev_tx_t ice_start_xmit(struct sk_buff *skb, struct net_device *netdev)
1768{
1769 struct ice_netdev_priv *np = netdev_priv(netdev);
1770 struct ice_vsi *vsi = np->vsi;
1771 struct ice_ring *tx_ring;
1772
1773 tx_ring = vsi->tx_rings[skb->queue_mapping];
1774
1775 /* hardware can't handle really short frames, hardware padding works
1776 * beyond this point
1777 */
1778 if (skb_put_padto(skb, ICE_MIN_TX_LEN))
1779 return NETDEV_TX_OK;
1780
1781 return ice_xmit_frame_ring(skb, tx_ring);
1782}