Loading...
1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * GPIO driver for EXAR XRA1403 16-bit GPIO expander
4 *
5 * Copyright (c) 2017, General Electric Company
6 */
7
8#include <linux/bitops.h>
9#include <linux/gpio/driver.h>
10#include <linux/kernel.h>
11#include <linux/module.h>
12#include <linux/mutex.h>
13#include <linux/of_device.h>
14#include <linux/of_gpio.h>
15#include <linux/seq_file.h>
16#include <linux/spi/spi.h>
17#include <linux/regmap.h>
18
19/* XRA1403 registers */
20#define XRA_GSR 0x00 /* GPIO State */
21#define XRA_OCR 0x02 /* Output Control */
22#define XRA_PIR 0x04 /* Input Polarity Inversion */
23#define XRA_GCR 0x06 /* GPIO Configuration */
24#define XRA_PUR 0x08 /* Input Internal Pull-up Resistor Enable/Disable */
25#define XRA_IER 0x0A /* Input Interrupt Enable */
26#define XRA_TSCR 0x0C /* Output Three-State Control */
27#define XRA_ISR 0x0E /* Input Interrupt Status */
28#define XRA_REIR 0x10 /* Input Rising Edge Interrupt Enable */
29#define XRA_FEIR 0x12 /* Input Falling Edge Interrupt Enable */
30#define XRA_IFR 0x14 /* Input Filter Enable/Disable */
31#define XRA_LAST 0x15 /* Bounds */
32
33struct xra1403 {
34 struct gpio_chip chip;
35 struct regmap *regmap;
36};
37
38static const struct regmap_config xra1403_regmap_cfg = {
39 .reg_bits = 7,
40 .pad_bits = 1,
41 .val_bits = 8,
42
43 .max_register = XRA_LAST,
44};
45
46static unsigned int to_reg(unsigned int reg, unsigned int offset)
47{
48 return reg + (offset > 7);
49}
50
51static int xra1403_direction_input(struct gpio_chip *chip, unsigned int offset)
52{
53 struct xra1403 *xra = gpiochip_get_data(chip);
54
55 return regmap_update_bits(xra->regmap, to_reg(XRA_GCR, offset),
56 BIT(offset % 8), BIT(offset % 8));
57}
58
59static int xra1403_direction_output(struct gpio_chip *chip, unsigned int offset,
60 int value)
61{
62 int ret;
63 struct xra1403 *xra = gpiochip_get_data(chip);
64
65 ret = regmap_update_bits(xra->regmap, to_reg(XRA_GCR, offset),
66 BIT(offset % 8), 0);
67 if (ret)
68 return ret;
69
70 ret = regmap_update_bits(xra->regmap, to_reg(XRA_OCR, offset),
71 BIT(offset % 8), value ? BIT(offset % 8) : 0);
72
73 return ret;
74}
75
76static int xra1403_get_direction(struct gpio_chip *chip, unsigned int offset)
77{
78 int ret;
79 unsigned int val;
80 struct xra1403 *xra = gpiochip_get_data(chip);
81
82 ret = regmap_read(xra->regmap, to_reg(XRA_GCR, offset), &val);
83 if (ret)
84 return ret;
85
86 if (val & BIT(offset % 8))
87 return GPIO_LINE_DIRECTION_IN;
88
89 return GPIO_LINE_DIRECTION_OUT;
90}
91
92static int xra1403_get(struct gpio_chip *chip, unsigned int offset)
93{
94 int ret;
95 unsigned int val;
96 struct xra1403 *xra = gpiochip_get_data(chip);
97
98 ret = regmap_read(xra->regmap, to_reg(XRA_GSR, offset), &val);
99 if (ret)
100 return ret;
101
102 return !!(val & BIT(offset % 8));
103}
104
105static void xra1403_set(struct gpio_chip *chip, unsigned int offset, int value)
106{
107 int ret;
108 struct xra1403 *xra = gpiochip_get_data(chip);
109
110 ret = regmap_update_bits(xra->regmap, to_reg(XRA_OCR, offset),
111 BIT(offset % 8), value ? BIT(offset % 8) : 0);
112 if (ret)
113 dev_err(chip->parent, "Failed to set pin: %d, ret: %d\n",
114 offset, ret);
115}
116
117#ifdef CONFIG_DEBUG_FS
118static void xra1403_dbg_show(struct seq_file *s, struct gpio_chip *chip)
119{
120 int reg;
121 struct xra1403 *xra = gpiochip_get_data(chip);
122 int value[XRA_LAST];
123 int i;
124 const char *label;
125 unsigned int gcr;
126 unsigned int gsr;
127
128 seq_puts(s, "xra reg:");
129 for (reg = 0; reg <= XRA_LAST; reg++)
130 seq_printf(s, " %2.2x", reg);
131 seq_puts(s, "\n value:");
132 for (reg = 0; reg < XRA_LAST; reg++) {
133 regmap_read(xra->regmap, reg, &value[reg]);
134 seq_printf(s, " %2.2x", value[reg]);
135 }
136 seq_puts(s, "\n");
137
138 gcr = value[XRA_GCR + 1] << 8 | value[XRA_GCR];
139 gsr = value[XRA_GSR + 1] << 8 | value[XRA_GSR];
140 for_each_requested_gpio(chip, i, label) {
141 seq_printf(s, " gpio-%-3d (%-12s) %s %s\n",
142 chip->base + i, label,
143 (gcr & BIT(i)) ? "in" : "out",
144 (gsr & BIT(i)) ? "hi" : "lo");
145 }
146}
147#else
148#define xra1403_dbg_show NULL
149#endif
150
151static int xra1403_probe(struct spi_device *spi)
152{
153 struct xra1403 *xra;
154 struct gpio_desc *reset_gpio;
155 int ret;
156
157 xra = devm_kzalloc(&spi->dev, sizeof(*xra), GFP_KERNEL);
158 if (!xra)
159 return -ENOMEM;
160
161 /* bring the chip out of reset if reset pin is provided*/
162 reset_gpio = devm_gpiod_get_optional(&spi->dev, "reset", GPIOD_OUT_LOW);
163 if (IS_ERR(reset_gpio))
164 dev_warn(&spi->dev, "Could not get reset-gpios\n");
165
166 xra->chip.direction_input = xra1403_direction_input;
167 xra->chip.direction_output = xra1403_direction_output;
168 xra->chip.get_direction = xra1403_get_direction;
169 xra->chip.get = xra1403_get;
170 xra->chip.set = xra1403_set;
171
172 xra->chip.dbg_show = xra1403_dbg_show;
173
174 xra->chip.ngpio = 16;
175 xra->chip.label = "xra1403";
176
177 xra->chip.base = -1;
178 xra->chip.can_sleep = true;
179 xra->chip.parent = &spi->dev;
180 xra->chip.owner = THIS_MODULE;
181
182 xra->regmap = devm_regmap_init_spi(spi, &xra1403_regmap_cfg);
183 if (IS_ERR(xra->regmap)) {
184 ret = PTR_ERR(xra->regmap);
185 dev_err(&spi->dev, "Failed to allocate regmap: %d\n", ret);
186 return ret;
187 }
188
189 return devm_gpiochip_add_data(&spi->dev, &xra->chip, xra);
190}
191
192static const struct spi_device_id xra1403_ids[] = {
193 { "xra1403" },
194 {},
195};
196MODULE_DEVICE_TABLE(spi, xra1403_ids);
197
198static const struct of_device_id xra1403_spi_of_match[] = {
199 { .compatible = "exar,xra1403" },
200 {},
201};
202MODULE_DEVICE_TABLE(of, xra1403_spi_of_match);
203
204static struct spi_driver xra1403_driver = {
205 .probe = xra1403_probe,
206 .id_table = xra1403_ids,
207 .driver = {
208 .name = "xra1403",
209 .of_match_table = of_match_ptr(xra1403_spi_of_match),
210 },
211};
212
213module_spi_driver(xra1403_driver);
214
215MODULE_AUTHOR("Nandor Han <nandor.han@ge.com>");
216MODULE_AUTHOR("Semi Malinen <semi.malinen@ge.com>");
217MODULE_DESCRIPTION("GPIO expander driver for EXAR XRA1403");
218MODULE_LICENSE("GPL v2");
1/*
2 * GPIO driver for EXAR XRA1403 16-bit GPIO expander
3 *
4 * Copyright (c) 2017, General Electric Company
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2, as published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 * more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program. If not, see <http://www.gnu.org/licenses/>.
17 */
18
19#include <linux/bitops.h>
20#include <linux/gpio/driver.h>
21#include <linux/kernel.h>
22#include <linux/module.h>
23#include <linux/mutex.h>
24#include <linux/of_device.h>
25#include <linux/of_gpio.h>
26#include <linux/seq_file.h>
27#include <linux/spi/spi.h>
28#include <linux/regmap.h>
29
30/* XRA1403 registers */
31#define XRA_GSR 0x00 /* GPIO State */
32#define XRA_OCR 0x02 /* Output Control */
33#define XRA_PIR 0x04 /* Input Polarity Inversion */
34#define XRA_GCR 0x06 /* GPIO Configuration */
35#define XRA_PUR 0x08 /* Input Internal Pull-up Resistor Enable/Disable */
36#define XRA_IER 0x0A /* Input Interrupt Enable */
37#define XRA_TSCR 0x0C /* Output Three-State Control */
38#define XRA_ISR 0x0E /* Input Interrupt Status */
39#define XRA_REIR 0x10 /* Input Rising Edge Interrupt Enable */
40#define XRA_FEIR 0x12 /* Input Falling Edge Interrupt Enable */
41#define XRA_IFR 0x14 /* Input Filter Enable/Disable */
42
43struct xra1403 {
44 struct gpio_chip chip;
45 struct regmap *regmap;
46};
47
48static const struct regmap_config xra1403_regmap_cfg = {
49 .reg_bits = 7,
50 .pad_bits = 1,
51 .val_bits = 8,
52
53 .max_register = XRA_IFR | 0x01,
54};
55
56static unsigned int to_reg(unsigned int reg, unsigned int offset)
57{
58 return reg + (offset > 7);
59}
60
61static int xra1403_direction_input(struct gpio_chip *chip, unsigned int offset)
62{
63 struct xra1403 *xra = gpiochip_get_data(chip);
64
65 return regmap_update_bits(xra->regmap, to_reg(XRA_GCR, offset),
66 BIT(offset % 8), BIT(offset % 8));
67}
68
69static int xra1403_direction_output(struct gpio_chip *chip, unsigned int offset,
70 int value)
71{
72 int ret;
73 struct xra1403 *xra = gpiochip_get_data(chip);
74
75 ret = regmap_update_bits(xra->regmap, to_reg(XRA_GCR, offset),
76 BIT(offset % 8), 0);
77 if (ret)
78 return ret;
79
80 ret = regmap_update_bits(xra->regmap, to_reg(XRA_OCR, offset),
81 BIT(offset % 8), value ? BIT(offset % 8) : 0);
82
83 return ret;
84}
85
86static int xra1403_get_direction(struct gpio_chip *chip, unsigned int offset)
87{
88 int ret;
89 unsigned int val;
90 struct xra1403 *xra = gpiochip_get_data(chip);
91
92 ret = regmap_read(xra->regmap, to_reg(XRA_GCR, offset), &val);
93 if (ret)
94 return ret;
95
96 return !!(val & BIT(offset % 8));
97}
98
99static int xra1403_get(struct gpio_chip *chip, unsigned int offset)
100{
101 int ret;
102 unsigned int val;
103 struct xra1403 *xra = gpiochip_get_data(chip);
104
105 ret = regmap_read(xra->regmap, to_reg(XRA_GSR, offset), &val);
106 if (ret)
107 return ret;
108
109 return !!(val & BIT(offset % 8));
110}
111
112static void xra1403_set(struct gpio_chip *chip, unsigned int offset, int value)
113{
114 int ret;
115 struct xra1403 *xra = gpiochip_get_data(chip);
116
117 ret = regmap_update_bits(xra->regmap, to_reg(XRA_OCR, offset),
118 BIT(offset % 8), value ? BIT(offset % 8) : 0);
119 if (ret)
120 dev_err(chip->parent, "Failed to set pin: %d, ret: %d\n",
121 offset, ret);
122}
123
124#ifdef CONFIG_DEBUG_FS
125static void xra1403_dbg_show(struct seq_file *s, struct gpio_chip *chip)
126{
127 int reg;
128 struct xra1403 *xra = gpiochip_get_data(chip);
129 int *value;
130 int i;
131 unsigned int gcr;
132 unsigned int gsr;
133
134 value = kmalloc_array(xra1403_regmap_cfg.max_register, sizeof(*value),
135 GFP_KERNEL);
136 if (!value)
137 return;
138
139 seq_puts(s, "xra reg:");
140 for (reg = 0; reg <= xra1403_regmap_cfg.max_register; reg++)
141 seq_printf(s, " %2.2x", reg);
142 seq_puts(s, "\n value:");
143 for (reg = 0; reg < xra1403_regmap_cfg.max_register; reg++) {
144 regmap_read(xra->regmap, reg, &value[reg]);
145 seq_printf(s, " %2.2x", value[reg]);
146 }
147 seq_puts(s, "\n");
148
149 gcr = value[XRA_GCR + 1] << 8 | value[XRA_GCR];
150 gsr = value[XRA_GSR + 1] << 8 | value[XRA_GSR];
151 for (i = 0; i < chip->ngpio; i++) {
152 const char *label = gpiochip_is_requested(chip, i);
153
154 if (!label)
155 continue;
156
157 seq_printf(s, " gpio-%-3d (%-12s) %s %s\n",
158 chip->base + i, label,
159 (gcr & BIT(i)) ? "in" : "out",
160 (gsr & BIT(i)) ? "hi" : "lo");
161 }
162 kfree(value);
163}
164#else
165#define xra1403_dbg_show NULL
166#endif
167
168static int xra1403_probe(struct spi_device *spi)
169{
170 struct xra1403 *xra;
171 struct gpio_desc *reset_gpio;
172 int ret;
173
174 xra = devm_kzalloc(&spi->dev, sizeof(*xra), GFP_KERNEL);
175 if (!xra)
176 return -ENOMEM;
177
178 /* bring the chip out of reset if reset pin is provided*/
179 reset_gpio = devm_gpiod_get_optional(&spi->dev, "reset", GPIOD_OUT_LOW);
180 if (IS_ERR(reset_gpio))
181 dev_warn(&spi->dev, "Could not get reset-gpios\n");
182
183 xra->chip.direction_input = xra1403_direction_input;
184 xra->chip.direction_output = xra1403_direction_output;
185 xra->chip.get_direction = xra1403_get_direction;
186 xra->chip.get = xra1403_get;
187 xra->chip.set = xra1403_set;
188
189 xra->chip.dbg_show = xra1403_dbg_show;
190
191 xra->chip.ngpio = 16;
192 xra->chip.label = "xra1403";
193
194 xra->chip.base = -1;
195 xra->chip.can_sleep = true;
196 xra->chip.parent = &spi->dev;
197 xra->chip.owner = THIS_MODULE;
198
199 xra->regmap = devm_regmap_init_spi(spi, &xra1403_regmap_cfg);
200 if (IS_ERR(xra->regmap)) {
201 ret = PTR_ERR(xra->regmap);
202 dev_err(&spi->dev, "Failed to allocate regmap: %d\n", ret);
203 return ret;
204 }
205
206 ret = devm_gpiochip_add_data(&spi->dev, &xra->chip, xra);
207 if (ret < 0) {
208 dev_err(&spi->dev, "Unable to register gpiochip\n");
209 return ret;
210 }
211
212 spi_set_drvdata(spi, xra);
213
214 return 0;
215}
216
217static const struct spi_device_id xra1403_ids[] = {
218 { "xra1403" },
219 {},
220};
221MODULE_DEVICE_TABLE(spi, xra1403_ids);
222
223static const struct of_device_id xra1403_spi_of_match[] = {
224 { .compatible = "exar,xra1403" },
225 {},
226};
227MODULE_DEVICE_TABLE(of, xra1403_spi_of_match);
228
229static struct spi_driver xra1403_driver = {
230 .probe = xra1403_probe,
231 .id_table = xra1403_ids,
232 .driver = {
233 .name = "xra1403",
234 .of_match_table = of_match_ptr(xra1403_spi_of_match),
235 },
236};
237
238module_spi_driver(xra1403_driver);
239
240MODULE_AUTHOR("Nandor Han <nandor.han@ge.com>");
241MODULE_AUTHOR("Semi Malinen <semi.malinen@ge.com>");
242MODULE_DESCRIPTION("GPIO expander driver for EXAR XRA1403");
243MODULE_LICENSE("GPL v2");