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1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * pata-cs5535.c - CS5535 PATA for new ATA layer
4 * (C) 2005-2006 Red Hat Inc
5 * Alan Cox <alan@lxorguk.ukuu.org.uk>
6 *
7 * based upon cs5535.c from AMD <Jens.Altmann@amd.com> as cleaned up and
8 * made readable and Linux style by Wolfgang Zuleger <wolfgang.zuleger@gmx.de>
9 * and Alexander Kiausch <alex.kiausch@t-online.de>
10 *
11 * Loosely based on the piix & svwks drivers.
12 *
13 * Documentation:
14 * Available from AMD web site.
15 * TODO
16 * Review errata to see if serializing is necessary
17 */
18
19#include <linux/kernel.h>
20#include <linux/module.h>
21#include <linux/pci.h>
22#include <linux/blkdev.h>
23#include <linux/delay.h>
24#include <scsi/scsi_host.h>
25#include <linux/libata.h>
26#include <asm/msr.h>
27
28#define DRV_NAME "pata_cs5535"
29#define DRV_VERSION "0.2.12"
30
31/*
32 * The Geode (Aka Athlon GX now) uses an internal MSR based
33 * bus system for control. Demented but there you go.
34 */
35
36#define MSR_ATAC_BASE 0x51300000
37#define ATAC_GLD_MSR_CAP (MSR_ATAC_BASE+0)
38#define ATAC_GLD_MSR_CONFIG (MSR_ATAC_BASE+0x01)
39#define ATAC_GLD_MSR_SMI (MSR_ATAC_BASE+0x02)
40#define ATAC_GLD_MSR_ERROR (MSR_ATAC_BASE+0x03)
41#define ATAC_GLD_MSR_PM (MSR_ATAC_BASE+0x04)
42#define ATAC_GLD_MSR_DIAG (MSR_ATAC_BASE+0x05)
43#define ATAC_IO_BAR (MSR_ATAC_BASE+0x08)
44#define ATAC_RESET (MSR_ATAC_BASE+0x10)
45#define ATAC_CH0D0_PIO (MSR_ATAC_BASE+0x20)
46#define ATAC_CH0D0_DMA (MSR_ATAC_BASE+0x21)
47#define ATAC_CH0D1_PIO (MSR_ATAC_BASE+0x22)
48#define ATAC_CH0D1_DMA (MSR_ATAC_BASE+0x23)
49#define ATAC_PCI_ABRTERR (MSR_ATAC_BASE+0x24)
50
51#define ATAC_BM0_CMD_PRIM 0x00
52#define ATAC_BM0_STS_PRIM 0x02
53#define ATAC_BM0_PRD 0x04
54
55#define CS5535_CABLE_DETECT 0x48
56
57/**
58 * cs5535_cable_detect - detect cable type
59 * @ap: Port to detect on
60 *
61 * Perform cable detection for ATA66 capable cable. Return a libata
62 * cable type.
63 */
64
65static int cs5535_cable_detect(struct ata_port *ap)
66{
67 u8 cable;
68 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
69
70 pci_read_config_byte(pdev, CS5535_CABLE_DETECT, &cable);
71 if (cable & 1)
72 return ATA_CBL_PATA80;
73 else
74 return ATA_CBL_PATA40;
75}
76
77/**
78 * cs5535_set_piomode - PIO setup
79 * @ap: ATA interface
80 * @adev: device on the interface
81 *
82 * Set our PIO requirements. The CS5535 is pretty clean about all this
83 */
84
85static void cs5535_set_piomode(struct ata_port *ap, struct ata_device *adev)
86{
87 static const u16 pio_timings[5] = {
88 0xF7F4, 0xF173, 0x8141, 0x5131, 0x1131
89 };
90 static const u16 pio_cmd_timings[5] = {
91 0xF7F4, 0x53F3, 0x13F1, 0x5131, 0x1131
92 };
93 u32 reg, __maybe_unused dummy;
94 struct ata_device *pair = ata_dev_pair(adev);
95
96 int mode = adev->pio_mode - XFER_PIO_0;
97 int cmdmode = mode;
98
99 /* Command timing has to be for the lowest of the pair of devices */
100 if (pair) {
101 int pairmode = pair->pio_mode - XFER_PIO_0;
102 cmdmode = min(mode, pairmode);
103 /* Write the other drive timing register if it changed */
104 if (cmdmode < pairmode)
105 wrmsr(ATAC_CH0D0_PIO + 2 * pair->devno,
106 pio_cmd_timings[cmdmode] << 16 | pio_timings[pairmode], 0);
107 }
108 /* Write the drive timing register */
109 wrmsr(ATAC_CH0D0_PIO + 2 * adev->devno,
110 pio_cmd_timings[cmdmode] << 16 | pio_timings[mode], 0);
111
112 /* Set the PIO "format 1" bit in the DMA timing register */
113 rdmsr(ATAC_CH0D0_DMA + 2 * adev->devno, reg, dummy);
114 wrmsr(ATAC_CH0D0_DMA + 2 * adev->devno, reg | 0x80000000UL, 0);
115}
116
117/**
118 * cs5535_set_dmamode - DMA timing setup
119 * @ap: ATA interface
120 * @adev: Device being configured
121 *
122 */
123
124static void cs5535_set_dmamode(struct ata_port *ap, struct ata_device *adev)
125{
126 static const u32 udma_timings[5] = {
127 0x7F7436A1, 0x7F733481, 0x7F723261, 0x7F713161, 0x7F703061
128 };
129 static const u32 mwdma_timings[3] = {
130 0x7F0FFFF3, 0x7F035352, 0x7F024241
131 };
132 u32 reg, __maybe_unused dummy;
133 int mode = adev->dma_mode;
134
135 rdmsr(ATAC_CH0D0_DMA + 2 * adev->devno, reg, dummy);
136 reg &= 0x80000000UL;
137 if (mode >= XFER_UDMA_0)
138 reg |= udma_timings[mode - XFER_UDMA_0];
139 else
140 reg |= mwdma_timings[mode - XFER_MW_DMA_0];
141 wrmsr(ATAC_CH0D0_DMA + 2 * adev->devno, reg, 0);
142}
143
144static struct scsi_host_template cs5535_sht = {
145 ATA_BMDMA_SHT(DRV_NAME),
146};
147
148static struct ata_port_operations cs5535_port_ops = {
149 .inherits = &ata_bmdma_port_ops,
150 .cable_detect = cs5535_cable_detect,
151 .set_piomode = cs5535_set_piomode,
152 .set_dmamode = cs5535_set_dmamode,
153};
154
155/**
156 * cs5535_init_one - Initialise a CS5530
157 * @dev: PCI device
158 * @id: Entry in match table
159 *
160 * Install a driver for the newly found CS5530 companion chip. Most of
161 * this is just housekeeping. We have to set the chip up correctly and
162 * turn off various bits of emulation magic.
163 */
164
165static int cs5535_init_one(struct pci_dev *dev, const struct pci_device_id *id)
166{
167 static const struct ata_port_info info = {
168 .flags = ATA_FLAG_SLAVE_POSS,
169 .pio_mask = ATA_PIO4,
170 .mwdma_mask = ATA_MWDMA2,
171 .udma_mask = ATA_UDMA4,
172 .port_ops = &cs5535_port_ops
173 };
174 const struct ata_port_info *ppi[] = { &info, &ata_dummy_port_info };
175
176 return ata_pci_bmdma_init_one(dev, ppi, &cs5535_sht, NULL, 0);
177}
178
179static const struct pci_device_id cs5535[] = {
180 { PCI_VDEVICE(NS, PCI_DEVICE_ID_NS_CS5535_IDE), },
181 { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_CS5535_IDE), },
182
183 { },
184};
185
186static struct pci_driver cs5535_pci_driver = {
187 .name = DRV_NAME,
188 .id_table = cs5535,
189 .probe = cs5535_init_one,
190 .remove = ata_pci_remove_one,
191#ifdef CONFIG_PM_SLEEP
192 .suspend = ata_pci_device_suspend,
193 .resume = ata_pci_device_resume,
194#endif
195};
196
197module_pci_driver(cs5535_pci_driver);
198
199MODULE_AUTHOR("Alan Cox, Jens Altmann, Wolfgan Zuleger, Alexander Kiausch");
200MODULE_DESCRIPTION("low-level driver for the NS/AMD 5535");
201MODULE_LICENSE("GPL");
202MODULE_DEVICE_TABLE(pci, cs5535);
203MODULE_VERSION(DRV_VERSION);
1/*
2 * pata-cs5535.c - CS5535 PATA for new ATA layer
3 * (C) 2005-2006 Red Hat Inc
4 * Alan Cox <alan@lxorguk.ukuu.org.uk>
5 *
6 * based upon cs5535.c from AMD <Jens.Altmann@amd.com> as cleaned up and
7 * made readable and Linux style by Wolfgang Zuleger <wolfgang.zuleger@gmx.de>
8 * and Alexander Kiausch <alex.kiausch@t-online.de>
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
22 *
23 * Loosely based on the piix & svwks drivers.
24 *
25 * Documentation:
26 * Available from AMD web site.
27 * TODO
28 * Review errata to see if serializing is necessary
29 */
30
31#include <linux/kernel.h>
32#include <linux/module.h>
33#include <linux/pci.h>
34#include <linux/blkdev.h>
35#include <linux/delay.h>
36#include <scsi/scsi_host.h>
37#include <linux/libata.h>
38#include <asm/msr.h>
39
40#define DRV_NAME "pata_cs5535"
41#define DRV_VERSION "0.2.12"
42
43/*
44 * The Geode (Aka Athlon GX now) uses an internal MSR based
45 * bus system for control. Demented but there you go.
46 */
47
48#define MSR_ATAC_BASE 0x51300000
49#define ATAC_GLD_MSR_CAP (MSR_ATAC_BASE+0)
50#define ATAC_GLD_MSR_CONFIG (MSR_ATAC_BASE+0x01)
51#define ATAC_GLD_MSR_SMI (MSR_ATAC_BASE+0x02)
52#define ATAC_GLD_MSR_ERROR (MSR_ATAC_BASE+0x03)
53#define ATAC_GLD_MSR_PM (MSR_ATAC_BASE+0x04)
54#define ATAC_GLD_MSR_DIAG (MSR_ATAC_BASE+0x05)
55#define ATAC_IO_BAR (MSR_ATAC_BASE+0x08)
56#define ATAC_RESET (MSR_ATAC_BASE+0x10)
57#define ATAC_CH0D0_PIO (MSR_ATAC_BASE+0x20)
58#define ATAC_CH0D0_DMA (MSR_ATAC_BASE+0x21)
59#define ATAC_CH0D1_PIO (MSR_ATAC_BASE+0x22)
60#define ATAC_CH0D1_DMA (MSR_ATAC_BASE+0x23)
61#define ATAC_PCI_ABRTERR (MSR_ATAC_BASE+0x24)
62
63#define ATAC_BM0_CMD_PRIM 0x00
64#define ATAC_BM0_STS_PRIM 0x02
65#define ATAC_BM0_PRD 0x04
66
67#define CS5535_CABLE_DETECT 0x48
68
69/**
70 * cs5535_cable_detect - detect cable type
71 * @ap: Port to detect on
72 *
73 * Perform cable detection for ATA66 capable cable. Return a libata
74 * cable type.
75 */
76
77static int cs5535_cable_detect(struct ata_port *ap)
78{
79 u8 cable;
80 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
81
82 pci_read_config_byte(pdev, CS5535_CABLE_DETECT, &cable);
83 if (cable & 1)
84 return ATA_CBL_PATA80;
85 else
86 return ATA_CBL_PATA40;
87}
88
89/**
90 * cs5535_set_piomode - PIO setup
91 * @ap: ATA interface
92 * @adev: device on the interface
93 *
94 * Set our PIO requirements. The CS5535 is pretty clean about all this
95 */
96
97static void cs5535_set_piomode(struct ata_port *ap, struct ata_device *adev)
98{
99 static const u16 pio_timings[5] = {
100 0xF7F4, 0xF173, 0x8141, 0x5131, 0x1131
101 };
102 static const u16 pio_cmd_timings[5] = {
103 0xF7F4, 0x53F3, 0x13F1, 0x5131, 0x1131
104 };
105 u32 reg, dummy;
106 struct ata_device *pair = ata_dev_pair(adev);
107
108 int mode = adev->pio_mode - XFER_PIO_0;
109 int cmdmode = mode;
110
111 /* Command timing has to be for the lowest of the pair of devices */
112 if (pair) {
113 int pairmode = pair->pio_mode - XFER_PIO_0;
114 cmdmode = min(mode, pairmode);
115 /* Write the other drive timing register if it changed */
116 if (cmdmode < pairmode)
117 wrmsr(ATAC_CH0D0_PIO + 2 * pair->devno,
118 pio_cmd_timings[cmdmode] << 16 | pio_timings[pairmode], 0);
119 }
120 /* Write the drive timing register */
121 wrmsr(ATAC_CH0D0_PIO + 2 * adev->devno,
122 pio_cmd_timings[cmdmode] << 16 | pio_timings[mode], 0);
123
124 /* Set the PIO "format 1" bit in the DMA timing register */
125 rdmsr(ATAC_CH0D0_DMA + 2 * adev->devno, reg, dummy);
126 wrmsr(ATAC_CH0D0_DMA + 2 * adev->devno, reg | 0x80000000UL, 0);
127}
128
129/**
130 * cs5535_set_dmamode - DMA timing setup
131 * @ap: ATA interface
132 * @adev: Device being configured
133 *
134 */
135
136static void cs5535_set_dmamode(struct ata_port *ap, struct ata_device *adev)
137{
138 static const u32 udma_timings[5] = {
139 0x7F7436A1, 0x7F733481, 0x7F723261, 0x7F713161, 0x7F703061
140 };
141 static const u32 mwdma_timings[3] = {
142 0x7F0FFFF3, 0x7F035352, 0x7F024241
143 };
144 u32 reg, dummy;
145 int mode = adev->dma_mode;
146
147 rdmsr(ATAC_CH0D0_DMA + 2 * adev->devno, reg, dummy);
148 reg &= 0x80000000UL;
149 if (mode >= XFER_UDMA_0)
150 reg |= udma_timings[mode - XFER_UDMA_0];
151 else
152 reg |= mwdma_timings[mode - XFER_MW_DMA_0];
153 wrmsr(ATAC_CH0D0_DMA + 2 * adev->devno, reg, 0);
154}
155
156static struct scsi_host_template cs5535_sht = {
157 ATA_BMDMA_SHT(DRV_NAME),
158};
159
160static struct ata_port_operations cs5535_port_ops = {
161 .inherits = &ata_bmdma_port_ops,
162 .cable_detect = cs5535_cable_detect,
163 .set_piomode = cs5535_set_piomode,
164 .set_dmamode = cs5535_set_dmamode,
165};
166
167/**
168 * cs5535_init_one - Initialise a CS5530
169 * @dev: PCI device
170 * @id: Entry in match table
171 *
172 * Install a driver for the newly found CS5530 companion chip. Most of
173 * this is just housekeeping. We have to set the chip up correctly and
174 * turn off various bits of emulation magic.
175 */
176
177static int cs5535_init_one(struct pci_dev *dev, const struct pci_device_id *id)
178{
179 static const struct ata_port_info info = {
180 .flags = ATA_FLAG_SLAVE_POSS,
181 .pio_mask = ATA_PIO4,
182 .mwdma_mask = ATA_MWDMA2,
183 .udma_mask = ATA_UDMA4,
184 .port_ops = &cs5535_port_ops
185 };
186 const struct ata_port_info *ppi[] = { &info, &ata_dummy_port_info };
187
188 return ata_pci_bmdma_init_one(dev, ppi, &cs5535_sht, NULL, 0);
189}
190
191static const struct pci_device_id cs5535[] = {
192 { PCI_VDEVICE(NS, PCI_DEVICE_ID_NS_CS5535_IDE), },
193 { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_CS5535_IDE), },
194
195 { },
196};
197
198static struct pci_driver cs5535_pci_driver = {
199 .name = DRV_NAME,
200 .id_table = cs5535,
201 .probe = cs5535_init_one,
202 .remove = ata_pci_remove_one,
203#ifdef CONFIG_PM_SLEEP
204 .suspend = ata_pci_device_suspend,
205 .resume = ata_pci_device_resume,
206#endif
207};
208
209module_pci_driver(cs5535_pci_driver);
210
211MODULE_AUTHOR("Alan Cox, Jens Altmann, Wolfgan Zuleger, Alexander Kiausch");
212MODULE_DESCRIPTION("low-level driver for the NS/AMD 5535");
213MODULE_LICENSE("GPL");
214MODULE_DEVICE_TABLE(pci, cs5535);
215MODULE_VERSION(DRV_VERSION);