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v6.2
  1/* SPDX-License-Identifier: GPL-2.0 */
  2/*
  3 * linux/include/asm-m68k/raw_io.h
  4 *
  5 * 10/20/00 RZ: - created from bits of io.h and ide.h to cleanup namespace
  6 *
  7 */
  8
  9#ifndef _RAW_IO_H
 10#define _RAW_IO_H
 11
 12#ifdef __KERNEL__
 13
 14#include <asm/byteorder.h>
 15
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 16/* ++roman: The assignments to temp. vars avoid that gcc sometimes generates
 17 * two accesses to memory, which may be undesirable for some devices.
 18 */
 19#define in_8(addr) \
 20    ({ u8 __v = (*(__force volatile u8 *) (unsigned long)(addr)); __v; })
 21#define in_be16(addr) \
 22    ({ u16 __v = (*(__force volatile u16 *) (unsigned long)(addr)); __v; })
 23#define in_be32(addr) \
 24    ({ u32 __v = (*(__force volatile u32 *) (unsigned long)(addr)); __v; })
 25#define in_le16(addr) \
 26    ({ u16 __v = le16_to_cpu(*(__force volatile __le16 *) (unsigned long)(addr)); __v; })
 27#define in_le32(addr) \
 28    ({ u32 __v = le32_to_cpu(*(__force volatile __le32 *) (unsigned long)(addr)); __v; })
 29
 30#define out_8(addr,b) (void)((*(__force volatile u8 *) (unsigned long)(addr)) = (b))
 31#define out_be16(addr,w) (void)((*(__force volatile u16 *) (unsigned long)(addr)) = (w))
 32#define out_be32(addr,l) (void)((*(__force volatile u32 *) (unsigned long)(addr)) = (l))
 33#define out_le16(addr,w) (void)((*(__force volatile __le16 *) (unsigned long)(addr)) = cpu_to_le16(w))
 34#define out_le32(addr,l) (void)((*(__force volatile __le32 *) (unsigned long)(addr)) = cpu_to_le32(l))
 35
 36#define raw_inb in_8
 37#define raw_inw in_be16
 38#define raw_inl in_be32
 39#define __raw_readb in_8
 40#define __raw_readw in_be16
 41#define __raw_readl in_be32
 42
 43#define raw_outb(val,port) out_8((port),(val))
 44#define raw_outw(val,port) out_be16((port),(val))
 45#define raw_outl(val,port) out_be32((port),(val))
 46#define __raw_writeb(val,addr) out_8((addr),(val))
 47#define __raw_writew(val,addr) out_be16((addr),(val))
 48#define __raw_writel(val,addr) out_be32((addr),(val))
 49
 50/*
 51 * Atari ROM port (cartridge port) ISA adapter, used for the EtherNEC NE2000
 52 * network card driver.
 53 * The ISA adapter connects address lines A9-A13 to ISA address lines A0-A4,
 54 * and hardwires the rest of the ISA addresses for a base address of 0x300.
 55 *
 56 * Data lines D8-D15 are connected to ISA data lines D0-D7 for reading.
 57 * For writes, address lines A1-A8 are latched to ISA data lines D0-D7
 58 * (meaning the bit pattern on A1-A8 can be read back as byte).
 59 *
 60 * Read and write operations are distinguished by the base address used:
 61 * reads are from the ROM A side range, writes are through the B side range
 62 * addresses (A side base + 0x10000).
 63 *
 64 * Reads and writes are byte only.
 65 *
 66 * 16 bit reads and writes are necessary for the NetUSBee adapter's USB
 67 * chipset - 16 bit words are read straight off the ROM port while 16 bit
 68 * reads are split into two byte writes. The low byte is latched to the
 69 * NetUSBee buffer by a read from the _read_ window (with the data pattern
 70 * asserted as A1-A8 address pattern). The high byte is then written to the
 71 * write range as usual, completing the write cycle.
 72 */
 73
 74#if defined(CONFIG_ATARI_ROM_ISA)
 75#define rom_in_8(addr) \
 76	({ u16 __v = (*(__force volatile u16 *) (addr)); __v >>= 8; __v; })
 77#define rom_in_be16(addr) \
 78	({ u16 __v = (*(__force volatile u16 *) (addr)); __v; })
 79#define rom_in_le16(addr) \
 80	({ u16 __v = le16_to_cpu(*(__force volatile u16 *) (addr)); __v; })
 81
 82#define rom_out_8(addr, b)	\
 83	(void)({u8 __maybe_unused __w, __v = (b);  u32 _addr = ((u32) (addr)); \
 84	__w = ((*(__force volatile u8 *)  ((_addr | 0x10000) + (__v<<1)))); })
 85#define rom_out_be16(addr, w)	\
 86	(void)({u16 __maybe_unused __w, __v = (w); u32 _addr = ((u32) (addr)); \
 87	__w = ((*(__force volatile u16 *) ((_addr & 0xFFFF0000UL) + ((__v & 0xFF)<<1)))); \
 88	__w = ((*(__force volatile u16 *) ((_addr | 0x10000) + ((__v >> 8)<<1)))); })
 89#define rom_out_le16(addr, w)	\
 90	(void)({u16 __maybe_unused __w, __v = (w); u32 _addr = ((u32) (addr)); \
 91	__w = ((*(__force volatile u16 *) ((_addr & 0xFFFF0000UL) + ((__v >> 8)<<1)))); \
 92	__w = ((*(__force volatile u16 *) ((_addr | 0x10000) + ((__v & 0xFF)<<1)))); })
 93
 94#define raw_rom_inb rom_in_8
 95#define raw_rom_inw rom_in_be16
 96
 97#define raw_rom_outb(val, port) rom_out_8((port), (val))
 98#define raw_rom_outw(val, port) rom_out_be16((port), (val))
 99#endif /* CONFIG_ATARI_ROM_ISA */
100
101static inline void raw_insb(volatile u8 __iomem *port, u8 *buf, unsigned int len)
102{
103	unsigned int i;
104
105        for (i = 0; i < len; i++)
106		*buf++ = in_8(port);
107}
108
109static inline void raw_outsb(volatile u8 __iomem *port, const u8 *buf,
110			     unsigned int nr)
111{
112	unsigned int tmp;
113
114	if (nr & 15) {
115		tmp = (nr & 15) - 1;
116		asm volatile (
117			"1: moveb %0@+,%2@; dbra %1,1b"
118			: "=a" (buf), "=d" (tmp)
119			: "a" (port), "0" (buf),
120			  "1" (tmp));
121	}
122	if (nr >> 4) {
123		tmp = (nr >> 4) - 1;
124		asm volatile (
125			"1: "
126			"moveb %0@+,%2@; "
127			"moveb %0@+,%2@; "
128			"moveb %0@+,%2@; "
129			"moveb %0@+,%2@; "
130			"moveb %0@+,%2@; "
131			"moveb %0@+,%2@; "
132			"moveb %0@+,%2@; "
133			"moveb %0@+,%2@; "
134			"moveb %0@+,%2@; "
135			"moveb %0@+,%2@; "
136			"moveb %0@+,%2@; "
137			"moveb %0@+,%2@; "
138			"moveb %0@+,%2@; "
139			"moveb %0@+,%2@; "
140			"moveb %0@+,%2@; "
141			"moveb %0@+,%2@; "
142			"dbra %1,1b"
143			: "=a" (buf), "=d" (tmp)
144			: "a" (port), "0" (buf),
145			  "1" (tmp));
146	}
147}
148
149static inline void raw_insw(volatile u16 __iomem *port, u16 *buf, unsigned int nr)
150{
151	unsigned int tmp;
152
153	if (nr & 15) {
154		tmp = (nr & 15) - 1;
155		asm volatile (
156			"1: movew %2@,%0@+; dbra %1,1b"
157			: "=a" (buf), "=d" (tmp)
158			: "a" (port), "0" (buf),
159			  "1" (tmp));
160	}
161	if (nr >> 4) {
162		tmp = (nr >> 4) - 1;
163		asm volatile (
164			"1: "
165			"movew %2@,%0@+; "
166			"movew %2@,%0@+; "
167			"movew %2@,%0@+; "
168			"movew %2@,%0@+; "
169			"movew %2@,%0@+; "
170			"movew %2@,%0@+; "
171			"movew %2@,%0@+; "
172			"movew %2@,%0@+; "
173			"movew %2@,%0@+; "
174			"movew %2@,%0@+; "
175			"movew %2@,%0@+; "
176			"movew %2@,%0@+; "
177			"movew %2@,%0@+; "
178			"movew %2@,%0@+; "
179			"movew %2@,%0@+; "
180			"movew %2@,%0@+; "
181			"dbra %1,1b"
182			: "=a" (buf), "=d" (tmp)
183			: "a" (port), "0" (buf),
184			  "1" (tmp));
185	}
186}
187
188static inline void raw_outsw(volatile u16 __iomem *port, const u16 *buf,
189			     unsigned int nr)
190{
191	unsigned int tmp;
192
193	if (nr & 15) {
194		tmp = (nr & 15) - 1;
195		asm volatile (
196			"1: movew %0@+,%2@; dbra %1,1b"
197			: "=a" (buf), "=d" (tmp)
198			: "a" (port), "0" (buf),
199			  "1" (tmp));
200	}
201	if (nr >> 4) {
202		tmp = (nr >> 4) - 1;
203		asm volatile (
204			"1: "
205			"movew %0@+,%2@; "
206			"movew %0@+,%2@; "
207			"movew %0@+,%2@; "
208			"movew %0@+,%2@; "
209			"movew %0@+,%2@; "
210			"movew %0@+,%2@; "
211			"movew %0@+,%2@; "
212			"movew %0@+,%2@; "
213			"movew %0@+,%2@; "
214			"movew %0@+,%2@; "
215			"movew %0@+,%2@; "
216			"movew %0@+,%2@; "
217			"movew %0@+,%2@; "
218			"movew %0@+,%2@; "
219			"movew %0@+,%2@; "
220			"movew %0@+,%2@; "
221			"dbra %1,1b"
222			: "=a" (buf), "=d" (tmp)
223			: "a" (port), "0" (buf),
224			  "1" (tmp));
225	}
226}
227
228static inline void raw_insl(volatile u32 __iomem *port, u32 *buf, unsigned int nr)
229{
230	unsigned int tmp;
231
232	if (nr & 15) {
233		tmp = (nr & 15) - 1;
234		asm volatile (
235			"1: movel %2@,%0@+; dbra %1,1b"
236			: "=a" (buf), "=d" (tmp)
237			: "a" (port), "0" (buf),
238			  "1" (tmp));
239	}
240	if (nr >> 4) {
241		tmp = (nr >> 4) - 1;
242		asm volatile (
243			"1: "
244			"movel %2@,%0@+; "
245			"movel %2@,%0@+; "
246			"movel %2@,%0@+; "
247			"movel %2@,%0@+; "
248			"movel %2@,%0@+; "
249			"movel %2@,%0@+; "
250			"movel %2@,%0@+; "
251			"movel %2@,%0@+; "
252			"movel %2@,%0@+; "
253			"movel %2@,%0@+; "
254			"movel %2@,%0@+; "
255			"movel %2@,%0@+; "
256			"movel %2@,%0@+; "
257			"movel %2@,%0@+; "
258			"movel %2@,%0@+; "
259			"movel %2@,%0@+; "
260			"dbra %1,1b"
261			: "=a" (buf), "=d" (tmp)
262			: "a" (port), "0" (buf),
263			  "1" (tmp));
264	}
265}
266
267static inline void raw_outsl(volatile u32 __iomem *port, const u32 *buf,
268			     unsigned int nr)
269{
270	unsigned int tmp;
271
272	if (nr & 15) {
273		tmp = (nr & 15) - 1;
274		asm volatile (
275			"1: movel %0@+,%2@; dbra %1,1b"
276			: "=a" (buf), "=d" (tmp)
277			: "a" (port), "0" (buf),
278			  "1" (tmp));
279	}
280	if (nr >> 4) {
281		tmp = (nr >> 4) - 1;
282		asm volatile (
283			"1: "
284			"movel %0@+,%2@; "
285			"movel %0@+,%2@; "
286			"movel %0@+,%2@; "
287			"movel %0@+,%2@; "
288			"movel %0@+,%2@; "
289			"movel %0@+,%2@; "
290			"movel %0@+,%2@; "
291			"movel %0@+,%2@; "
292			"movel %0@+,%2@; "
293			"movel %0@+,%2@; "
294			"movel %0@+,%2@; "
295			"movel %0@+,%2@; "
296			"movel %0@+,%2@; "
297			"movel %0@+,%2@; "
298			"movel %0@+,%2@; "
299			"movel %0@+,%2@; "
300			"dbra %1,1b"
301			: "=a" (buf), "=d" (tmp)
302			: "a" (port), "0" (buf),
303			  "1" (tmp));
304	}
305}
306
307
308static inline void raw_insw_swapw(volatile u16 __iomem *port, u16 *buf,
309				  unsigned int nr)
310{
311    if ((nr) % 8)
312	__asm__ __volatile__
313	       ("\tmovel %0,%/a0\n\t"
314		"movel %1,%/a1\n\t"
315		"movel %2,%/d6\n\t"
316		"subql #1,%/d6\n"
317		"1:\tmovew %/a0@,%/d0\n\t"
318		"rolw  #8,%/d0\n\t"
319		"movew %/d0,%/a1@+\n\t"
320		"dbra %/d6,1b"
321		:
322		: "g" (port), "g" (buf), "g" (nr)
323		: "d0", "a0", "a1", "d6");
324    else
325	__asm__ __volatile__
326	       ("movel %0,%/a0\n\t"
327		"movel %1,%/a1\n\t"
328		"movel %2,%/d6\n\t"
329		"lsrl  #3,%/d6\n\t"
330		"subql #1,%/d6\n"
331		"1:\tmovew %/a0@,%/d0\n\t"
332		"rolw  #8,%/d0\n\t"
333		"movew %/d0,%/a1@+\n\t"
334		"movew %/a0@,%/d0\n\t"
335		"rolw  #8,%/d0\n\t"
336		"movew %/d0,%/a1@+\n\t"
337		"movew %/a0@,%/d0\n\t"
338		"rolw  #8,%/d0\n\t"
339		"movew %/d0,%/a1@+\n\t"
340		"movew %/a0@,%/d0\n\t"
341		"rolw  #8,%/d0\n\t"
342		"movew %/d0,%/a1@+\n\t"
343		"movew %/a0@,%/d0\n\t"
344		"rolw  #8,%/d0\n\t"
345		"movew %/d0,%/a1@+\n\t"
346		"movew %/a0@,%/d0\n\t"
347		"rolw  #8,%/d0\n\t"
348		"movew %/d0,%/a1@+\n\t"
349		"movew %/a0@,%/d0\n\t"
350		"rolw  #8,%/d0\n\t"
351		"movew %/d0,%/a1@+\n\t"
352		"movew %/a0@,%/d0\n\t"
353		"rolw  #8,%/d0\n\t"
354		"movew %/d0,%/a1@+\n\t"
355		"dbra %/d6,1b"
356                :
357		: "g" (port), "g" (buf), "g" (nr)
358		: "d0", "a0", "a1", "d6");
359}
360
361static inline void raw_outsw_swapw(volatile u16 __iomem *port, const u16 *buf,
362				   unsigned int nr)
363{
364    if ((nr) % 8)
365	__asm__ __volatile__
366	       ("movel %0,%/a0\n\t"
367		"movel %1,%/a1\n\t"
368		"movel %2,%/d6\n\t"
369		"subql #1,%/d6\n"
370		"1:\tmovew %/a1@+,%/d0\n\t"
371		"rolw  #8,%/d0\n\t"
372		"movew %/d0,%/a0@\n\t"
373		"dbra %/d6,1b"
374                :
375		: "g" (port), "g" (buf), "g" (nr)
376		: "d0", "a0", "a1", "d6");
377    else
378	__asm__ __volatile__
379	       ("movel %0,%/a0\n\t"
380		"movel %1,%/a1\n\t"
381		"movel %2,%/d6\n\t"
382		"lsrl  #3,%/d6\n\t"
383		"subql #1,%/d6\n"
384		"1:\tmovew %/a1@+,%/d0\n\t"
385		"rolw  #8,%/d0\n\t"
386		"movew %/d0,%/a0@\n\t"
387		"movew %/a1@+,%/d0\n\t"
388		"rolw  #8,%/d0\n\t"
389		"movew %/d0,%/a0@\n\t"
390		"movew %/a1@+,%/d0\n\t"
391		"rolw  #8,%/d0\n\t"
392		"movew %/d0,%/a0@\n\t"
393		"movew %/a1@+,%/d0\n\t"
394		"rolw  #8,%/d0\n\t"
395		"movew %/d0,%/a0@\n\t"
396		"movew %/a1@+,%/d0\n\t"
397		"rolw  #8,%/d0\n\t"
398		"movew %/d0,%/a0@\n\t"
399		"movew %/a1@+,%/d0\n\t"
400		"rolw  #8,%/d0\n\t"
401		"movew %/d0,%/a0@\n\t"
402		"movew %/a1@+,%/d0\n\t"
403		"rolw  #8,%/d0\n\t"
404		"movew %/d0,%/a0@\n\t"
405		"movew %/a1@+,%/d0\n\t"
406		"rolw  #8,%/d0\n\t"
407		"movew %/d0,%/a0@\n\t"
408		"dbra %/d6,1b"
409                :
410		: "g" (port), "g" (buf), "g" (nr)
411		: "d0", "a0", "a1", "d6");
412}
413
414
415#if defined(CONFIG_ATARI_ROM_ISA)
416static inline void raw_rom_insb(volatile u8 __iomem *port, u8 *buf, unsigned int len)
417{
418	unsigned int i;
419
420	for (i = 0; i < len; i++)
421		*buf++ = rom_in_8(port);
422}
423
424static inline void raw_rom_outsb(volatile u8 __iomem *port, const u8 *buf,
425			     unsigned int len)
426{
427	unsigned int i;
428
429	for (i = 0; i < len; i++)
430		rom_out_8(port, *buf++);
431}
432
433static inline void raw_rom_insw(volatile u16 __iomem *port, u16 *buf,
434				   unsigned int nr)
435{
436	unsigned int i;
437
438	for (i = 0; i < nr; i++)
439		*buf++ = rom_in_be16(port);
440}
441
442static inline void raw_rom_outsw(volatile u16 __iomem *port, const u16 *buf,
443				   unsigned int nr)
444{
445	unsigned int i;
446
447	for (i = 0; i < nr; i++)
448		rom_out_be16(port, *buf++);
449}
450
451static inline void raw_rom_insw_swapw(volatile u16 __iomem *port, u16 *buf,
452				   unsigned int nr)
453{
454	unsigned int i;
455
456	for (i = 0; i < nr; i++)
457		*buf++ = rom_in_le16(port);
458}
459
460static inline void raw_rom_outsw_swapw(volatile u16 __iomem *port, const u16 *buf,
461				   unsigned int nr)
462{
463	unsigned int i;
464
465	for (i = 0; i < nr; i++)
466		rom_out_le16(port, *buf++);
467}
468#endif /* CONFIG_ATARI_ROM_ISA */
469
470#endif /* __KERNEL__ */
471
472#endif /* _RAW_IO_H */
v4.17
  1/* SPDX-License-Identifier: GPL-2.0 */
  2/*
  3 * linux/include/asm-m68k/raw_io.h
  4 *
  5 * 10/20/00 RZ: - created from bits of io.h and ide.h to cleanup namespace
  6 *
  7 */
  8
  9#ifndef _RAW_IO_H
 10#define _RAW_IO_H
 11
 12#ifdef __KERNEL__
 13
 14#include <asm/byteorder.h>
 15
 16
 17/* Values for nocacheflag and cmode */
 18#define IOMAP_FULL_CACHING		0
 19#define IOMAP_NOCACHE_SER		1
 20#define IOMAP_NOCACHE_NONSER		2
 21#define IOMAP_WRITETHROUGH		3
 22
 23extern void iounmap(void __iomem *addr);
 24
 25extern void __iomem *__ioremap(unsigned long physaddr, unsigned long size,
 26		       int cacheflag);
 27extern void __iounmap(void *addr, unsigned long size);
 28
 29
 30/* ++roman: The assignments to temp. vars avoid that gcc sometimes generates
 31 * two accesses to memory, which may be undesirable for some devices.
 32 */
 33#define in_8(addr) \
 34    ({ u8 __v = (*(__force volatile u8 *) (addr)); __v; })
 35#define in_be16(addr) \
 36    ({ u16 __v = (*(__force volatile u16 *) (addr)); __v; })
 37#define in_be32(addr) \
 38    ({ u32 __v = (*(__force volatile u32 *) (addr)); __v; })
 39#define in_le16(addr) \
 40    ({ u16 __v = le16_to_cpu(*(__force volatile __le16 *) (addr)); __v; })
 41#define in_le32(addr) \
 42    ({ u32 __v = le32_to_cpu(*(__force volatile __le32 *) (addr)); __v; })
 43
 44#define out_8(addr,b) (void)((*(__force volatile u8 *) (addr)) = (b))
 45#define out_be16(addr,w) (void)((*(__force volatile u16 *) (addr)) = (w))
 46#define out_be32(addr,l) (void)((*(__force volatile u32 *) (addr)) = (l))
 47#define out_le16(addr,w) (void)((*(__force volatile __le16 *) (addr)) = cpu_to_le16(w))
 48#define out_le32(addr,l) (void)((*(__force volatile __le32 *) (addr)) = cpu_to_le32(l))
 49
 50#define raw_inb in_8
 51#define raw_inw in_be16
 52#define raw_inl in_be32
 53#define __raw_readb in_8
 54#define __raw_readw in_be16
 55#define __raw_readl in_be32
 56
 57#define raw_outb(val,port) out_8((port),(val))
 58#define raw_outw(val,port) out_be16((port),(val))
 59#define raw_outl(val,port) out_be32((port),(val))
 60#define __raw_writeb(val,addr) out_8((addr),(val))
 61#define __raw_writew(val,addr) out_be16((addr),(val))
 62#define __raw_writel(val,addr) out_be32((addr),(val))
 63
 64/*
 65 * Atari ROM port (cartridge port) ISA adapter, used for the EtherNEC NE2000
 66 * network card driver.
 67 * The ISA adapter connects address lines A9-A13 to ISA address lines A0-A4,
 68 * and hardwires the rest of the ISA addresses for a base address of 0x300.
 69 *
 70 * Data lines D8-D15 are connected to ISA data lines D0-D7 for reading.
 71 * For writes, address lines A1-A8 are latched to ISA data lines D0-D7
 72 * (meaning the bit pattern on A1-A8 can be read back as byte).
 73 *
 74 * Read and write operations are distinguished by the base address used:
 75 * reads are from the ROM A side range, writes are through the B side range
 76 * addresses (A side base + 0x10000).
 77 *
 78 * Reads and writes are byte only.
 79 *
 80 * 16 bit reads and writes are necessary for the NetUSBee adapter's USB
 81 * chipset - 16 bit words are read straight off the ROM port while 16 bit
 82 * reads are split into two byte writes. The low byte is latched to the
 83 * NetUSBee buffer by a read from the _read_ window (with the data pattern
 84 * asserted as A1-A8 address pattern). The high byte is then written to the
 85 * write range as usual, completing the write cycle.
 86 */
 87
 88#if defined(CONFIG_ATARI_ROM_ISA)
 89#define rom_in_8(addr) \
 90	({ u16 __v = (*(__force volatile u16 *) (addr)); __v >>= 8; __v; })
 91#define rom_in_be16(addr) \
 92	({ u16 __v = (*(__force volatile u16 *) (addr)); __v; })
 93#define rom_in_le16(addr) \
 94	({ u16 __v = le16_to_cpu(*(__force volatile u16 *) (addr)); __v; })
 95
 96#define rom_out_8(addr, b)	\
 97	({u8 __w, __v = (b);  u32 _addr = ((u32) (addr)); \
 98	__w = ((*(__force volatile u8 *)  ((_addr | 0x10000) + (__v<<1)))); })
 99#define rom_out_be16(addr, w)	\
100	({u16 __w, __v = (w); u32 _addr = ((u32) (addr)); \
101	__w = ((*(__force volatile u16 *) ((_addr & 0xFFFF0000UL) + ((__v & 0xFF)<<1)))); \
102	__w = ((*(__force volatile u16 *) ((_addr | 0x10000) + ((__v >> 8)<<1)))); })
103#define rom_out_le16(addr, w)	\
104	({u16 __w, __v = (w); u32 _addr = ((u32) (addr)); \
105	__w = ((*(__force volatile u16 *) ((_addr & 0xFFFF0000UL) + ((__v >> 8)<<1)))); \
106	__w = ((*(__force volatile u16 *) ((_addr | 0x10000) + ((__v & 0xFF)<<1)))); })
107
108#define raw_rom_inb rom_in_8
109#define raw_rom_inw rom_in_be16
110
111#define raw_rom_outb(val, port) rom_out_8((port), (val))
112#define raw_rom_outw(val, port) rom_out_be16((port), (val))
113#endif /* CONFIG_ATARI_ROM_ISA */
114
115static inline void raw_insb(volatile u8 __iomem *port, u8 *buf, unsigned int len)
116{
117	unsigned int i;
118
119        for (i = 0; i < len; i++)
120		*buf++ = in_8(port);
121}
122
123static inline void raw_outsb(volatile u8 __iomem *port, const u8 *buf,
124			     unsigned int len)
125{
126	unsigned int i;
127
128        for (i = 0; i < len; i++)
129		out_8(port, *buf++);
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
130}
131
132static inline void raw_insw(volatile u16 __iomem *port, u16 *buf, unsigned int nr)
133{
134	unsigned int tmp;
135
136	if (nr & 15) {
137		tmp = (nr & 15) - 1;
138		asm volatile (
139			"1: movew %2@,%0@+; dbra %1,1b"
140			: "=a" (buf), "=d" (tmp)
141			: "a" (port), "0" (buf),
142			  "1" (tmp));
143	}
144	if (nr >> 4) {
145		tmp = (nr >> 4) - 1;
146		asm volatile (
147			"1: "
148			"movew %2@,%0@+; "
149			"movew %2@,%0@+; "
150			"movew %2@,%0@+; "
151			"movew %2@,%0@+; "
152			"movew %2@,%0@+; "
153			"movew %2@,%0@+; "
154			"movew %2@,%0@+; "
155			"movew %2@,%0@+; "
156			"movew %2@,%0@+; "
157			"movew %2@,%0@+; "
158			"movew %2@,%0@+; "
159			"movew %2@,%0@+; "
160			"movew %2@,%0@+; "
161			"movew %2@,%0@+; "
162			"movew %2@,%0@+; "
163			"movew %2@,%0@+; "
164			"dbra %1,1b"
165			: "=a" (buf), "=d" (tmp)
166			: "a" (port), "0" (buf),
167			  "1" (tmp));
168	}
169}
170
171static inline void raw_outsw(volatile u16 __iomem *port, const u16 *buf,
172			     unsigned int nr)
173{
174	unsigned int tmp;
175
176	if (nr & 15) {
177		tmp = (nr & 15) - 1;
178		asm volatile (
179			"1: movew %0@+,%2@; dbra %1,1b"
180			: "=a" (buf), "=d" (tmp)
181			: "a" (port), "0" (buf),
182			  "1" (tmp));
183	}
184	if (nr >> 4) {
185		tmp = (nr >> 4) - 1;
186		asm volatile (
187			"1: "
188			"movew %0@+,%2@; "
189			"movew %0@+,%2@; "
190			"movew %0@+,%2@; "
191			"movew %0@+,%2@; "
192			"movew %0@+,%2@; "
193			"movew %0@+,%2@; "
194			"movew %0@+,%2@; "
195			"movew %0@+,%2@; "
196			"movew %0@+,%2@; "
197			"movew %0@+,%2@; "
198			"movew %0@+,%2@; "
199			"movew %0@+,%2@; "
200			"movew %0@+,%2@; "
201			"movew %0@+,%2@; "
202			"movew %0@+,%2@; "
203			"movew %0@+,%2@; "
204			"dbra %1,1b"
205			: "=a" (buf), "=d" (tmp)
206			: "a" (port), "0" (buf),
207			  "1" (tmp));
208	}
209}
210
211static inline void raw_insl(volatile u32 __iomem *port, u32 *buf, unsigned int nr)
212{
213	unsigned int tmp;
214
215	if (nr & 15) {
216		tmp = (nr & 15) - 1;
217		asm volatile (
218			"1: movel %2@,%0@+; dbra %1,1b"
219			: "=a" (buf), "=d" (tmp)
220			: "a" (port), "0" (buf),
221			  "1" (tmp));
222	}
223	if (nr >> 4) {
224		tmp = (nr >> 4) - 1;
225		asm volatile (
226			"1: "
227			"movel %2@,%0@+; "
228			"movel %2@,%0@+; "
229			"movel %2@,%0@+; "
230			"movel %2@,%0@+; "
231			"movel %2@,%0@+; "
232			"movel %2@,%0@+; "
233			"movel %2@,%0@+; "
234			"movel %2@,%0@+; "
235			"movel %2@,%0@+; "
236			"movel %2@,%0@+; "
237			"movel %2@,%0@+; "
238			"movel %2@,%0@+; "
239			"movel %2@,%0@+; "
240			"movel %2@,%0@+; "
241			"movel %2@,%0@+; "
242			"movel %2@,%0@+; "
243			"dbra %1,1b"
244			: "=a" (buf), "=d" (tmp)
245			: "a" (port), "0" (buf),
246			  "1" (tmp));
247	}
248}
249
250static inline void raw_outsl(volatile u32 __iomem *port, const u32 *buf,
251			     unsigned int nr)
252{
253	unsigned int tmp;
254
255	if (nr & 15) {
256		tmp = (nr & 15) - 1;
257		asm volatile (
258			"1: movel %0@+,%2@; dbra %1,1b"
259			: "=a" (buf), "=d" (tmp)
260			: "a" (port), "0" (buf),
261			  "1" (tmp));
262	}
263	if (nr >> 4) {
264		tmp = (nr >> 4) - 1;
265		asm volatile (
266			"1: "
267			"movel %0@+,%2@; "
268			"movel %0@+,%2@; "
269			"movel %0@+,%2@; "
270			"movel %0@+,%2@; "
271			"movel %0@+,%2@; "
272			"movel %0@+,%2@; "
273			"movel %0@+,%2@; "
274			"movel %0@+,%2@; "
275			"movel %0@+,%2@; "
276			"movel %0@+,%2@; "
277			"movel %0@+,%2@; "
278			"movel %0@+,%2@; "
279			"movel %0@+,%2@; "
280			"movel %0@+,%2@; "
281			"movel %0@+,%2@; "
282			"movel %0@+,%2@; "
283			"dbra %1,1b"
284			: "=a" (buf), "=d" (tmp)
285			: "a" (port), "0" (buf),
286			  "1" (tmp));
287	}
288}
289
290
291static inline void raw_insw_swapw(volatile u16 __iomem *port, u16 *buf,
292				  unsigned int nr)
293{
294    if ((nr) % 8)
295	__asm__ __volatile__
296	       ("\tmovel %0,%/a0\n\t"
297		"movel %1,%/a1\n\t"
298		"movel %2,%/d6\n\t"
299		"subql #1,%/d6\n"
300		"1:\tmovew %/a0@,%/d0\n\t"
301		"rolw  #8,%/d0\n\t"
302		"movew %/d0,%/a1@+\n\t"
303		"dbra %/d6,1b"
304		:
305		: "g" (port), "g" (buf), "g" (nr)
306		: "d0", "a0", "a1", "d6");
307    else
308	__asm__ __volatile__
309	       ("movel %0,%/a0\n\t"
310		"movel %1,%/a1\n\t"
311		"movel %2,%/d6\n\t"
312		"lsrl  #3,%/d6\n\t"
313		"subql #1,%/d6\n"
314		"1:\tmovew %/a0@,%/d0\n\t"
315		"rolw  #8,%/d0\n\t"
316		"movew %/d0,%/a1@+\n\t"
317		"movew %/a0@,%/d0\n\t"
318		"rolw  #8,%/d0\n\t"
319		"movew %/d0,%/a1@+\n\t"
320		"movew %/a0@,%/d0\n\t"
321		"rolw  #8,%/d0\n\t"
322		"movew %/d0,%/a1@+\n\t"
323		"movew %/a0@,%/d0\n\t"
324		"rolw  #8,%/d0\n\t"
325		"movew %/d0,%/a1@+\n\t"
326		"movew %/a0@,%/d0\n\t"
327		"rolw  #8,%/d0\n\t"
328		"movew %/d0,%/a1@+\n\t"
329		"movew %/a0@,%/d0\n\t"
330		"rolw  #8,%/d0\n\t"
331		"movew %/d0,%/a1@+\n\t"
332		"movew %/a0@,%/d0\n\t"
333		"rolw  #8,%/d0\n\t"
334		"movew %/d0,%/a1@+\n\t"
335		"movew %/a0@,%/d0\n\t"
336		"rolw  #8,%/d0\n\t"
337		"movew %/d0,%/a1@+\n\t"
338		"dbra %/d6,1b"
339                :
340		: "g" (port), "g" (buf), "g" (nr)
341		: "d0", "a0", "a1", "d6");
342}
343
344static inline void raw_outsw_swapw(volatile u16 __iomem *port, const u16 *buf,
345				   unsigned int nr)
346{
347    if ((nr) % 8)
348	__asm__ __volatile__
349	       ("movel %0,%/a0\n\t"
350		"movel %1,%/a1\n\t"
351		"movel %2,%/d6\n\t"
352		"subql #1,%/d6\n"
353		"1:\tmovew %/a1@+,%/d0\n\t"
354		"rolw  #8,%/d0\n\t"
355		"movew %/d0,%/a0@\n\t"
356		"dbra %/d6,1b"
357                :
358		: "g" (port), "g" (buf), "g" (nr)
359		: "d0", "a0", "a1", "d6");
360    else
361	__asm__ __volatile__
362	       ("movel %0,%/a0\n\t"
363		"movel %1,%/a1\n\t"
364		"movel %2,%/d6\n\t"
365		"lsrl  #3,%/d6\n\t"
366		"subql #1,%/d6\n"
367		"1:\tmovew %/a1@+,%/d0\n\t"
368		"rolw  #8,%/d0\n\t"
369		"movew %/d0,%/a0@\n\t"
370		"movew %/a1@+,%/d0\n\t"
371		"rolw  #8,%/d0\n\t"
372		"movew %/d0,%/a0@\n\t"
373		"movew %/a1@+,%/d0\n\t"
374		"rolw  #8,%/d0\n\t"
375		"movew %/d0,%/a0@\n\t"
376		"movew %/a1@+,%/d0\n\t"
377		"rolw  #8,%/d0\n\t"
378		"movew %/d0,%/a0@\n\t"
379		"movew %/a1@+,%/d0\n\t"
380		"rolw  #8,%/d0\n\t"
381		"movew %/d0,%/a0@\n\t"
382		"movew %/a1@+,%/d0\n\t"
383		"rolw  #8,%/d0\n\t"
384		"movew %/d0,%/a0@\n\t"
385		"movew %/a1@+,%/d0\n\t"
386		"rolw  #8,%/d0\n\t"
387		"movew %/d0,%/a0@\n\t"
388		"movew %/a1@+,%/d0\n\t"
389		"rolw  #8,%/d0\n\t"
390		"movew %/d0,%/a0@\n\t"
391		"dbra %/d6,1b"
392                :
393		: "g" (port), "g" (buf), "g" (nr)
394		: "d0", "a0", "a1", "d6");
395}
396
397
398#if defined(CONFIG_ATARI_ROM_ISA)
399static inline void raw_rom_insb(volatile u8 __iomem *port, u8 *buf, unsigned int len)
400{
401	unsigned int i;
402
403	for (i = 0; i < len; i++)
404		*buf++ = rom_in_8(port);
405}
406
407static inline void raw_rom_outsb(volatile u8 __iomem *port, const u8 *buf,
408			     unsigned int len)
409{
410	unsigned int i;
411
412	for (i = 0; i < len; i++)
413		rom_out_8(port, *buf++);
414}
415
416static inline void raw_rom_insw(volatile u16 __iomem *port, u16 *buf,
417				   unsigned int nr)
418{
419	unsigned int i;
420
421	for (i = 0; i < nr; i++)
422		*buf++ = rom_in_be16(port);
423}
424
425static inline void raw_rom_outsw(volatile u16 __iomem *port, const u16 *buf,
426				   unsigned int nr)
427{
428	unsigned int i;
429
430	for (i = 0; i < nr; i++)
431		rom_out_be16(port, *buf++);
432}
433
434static inline void raw_rom_insw_swapw(volatile u16 __iomem *port, u16 *buf,
435				   unsigned int nr)
436{
437	unsigned int i;
438
439	for (i = 0; i < nr; i++)
440		*buf++ = rom_in_le16(port);
441}
442
443static inline void raw_rom_outsw_swapw(volatile u16 __iomem *port, const u16 *buf,
444				   unsigned int nr)
445{
446	unsigned int i;
447
448	for (i = 0; i < nr; i++)
449		rom_out_le16(port, *buf++);
450}
451#endif /* CONFIG_ATARI_ROM_ISA */
452
453#endif /* __KERNEL__ */
454
455#endif /* _RAW_IO_H */