1// SPDX-License-Identifier: GPL-2.0
 2/*
 3 *  Copyright (C) 2011 - 2014 Xilinx
 4 *  Copyright (C) 2012 National Instruments Corp.
 5 */
 6/dts-v1/;
 7#include "zynq-7000.dtsi"
 8
 9/ {
10	model = "Avnet ZedBoard board";
11	compatible = "avnet,zynq-zed", "xlnx,zynq-zed", "xlnx,zynq-7000";
12
13	aliases {
14		ethernet0 = &gem0;
15		serial0 = &uart1;
16		mmc0 = &sdhci0;
17	};
18
19	memory@0 {
20		device_type = "memory";
21		reg = <0x0 0x20000000>;
22	};
23
24	chosen {
25		bootargs = "";
26		stdout-path = "serial0:115200n8";
27	};
28
29	usb_phy0: phy0 {
30		compatible = "usb-nop-xceiv";
31		#phy-cells = <0>;
32	};
33};
34
35&clkc {
36	ps-clk-frequency = <33333333>;
37};
38
39&gem0 {
40	status = "okay";
41	phy-mode = "rgmii-id";
42	phy-handle = <&ethernet_phy>;
43
44	ethernet_phy: ethernet-phy@0 {
45		reg = <0>;
46		device_type = "ethernet-phy";
47	};
48};
49
50&sdhci0 {
51	status = "okay";
52};
53
54&uart1 {
55	status = "okay";
56};
57
58&usb0 {
59	status = "okay";
60	dr_mode = "host";
61	usb-phy = <&usb_phy0>;
62};

 1// SPDX-License-Identifier: GPL-2.0
 2/*
 3 *  Copyright (C) 2011 - 2014 Xilinx
 4 *  Copyright (C) 2012 National Instruments Corp.
 5 */
 6/dts-v1/;
 7#include "zynq-7000.dtsi"
 8
 9/ {
10	model = "Zynq Zed Development Board";
11	compatible = "xlnx,zynq-zed", "xlnx,zynq-7000";
12
13	aliases {
14		ethernet0 = &gem0;
15		serial0 = &uart1;
 
16	};
17
18	memory@0 {
19		device_type = "memory";
20		reg = <0x0 0x20000000>;
21	};
22
23	chosen {
24		bootargs = "";
25		stdout-path = "serial0:115200n8";
26	};
27
28	usb_phy0: phy0 {
29		compatible = "usb-nop-xceiv";
30		#phy-cells = <0>;
31	};
32};
33
34&clkc {
35	ps-clk-frequency = <33333333>;
36};
37
38&gem0 {
39	status = "okay";
40	phy-mode = "rgmii-id";
41	phy-handle = <&ethernet_phy>;
42
43	ethernet_phy: ethernet-phy@0 {
44		reg = <0>;
45		device_type = "ethernet-phy";
46	};
47};
48
49&sdhci0 {
50	status = "okay";
51};
52
53&uart1 {
54	status = "okay";
55};
56
57&usb0 {
58	status = "okay";
59	dr_mode = "host";
60	usb-phy = <&usb_phy0>;
61};