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  1/* SPDX-License-Identifier: GPL-2.0 */
  2/*
  3 * Copyright(c) 2016-20 Intel Corporation.
  4 */
  5
  6	.macro ENCLU
  7	.byte 0x0f, 0x01, 0xd7
  8	.endm
  9
 10	.section ".tcs", "aw"
 11	.balign	4096
 12
 13	.fill	1, 8, 0			# STATE (set by CPU)
 14	.fill	1, 8, 0			# FLAGS
 15	.quad	encl_ssa_tcs1		# OSSA
 16	.fill	1, 4, 0			# CSSA (set by CPU)
 17	.fill	1, 4, 1			# NSSA
 18	.quad	encl_entry		# OENTRY
 19	.fill	1, 8, 0			# AEP (set by EENTER and ERESUME)
 20	.fill	1, 8, 0			# OFSBASE
 21	.fill	1, 8, 0			# OGSBASE
 22	.fill	1, 4, 0xFFFFFFFF 	# FSLIMIT
 23	.fill	1, 4, 0xFFFFFFFF	# GSLIMIT
 24	.fill	4024, 1, 0		# Reserved
 25
 26	# TCS2
 27	.fill	1, 8, 0			# STATE (set by CPU)
 28	.fill	1, 8, 0			# FLAGS
 29	.quad	encl_ssa_tcs2		# OSSA
 30	.fill	1, 4, 0			# CSSA (set by CPU)
 31	.fill	1, 4, 1			# NSSA
 32	.quad	encl_entry		# OENTRY
 33	.fill	1, 8, 0			# AEP (set by EENTER and ERESUME)
 34	.fill	1, 8, 0			# OFSBASE
 35	.fill	1, 8, 0			# OGSBASE
 36	.fill	1, 4, 0xFFFFFFFF 	# FSLIMIT
 37	.fill	1, 4, 0xFFFFFFFF	# GSLIMIT
 38	.fill	4024, 1, 0		# Reserved
 39
 40	.text
 41
 42encl_entry:
 43	# RBX contains the base address for TCS, which is the first address
 44	# inside the enclave for TCS #1 and one page into the enclave for
 45	# TCS #2. By adding the value of encl_stack to it, we get
 46	# the absolute address for the stack.
 47	lea	(encl_stack)(%rbx), %rax
 48	jmp encl_entry_core
 49encl_dyn_entry:
 50	# Entry point for dynamically created TCS page expected to follow
 51	# its stack directly.
 52	lea -1(%rbx), %rax
 53encl_entry_core:
 54	xchg	%rsp, %rax
 55	push	%rax
 56
 57	push	%rcx # push the address after EENTER
 58	push	%rbx # push the enclave base address
 59
 60	call	encl_body
 61
 62	pop	%rbx # pop the enclave base address
 63
 64	/* Clear volatile GPRs, except RAX (EEXIT function). */
 65	xor     %rcx, %rcx
 66	xor     %rdx, %rdx
 67	xor     %rdi, %rdi
 68	xor     %rsi, %rsi
 69	xor     %r8, %r8
 70	xor     %r9, %r9
 71	xor     %r10, %r10
 72	xor     %r11, %r11
 73
 74	# Reset status flags.
 75	add     %rdx, %rdx # OF = SF = AF = CF = 0; ZF = PF = 1
 76
 77	# Prepare EEXIT target by popping the address of the instruction after
 78	# EENTER to RBX.
 79	pop	%rbx
 80
 81	# Restore the caller stack.
 82	pop	%rax
 83	mov	%rax, %rsp
 84
 85	# EEXIT
 86	mov	$4, %rax
 87	enclu
 88
 89	.section ".data", "aw"
 90
 91encl_ssa_tcs1:
 92	.space 4096
 93encl_ssa_tcs2:
 94	.space 4096
 95
 96	.balign 4096
 97	# Stack of TCS #1
 98	.space 4096
 99encl_stack:
100	.balign 4096
101	# Stack of TCS #2
102	.space 4096