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1/* SPDX-License-Identifier: GPL-2.0-only */
2/*
3 * Copyright (c) 2014-2022, NVIDIA CORPORATION. All rights reserved.
4 * Copyright (c) 2015, Google Inc.
5 */
6
7#ifndef __PHY_TEGRA_XUSB_H
8#define __PHY_TEGRA_XUSB_H
9
10#include <linux/io.h>
11#include <linux/mutex.h>
12#include <linux/workqueue.h>
13
14#include <linux/usb/ch9.h>
15#include <linux/usb/otg.h>
16#include <linux/usb/role.h>
17
18/* legacy entry points for backwards-compatibility */
19int tegra_xusb_padctl_legacy_probe(struct platform_device *pdev);
20int tegra_xusb_padctl_legacy_remove(struct platform_device *pdev);
21
22struct phy;
23struct phy_provider;
24struct platform_device;
25struct regulator;
26
27/*
28 * lanes
29 */
30struct tegra_xusb_lane_soc {
31 const char *name;
32
33 unsigned int offset;
34 unsigned int shift;
35 unsigned int mask;
36
37 const char * const *funcs;
38 unsigned int num_funcs;
39
40 struct {
41 unsigned int misc_ctl2;
42 } regs;
43};
44
45struct tegra_xusb_lane {
46 const struct tegra_xusb_lane_soc *soc;
47 struct tegra_xusb_pad *pad;
48 struct device_node *np;
49 struct list_head list;
50 unsigned int function;
51 unsigned int index;
52};
53
54int tegra_xusb_lane_parse_dt(struct tegra_xusb_lane *lane,
55 struct device_node *np);
56
57struct tegra_xusb_usb3_lane {
58 struct tegra_xusb_lane base;
59};
60
61static inline struct tegra_xusb_usb3_lane *
62to_usb3_lane(struct tegra_xusb_lane *lane)
63{
64 return container_of(lane, struct tegra_xusb_usb3_lane, base);
65}
66
67struct tegra_xusb_usb2_lane {
68 struct tegra_xusb_lane base;
69
70 u32 hs_curr_level_offset;
71 bool powered_on;
72};
73
74static inline struct tegra_xusb_usb2_lane *
75to_usb2_lane(struct tegra_xusb_lane *lane)
76{
77 return container_of(lane, struct tegra_xusb_usb2_lane, base);
78}
79
80struct tegra_xusb_ulpi_lane {
81 struct tegra_xusb_lane base;
82};
83
84static inline struct tegra_xusb_ulpi_lane *
85to_ulpi_lane(struct tegra_xusb_lane *lane)
86{
87 return container_of(lane, struct tegra_xusb_ulpi_lane, base);
88}
89
90struct tegra_xusb_hsic_lane {
91 struct tegra_xusb_lane base;
92
93 u32 strobe_trim;
94 u32 rx_strobe_trim;
95 u32 rx_data_trim;
96 u32 tx_rtune_n;
97 u32 tx_rtune_p;
98 u32 tx_rslew_n;
99 u32 tx_rslew_p;
100 bool auto_term;
101};
102
103static inline struct tegra_xusb_hsic_lane *
104to_hsic_lane(struct tegra_xusb_lane *lane)
105{
106 return container_of(lane, struct tegra_xusb_hsic_lane, base);
107}
108
109struct tegra_xusb_pcie_lane {
110 struct tegra_xusb_lane base;
111};
112
113static inline struct tegra_xusb_pcie_lane *
114to_pcie_lane(struct tegra_xusb_lane *lane)
115{
116 return container_of(lane, struct tegra_xusb_pcie_lane, base);
117}
118
119struct tegra_xusb_sata_lane {
120 struct tegra_xusb_lane base;
121};
122
123static inline struct tegra_xusb_sata_lane *
124to_sata_lane(struct tegra_xusb_lane *lane)
125{
126 return container_of(lane, struct tegra_xusb_sata_lane, base);
127}
128
129struct tegra_xusb_lane_ops {
130 struct tegra_xusb_lane *(*probe)(struct tegra_xusb_pad *pad,
131 struct device_node *np,
132 unsigned int index);
133 void (*remove)(struct tegra_xusb_lane *lane);
134 void (*iddq_enable)(struct tegra_xusb_lane *lane);
135 void (*iddq_disable)(struct tegra_xusb_lane *lane);
136 int (*enable_phy_sleepwalk)(struct tegra_xusb_lane *lane, enum usb_device_speed speed);
137 int (*disable_phy_sleepwalk)(struct tegra_xusb_lane *lane);
138 int (*enable_phy_wake)(struct tegra_xusb_lane *lane);
139 int (*disable_phy_wake)(struct tegra_xusb_lane *lane);
140 bool (*remote_wake_detected)(struct tegra_xusb_lane *lane);
141};
142
143bool tegra_xusb_lane_check(struct tegra_xusb_lane *lane, const char *function);
144
145/*
146 * pads
147 */
148struct tegra_xusb_pad_soc;
149struct tegra_xusb_padctl;
150
151struct tegra_xusb_pad_ops {
152 struct tegra_xusb_pad *(*probe)(struct tegra_xusb_padctl *padctl,
153 const struct tegra_xusb_pad_soc *soc,
154 struct device_node *np);
155 void (*remove)(struct tegra_xusb_pad *pad);
156};
157
158struct tegra_xusb_pad_soc {
159 const char *name;
160
161 const struct tegra_xusb_lane_soc *lanes;
162 unsigned int num_lanes;
163
164 const struct tegra_xusb_pad_ops *ops;
165};
166
167struct tegra_xusb_pad {
168 const struct tegra_xusb_pad_soc *soc;
169 struct tegra_xusb_padctl *padctl;
170 struct phy_provider *provider;
171 struct phy **lanes;
172 struct device dev;
173
174 const struct tegra_xusb_lane_ops *ops;
175
176 struct list_head list;
177};
178
179static inline struct tegra_xusb_pad *to_tegra_xusb_pad(struct device *dev)
180{
181 return container_of(dev, struct tegra_xusb_pad, dev);
182}
183
184int tegra_xusb_pad_init(struct tegra_xusb_pad *pad,
185 struct tegra_xusb_padctl *padctl,
186 struct device_node *np);
187int tegra_xusb_pad_register(struct tegra_xusb_pad *pad,
188 const struct phy_ops *ops);
189void tegra_xusb_pad_unregister(struct tegra_xusb_pad *pad);
190
191struct tegra_xusb_usb3_pad {
192 struct tegra_xusb_pad base;
193
194 unsigned int enable;
195 struct mutex lock;
196};
197
198static inline struct tegra_xusb_usb3_pad *
199to_usb3_pad(struct tegra_xusb_pad *pad)
200{
201 return container_of(pad, struct tegra_xusb_usb3_pad, base);
202}
203
204struct tegra_xusb_usb2_pad {
205 struct tegra_xusb_pad base;
206
207 struct clk *clk;
208 unsigned int enable;
209 struct mutex lock;
210};
211
212static inline struct tegra_xusb_usb2_pad *
213to_usb2_pad(struct tegra_xusb_pad *pad)
214{
215 return container_of(pad, struct tegra_xusb_usb2_pad, base);
216}
217
218struct tegra_xusb_ulpi_pad {
219 struct tegra_xusb_pad base;
220};
221
222static inline struct tegra_xusb_ulpi_pad *
223to_ulpi_pad(struct tegra_xusb_pad *pad)
224{
225 return container_of(pad, struct tegra_xusb_ulpi_pad, base);
226}
227
228struct tegra_xusb_hsic_pad {
229 struct tegra_xusb_pad base;
230
231 struct regulator *supply;
232 struct clk *clk;
233};
234
235static inline struct tegra_xusb_hsic_pad *
236to_hsic_pad(struct tegra_xusb_pad *pad)
237{
238 return container_of(pad, struct tegra_xusb_hsic_pad, base);
239}
240
241struct tegra_xusb_pcie_pad {
242 struct tegra_xusb_pad base;
243
244 struct reset_control *rst;
245 struct clk *pll;
246
247 bool enable;
248};
249
250static inline struct tegra_xusb_pcie_pad *
251to_pcie_pad(struct tegra_xusb_pad *pad)
252{
253 return container_of(pad, struct tegra_xusb_pcie_pad, base);
254}
255
256struct tegra_xusb_sata_pad {
257 struct tegra_xusb_pad base;
258
259 struct reset_control *rst;
260 struct clk *pll;
261
262 bool enable;
263};
264
265static inline struct tegra_xusb_sata_pad *
266to_sata_pad(struct tegra_xusb_pad *pad)
267{
268 return container_of(pad, struct tegra_xusb_sata_pad, base);
269}
270
271/*
272 * ports
273 */
274struct tegra_xusb_port_ops;
275
276struct tegra_xusb_port {
277 struct tegra_xusb_padctl *padctl;
278 struct tegra_xusb_lane *lane;
279 unsigned int index;
280
281 struct list_head list;
282 struct device dev;
283
284 struct usb_role_switch *usb_role_sw;
285 struct work_struct usb_phy_work;
286 struct usb_phy usb_phy;
287
288 const struct tegra_xusb_port_ops *ops;
289};
290
291static inline struct tegra_xusb_port *to_tegra_xusb_port(struct device *dev)
292{
293 return container_of(dev, struct tegra_xusb_port, dev);
294}
295
296struct tegra_xusb_lane_map {
297 unsigned int port;
298 const char *type;
299 unsigned int index;
300 const char *func;
301};
302
303struct tegra_xusb_lane *
304tegra_xusb_port_find_lane(struct tegra_xusb_port *port,
305 const struct tegra_xusb_lane_map *map,
306 const char *function);
307
308struct tegra_xusb_port *
309tegra_xusb_find_port(struct tegra_xusb_padctl *padctl, const char *type,
310 unsigned int index);
311
312struct tegra_xusb_usb2_port {
313 struct tegra_xusb_port base;
314
315 struct regulator *supply;
316 enum usb_dr_mode mode;
317 bool internal;
318 int usb3_port_fake;
319};
320
321static inline struct tegra_xusb_usb2_port *
322to_usb2_port(struct tegra_xusb_port *port)
323{
324 return container_of(port, struct tegra_xusb_usb2_port, base);
325}
326
327struct tegra_xusb_usb2_port *
328tegra_xusb_find_usb2_port(struct tegra_xusb_padctl *padctl,
329 unsigned int index);
330void tegra_xusb_usb2_port_release(struct tegra_xusb_port *port);
331void tegra_xusb_usb2_port_remove(struct tegra_xusb_port *port);
332
333struct tegra_xusb_ulpi_port {
334 struct tegra_xusb_port base;
335
336 struct regulator *supply;
337 bool internal;
338};
339
340static inline struct tegra_xusb_ulpi_port *
341to_ulpi_port(struct tegra_xusb_port *port)
342{
343 return container_of(port, struct tegra_xusb_ulpi_port, base);
344}
345
346void tegra_xusb_ulpi_port_release(struct tegra_xusb_port *port);
347
348struct tegra_xusb_hsic_port {
349 struct tegra_xusb_port base;
350};
351
352static inline struct tegra_xusb_hsic_port *
353to_hsic_port(struct tegra_xusb_port *port)
354{
355 return container_of(port, struct tegra_xusb_hsic_port, base);
356}
357
358void tegra_xusb_hsic_port_release(struct tegra_xusb_port *port);
359
360struct tegra_xusb_usb3_port {
361 struct tegra_xusb_port base;
362 bool context_saved;
363 unsigned int port;
364 bool internal;
365 bool disable_gen2;
366
367 u32 tap1;
368 u32 amp;
369 u32 ctle_z;
370 u32 ctle_g;
371};
372
373static inline struct tegra_xusb_usb3_port *
374to_usb3_port(struct tegra_xusb_port *port)
375{
376 return container_of(port, struct tegra_xusb_usb3_port, base);
377}
378
379struct tegra_xusb_usb3_port *
380tegra_xusb_find_usb3_port(struct tegra_xusb_padctl *padctl,
381 unsigned int index);
382void tegra_xusb_usb3_port_release(struct tegra_xusb_port *port);
383
384struct tegra_xusb_port_ops {
385 void (*release)(struct tegra_xusb_port *port);
386 void (*remove)(struct tegra_xusb_port *port);
387 int (*enable)(struct tegra_xusb_port *port);
388 void (*disable)(struct tegra_xusb_port *port);
389 struct tegra_xusb_lane *(*map)(struct tegra_xusb_port *port);
390};
391
392/*
393 * pad controller
394 */
395struct tegra_xusb_padctl_soc;
396
397struct tegra_xusb_padctl_ops {
398 struct tegra_xusb_padctl *
399 (*probe)(struct device *dev,
400 const struct tegra_xusb_padctl_soc *soc);
401 void (*remove)(struct tegra_xusb_padctl *padctl);
402
403 int (*suspend_noirq)(struct tegra_xusb_padctl *padctl);
404 int (*resume_noirq)(struct tegra_xusb_padctl *padctl);
405 int (*usb3_save_context)(struct tegra_xusb_padctl *padctl,
406 unsigned int index);
407 int (*hsic_set_idle)(struct tegra_xusb_padctl *padctl,
408 unsigned int index, bool idle);
409 int (*usb3_set_lfps_detect)(struct tegra_xusb_padctl *padctl,
410 unsigned int index, bool enable);
411 int (*vbus_override)(struct tegra_xusb_padctl *padctl, bool set);
412 int (*utmi_port_reset)(struct phy *phy);
413 void (*utmi_pad_power_on)(struct phy *phy);
414 void (*utmi_pad_power_down)(struct phy *phy);
415};
416
417struct tegra_xusb_padctl_soc {
418 const struct tegra_xusb_pad_soc * const *pads;
419 unsigned int num_pads;
420
421 struct {
422 struct {
423 const struct tegra_xusb_port_ops *ops;
424 unsigned int count;
425 } usb2, ulpi, hsic, usb3;
426 } ports;
427
428 const struct tegra_xusb_padctl_ops *ops;
429
430 const char * const *supply_names;
431 unsigned int num_supplies;
432 bool supports_gen2;
433 bool need_fake_usb3_port;
434};
435
436struct tegra_xusb_padctl {
437 struct device *dev;
438 void __iomem *regs;
439 struct mutex lock;
440 struct reset_control *rst;
441
442 const struct tegra_xusb_padctl_soc *soc;
443
444 struct tegra_xusb_pad *pcie;
445 struct tegra_xusb_pad *sata;
446 struct tegra_xusb_pad *ulpi;
447 struct tegra_xusb_pad *usb2;
448 struct tegra_xusb_pad *hsic;
449
450 struct list_head ports;
451 struct list_head lanes;
452 struct list_head pads;
453
454 unsigned int enable;
455
456 struct clk *clk;
457
458 struct regulator_bulk_data *supplies;
459};
460
461static inline void padctl_writel(struct tegra_xusb_padctl *padctl, u32 value,
462 unsigned long offset)
463{
464 dev_dbg(padctl->dev, "%08lx < %08x\n", offset, value);
465 writel(value, padctl->regs + offset);
466}
467
468static inline u32 padctl_readl(struct tegra_xusb_padctl *padctl,
469 unsigned long offset)
470{
471 u32 value = readl(padctl->regs + offset);
472 dev_dbg(padctl->dev, "%08lx > %08x\n", offset, value);
473 return value;
474}
475
476struct tegra_xusb_lane *tegra_xusb_find_lane(struct tegra_xusb_padctl *padctl,
477 const char *name,
478 unsigned int index);
479
480#if defined(CONFIG_ARCH_TEGRA_124_SOC) || defined(CONFIG_ARCH_TEGRA_132_SOC)
481extern const struct tegra_xusb_padctl_soc tegra124_xusb_padctl_soc;
482#endif
483#if defined(CONFIG_ARCH_TEGRA_210_SOC)
484extern const struct tegra_xusb_padctl_soc tegra210_xusb_padctl_soc;
485#endif
486#if defined(CONFIG_ARCH_TEGRA_186_SOC)
487extern const struct tegra_xusb_padctl_soc tegra186_xusb_padctl_soc;
488#endif
489#if defined(CONFIG_ARCH_TEGRA_194_SOC)
490extern const struct tegra_xusb_padctl_soc tegra194_xusb_padctl_soc;
491#endif
492
493#endif /* __PHY_TEGRA_XUSB_H */
1/*
2 * Copyright (c) 2014-2015, NVIDIA CORPORATION. All rights reserved.
3 * Copyright (c) 2015, Google Inc.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms and conditions of the GNU General Public License,
7 * version 2, as published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 */
14
15#ifndef __PHY_TEGRA_XUSB_H
16#define __PHY_TEGRA_XUSB_H
17
18#include <linux/io.h>
19#include <linux/mutex.h>
20#include <linux/workqueue.h>
21
22/* legacy entry points for backwards-compatibility */
23int tegra_xusb_padctl_legacy_probe(struct platform_device *pdev);
24int tegra_xusb_padctl_legacy_remove(struct platform_device *pdev);
25
26struct phy;
27struct phy_provider;
28struct platform_device;
29struct regulator;
30
31/*
32 * lanes
33 */
34struct tegra_xusb_lane_soc {
35 const char *name;
36
37 unsigned int offset;
38 unsigned int shift;
39 unsigned int mask;
40
41 const char * const *funcs;
42 unsigned int num_funcs;
43};
44
45struct tegra_xusb_lane {
46 const struct tegra_xusb_lane_soc *soc;
47 struct tegra_xusb_pad *pad;
48 struct device_node *np;
49 struct list_head list;
50 unsigned int function;
51 unsigned int index;
52};
53
54int tegra_xusb_lane_parse_dt(struct tegra_xusb_lane *lane,
55 struct device_node *np);
56
57struct tegra_xusb_usb2_lane {
58 struct tegra_xusb_lane base;
59
60 u32 hs_curr_level_offset;
61};
62
63static inline struct tegra_xusb_usb2_lane *
64to_usb2_lane(struct tegra_xusb_lane *lane)
65{
66 return container_of(lane, struct tegra_xusb_usb2_lane, base);
67}
68
69struct tegra_xusb_ulpi_lane {
70 struct tegra_xusb_lane base;
71};
72
73static inline struct tegra_xusb_ulpi_lane *
74to_ulpi_lane(struct tegra_xusb_lane *lane)
75{
76 return container_of(lane, struct tegra_xusb_ulpi_lane, base);
77}
78
79struct tegra_xusb_hsic_lane {
80 struct tegra_xusb_lane base;
81
82 u32 strobe_trim;
83 u32 rx_strobe_trim;
84 u32 rx_data_trim;
85 u32 tx_rtune_n;
86 u32 tx_rtune_p;
87 u32 tx_rslew_n;
88 u32 tx_rslew_p;
89 bool auto_term;
90};
91
92static inline struct tegra_xusb_hsic_lane *
93to_hsic_lane(struct tegra_xusb_lane *lane)
94{
95 return container_of(lane, struct tegra_xusb_hsic_lane, base);
96}
97
98struct tegra_xusb_pcie_lane {
99 struct tegra_xusb_lane base;
100};
101
102static inline struct tegra_xusb_pcie_lane *
103to_pcie_lane(struct tegra_xusb_lane *lane)
104{
105 return container_of(lane, struct tegra_xusb_pcie_lane, base);
106}
107
108struct tegra_xusb_sata_lane {
109 struct tegra_xusb_lane base;
110};
111
112static inline struct tegra_xusb_sata_lane *
113to_sata_lane(struct tegra_xusb_lane *lane)
114{
115 return container_of(lane, struct tegra_xusb_sata_lane, base);
116}
117
118struct tegra_xusb_lane_ops {
119 struct tegra_xusb_lane *(*probe)(struct tegra_xusb_pad *pad,
120 struct device_node *np,
121 unsigned int index);
122 void (*remove)(struct tegra_xusb_lane *lane);
123};
124
125/*
126 * pads
127 */
128struct tegra_xusb_pad_soc;
129struct tegra_xusb_padctl;
130
131struct tegra_xusb_pad_ops {
132 struct tegra_xusb_pad *(*probe)(struct tegra_xusb_padctl *padctl,
133 const struct tegra_xusb_pad_soc *soc,
134 struct device_node *np);
135 void (*remove)(struct tegra_xusb_pad *pad);
136};
137
138struct tegra_xusb_pad_soc {
139 const char *name;
140
141 const struct tegra_xusb_lane_soc *lanes;
142 unsigned int num_lanes;
143
144 const struct tegra_xusb_pad_ops *ops;
145};
146
147struct tegra_xusb_pad {
148 const struct tegra_xusb_pad_soc *soc;
149 struct tegra_xusb_padctl *padctl;
150 struct phy_provider *provider;
151 struct phy **lanes;
152 struct device dev;
153
154 const struct tegra_xusb_lane_ops *ops;
155
156 struct list_head list;
157};
158
159static inline struct tegra_xusb_pad *to_tegra_xusb_pad(struct device *dev)
160{
161 return container_of(dev, struct tegra_xusb_pad, dev);
162}
163
164int tegra_xusb_pad_init(struct tegra_xusb_pad *pad,
165 struct tegra_xusb_padctl *padctl,
166 struct device_node *np);
167int tegra_xusb_pad_register(struct tegra_xusb_pad *pad,
168 const struct phy_ops *ops);
169void tegra_xusb_pad_unregister(struct tegra_xusb_pad *pad);
170
171struct tegra_xusb_usb2_pad {
172 struct tegra_xusb_pad base;
173
174 struct clk *clk;
175 unsigned int enable;
176 struct mutex lock;
177};
178
179static inline struct tegra_xusb_usb2_pad *
180to_usb2_pad(struct tegra_xusb_pad *pad)
181{
182 return container_of(pad, struct tegra_xusb_usb2_pad, base);
183}
184
185struct tegra_xusb_ulpi_pad {
186 struct tegra_xusb_pad base;
187};
188
189static inline struct tegra_xusb_ulpi_pad *
190to_ulpi_pad(struct tegra_xusb_pad *pad)
191{
192 return container_of(pad, struct tegra_xusb_ulpi_pad, base);
193}
194
195struct tegra_xusb_hsic_pad {
196 struct tegra_xusb_pad base;
197
198 struct regulator *supply;
199 struct clk *clk;
200};
201
202static inline struct tegra_xusb_hsic_pad *
203to_hsic_pad(struct tegra_xusb_pad *pad)
204{
205 return container_of(pad, struct tegra_xusb_hsic_pad, base);
206}
207
208struct tegra_xusb_pcie_pad {
209 struct tegra_xusb_pad base;
210
211 struct reset_control *rst;
212 struct clk *pll;
213
214 unsigned int enable;
215};
216
217static inline struct tegra_xusb_pcie_pad *
218to_pcie_pad(struct tegra_xusb_pad *pad)
219{
220 return container_of(pad, struct tegra_xusb_pcie_pad, base);
221}
222
223struct tegra_xusb_sata_pad {
224 struct tegra_xusb_pad base;
225
226 struct reset_control *rst;
227 struct clk *pll;
228
229 unsigned int enable;
230};
231
232static inline struct tegra_xusb_sata_pad *
233to_sata_pad(struct tegra_xusb_pad *pad)
234{
235 return container_of(pad, struct tegra_xusb_sata_pad, base);
236}
237
238/*
239 * ports
240 */
241struct tegra_xusb_port_ops;
242
243struct tegra_xusb_port {
244 struct tegra_xusb_padctl *padctl;
245 struct tegra_xusb_lane *lane;
246 unsigned int index;
247
248 struct list_head list;
249 struct device dev;
250
251 const struct tegra_xusb_port_ops *ops;
252};
253
254struct tegra_xusb_lane_map {
255 unsigned int port;
256 const char *type;
257 unsigned int index;
258 const char *func;
259};
260
261struct tegra_xusb_lane *
262tegra_xusb_port_find_lane(struct tegra_xusb_port *port,
263 const struct tegra_xusb_lane_map *map,
264 const char *function);
265
266struct tegra_xusb_port *
267tegra_xusb_find_port(struct tegra_xusb_padctl *padctl, const char *type,
268 unsigned int index);
269
270struct tegra_xusb_usb2_port {
271 struct tegra_xusb_port base;
272
273 struct regulator *supply;
274 bool internal;
275};
276
277static inline struct tegra_xusb_usb2_port *
278to_usb2_port(struct tegra_xusb_port *port)
279{
280 return container_of(port, struct tegra_xusb_usb2_port, base);
281}
282
283struct tegra_xusb_usb2_port *
284tegra_xusb_find_usb2_port(struct tegra_xusb_padctl *padctl,
285 unsigned int index);
286
287struct tegra_xusb_ulpi_port {
288 struct tegra_xusb_port base;
289
290 struct regulator *supply;
291 bool internal;
292};
293
294static inline struct tegra_xusb_ulpi_port *
295to_ulpi_port(struct tegra_xusb_port *port)
296{
297 return container_of(port, struct tegra_xusb_ulpi_port, base);
298}
299
300struct tegra_xusb_hsic_port {
301 struct tegra_xusb_port base;
302};
303
304static inline struct tegra_xusb_hsic_port *
305to_hsic_port(struct tegra_xusb_port *port)
306{
307 return container_of(port, struct tegra_xusb_hsic_port, base);
308}
309
310struct tegra_xusb_usb3_port {
311 struct tegra_xusb_port base;
312 struct regulator *supply;
313 bool context_saved;
314 unsigned int port;
315 bool internal;
316
317 u32 tap1;
318 u32 amp;
319 u32 ctle_z;
320 u32 ctle_g;
321};
322
323static inline struct tegra_xusb_usb3_port *
324to_usb3_port(struct tegra_xusb_port *port)
325{
326 return container_of(port, struct tegra_xusb_usb3_port, base);
327}
328
329struct tegra_xusb_usb3_port *
330tegra_xusb_find_usb3_port(struct tegra_xusb_padctl *padctl,
331 unsigned int index);
332
333struct tegra_xusb_port_ops {
334 int (*enable)(struct tegra_xusb_port *port);
335 void (*disable)(struct tegra_xusb_port *port);
336 struct tegra_xusb_lane *(*map)(struct tegra_xusb_port *port);
337};
338
339/*
340 * pad controller
341 */
342struct tegra_xusb_padctl_soc;
343
344struct tegra_xusb_padctl_ops {
345 struct tegra_xusb_padctl *
346 (*probe)(struct device *dev,
347 const struct tegra_xusb_padctl_soc *soc);
348 void (*remove)(struct tegra_xusb_padctl *padctl);
349
350 int (*usb3_save_context)(struct tegra_xusb_padctl *padctl,
351 unsigned int index);
352 int (*hsic_set_idle)(struct tegra_xusb_padctl *padctl,
353 unsigned int index, bool idle);
354 int (*usb3_set_lfps_detect)(struct tegra_xusb_padctl *padctl,
355 unsigned int index, bool enable);
356};
357
358struct tegra_xusb_padctl_soc {
359 const struct tegra_xusb_pad_soc * const *pads;
360 unsigned int num_pads;
361
362 struct {
363 struct {
364 const struct tegra_xusb_port_ops *ops;
365 unsigned int count;
366 } usb2, ulpi, hsic, usb3;
367 } ports;
368
369 const struct tegra_xusb_padctl_ops *ops;
370};
371
372struct tegra_xusb_padctl {
373 struct device *dev;
374 void __iomem *regs;
375 struct mutex lock;
376 struct reset_control *rst;
377
378 const struct tegra_xusb_padctl_soc *soc;
379
380 struct tegra_xusb_pad *pcie;
381 struct tegra_xusb_pad *sata;
382 struct tegra_xusb_pad *ulpi;
383 struct tegra_xusb_pad *usb2;
384 struct tegra_xusb_pad *hsic;
385
386 struct list_head ports;
387 struct list_head lanes;
388 struct list_head pads;
389
390 unsigned int enable;
391
392 struct clk *clk;
393};
394
395static inline void padctl_writel(struct tegra_xusb_padctl *padctl, u32 value,
396 unsigned long offset)
397{
398 dev_dbg(padctl->dev, "%08lx < %08x\n", offset, value);
399 writel(value, padctl->regs + offset);
400}
401
402static inline u32 padctl_readl(struct tegra_xusb_padctl *padctl,
403 unsigned long offset)
404{
405 u32 value = readl(padctl->regs + offset);
406 dev_dbg(padctl->dev, "%08lx > %08x\n", offset, value);
407 return value;
408}
409
410struct tegra_xusb_lane *tegra_xusb_find_lane(struct tegra_xusb_padctl *padctl,
411 const char *name,
412 unsigned int index);
413
414#if defined(CONFIG_ARCH_TEGRA_124_SOC) || defined(CONFIG_ARCH_TEGRA_132_SOC)
415extern const struct tegra_xusb_padctl_soc tegra124_xusb_padctl_soc;
416#endif
417#if defined(CONFIG_ARCH_TEGRA_210_SOC)
418extern const struct tegra_xusb_padctl_soc tegra210_xusb_padctl_soc;
419#endif
420
421#endif /* __PHY_TEGRA_XUSB_H */