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   1/*
   2 * MCP23S08 SPI/I2C GPIO gpio expander driver
   3 *
   4 * The inputs and outputs of the mcp23s08, mcp23s17, mcp23008 and mcp23017 are
   5 * supported.
   6 * For the I2C versions of the chips (mcp23008 and mcp23017) generation of
   7 * interrupts is also supported.
   8 * The hardware of the SPI versions of the chips (mcp23s08 and mcp23s17) is
   9 * also capable of generating interrupts, but the linux driver does not
  10 * support that yet.
  11 */
  12
  13#include <linux/kernel.h>
  14#include <linux/device.h>
  15#include <linux/mutex.h>
  16#include <linux/module.h>
  17#include <linux/gpio.h>
  18#include <linux/i2c.h>
  19#include <linux/spi/spi.h>
  20#include <linux/spi/mcp23s08.h>
  21#include <linux/slab.h>
  22#include <asm/byteorder.h>
  23#include <linux/interrupt.h>
  24#include <linux/of_irq.h>
  25#include <linux/of_device.h>
  26
  27/**
  28 * MCP types supported by driver
  29 */
  30#define MCP_TYPE_S08	0
  31#define MCP_TYPE_S17	1
  32#define MCP_TYPE_008	2
  33#define MCP_TYPE_017	3
  34#define MCP_TYPE_S18    4
  35
  36/* Registers are all 8 bits wide.
  37 *
  38 * The mcp23s17 has twice as many bits, and can be configured to work
  39 * with either 16 bit registers or with two adjacent 8 bit banks.
  40 */
  41#define MCP_IODIR	0x00		/* init/reset:  all ones */
  42#define MCP_IPOL	0x01
  43#define MCP_GPINTEN	0x02
  44#define MCP_DEFVAL	0x03
  45#define MCP_INTCON	0x04
  46#define MCP_IOCON	0x05
  47#	define IOCON_MIRROR	(1 << 6)
  48#	define IOCON_SEQOP	(1 << 5)
  49#	define IOCON_HAEN	(1 << 3)
  50#	define IOCON_ODR	(1 << 2)
  51#	define IOCON_INTPOL	(1 << 1)
  52#	define IOCON_INTCC	(1)
  53#define MCP_GPPU	0x06
  54#define MCP_INTF	0x07
  55#define MCP_INTCAP	0x08
  56#define MCP_GPIO	0x09
  57#define MCP_OLAT	0x0a
  58
  59struct mcp23s08;
  60
  61struct mcp23s08_ops {
  62	int	(*read)(struct mcp23s08 *mcp, unsigned reg);
  63	int	(*write)(struct mcp23s08 *mcp, unsigned reg, unsigned val);
  64	int	(*read_regs)(struct mcp23s08 *mcp, unsigned reg,
  65			     u16 *vals, unsigned n);
  66};
  67
  68struct mcp23s08 {
  69	u8			addr;
  70	bool			irq_active_high;
  71
  72	u16			cache[11];
  73	u16			irq_rise;
  74	u16			irq_fall;
  75	int			irq;
  76	bool			irq_controller;
  77	/* lock protects the cached values */
  78	struct mutex		lock;
  79	struct mutex		irq_lock;
  80
  81	struct gpio_chip	chip;
  82
  83	const struct mcp23s08_ops	*ops;
  84	void			*data; /* ops specific data */
  85};
  86
  87/* A given spi_device can represent up to eight mcp23sxx chips
  88 * sharing the same chipselect but using different addresses
  89 * (e.g. chips #0 and #3 might be populated, but not #1 or $2).
  90 * Driver data holds all the per-chip data.
  91 */
  92struct mcp23s08_driver_data {
  93	unsigned		ngpio;
  94	struct mcp23s08		*mcp[8];
  95	struct mcp23s08		chip[];
  96};
  97
  98/*----------------------------------------------------------------------*/
  99
 100#if IS_ENABLED(CONFIG_I2C)
 101
 102static int mcp23008_read(struct mcp23s08 *mcp, unsigned reg)
 103{
 104	return i2c_smbus_read_byte_data(mcp->data, reg);
 105}
 106
 107static int mcp23008_write(struct mcp23s08 *mcp, unsigned reg, unsigned val)
 108{
 109	return i2c_smbus_write_byte_data(mcp->data, reg, val);
 110}
 111
 112static int
 113mcp23008_read_regs(struct mcp23s08 *mcp, unsigned reg, u16 *vals, unsigned n)
 114{
 115	while (n--) {
 116		int ret = mcp23008_read(mcp, reg++);
 117		if (ret < 0)
 118			return ret;
 119		*vals++ = ret;
 120	}
 121
 122	return 0;
 123}
 124
 125static int mcp23017_read(struct mcp23s08 *mcp, unsigned reg)
 126{
 127	return i2c_smbus_read_word_data(mcp->data, reg << 1);
 128}
 129
 130static int mcp23017_write(struct mcp23s08 *mcp, unsigned reg, unsigned val)
 131{
 132	return i2c_smbus_write_word_data(mcp->data, reg << 1, val);
 133}
 134
 135static int
 136mcp23017_read_regs(struct mcp23s08 *mcp, unsigned reg, u16 *vals, unsigned n)
 137{
 138	while (n--) {
 139		int ret = mcp23017_read(mcp, reg++);
 140		if (ret < 0)
 141			return ret;
 142		*vals++ = ret;
 143	}
 144
 145	return 0;
 146}
 147
 148static const struct mcp23s08_ops mcp23008_ops = {
 149	.read		= mcp23008_read,
 150	.write		= mcp23008_write,
 151	.read_regs	= mcp23008_read_regs,
 152};
 153
 154static const struct mcp23s08_ops mcp23017_ops = {
 155	.read		= mcp23017_read,
 156	.write		= mcp23017_write,
 157	.read_regs	= mcp23017_read_regs,
 158};
 159
 160#endif /* CONFIG_I2C */
 161
 162/*----------------------------------------------------------------------*/
 163
 164#ifdef CONFIG_SPI_MASTER
 165
 166static int mcp23s08_read(struct mcp23s08 *mcp, unsigned reg)
 167{
 168	u8	tx[2], rx[1];
 169	int	status;
 170
 171	tx[0] = mcp->addr | 0x01;
 172	tx[1] = reg;
 173	status = spi_write_then_read(mcp->data, tx, sizeof(tx), rx, sizeof(rx));
 174	return (status < 0) ? status : rx[0];
 175}
 176
 177static int mcp23s08_write(struct mcp23s08 *mcp, unsigned reg, unsigned val)
 178{
 179	u8	tx[3];
 180
 181	tx[0] = mcp->addr;
 182	tx[1] = reg;
 183	tx[2] = val;
 184	return spi_write_then_read(mcp->data, tx, sizeof(tx), NULL, 0);
 185}
 186
 187static int
 188mcp23s08_read_regs(struct mcp23s08 *mcp, unsigned reg, u16 *vals, unsigned n)
 189{
 190	u8	tx[2], *tmp;
 191	int	status;
 192
 193	if ((n + reg) > sizeof(mcp->cache))
 194		return -EINVAL;
 195	tx[0] = mcp->addr | 0x01;
 196	tx[1] = reg;
 197
 198	tmp = (u8 *)vals;
 199	status = spi_write_then_read(mcp->data, tx, sizeof(tx), tmp, n);
 200	if (status >= 0) {
 201		while (n--)
 202			vals[n] = tmp[n]; /* expand to 16bit */
 203	}
 204	return status;
 205}
 206
 207static int mcp23s17_read(struct mcp23s08 *mcp, unsigned reg)
 208{
 209	u8	tx[2], rx[2];
 210	int	status;
 211
 212	tx[0] = mcp->addr | 0x01;
 213	tx[1] = reg << 1;
 214	status = spi_write_then_read(mcp->data, tx, sizeof(tx), rx, sizeof(rx));
 215	return (status < 0) ? status : (rx[0] | (rx[1] << 8));
 216}
 217
 218static int mcp23s17_write(struct mcp23s08 *mcp, unsigned reg, unsigned val)
 219{
 220	u8	tx[4];
 221
 222	tx[0] = mcp->addr;
 223	tx[1] = reg << 1;
 224	tx[2] = val;
 225	tx[3] = val >> 8;
 226	return spi_write_then_read(mcp->data, tx, sizeof(tx), NULL, 0);
 227}
 228
 229static int
 230mcp23s17_read_regs(struct mcp23s08 *mcp, unsigned reg, u16 *vals, unsigned n)
 231{
 232	u8	tx[2];
 233	int	status;
 234
 235	if ((n + reg) > sizeof(mcp->cache))
 236		return -EINVAL;
 237	tx[0] = mcp->addr | 0x01;
 238	tx[1] = reg << 1;
 239
 240	status = spi_write_then_read(mcp->data, tx, sizeof(tx),
 241				     (u8 *)vals, n * 2);
 242	if (status >= 0) {
 243		while (n--)
 244			vals[n] = __le16_to_cpu((__le16)vals[n]);
 245	}
 246
 247	return status;
 248}
 249
 250static const struct mcp23s08_ops mcp23s08_ops = {
 251	.read		= mcp23s08_read,
 252	.write		= mcp23s08_write,
 253	.read_regs	= mcp23s08_read_regs,
 254};
 255
 256static const struct mcp23s08_ops mcp23s17_ops = {
 257	.read		= mcp23s17_read,
 258	.write		= mcp23s17_write,
 259	.read_regs	= mcp23s17_read_regs,
 260};
 261
 262#endif /* CONFIG_SPI_MASTER */
 263
 264/*----------------------------------------------------------------------*/
 265
 266static int mcp23s08_direction_input(struct gpio_chip *chip, unsigned offset)
 267{
 268	struct mcp23s08	*mcp = gpiochip_get_data(chip);
 269	int status;
 270
 271	mutex_lock(&mcp->lock);
 272	mcp->cache[MCP_IODIR] |= (1 << offset);
 273	status = mcp->ops->write(mcp, MCP_IODIR, mcp->cache[MCP_IODIR]);
 274	mutex_unlock(&mcp->lock);
 275	return status;
 276}
 277
 278static int mcp23s08_get(struct gpio_chip *chip, unsigned offset)
 279{
 280	struct mcp23s08	*mcp = gpiochip_get_data(chip);
 281	int status;
 282
 283	mutex_lock(&mcp->lock);
 284
 285	/* REVISIT reading this clears any IRQ ... */
 286	status = mcp->ops->read(mcp, MCP_GPIO);
 287	if (status < 0)
 288		status = 0;
 289	else {
 290		mcp->cache[MCP_GPIO] = status;
 291		status = !!(status & (1 << offset));
 292	}
 293	mutex_unlock(&mcp->lock);
 294	return status;
 295}
 296
 297static int __mcp23s08_set(struct mcp23s08 *mcp, unsigned mask, int value)
 298{
 299	unsigned olat = mcp->cache[MCP_OLAT];
 300
 301	if (value)
 302		olat |= mask;
 303	else
 304		olat &= ~mask;
 305	mcp->cache[MCP_OLAT] = olat;
 306	return mcp->ops->write(mcp, MCP_OLAT, olat);
 307}
 308
 309static void mcp23s08_set(struct gpio_chip *chip, unsigned offset, int value)
 310{
 311	struct mcp23s08	*mcp = gpiochip_get_data(chip);
 312	unsigned mask = 1 << offset;
 313
 314	mutex_lock(&mcp->lock);
 315	__mcp23s08_set(mcp, mask, value);
 316	mutex_unlock(&mcp->lock);
 317}
 318
 319static int
 320mcp23s08_direction_output(struct gpio_chip *chip, unsigned offset, int value)
 321{
 322	struct mcp23s08	*mcp = gpiochip_get_data(chip);
 323	unsigned mask = 1 << offset;
 324	int status;
 325
 326	mutex_lock(&mcp->lock);
 327	status = __mcp23s08_set(mcp, mask, value);
 328	if (status == 0) {
 329		mcp->cache[MCP_IODIR] &= ~mask;
 330		status = mcp->ops->write(mcp, MCP_IODIR, mcp->cache[MCP_IODIR]);
 331	}
 332	mutex_unlock(&mcp->lock);
 333	return status;
 334}
 335
 336/*----------------------------------------------------------------------*/
 337static irqreturn_t mcp23s08_irq(int irq, void *data)
 338{
 339	struct mcp23s08 *mcp = data;
 340	int intcap, intf, i;
 341	unsigned int child_irq;
 342
 343	mutex_lock(&mcp->lock);
 344	intf = mcp->ops->read(mcp, MCP_INTF);
 345	if (intf < 0) {
 346		mutex_unlock(&mcp->lock);
 347		return IRQ_HANDLED;
 348	}
 349
 350	mcp->cache[MCP_INTF] = intf;
 351
 352	intcap = mcp->ops->read(mcp, MCP_INTCAP);
 353	if (intcap < 0) {
 354		mutex_unlock(&mcp->lock);
 355		return IRQ_HANDLED;
 356	}
 357
 358	mcp->cache[MCP_INTCAP] = intcap;
 359	mutex_unlock(&mcp->lock);
 360
 361
 362	for (i = 0; i < mcp->chip.ngpio; i++) {
 363		if ((BIT(i) & mcp->cache[MCP_INTF]) &&
 364		    ((BIT(i) & intcap & mcp->irq_rise) ||
 365		     (mcp->irq_fall & ~intcap & BIT(i)) ||
 366		     (BIT(i) & mcp->cache[MCP_INTCON]))) {
 367			child_irq = irq_find_mapping(mcp->chip.irqdomain, i);
 368			handle_nested_irq(child_irq);
 369		}
 370	}
 371
 372	return IRQ_HANDLED;
 373}
 374
 375static void mcp23s08_irq_mask(struct irq_data *data)
 376{
 377	struct gpio_chip *gc = irq_data_get_irq_chip_data(data);
 378	struct mcp23s08 *mcp = gpiochip_get_data(gc);
 379	unsigned int pos = data->hwirq;
 380
 381	mcp->cache[MCP_GPINTEN] &= ~BIT(pos);
 382}
 383
 384static void mcp23s08_irq_unmask(struct irq_data *data)
 385{
 386	struct gpio_chip *gc = irq_data_get_irq_chip_data(data);
 387	struct mcp23s08 *mcp = gpiochip_get_data(gc);
 388	unsigned int pos = data->hwirq;
 389
 390	mcp->cache[MCP_GPINTEN] |= BIT(pos);
 391}
 392
 393static int mcp23s08_irq_set_type(struct irq_data *data, unsigned int type)
 394{
 395	struct gpio_chip *gc = irq_data_get_irq_chip_data(data);
 396	struct mcp23s08 *mcp = gpiochip_get_data(gc);
 397	unsigned int pos = data->hwirq;
 398	int status = 0;
 399
 400	if ((type & IRQ_TYPE_EDGE_BOTH) == IRQ_TYPE_EDGE_BOTH) {
 401		mcp->cache[MCP_INTCON] &= ~BIT(pos);
 402		mcp->irq_rise |= BIT(pos);
 403		mcp->irq_fall |= BIT(pos);
 404	} else if (type & IRQ_TYPE_EDGE_RISING) {
 405		mcp->cache[MCP_INTCON] &= ~BIT(pos);
 406		mcp->irq_rise |= BIT(pos);
 407		mcp->irq_fall &= ~BIT(pos);
 408	} else if (type & IRQ_TYPE_EDGE_FALLING) {
 409		mcp->cache[MCP_INTCON] &= ~BIT(pos);
 410		mcp->irq_rise &= ~BIT(pos);
 411		mcp->irq_fall |= BIT(pos);
 412	} else if (type & IRQ_TYPE_LEVEL_HIGH) {
 413		mcp->cache[MCP_INTCON] |= BIT(pos);
 414		mcp->cache[MCP_DEFVAL] &= ~BIT(pos);
 415	} else if (type & IRQ_TYPE_LEVEL_LOW) {
 416		mcp->cache[MCP_INTCON] |= BIT(pos);
 417		mcp->cache[MCP_DEFVAL] |= BIT(pos);
 418	} else
 419		return -EINVAL;
 420
 421	return status;
 422}
 423
 424static void mcp23s08_irq_bus_lock(struct irq_data *data)
 425{
 426	struct gpio_chip *gc = irq_data_get_irq_chip_data(data);
 427	struct mcp23s08 *mcp = gpiochip_get_data(gc);
 428
 429	mutex_lock(&mcp->irq_lock);
 430}
 431
 432static void mcp23s08_irq_bus_unlock(struct irq_data *data)
 433{
 434	struct gpio_chip *gc = irq_data_get_irq_chip_data(data);
 435	struct mcp23s08 *mcp = gpiochip_get_data(gc);
 436
 437	mutex_lock(&mcp->lock);
 438	mcp->ops->write(mcp, MCP_GPINTEN, mcp->cache[MCP_GPINTEN]);
 439	mcp->ops->write(mcp, MCP_DEFVAL, mcp->cache[MCP_DEFVAL]);
 440	mcp->ops->write(mcp, MCP_INTCON, mcp->cache[MCP_INTCON]);
 441	mutex_unlock(&mcp->lock);
 442	mutex_unlock(&mcp->irq_lock);
 443}
 444
 445static struct irq_chip mcp23s08_irq_chip = {
 446	.name = "gpio-mcp23xxx",
 447	.irq_mask = mcp23s08_irq_mask,
 448	.irq_unmask = mcp23s08_irq_unmask,
 449	.irq_set_type = mcp23s08_irq_set_type,
 450	.irq_bus_lock = mcp23s08_irq_bus_lock,
 451	.irq_bus_sync_unlock = mcp23s08_irq_bus_unlock,
 452};
 453
 454static int mcp23s08_irq_setup(struct mcp23s08 *mcp)
 455{
 456	struct gpio_chip *chip = &mcp->chip;
 457	int err;
 458	unsigned long irqflags = IRQF_ONESHOT | IRQF_SHARED;
 459
 460	mutex_init(&mcp->irq_lock);
 461
 462	if (mcp->irq_active_high)
 463		irqflags |= IRQF_TRIGGER_HIGH;
 464	else
 465		irqflags |= IRQF_TRIGGER_LOW;
 466
 467	err = devm_request_threaded_irq(chip->parent, mcp->irq, NULL,
 468					mcp23s08_irq,
 469					irqflags, dev_name(chip->parent), mcp);
 470	if (err != 0) {
 471		dev_err(chip->parent, "unable to request IRQ#%d: %d\n",
 472			mcp->irq, err);
 473		return err;
 474	}
 475
 476	err =  gpiochip_irqchip_add_nested(chip,
 477					   &mcp23s08_irq_chip,
 478					   0,
 479					   handle_simple_irq,
 480					   IRQ_TYPE_NONE);
 481	if (err) {
 482		dev_err(chip->parent,
 483			"could not connect irqchip to gpiochip: %d\n", err);
 484		return err;
 485	}
 486
 487	gpiochip_set_nested_irqchip(chip,
 488				    &mcp23s08_irq_chip,
 489				    mcp->irq);
 490
 491	return 0;
 492}
 493
 494/*----------------------------------------------------------------------*/
 495
 496#ifdef CONFIG_DEBUG_FS
 497
 498#include <linux/seq_file.h>
 499
 500/*
 501 * This shows more info than the generic gpio dump code:
 502 * pullups, deglitching, open drain drive.
 503 */
 504static void mcp23s08_dbg_show(struct seq_file *s, struct gpio_chip *chip)
 505{
 506	struct mcp23s08	*mcp;
 507	char		bank;
 508	int		t;
 509	unsigned	mask;
 510
 511	mcp = gpiochip_get_data(chip);
 512
 513	/* NOTE: we only handle one bank for now ... */
 514	bank = '0' + ((mcp->addr >> 1) & 0x7);
 515
 516	mutex_lock(&mcp->lock);
 517	t = mcp->ops->read_regs(mcp, 0, mcp->cache, ARRAY_SIZE(mcp->cache));
 518	if (t < 0) {
 519		seq_printf(s, " I/O ERROR %d\n", t);
 520		goto done;
 521	}
 522
 523	for (t = 0, mask = 1; t < chip->ngpio; t++, mask <<= 1) {
 524		const char	*label;
 525
 526		label = gpiochip_is_requested(chip, t);
 527		if (!label)
 528			continue;
 529
 530		seq_printf(s, " gpio-%-3d P%c.%d (%-12s) %s %s %s",
 531			chip->base + t, bank, t, label,
 532			(mcp->cache[MCP_IODIR] & mask) ? "in " : "out",
 533			(mcp->cache[MCP_GPIO] & mask) ? "hi" : "lo",
 534			(mcp->cache[MCP_GPPU] & mask) ? "up" : "  ");
 535		/* NOTE:  ignoring the irq-related registers */
 536		seq_puts(s, "\n");
 537	}
 538done:
 539	mutex_unlock(&mcp->lock);
 540}
 541
 542#else
 543#define mcp23s08_dbg_show	NULL
 544#endif
 545
 546/*----------------------------------------------------------------------*/
 547
 548static int mcp23s08_probe_one(struct mcp23s08 *mcp, struct device *dev,
 549			      void *data, unsigned addr, unsigned type,
 550			      struct mcp23s08_platform_data *pdata, int cs)
 551{
 552	int status;
 553	bool mirror = false;
 554
 555	mutex_init(&mcp->lock);
 556
 557	mcp->data = data;
 558	mcp->addr = addr;
 559	mcp->irq_active_high = false;
 560
 561	mcp->chip.direction_input = mcp23s08_direction_input;
 562	mcp->chip.get = mcp23s08_get;
 563	mcp->chip.direction_output = mcp23s08_direction_output;
 564	mcp->chip.set = mcp23s08_set;
 565	mcp->chip.dbg_show = mcp23s08_dbg_show;
 566#ifdef CONFIG_OF_GPIO
 567	mcp->chip.of_gpio_n_cells = 2;
 568	mcp->chip.of_node = dev->of_node;
 569#endif
 570
 571	switch (type) {
 572#ifdef CONFIG_SPI_MASTER
 573	case MCP_TYPE_S08:
 574		mcp->ops = &mcp23s08_ops;
 575		mcp->chip.ngpio = 8;
 576		mcp->chip.label = "mcp23s08";
 577		break;
 578
 579	case MCP_TYPE_S17:
 580		mcp->ops = &mcp23s17_ops;
 581		mcp->chip.ngpio = 16;
 582		mcp->chip.label = "mcp23s17";
 583		break;
 584
 585	case MCP_TYPE_S18:
 586		mcp->ops = &mcp23s17_ops;
 587		mcp->chip.ngpio = 16;
 588		mcp->chip.label = "mcp23s18";
 589		break;
 590#endif /* CONFIG_SPI_MASTER */
 591
 592#if IS_ENABLED(CONFIG_I2C)
 593	case MCP_TYPE_008:
 594		mcp->ops = &mcp23008_ops;
 595		mcp->chip.ngpio = 8;
 596		mcp->chip.label = "mcp23008";
 597		break;
 598
 599	case MCP_TYPE_017:
 600		mcp->ops = &mcp23017_ops;
 601		mcp->chip.ngpio = 16;
 602		mcp->chip.label = "mcp23017";
 603		break;
 604#endif /* CONFIG_I2C */
 605
 606	default:
 607		dev_err(dev, "invalid device type (%d)\n", type);
 608		return -EINVAL;
 609	}
 610
 611	mcp->chip.base = pdata->base;
 612	mcp->chip.can_sleep = true;
 613	mcp->chip.parent = dev;
 614	mcp->chip.owner = THIS_MODULE;
 615
 616	/* verify MCP_IOCON.SEQOP = 0, so sequential reads work,
 617	 * and MCP_IOCON.HAEN = 1, so we work with all chips.
 618	 */
 619
 620	status = mcp->ops->read(mcp, MCP_IOCON);
 621	if (status < 0)
 622		goto fail;
 623
 624	mcp->irq_controller = pdata->irq_controller;
 625	if (mcp->irq && mcp->irq_controller) {
 626		mcp->irq_active_high =
 627			of_property_read_bool(mcp->chip.parent->of_node,
 628					      "microchip,irq-active-high");
 629
 630		mirror = pdata->mirror;
 631	}
 632
 633	if ((status & IOCON_SEQOP) || !(status & IOCON_HAEN) || mirror ||
 634	     mcp->irq_active_high) {
 635		/* mcp23s17 has IOCON twice, make sure they are in sync */
 636		status &= ~(IOCON_SEQOP | (IOCON_SEQOP << 8));
 637		status |= IOCON_HAEN | (IOCON_HAEN << 8);
 638		if (mcp->irq_active_high)
 639			status |= IOCON_INTPOL | (IOCON_INTPOL << 8);
 640		else
 641			status &= ~(IOCON_INTPOL | (IOCON_INTPOL << 8));
 642
 643		if (mirror)
 644			status |= IOCON_MIRROR | (IOCON_MIRROR << 8);
 645
 646		if (type == MCP_TYPE_S18)
 647			status |= IOCON_INTCC | (IOCON_INTCC << 8);
 648
 649		status = mcp->ops->write(mcp, MCP_IOCON, status);
 650		if (status < 0)
 651			goto fail;
 652	}
 653
 654	/* configure ~100K pullups */
 655	status = mcp->ops->write(mcp, MCP_GPPU, pdata->chip[cs].pullups);
 656	if (status < 0)
 657		goto fail;
 658
 659	status = mcp->ops->read_regs(mcp, 0, mcp->cache, ARRAY_SIZE(mcp->cache));
 660	if (status < 0)
 661		goto fail;
 662
 663	/* disable inverter on input */
 664	if (mcp->cache[MCP_IPOL] != 0) {
 665		mcp->cache[MCP_IPOL] = 0;
 666		status = mcp->ops->write(mcp, MCP_IPOL, 0);
 667		if (status < 0)
 668			goto fail;
 669	}
 670
 671	/* disable irqs */
 672	if (mcp->cache[MCP_GPINTEN] != 0) {
 673		mcp->cache[MCP_GPINTEN] = 0;
 674		status = mcp->ops->write(mcp, MCP_GPINTEN, 0);
 675		if (status < 0)
 676			goto fail;
 677	}
 678
 679	status = gpiochip_add_data(&mcp->chip, mcp);
 680	if (status < 0)
 681		goto fail;
 682
 683	if (mcp->irq && mcp->irq_controller) {
 684		status = mcp23s08_irq_setup(mcp);
 685		if (status) {
 686			goto fail;
 687		}
 688	}
 689fail:
 690	if (status < 0)
 691		dev_dbg(dev, "can't setup chip %d, --> %d\n",
 692			addr, status);
 693	return status;
 694}
 695
 696/*----------------------------------------------------------------------*/
 697
 698#ifdef CONFIG_OF
 699#ifdef CONFIG_SPI_MASTER
 700static const struct of_device_id mcp23s08_spi_of_match[] = {
 701	{
 702		.compatible = "microchip,mcp23s08",
 703		.data = (void *) MCP_TYPE_S08,
 704	},
 705	{
 706		.compatible = "microchip,mcp23s17",
 707		.data = (void *) MCP_TYPE_S17,
 708	},
 709	{
 710		.compatible = "microchip,mcp23s18",
 711		.data = (void *) MCP_TYPE_S18,
 712	},
 713/* NOTE: The use of the mcp prefix is deprecated and will be removed. */
 714	{
 715		.compatible = "mcp,mcp23s08",
 716		.data = (void *) MCP_TYPE_S08,
 717	},
 718	{
 719		.compatible = "mcp,mcp23s17",
 720		.data = (void *) MCP_TYPE_S17,
 721	},
 722	{ },
 723};
 724MODULE_DEVICE_TABLE(of, mcp23s08_spi_of_match);
 725#endif
 726
 727#if IS_ENABLED(CONFIG_I2C)
 728static const struct of_device_id mcp23s08_i2c_of_match[] = {
 729	{
 730		.compatible = "microchip,mcp23008",
 731		.data = (void *) MCP_TYPE_008,
 732	},
 733	{
 734		.compatible = "microchip,mcp23017",
 735		.data = (void *) MCP_TYPE_017,
 736	},
 737/* NOTE: The use of the mcp prefix is deprecated and will be removed. */
 738	{
 739		.compatible = "mcp,mcp23008",
 740		.data = (void *) MCP_TYPE_008,
 741	},
 742	{
 743		.compatible = "mcp,mcp23017",
 744		.data = (void *) MCP_TYPE_017,
 745	},
 746	{ },
 747};
 748MODULE_DEVICE_TABLE(of, mcp23s08_i2c_of_match);
 749#endif
 750#endif /* CONFIG_OF */
 751
 752
 753#if IS_ENABLED(CONFIG_I2C)
 754
 755static int mcp230xx_probe(struct i2c_client *client,
 756				    const struct i2c_device_id *id)
 757{
 758	struct mcp23s08_platform_data *pdata, local_pdata;
 759	struct mcp23s08 *mcp;
 760	int status;
 761	const struct of_device_id *match;
 762
 763	match = of_match_device(of_match_ptr(mcp23s08_i2c_of_match),
 764					&client->dev);
 765	if (match) {
 766		pdata = &local_pdata;
 767		pdata->base = -1;
 768		pdata->chip[0].pullups = 0;
 769		pdata->irq_controller =	of_property_read_bool(
 770					client->dev.of_node,
 771					"interrupt-controller");
 772		pdata->mirror = of_property_read_bool(client->dev.of_node,
 773						      "microchip,irq-mirror");
 774		client->irq = irq_of_parse_and_map(client->dev.of_node, 0);
 775	} else {
 776		pdata = dev_get_platdata(&client->dev);
 777		if (!pdata) {
 778			pdata = devm_kzalloc(&client->dev,
 779					sizeof(struct mcp23s08_platform_data),
 780					GFP_KERNEL);
 781			if (!pdata)
 782				return -ENOMEM;
 783			pdata->base = -1;
 784		}
 785	}
 786
 787	mcp = kzalloc(sizeof(*mcp), GFP_KERNEL);
 788	if (!mcp)
 789		return -ENOMEM;
 790
 791	mcp->irq = client->irq;
 792	status = mcp23s08_probe_one(mcp, &client->dev, client, client->addr,
 793				    id->driver_data, pdata, 0);
 794	if (status)
 795		goto fail;
 796
 797	i2c_set_clientdata(client, mcp);
 798
 799	return 0;
 800
 801fail:
 802	kfree(mcp);
 803
 804	return status;
 805}
 806
 807static int mcp230xx_remove(struct i2c_client *client)
 808{
 809	struct mcp23s08 *mcp = i2c_get_clientdata(client);
 810
 811	gpiochip_remove(&mcp->chip);
 812	kfree(mcp);
 813
 814	return 0;
 815}
 816
 817static const struct i2c_device_id mcp230xx_id[] = {
 818	{ "mcp23008", MCP_TYPE_008 },
 819	{ "mcp23017", MCP_TYPE_017 },
 820	{ },
 821};
 822MODULE_DEVICE_TABLE(i2c, mcp230xx_id);
 823
 824static struct i2c_driver mcp230xx_driver = {
 825	.driver = {
 826		.name	= "mcp230xx",
 827		.of_match_table = of_match_ptr(mcp23s08_i2c_of_match),
 828	},
 829	.probe		= mcp230xx_probe,
 830	.remove		= mcp230xx_remove,
 831	.id_table	= mcp230xx_id,
 832};
 833
 834static int __init mcp23s08_i2c_init(void)
 835{
 836	return i2c_add_driver(&mcp230xx_driver);
 837}
 838
 839static void mcp23s08_i2c_exit(void)
 840{
 841	i2c_del_driver(&mcp230xx_driver);
 842}
 843
 844#else
 845
 846static int __init mcp23s08_i2c_init(void) { return 0; }
 847static void mcp23s08_i2c_exit(void) { }
 848
 849#endif /* CONFIG_I2C */
 850
 851/*----------------------------------------------------------------------*/
 852
 853#ifdef CONFIG_SPI_MASTER
 854
 855static int mcp23s08_probe(struct spi_device *spi)
 856{
 857	struct mcp23s08_platform_data	*pdata, local_pdata;
 858	unsigned			addr;
 859	int				chips = 0;
 860	struct mcp23s08_driver_data	*data;
 861	int				status, type;
 862	unsigned			ngpio = 0;
 863	const struct			of_device_id *match;
 864	u32				spi_present_mask = 0;
 865
 866	match = of_match_device(of_match_ptr(mcp23s08_spi_of_match), &spi->dev);
 867	if (match) {
 868		type = (int)(uintptr_t)match->data;
 869		status = of_property_read_u32(spi->dev.of_node,
 870			    "microchip,spi-present-mask", &spi_present_mask);
 871		if (status) {
 872			status = of_property_read_u32(spi->dev.of_node,
 873				    "mcp,spi-present-mask", &spi_present_mask);
 874			if (status) {
 875				dev_err(&spi->dev,
 876					"DT has no spi-present-mask\n");
 877				return -ENODEV;
 878			}
 879		}
 880		if ((spi_present_mask <= 0) || (spi_present_mask >= 256)) {
 881			dev_err(&spi->dev, "invalid spi-present-mask\n");
 882			return -ENODEV;
 883		}
 884
 885		pdata = &local_pdata;
 886		pdata->base = -1;
 887		for (addr = 0; addr < ARRAY_SIZE(pdata->chip); addr++) {
 888			pdata->chip[addr].pullups = 0;
 889			if (spi_present_mask & (1 << addr))
 890				chips++;
 891		}
 892		pdata->irq_controller =	of_property_read_bool(
 893					spi->dev.of_node,
 894					"interrupt-controller");
 895		pdata->mirror = of_property_read_bool(spi->dev.of_node,
 896						      "microchip,irq-mirror");
 897	} else {
 898		type = spi_get_device_id(spi)->driver_data;
 899		pdata = dev_get_platdata(&spi->dev);
 900		if (!pdata) {
 901			pdata = devm_kzalloc(&spi->dev,
 902					sizeof(struct mcp23s08_platform_data),
 903					GFP_KERNEL);
 904			pdata->base = -1;
 905		}
 906
 907		for (addr = 0; addr < ARRAY_SIZE(pdata->chip); addr++) {
 908			if (!pdata->chip[addr].is_present)
 909				continue;
 910			chips++;
 911			if ((type == MCP_TYPE_S08) && (addr > 3)) {
 912				dev_err(&spi->dev,
 913					"mcp23s08 only supports address 0..3\n");
 914				return -EINVAL;
 915			}
 916			spi_present_mask |= 1 << addr;
 917		}
 918	}
 919
 920	if (!chips)
 921		return -ENODEV;
 922
 923	data = devm_kzalloc(&spi->dev,
 924			    sizeof(*data) + chips * sizeof(struct mcp23s08),
 925			    GFP_KERNEL);
 926	if (!data)
 927		return -ENOMEM;
 928
 929	spi_set_drvdata(spi, data);
 930
 931	spi->irq = irq_of_parse_and_map(spi->dev.of_node, 0);
 932
 933	for (addr = 0; addr < ARRAY_SIZE(pdata->chip); addr++) {
 934		if (!(spi_present_mask & (1 << addr)))
 935			continue;
 936		chips--;
 937		data->mcp[addr] = &data->chip[chips];
 938		data->mcp[addr]->irq = spi->irq;
 939		status = mcp23s08_probe_one(data->mcp[addr], &spi->dev, spi,
 940					    0x40 | (addr << 1), type, pdata,
 941					    addr);
 942		if (status < 0)
 943			goto fail;
 944
 945		if (pdata->base != -1)
 946			pdata->base += data->mcp[addr]->chip.ngpio;
 947		ngpio += data->mcp[addr]->chip.ngpio;
 948	}
 949	data->ngpio = ngpio;
 950
 951	/* NOTE:  these chips have a relatively sane IRQ framework, with
 952	 * per-signal masking and level/edge triggering.  It's not yet
 953	 * handled here...
 954	 */
 955
 956	return 0;
 957
 958fail:
 959	for (addr = 0; addr < ARRAY_SIZE(data->mcp); addr++) {
 960
 961		if (!data->mcp[addr])
 962			continue;
 963		gpiochip_remove(&data->mcp[addr]->chip);
 964	}
 965	return status;
 966}
 967
 968static int mcp23s08_remove(struct spi_device *spi)
 969{
 970	struct mcp23s08_driver_data	*data = spi_get_drvdata(spi);
 971	unsigned			addr;
 972
 973	for (addr = 0; addr < ARRAY_SIZE(data->mcp); addr++) {
 974
 975		if (!data->mcp[addr])
 976			continue;
 977
 978		gpiochip_remove(&data->mcp[addr]->chip);
 979	}
 980
 981	return 0;
 982}
 983
 984static const struct spi_device_id mcp23s08_ids[] = {
 985	{ "mcp23s08", MCP_TYPE_S08 },
 986	{ "mcp23s17", MCP_TYPE_S17 },
 987	{ "mcp23s18", MCP_TYPE_S18 },
 988	{ },
 989};
 990MODULE_DEVICE_TABLE(spi, mcp23s08_ids);
 991
 992static struct spi_driver mcp23s08_driver = {
 993	.probe		= mcp23s08_probe,
 994	.remove		= mcp23s08_remove,
 995	.id_table	= mcp23s08_ids,
 996	.driver = {
 997		.name	= "mcp23s08",
 998		.of_match_table = of_match_ptr(mcp23s08_spi_of_match),
 999	},
1000};
1001
1002static int __init mcp23s08_spi_init(void)
1003{
1004	return spi_register_driver(&mcp23s08_driver);
1005}
1006
1007static void mcp23s08_spi_exit(void)
1008{
1009	spi_unregister_driver(&mcp23s08_driver);
1010}
1011
1012#else
1013
1014static int __init mcp23s08_spi_init(void) { return 0; }
1015static void mcp23s08_spi_exit(void) { }
1016
1017#endif /* CONFIG_SPI_MASTER */
1018
1019/*----------------------------------------------------------------------*/
1020
1021static int __init mcp23s08_init(void)
1022{
1023	int ret;
1024
1025	ret = mcp23s08_spi_init();
1026	if (ret)
1027		goto spi_fail;
1028
1029	ret = mcp23s08_i2c_init();
1030	if (ret)
1031		goto i2c_fail;
1032
1033	return 0;
1034
1035 i2c_fail:
1036	mcp23s08_spi_exit();
1037 spi_fail:
1038	return ret;
1039}
1040/* register after spi/i2c postcore initcall and before
1041 * subsys initcalls that may rely on these GPIOs
1042 */
1043subsys_initcall(mcp23s08_init);
1044
1045static void __exit mcp23s08_exit(void)
1046{
1047	mcp23s08_spi_exit();
1048	mcp23s08_i2c_exit();
1049}
1050module_exit(mcp23s08_exit);
1051
1052MODULE_LICENSE("GPL");