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1/* SPDX-License-Identifier: GPL-2.0 */
2#include <asm/asm-offsets.h>
3#include <asm/thread_info.h>
4
5#define PAGE_SIZE _PAGE_SIZE
6
7/*
8 * Put .bss..swapper_pg_dir as the first thing in .bss. This will
9 * ensure that it has .bss alignment (64K).
10 */
11#define BSS_FIRST_SECTIONS *(.bss..swapper_pg_dir)
12
13/* Cavium Octeon should not have a separate PT_NOTE Program Header. */
14#ifndef CONFIG_CAVIUM_OCTEON_SOC
15#define EMITS_PT_NOTE
16#endif
17
18#include <asm-generic/vmlinux.lds.h>
19
20#undef mips
21#define mips mips
22OUTPUT_ARCH(mips)
23ENTRY(kernel_entry)
24PHDRS {
25 text PT_LOAD FLAGS(7); /* RWX */
26#ifndef CONFIG_CAVIUM_OCTEON_SOC
27 note PT_NOTE FLAGS(4); /* R__ */
28#endif /* CAVIUM_OCTEON_SOC */
29}
30
31#ifdef CONFIG_32BIT
32 #ifdef CONFIG_CPU_LITTLE_ENDIAN
33 jiffies = jiffies_64;
34 #else
35 jiffies = jiffies_64 + 4;
36 #endif
37#else
38 jiffies = jiffies_64;
39#endif
40
41SECTIONS
42{
43#ifdef CONFIG_BOOT_ELF64
44 /* Read-only sections, merged into text segment: */
45 /* . = 0xc000000000000000; */
46
47 /* This is the value for an Origin kernel, taken from an IRIX kernel. */
48 /* . = 0xc00000000001c000; */
49
50 /* Set the vaddr for the text segment to a value
51 * >= 0xa800 0000 0001 9000 if no symmon is going to configured
52 * >= 0xa800 0000 0030 0000 otherwise
53 */
54
55 /* . = 0xa800000000300000; */
56 . = 0xffffffff80300000;
57#endif
58 . = LINKER_LOAD_ADDRESS;
59 /* read-only */
60 _text = .; /* Text and read-only data */
61 .text : {
62 TEXT_TEXT
63 SCHED_TEXT
64 CPUIDLE_TEXT
65 LOCK_TEXT
66 KPROBES_TEXT
67 IRQENTRY_TEXT
68 SOFTIRQENTRY_TEXT
69 *(.fixup)
70 *(.gnu.warning)
71 . = ALIGN(16);
72 *(.got) /* Global offset table */
73 } :text = 0
74 _etext = .; /* End of text section */
75
76 EXCEPTION_TABLE(16)
77
78 /* Exception table for data bus errors */
79 __dbe_table : {
80 __start___dbe_table = .;
81 KEEP(*(__dbe_table))
82 __stop___dbe_table = .;
83 }
84
85 _sdata = .; /* Start of data section */
86 RO_DATA(4096)
87
88 /* writeable */
89 .data : { /* Data */
90 . = . + DATAOFFSET; /* for CONFIG_MAPPED_KERNEL */
91
92 INIT_TASK_DATA(THREAD_SIZE)
93 NOSAVE_DATA
94 PAGE_ALIGNED_DATA(PAGE_SIZE)
95 CACHELINE_ALIGNED_DATA(1 << CONFIG_MIPS_L1_CACHE_SHIFT)
96 READ_MOSTLY_DATA(1 << CONFIG_MIPS_L1_CACHE_SHIFT)
97 DATA_DATA
98 CONSTRUCTORS
99 }
100 BUG_TABLE
101 _gp = . + 0x8000;
102 .lit8 : {
103 *(.lit8)
104 }
105 .lit4 : {
106 *(.lit4)
107 }
108 /* We want the small data sections together, so single-instruction offsets
109 can access them all, and initialized data all before uninitialized, so
110 we can shorten the on-disk segment size. */
111 .sdata : {
112 *(.sdata)
113 }
114 _edata = .; /* End of data section */
115
116 /* will be freed after init */
117 . = ALIGN(PAGE_SIZE); /* Init code and data */
118 __init_begin = .;
119 INIT_TEXT_SECTION(PAGE_SIZE)
120 INIT_DATA_SECTION(16)
121
122 . = ALIGN(4);
123 .mips.machines.init : AT(ADDR(.mips.machines.init) - LOAD_OFFSET) {
124 __mips_machines_start = .;
125 KEEP(*(.mips.machines.init))
126 __mips_machines_end = .;
127 }
128
129 /* .exit.text is discarded at runtime, not link time, to deal with
130 * references from .rodata
131 */
132 .exit.text : {
133 EXIT_TEXT
134 }
135 .exit.data : {
136 EXIT_DATA
137 }
138#ifdef CONFIG_SMP
139 PERCPU_SECTION(1 << CONFIG_MIPS_L1_CACHE_SHIFT)
140#endif
141
142 .rel.dyn : ALIGN(8) {
143 *(.rel)
144 *(.rel*)
145 }
146
147#ifdef CONFIG_MIPS_ELF_APPENDED_DTB
148 STRUCT_ALIGN();
149 .appended_dtb : AT(ADDR(.appended_dtb) - LOAD_OFFSET) {
150 *(.appended_dtb)
151 KEEP(*(.appended_dtb))
152 }
153#endif
154
155#ifdef CONFIG_RELOCATABLE
156 . = ALIGN(4);
157
158 .data.reloc : {
159 _relocation_start = .;
160 /*
161 * Space for relocation table
162 * This needs to be filled so that the
163 * relocs tool can overwrite the content.
164 * An invalid value is left at the start of the
165 * section to abort relocation if the table
166 * has not been filled in.
167 */
168 LONG(0xFFFFFFFF);
169 FILL(0);
170 . += CONFIG_RELOCATION_TABLE_SIZE - 4;
171 _relocation_end = .;
172 }
173#endif
174
175#ifdef CONFIG_MIPS_RAW_APPENDED_DTB
176 .fill : {
177 FILL(0);
178 BYTE(0);
179 STRUCT_ALIGN();
180 }
181 __appended_dtb = .;
182 /* leave space for appended DTB */
183 . += 0x100000;
184#endif
185 /*
186 * Align to 64K in attempt to eliminate holes before the
187 * .bss..swapper_pg_dir section at the start of .bss. This
188 * also satisfies PAGE_SIZE alignment as the largest page size
189 * allowed is 64K.
190 */
191 . = ALIGN(0x10000);
192 __init_end = .;
193 /* freed after init ends here */
194
195 /*
196 * Force .bss to 64K alignment so that .bss..swapper_pg_dir
197 * gets that alignment. .sbss should be empty, so there will be
198 * no holes after __init_end. */
199 BSS_SECTION(0, 0x10000, 8)
200
201 _end = . ;
202
203 /* These mark the ABI of the kernel for debuggers. */
204 .mdebug.abi32 : {
205 KEEP(*(.mdebug.abi32))
206 }
207 .mdebug.abi64 : {
208 KEEP(*(.mdebug.abi64))
209 }
210
211 /* This is the MIPS specific mdebug section. */
212 .mdebug : {
213 *(.mdebug)
214 }
215
216 STABS_DEBUG
217 DWARF_DEBUG
218 ELF_DETAILS
219
220 /* These must appear regardless of . */
221 .gptab.sdata : {
222 *(.gptab.data)
223 *(.gptab.sdata)
224 }
225 .gptab.sbss : {
226 *(.gptab.bss)
227 *(.gptab.sbss)
228 }
229
230 /* Sections to be discarded */
231 DISCARDS
232 /DISCARD/ : {
233 /* ABI crap starts here */
234 *(.MIPS.abiflags)
235 *(.MIPS.options)
236 *(.gnu.attributes)
237 *(.options)
238 *(.pdr)
239 *(.reginfo)
240 }
241}
1#include <asm/asm-offsets.h>
2#include <asm/thread_info.h>
3
4#define PAGE_SIZE _PAGE_SIZE
5
6/*
7 * Put .bss..swapper_pg_dir as the first thing in .bss. This will
8 * ensure that it has .bss alignment (64K).
9 */
10#define BSS_FIRST_SECTIONS *(.bss..swapper_pg_dir)
11
12#include <asm-generic/vmlinux.lds.h>
13
14#undef mips
15#define mips mips
16OUTPUT_ARCH(mips)
17ENTRY(kernel_entry)
18PHDRS {
19 text PT_LOAD FLAGS(7); /* RWX */
20#ifndef CONFIG_CAVIUM_OCTEON_SOC
21 note PT_NOTE FLAGS(4); /* R__ */
22#endif /* CAVIUM_OCTEON_SOC */
23}
24
25#ifdef CONFIG_32BIT
26 #ifdef CONFIG_CPU_LITTLE_ENDIAN
27 jiffies = jiffies_64;
28 #else
29 jiffies = jiffies_64 + 4;
30 #endif
31#else
32 jiffies = jiffies_64;
33#endif
34
35SECTIONS
36{
37#ifdef CONFIG_BOOT_ELF64
38 /* Read-only sections, merged into text segment: */
39 /* . = 0xc000000000000000; */
40
41 /* This is the value for an Origin kernel, taken from an IRIX kernel. */
42 /* . = 0xc00000000001c000; */
43
44 /* Set the vaddr for the text segment to a value
45 * >= 0xa800 0000 0001 9000 if no symmon is going to configured
46 * >= 0xa800 0000 0030 0000 otherwise
47 */
48
49 /* . = 0xa800000000300000; */
50 . = 0xffffffff80300000;
51#endif
52 . = VMLINUX_LOAD_ADDRESS;
53 /* read-only */
54 _text = .; /* Text and read-only data */
55 .text : {
56 TEXT_TEXT
57 SCHED_TEXT
58 CPUIDLE_TEXT
59 LOCK_TEXT
60 KPROBES_TEXT
61 IRQENTRY_TEXT
62 SOFTIRQENTRY_TEXT
63 *(.text.*)
64 *(.fixup)
65 *(.gnu.warning)
66 } :text = 0
67 _etext = .; /* End of text section */
68
69 EXCEPTION_TABLE(16)
70
71 /* Exception table for data bus errors */
72 __dbe_table : {
73 __start___dbe_table = .;
74 *(__dbe_table)
75 __stop___dbe_table = .;
76 }
77
78#ifdef CONFIG_CAVIUM_OCTEON_SOC
79#define NOTES_HEADER
80#else /* CONFIG_CAVIUM_OCTEON_SOC */
81#define NOTES_HEADER :note
82#endif /* CONFIG_CAVIUM_OCTEON_SOC */
83 NOTES :text NOTES_HEADER
84 .dummy : { *(.dummy) } :text
85
86 _sdata = .; /* Start of data section */
87 RODATA
88
89 /* writeable */
90 .data : { /* Data */
91 . = . + DATAOFFSET; /* for CONFIG_MAPPED_KERNEL */
92
93 INIT_TASK_DATA(THREAD_SIZE)
94 NOSAVE_DATA
95 CACHELINE_ALIGNED_DATA(1 << CONFIG_MIPS_L1_CACHE_SHIFT)
96 READ_MOSTLY_DATA(1 << CONFIG_MIPS_L1_CACHE_SHIFT)
97 DATA_DATA
98 CONSTRUCTORS
99 }
100 _gp = . + 0x8000;
101 .lit8 : {
102 *(.lit8)
103 }
104 .lit4 : {
105 *(.lit4)
106 }
107 /* We want the small data sections together, so single-instruction offsets
108 can access them all, and initialized data all before uninitialized, so
109 we can shorten the on-disk segment size. */
110 .sdata : {
111 *(.sdata)
112 }
113 _edata = .; /* End of data section */
114
115 /* will be freed after init */
116 . = ALIGN(PAGE_SIZE); /* Init code and data */
117 __init_begin = .;
118 INIT_TEXT_SECTION(PAGE_SIZE)
119 INIT_DATA_SECTION(16)
120
121 . = ALIGN(4);
122 .mips.machines.init : AT(ADDR(.mips.machines.init) - LOAD_OFFSET) {
123 __mips_machines_start = .;
124 *(.mips.machines.init)
125 __mips_machines_end = .;
126 }
127
128 /* .exit.text is discarded at runtime, not link time, to deal with
129 * references from .rodata
130 */
131 .exit.text : {
132 EXIT_TEXT
133 }
134 .exit.data : {
135 EXIT_DATA
136 }
137#ifdef CONFIG_SMP
138 PERCPU_SECTION(1 << CONFIG_MIPS_L1_CACHE_SHIFT)
139#endif
140
141#ifdef CONFIG_RELOCATABLE
142 . = ALIGN(4);
143
144 .data.reloc : {
145 _relocation_start = .;
146 /*
147 * Space for relocation table
148 * This needs to be filled so that the
149 * relocs tool can overwrite the content.
150 * An invalid value is left at the start of the
151 * section to abort relocation if the table
152 * has not been filled in.
153 */
154 LONG(0xFFFFFFFF);
155 FILL(0);
156 . += CONFIG_RELOCATION_TABLE_SIZE - 4;
157 _relocation_end = .;
158 }
159#endif
160
161#ifdef CONFIG_MIPS_RAW_APPENDED_DTB
162 __appended_dtb = .;
163 /* leave space for appended DTB */
164 . += 0x100000;
165#elif defined(CONFIG_MIPS_ELF_APPENDED_DTB)
166 .appended_dtb : AT(ADDR(.appended_dtb) - LOAD_OFFSET) {
167 *(.appended_dtb)
168 KEEP(*(.appended_dtb))
169 }
170#endif
171 /*
172 * Align to 64K in attempt to eliminate holes before the
173 * .bss..swapper_pg_dir section at the start of .bss. This
174 * also satisfies PAGE_SIZE alignment as the largest page size
175 * allowed is 64K.
176 */
177 . = ALIGN(0x10000);
178 __init_end = .;
179 /* freed after init ends here */
180
181 /*
182 * Force .bss to 64K alignment so that .bss..swapper_pg_dir
183 * gets that alignment. .sbss should be empty, so there will be
184 * no holes after __init_end. */
185 BSS_SECTION(0, 0x10000, 0)
186
187 _end = . ;
188
189 /* These mark the ABI of the kernel for debuggers. */
190 .mdebug.abi32 : {
191 KEEP(*(.mdebug.abi32))
192 }
193 .mdebug.abi64 : {
194 KEEP(*(.mdebug.abi64))
195 }
196
197 /* This is the MIPS specific mdebug section. */
198 .mdebug : {
199 *(.mdebug)
200 }
201
202 STABS_DEBUG
203 DWARF_DEBUG
204
205 /* These must appear regardless of . */
206 .gptab.sdata : {
207 *(.gptab.data)
208 *(.gptab.sdata)
209 }
210 .gptab.sbss : {
211 *(.gptab.bss)
212 *(.gptab.sbss)
213 }
214
215 /* Sections to be discarded */
216 DISCARDS
217 /DISCARD/ : {
218 /* ABI crap starts here */
219 *(.MIPS.abiflags)
220 *(.MIPS.options)
221 *(.options)
222 *(.pdr)
223 *(.reginfo)
224 *(.eh_frame)
225 }
226}