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v6.2
  1// SPDX-License-Identifier: GPL-2.0
  2/dts-v1/;
  3
  4#include <dt-bindings/input/input.h>
  5#include "tegra20.dtsi"
  6#include "tegra20-cpu-opp.dtsi"
  7
  8/ {
  9	model = "Compulab TrimSlice board";
 10	compatible = "compulab,trimslice", "nvidia,tegra20";
 11
 12	aliases {
 13		rtc0 = "/i2c@7000c500/rtc@56";
 14		rtc1 = "/rtc@7000e000";
 15		serial0 = &uarta;
 16	};
 17
 18	chosen {
 19		stdout-path = "serial0:115200n8";
 20	};
 21
 22	memory@0 {
 23		reg = <0x00000000 0x40000000>;
 24	};
 25
 26	host1x@50000000 {
 27		hdmi@54280000 {
 28			status = "okay";
 29
 30			vdd-supply = <&hdmi_vdd_reg>;
 31			pll-supply = <&hdmi_pll_reg>;
 32
 33			nvidia,ddc-i2c-bus = <&hdmi_ddc>;
 34			nvidia,hpd-gpio = <&gpio TEGRA_GPIO(N, 7)
 35				GPIO_ACTIVE_HIGH>;
 36		};
 37	};
 38
 39	pinmux@70000014 {
 40		pinctrl-names = "default";
 41		pinctrl-0 = <&state_default>;
 42
 43		state_default: pinmux {
 44			ata {
 45				nvidia,pins = "ata";
 46				nvidia,function = "ide";
 47			};
 48			atb {
 49				nvidia,pins = "atb", "gma";
 50				nvidia,function = "sdio4";
 51			};
 52			atc {
 53				nvidia,pins = "atc", "gmb";
 54				nvidia,function = "nand";
 55			};
 56			atd {
 57				nvidia,pins = "atd", "ate", "gme", "pta";
 58				nvidia,function = "gmi";
 59			};
 60			cdev1 {
 61				nvidia,pins = "cdev1";
 62				nvidia,function = "plla_out";
 63			};
 64			cdev2 {
 65				nvidia,pins = "cdev2";
 66				nvidia,function = "pllp_out4";
 67			};
 68			crtp {
 69				nvidia,pins = "crtp";
 70				nvidia,function = "crt";
 71			};
 72			csus {
 73				nvidia,pins = "csus";
 74				nvidia,function = "vi_sensor_clk";
 75			};
 76			dap1 {
 77				nvidia,pins = "dap1";
 78				nvidia,function = "dap1";
 79			};
 80			dap2 {
 81				nvidia,pins = "dap2";
 82				nvidia,function = "dap2";
 83			};
 84			dap3 {
 85				nvidia,pins = "dap3";
 86				nvidia,function = "dap3";
 87			};
 88			dap4 {
 89				nvidia,pins = "dap4";
 90				nvidia,function = "dap4";
 91			};
 92			ddc {
 93				nvidia,pins = "ddc";
 94				nvidia,function = "i2c2";
 95			};
 96			dta {
 97				nvidia,pins = "dta", "dtb", "dtc", "dtd", "dte";
 98				nvidia,function = "vi";
 99			};
100			dtf {
101				nvidia,pins = "dtf";
102				nvidia,function = "i2c3";
103			};
104			gmc {
105				nvidia,pins = "gmc", "gmd";
106				nvidia,function = "sflash";
107			};
108			gpu {
109				nvidia,pins = "gpu";
110				nvidia,function = "uarta";
111			};
112			gpu7 {
113				nvidia,pins = "gpu7";
114				nvidia,function = "rtck";
115			};
116			gpv {
117				nvidia,pins = "gpv", "slxa", "slxk";
118				nvidia,function = "pcie";
119			};
120			hdint {
121				nvidia,pins = "hdint";
122				nvidia,function = "hdmi";
123			};
124			i2cp {
125				nvidia,pins = "i2cp";
126				nvidia,function = "i2cp";
127			};
128			irrx {
129				nvidia,pins = "irrx", "irtx";
130				nvidia,function = "uartb";
131			};
132			kbca {
133				nvidia,pins = "kbca", "kbcb", "kbcc", "kbcd",
134					"kbce", "kbcf";
135				nvidia,function = "kbc";
136			};
137			lcsn {
138				nvidia,pins = "lcsn", "ld0", "ld1", "ld2",
139					"ld3", "ld4", "ld5", "ld6", "ld7",
140					"ld8", "ld9", "ld10", "ld11", "ld12",
141					"ld13", "ld14", "ld15", "ld16", "ld17",
142					"ldc", "ldi", "lhp0", "lhp1", "lhp2",
143					"lhs", "lm0", "lm1", "lpp", "lpw0",
144					"lpw1", "lpw2", "lsc0", "lsc1", "lsck",
145					"lsda", "lsdi", "lspi", "lvp0", "lvp1",
146					"lvs";
147				nvidia,function = "displaya";
148			};
149			owc {
150				nvidia,pins = "owc", "uac";
151				nvidia,function = "rsvd2";
152			};
153			pmc {
154				nvidia,pins = "pmc";
155				nvidia,function = "pwr_on";
156			};
157			rm {
158				nvidia,pins = "rm";
159				nvidia,function = "i2c1";
160			};
161			sdb {
162				nvidia,pins = "sdb", "sdc", "sdd";
163				nvidia,function = "pwm";
164			};
165			sdio1 {
166				nvidia,pins = "sdio1";
167				nvidia,function = "sdio1";
168			};
169			slxc {
170				nvidia,pins = "slxc", "slxd";
171				nvidia,function = "sdio3";
172			};
173			spdi {
174				nvidia,pins = "spdi", "spdo";
175				nvidia,function = "spdif";
176			};
177			spia {
178				nvidia,pins = "spia", "spib", "spic";
179				nvidia,function = "spi2";
180			};
181			spid {
182				nvidia,pins = "spid", "spie", "spif";
183				nvidia,function = "spi1";
184			};
185			spig {
186				nvidia,pins = "spig", "spih";
187				nvidia,function = "spi2_alt";
188			};
189			uaa {
190				nvidia,pins = "uaa", "uab", "uda";
191				nvidia,function = "ulpi";
192			};
193			uad {
194				nvidia,pins = "uad";
195				nvidia,function = "irda";
196			};
197			uca {
198				nvidia,pins = "uca", "ucb";
199				nvidia,function = "uartc";
200			};
201			conf_ata {
202				nvidia,pins = "ata", "atc", "atd", "ate",
203					"crtp", "dap2", "dap3", "dap4", "dta",
204					"dtb", "dtc", "dtd", "dte", "gmb",
205					"gme", "i2cp", "pta", "slxc", "slxd",
206					"spdi", "spdo", "uda";
207				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
208				nvidia,tristate = <TEGRA_PIN_ENABLE>;
209			};
210			conf_atb {
211				nvidia,pins = "atb", "cdev1", "cdev2", "dap1",
212					"gma", "gmc", "gmd", "gpu", "gpu7",
213					"gpv", "sdio1", "slxa", "slxk", "uac";
214				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
215				nvidia,tristate = <TEGRA_PIN_DISABLE>;
216			};
217			conf_ck32 {
218				nvidia,pins = "ck32", "ddrc", "pmca", "pmcb",
219					"pmcc", "pmcd", "pmce", "xm2c", "xm2d";
220				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
221			};
222			conf_csus {
223				nvidia,pins = "csus", "spia", "spib",
224					"spid", "spif";
225				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
226				nvidia,tristate = <TEGRA_PIN_ENABLE>;
227			};
228			conf_ddc {
229				nvidia,pins = "ddc", "dtf", "rm", "sdc", "sdd";
230				nvidia,pull = <TEGRA_PIN_PULL_UP>;
231				nvidia,tristate = <TEGRA_PIN_DISABLE>;
232			};
233			conf_hdint {
234				nvidia,pins = "hdint", "lcsn", "ldc", "lm1",
235					"lpw1", "lsc1", "lsck", "lsda", "lsdi",
236					"lvp0", "pmc";
237				nvidia,tristate = <TEGRA_PIN_ENABLE>;
238			};
239			conf_irrx {
240				nvidia,pins = "irrx", "irtx", "kbca", "kbcb",
241					"kbcc", "kbcd", "kbce", "kbcf", "owc",
242					"spic", "spie", "spig", "spih", "uaa",
243					"uab", "uad", "uca", "ucb";
244				nvidia,pull = <TEGRA_PIN_PULL_UP>;
245				nvidia,tristate = <TEGRA_PIN_ENABLE>;
246			};
247			conf_lc {
248				nvidia,pins = "lc", "ls";
249				nvidia,pull = <TEGRA_PIN_PULL_UP>;
250			};
251			conf_ld0 {
252				nvidia,pins = "ld0", "ld1", "ld2", "ld3", "ld4",
253					"ld5", "ld6", "ld7", "ld8", "ld9",
254					"ld10", "ld11", "ld12", "ld13", "ld14",
255					"ld15", "ld16", "ld17", "ldi", "lhp0",
256					"lhp1", "lhp2", "lhs", "lm0", "lpp",
257					"lpw0", "lpw2", "lsc0", "lspi", "lvp1",
258					"lvs", "sdb";
259				nvidia,tristate = <TEGRA_PIN_DISABLE>;
260			};
261			conf_ld17_0 {
262				nvidia,pins = "ld17_0", "ld19_18", "ld21_20",
263					"ld23_22";
264				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
265			};
266			conf_spif {
267				nvidia,pins = "spif";
268				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
269				nvidia,tristate = <TEGRA_PIN_DISABLE>;
270			};
271		};
272	};
273
274	i2s@70002800 {
275		status = "okay";
276	};
277
278	serial@70006000 {
279		status = "okay";
280	};
281
282	dvi_ddc: i2c@7000c000 {
283		status = "okay";
284		clock-frequency = <100000>;
285	};
286
287	spi@7000c380 {
288		status = "okay";
289		spi-max-frequency = <48000000>;
290
291		flash@0 {
292			compatible = "winbond,w25q80bl", "jedec,spi-nor";
293			reg = <0>;
294			spi-max-frequency = <48000000>;
295		};
296	};
297
298	hdmi_ddc: i2c@7000c400 {
299		status = "okay";
300		clock-frequency = <100000>;
301	};
302
303	i2c@7000c500 {
304		status = "okay";
305		clock-frequency = <400000>;
306
307		codec: codec@1a {
308			compatible = "ti,tlv320aic23";
309			reg = <0x1a>;
310		};
311
312		rtc@56 {
313			compatible = "emmicro,em3027";
314			reg = <0x56>;
315		};
316	};
317
318	pmc@7000e400 {
319		nvidia,suspend-mode = <1>;
320		nvidia,cpu-pwr-good-time = <5000>;
321		nvidia,cpu-pwr-off-time = <5000>;
322		nvidia,core-pwr-good-time = <3845 3845>;
323		nvidia,core-pwr-off-time = <3875>;
324		nvidia,sys-clock-req-active-high;
325		core-supply = <&vdd_core>;
326	};
327
328	pcie@80003000 {
329		status = "okay";
330
331		avdd-pex-supply = <&pci_vdd_reg>;
332		vdd-pex-supply = <&pci_vdd_reg>;
333		avdd-pex-pll-supply = <&pci_vdd_reg>;
334		avdd-plle-supply = <&pci_vdd_reg>;
335		vddio-pex-clk-supply = <&pci_clk_reg>;
336
337		pci@1,0 {
338			status = "okay";
339		};
340	};
341
342	usb@c5000000 {
343		status = "okay";
344	};
345
346	usb-phy@c5000000 {
347		status = "okay";
348		vbus-supply = <&vbus_reg>;
349	};
350
351	usb@c5004000 {
352		status = "okay";
 
 
353	};
354
355	usb-phy@c5004000 {
356		status = "okay";
357		nvidia,phy-reset-gpio = <&gpio TEGRA_GPIO(V, 0)
358			GPIO_ACTIVE_LOW>;
359	};
360
361	usb@c5008000 {
362		status = "okay";
363	};
364
365	usb-phy@c5008000 {
366		status = "okay";
367	};
368
369	mmc@c8000000 {
370		status = "okay";
371		broken-cd;
372		bus-width = <4>;
373	};
374
375	mmc@c8000600 {
376		status = "okay";
377		cd-gpios = <&gpio TEGRA_GPIO(P, 1) GPIO_ACTIVE_LOW>;
378		wp-gpios = <&gpio TEGRA_GPIO(P, 2) GPIO_ACTIVE_HIGH>;
379		bus-width = <4>;
380	};
381
382	clk32k_in: clock-32k {
383		compatible = "fixed-clock";
384		clock-frequency = <32768>;
385		#clock-cells = <0>;
 
 
 
 
 
 
 
386	};
387
388	gpio-keys {
389		compatible = "gpio-keys";
390
391		key-power {
392			label = "Power";
393			gpios = <&gpio TEGRA_GPIO(X, 6) GPIO_ACTIVE_LOW>;
394			linux,code = <KEY_POWER>;
395			wakeup-source;
396		};
397	};
398
399	poweroff {
400		compatible = "gpio-poweroff";
401		gpios = <&gpio TEGRA_GPIO(X, 7) GPIO_ACTIVE_LOW>;
402	};
403
404	hdmi_vdd_reg: regulator-hdmi {
405		compatible = "regulator-fixed";
406		regulator-name = "avdd_hdmi";
407		regulator-min-microvolt = <3300000>;
408		regulator-max-microvolt = <3300000>;
409		regulator-always-on;
410	};
411
412	hdmi_pll_reg: regulator-hdmipll {
413		compatible = "regulator-fixed";
414		regulator-name = "avdd_hdmi_pll";
415		regulator-min-microvolt = <1800000>;
416		regulator-max-microvolt = <1800000>;
417		regulator-always-on;
418	};
419
420	vbus_reg: regulator-vbus {
421		compatible = "regulator-fixed";
422		regulator-name = "usb1_vbus";
423		regulator-min-microvolt = <5000000>;
424		regulator-max-microvolt = <5000000>;
425		enable-active-high;
426		gpio = <&gpio TEGRA_GPIO(V, 2) 0>;
427		regulator-always-on;
428		regulator-boot-on;
429	};
430
431	pci_clk_reg: regulator-pciclk {
432		compatible = "regulator-fixed";
433		regulator-name = "pci_clk";
434		regulator-min-microvolt = <3300000>;
435		regulator-max-microvolt = <3300000>;
436		regulator-always-on;
437	};
438
439	pci_vdd_reg: regulator-pcivdd {
440		compatible = "regulator-fixed";
441		regulator-name = "pci_vdd";
442		regulator-min-microvolt = <1050000>;
443		regulator-max-microvolt = <1050000>;
444		regulator-always-on;
445	};
446
447	vdd_core: regulator-core {
448		compatible = "regulator-fixed";
449		regulator-name = "vdd_core";
450		regulator-min-microvolt = <1300000>;
451		regulator-max-microvolt = <1300000>;
452		regulator-always-on;
 
 
 
453	};
454
455	sound {
456		compatible = "nvidia,tegra-audio-trimslice";
457		nvidia,i2s-controller = <&tegra_i2s1>;
458		nvidia,audio-codec = <&codec>;
459
460		clocks = <&tegra_car TEGRA20_CLK_PLL_A>,
461			 <&tegra_car TEGRA20_CLK_PLL_A_OUT0>,
462			 <&tegra_car TEGRA20_CLK_CDEV1>;
463		clock-names = "pll_a", "pll_a_out0", "mclk";
464	};
465
466	cpus {
467		cpu0: cpu@0 {
468			operating-points-v2 = <&cpu0_opp_table>;
469		};
470
471		cpu@1 {
472			operating-points-v2 = <&cpu0_opp_table>;
473		};
474	};
475};
v4.10.11
 
  1/dts-v1/;
  2
  3#include <dt-bindings/input/input.h>
  4#include "tegra20.dtsi"
 
  5
  6/ {
  7	model = "Compulab TrimSlice board";
  8	compatible = "compulab,trimslice", "nvidia,tegra20";
  9
 10	aliases {
 11		rtc0 = "/i2c@7000c500/rtc@56";
 12		rtc1 = "/rtc@7000e000";
 13		serial0 = &uarta;
 14	};
 15
 16	chosen {
 17		stdout-path = "serial0:115200n8";
 18	};
 19
 20	memory {
 21		reg = <0x00000000 0x40000000>;
 22	};
 23
 24	host1x@50000000 {
 25		hdmi@54280000 {
 26			status = "okay";
 27
 28			vdd-supply = <&hdmi_vdd_reg>;
 29			pll-supply = <&hdmi_pll_reg>;
 30
 31			nvidia,ddc-i2c-bus = <&hdmi_ddc>;
 32			nvidia,hpd-gpio = <&gpio TEGRA_GPIO(N, 7)
 33				GPIO_ACTIVE_HIGH>;
 34		};
 35	};
 36
 37	pinmux@70000014 {
 38		pinctrl-names = "default";
 39		pinctrl-0 = <&state_default>;
 40
 41		state_default: pinmux {
 42			ata {
 43				nvidia,pins = "ata";
 44				nvidia,function = "ide";
 45			};
 46			atb {
 47				nvidia,pins = "atb", "gma";
 48				nvidia,function = "sdio4";
 49			};
 50			atc {
 51				nvidia,pins = "atc", "gmb";
 52				nvidia,function = "nand";
 53			};
 54			atd {
 55				nvidia,pins = "atd", "ate", "gme", "pta";
 56				nvidia,function = "gmi";
 57			};
 58			cdev1 {
 59				nvidia,pins = "cdev1";
 60				nvidia,function = "plla_out";
 61			};
 62			cdev2 {
 63				nvidia,pins = "cdev2";
 64				nvidia,function = "pllp_out4";
 65			};
 66			crtp {
 67				nvidia,pins = "crtp";
 68				nvidia,function = "crt";
 69			};
 70			csus {
 71				nvidia,pins = "csus";
 72				nvidia,function = "vi_sensor_clk";
 73			};
 74			dap1 {
 75				nvidia,pins = "dap1";
 76				nvidia,function = "dap1";
 77			};
 78			dap2 {
 79				nvidia,pins = "dap2";
 80				nvidia,function = "dap2";
 81			};
 82			dap3 {
 83				nvidia,pins = "dap3";
 84				nvidia,function = "dap3";
 85			};
 86			dap4 {
 87				nvidia,pins = "dap4";
 88				nvidia,function = "dap4";
 89			};
 90			ddc {
 91				nvidia,pins = "ddc";
 92				nvidia,function = "i2c2";
 93			};
 94			dta {
 95				nvidia,pins = "dta", "dtb", "dtc", "dtd", "dte";
 96				nvidia,function = "vi";
 97			};
 98			dtf {
 99				nvidia,pins = "dtf";
100				nvidia,function = "i2c3";
101			};
102			gmc {
103				nvidia,pins = "gmc", "gmd";
104				nvidia,function = "sflash";
105			};
106			gpu {
107				nvidia,pins = "gpu";
108				nvidia,function = "uarta";
109			};
110			gpu7 {
111				nvidia,pins = "gpu7";
112				nvidia,function = "rtck";
113			};
114			gpv {
115				nvidia,pins = "gpv", "slxa", "slxk";
116				nvidia,function = "pcie";
117			};
118			hdint {
119				nvidia,pins = "hdint";
120				nvidia,function = "hdmi";
121			};
122			i2cp {
123				nvidia,pins = "i2cp";
124				nvidia,function = "i2cp";
125			};
126			irrx {
127				nvidia,pins = "irrx", "irtx";
128				nvidia,function = "uartb";
129			};
130			kbca {
131				nvidia,pins = "kbca", "kbcb", "kbcc", "kbcd",
132					"kbce", "kbcf";
133				nvidia,function = "kbc";
134			};
135			lcsn {
136				nvidia,pins = "lcsn", "ld0", "ld1", "ld2",
137					"ld3", "ld4", "ld5", "ld6", "ld7",
138					"ld8", "ld9", "ld10", "ld11", "ld12",
139					"ld13", "ld14", "ld15", "ld16", "ld17",
140					"ldc", "ldi", "lhp0", "lhp1", "lhp2",
141					"lhs", "lm0", "lm1", "lpp", "lpw0",
142					"lpw1", "lpw2", "lsc0", "lsc1", "lsck",
143					"lsda", "lsdi", "lspi", "lvp0", "lvp1",
144					"lvs";
145				nvidia,function = "displaya";
146			};
147			owc {
148				nvidia,pins = "owc", "uac";
149				nvidia,function = "rsvd2";
150			};
151			pmc {
152				nvidia,pins = "pmc";
153				nvidia,function = "pwr_on";
154			};
155			rm {
156				nvidia,pins = "rm";
157				nvidia,function = "i2c1";
158			};
159			sdb {
160				nvidia,pins = "sdb", "sdc", "sdd";
161				nvidia,function = "pwm";
162			};
163			sdio1 {
164				nvidia,pins = "sdio1";
165				nvidia,function = "sdio1";
166			};
167			slxc {
168				nvidia,pins = "slxc", "slxd";
169				nvidia,function = "sdio3";
170			};
171			spdi {
172				nvidia,pins = "spdi", "spdo";
173				nvidia,function = "spdif";
174			};
175			spia {
176				nvidia,pins = "spia", "spib", "spic";
177				nvidia,function = "spi2";
178			};
179			spid {
180				nvidia,pins = "spid", "spie", "spif";
181				nvidia,function = "spi1";
182			};
183			spig {
184				nvidia,pins = "spig", "spih";
185				nvidia,function = "spi2_alt";
186			};
187			uaa {
188				nvidia,pins = "uaa", "uab", "uda";
189				nvidia,function = "ulpi";
190			};
191			uad {
192				nvidia,pins = "uad";
193				nvidia,function = "irda";
194			};
195			uca {
196				nvidia,pins = "uca", "ucb";
197				nvidia,function = "uartc";
198			};
199			conf_ata {
200				nvidia,pins = "ata", "atc", "atd", "ate",
201					"crtp", "dap2", "dap3", "dap4", "dta",
202					"dtb", "dtc", "dtd", "dte", "gmb",
203					"gme", "i2cp", "pta", "slxc", "slxd",
204					"spdi", "spdo", "uda";
205				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
206				nvidia,tristate = <TEGRA_PIN_ENABLE>;
207			};
208			conf_atb {
209				nvidia,pins = "atb", "cdev1", "cdev2", "dap1",
210					"gma", "gmc", "gmd", "gpu", "gpu7",
211					"gpv", "sdio1", "slxa", "slxk", "uac";
212				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
213				nvidia,tristate = <TEGRA_PIN_DISABLE>;
214			};
215			conf_ck32 {
216				nvidia,pins = "ck32", "ddrc", "pmca", "pmcb",
217					"pmcc", "pmcd", "pmce", "xm2c", "xm2d";
218				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
219			};
220			conf_csus {
221				nvidia,pins = "csus", "spia", "spib",
222					"spid", "spif";
223				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
224				nvidia,tristate = <TEGRA_PIN_ENABLE>;
225			};
226			conf_ddc {
227				nvidia,pins = "ddc", "dtf", "rm", "sdc", "sdd";
228				nvidia,pull = <TEGRA_PIN_PULL_UP>;
229				nvidia,tristate = <TEGRA_PIN_DISABLE>;
230			};
231			conf_hdint {
232				nvidia,pins = "hdint", "lcsn", "ldc", "lm1",
233					"lpw1", "lsc1", "lsck", "lsda", "lsdi",
234					"lvp0", "pmc";
235				nvidia,tristate = <TEGRA_PIN_ENABLE>;
236			};
237			conf_irrx {
238				nvidia,pins = "irrx", "irtx", "kbca", "kbcb",
239					"kbcc", "kbcd", "kbce", "kbcf", "owc",
240					"spic", "spie", "spig", "spih", "uaa",
241					"uab", "uad", "uca", "ucb";
242				nvidia,pull = <TEGRA_PIN_PULL_UP>;
243				nvidia,tristate = <TEGRA_PIN_ENABLE>;
244			};
245			conf_lc {
246				nvidia,pins = "lc", "ls";
247				nvidia,pull = <TEGRA_PIN_PULL_UP>;
248			};
249			conf_ld0 {
250				nvidia,pins = "ld0", "ld1", "ld2", "ld3", "ld4",
251					"ld5", "ld6", "ld7", "ld8", "ld9",
252					"ld10", "ld11", "ld12", "ld13", "ld14",
253					"ld15", "ld16", "ld17", "ldi", "lhp0",
254					"lhp1", "lhp2", "lhs", "lm0", "lpp",
255					"lpw0", "lpw2", "lsc0", "lspi", "lvp1",
256					"lvs", "sdb";
257				nvidia,tristate = <TEGRA_PIN_DISABLE>;
258			};
259			conf_ld17_0 {
260				nvidia,pins = "ld17_0", "ld19_18", "ld21_20",
261					"ld23_22";
262				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
263			};
264			conf_spif {
265				nvidia,pins = "spif";
266				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
267				nvidia,tristate = <TEGRA_PIN_DISABLE>;
268			};
269		};
270	};
271
272	i2s@70002800 {
273		status = "okay";
274	};
275
276	serial@70006000 {
277		status = "okay";
278	};
279
280	dvi_ddc: i2c@7000c000 {
281		status = "okay";
282		clock-frequency = <100000>;
283	};
284
285	spi@7000c380 {
286		status = "okay";
287		spi-max-frequency = <48000000>;
288		spi-flash@0 {
289			compatible = "winbond,w25q80bl";
 
290			reg = <0>;
291			spi-max-frequency = <48000000>;
292		};
293	};
294
295	hdmi_ddc: i2c@7000c400 {
296		status = "okay";
297		clock-frequency = <100000>;
298	};
299
300	i2c@7000c500 {
301		status = "okay";
302		clock-frequency = <400000>;
303
304		codec: codec@1a {
305			compatible = "ti,tlv320aic23";
306			reg = <0x1a>;
307		};
308
309		rtc@56 {
310			compatible = "emmicro,em3027";
311			reg = <0x56>;
312		};
313	};
314
315	pmc@7000e400 {
316		nvidia,suspend-mode = <1>;
317		nvidia,cpu-pwr-good-time = <5000>;
318		nvidia,cpu-pwr-off-time = <5000>;
319		nvidia,core-pwr-good-time = <3845 3845>;
320		nvidia,core-pwr-off-time = <3875>;
321		nvidia,sys-clock-req-active-high;
 
322	};
323
324	pcie-controller@80003000 {
325		status = "okay";
326
327		avdd-pex-supply = <&pci_vdd_reg>;
328		vdd-pex-supply = <&pci_vdd_reg>;
329		avdd-pex-pll-supply = <&pci_vdd_reg>;
330		avdd-plle-supply = <&pci_vdd_reg>;
331		vddio-pex-clk-supply = <&pci_clk_reg>;
332
333		pci@1,0 {
334			status = "okay";
335		};
336	};
337
338	usb@c5000000 {
339		status = "okay";
340	};
341
342	usb-phy@c5000000 {
343		status = "okay";
344		vbus-supply = <&vbus_reg>;
345	};
346
347	usb@c5004000 {
348		status = "okay";
349		nvidia,phy-reset-gpio = <&gpio TEGRA_GPIO(V, 0)
350			GPIO_ACTIVE_LOW>;
351	};
352
353	usb-phy@c5004000 {
354		status = "okay";
355		nvidia,phy-reset-gpio = <&gpio TEGRA_GPIO(V, 0)
356			GPIO_ACTIVE_LOW>;
357	};
358
359	usb@c5008000 {
360		status = "okay";
361	};
362
363	usb-phy@c5008000 {
364		status = "okay";
365	};
366
367	sdhci@c8000000 {
368		status = "okay";
 
369		bus-width = <4>;
370	};
371
372	sdhci@c8000600 {
373		status = "okay";
374		cd-gpios = <&gpio TEGRA_GPIO(P, 1) GPIO_ACTIVE_LOW>;
375		wp-gpios = <&gpio TEGRA_GPIO(P, 2) GPIO_ACTIVE_HIGH>;
376		bus-width = <4>;
377	};
378
379	clocks {
380		compatible = "simple-bus";
381		#address-cells = <1>;
382		#size-cells = <0>;
383
384		clk32k_in: clock@0 {
385			compatible = "fixed-clock";
386			reg = <0>;
387			#clock-cells = <0>;
388			clock-frequency = <32768>;
389		};
390	};
391
392	gpio-keys {
393		compatible = "gpio-keys";
394
395		power {
396			label = "Power";
397			gpios = <&gpio TEGRA_GPIO(X, 6) GPIO_ACTIVE_LOW>;
398			linux,code = <KEY_POWER>;
399			wakeup-source;
400		};
401	};
402
403	poweroff {
404		compatible = "gpio-poweroff";
405		gpios = <&gpio TEGRA_GPIO(X, 7) GPIO_ACTIVE_LOW>;
406	};
407
408	regulators {
409		compatible = "simple-bus";
410		#address-cells = <1>;
411		#size-cells = <0>;
412
413		hdmi_vdd_reg: regulator@0 {
414			compatible = "regulator-fixed";
415			reg = <0>;
416			regulator-name = "avdd_hdmi";
417			regulator-min-microvolt = <3300000>;
418			regulator-max-microvolt = <3300000>;
419			regulator-always-on;
420		};
421
422		hdmi_pll_reg: regulator@1 {
423			compatible = "regulator-fixed";
424			reg = <1>;
425			regulator-name = "avdd_hdmi_pll";
426			regulator-min-microvolt = <1800000>;
427			regulator-max-microvolt = <1800000>;
428			regulator-always-on;
429		};
430
431		vbus_reg: regulator@2 {
432			compatible = "regulator-fixed";
433			reg = <2>;
434			regulator-name = "usb1_vbus";
435			regulator-min-microvolt = <5000000>;
436			regulator-max-microvolt = <5000000>;
437			enable-active-high;
438			gpio = <&gpio TEGRA_GPIO(V, 2) 0>;
439			regulator-always-on;
440			regulator-boot-on;
441		};
442
443		pci_clk_reg: regulator@3 {
444			compatible = "regulator-fixed";
445			reg = <3>;
446			regulator-name = "pci_clk";
447			regulator-min-microvolt = <3300000>;
448			regulator-max-microvolt = <3300000>;
449			regulator-always-on;
450		};
451
452		pci_vdd_reg: regulator@4 {
453			compatible = "regulator-fixed";
454			reg = <4>;
455			regulator-name = "pci_vdd";
456			regulator-min-microvolt = <1050000>;
457			regulator-max-microvolt = <1050000>;
458			regulator-always-on;
459		};
460	};
461
462	sound {
463		compatible = "nvidia,tegra-audio-trimslice";
464		nvidia,i2s-controller = <&tegra_i2s1>;
465		nvidia,audio-codec = <&codec>;
466
467		clocks = <&tegra_car TEGRA20_CLK_PLL_A>,
468			 <&tegra_car TEGRA20_CLK_PLL_A_OUT0>,
469			 <&tegra_car TEGRA20_CLK_CDEV1>;
470		clock-names = "pll_a", "pll_a_out0", "mclk";
 
 
 
 
 
 
 
 
 
 
471	};
472};