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1// SPDX-License-Identifier: GPL-2.0
2/dts-v1/;
3
4#include <dt-bindings/input/input.h>
5#include "tegra20.dtsi"
6
7/ {
8 model = "NVIDIA Seaboard";
9 compatible = "nvidia,seaboard", "nvidia,tegra20";
10
11 aliases {
12 rtc0 = "/i2c@7000d000/tps6586x@34";
13 rtc1 = "/rtc@7000e000";
14 serial0 = &uartd;
15 };
16
17 chosen {
18 stdout-path = "serial0:115200n8";
19 };
20
21 memory@0 {
22 reg = <0x00000000 0x40000000>;
23 };
24
25 host1x@50000000 {
26 dc@54200000 {
27 rgb {
28 status = "okay";
29
30 nvidia,panel = <&panel>;
31 };
32 };
33
34 hdmi@54280000 {
35 status = "okay";
36
37 vdd-supply = <&hdmi_vdd_reg>;
38 pll-supply = <&hdmi_pll_reg>;
39 hdmi-supply = <&vdd_hdmi>;
40
41 nvidia,ddc-i2c-bus = <&hdmi_ddc>;
42 nvidia,hpd-gpio = <&gpio TEGRA_GPIO(N, 7)
43 GPIO_ACTIVE_HIGH>;
44 };
45 };
46
47 pinmux@70000014 {
48 pinctrl-names = "default";
49 pinctrl-0 = <&state_default>;
50
51 state_default: pinmux {
52 ata {
53 nvidia,pins = "ata";
54 nvidia,function = "ide";
55 };
56 atb {
57 nvidia,pins = "atb", "gma", "gme";
58 nvidia,function = "sdio4";
59 };
60 atc {
61 nvidia,pins = "atc";
62 nvidia,function = "nand";
63 };
64 atd {
65 nvidia,pins = "atd", "ate", "gmb", "spia",
66 "spib", "spic";
67 nvidia,function = "gmi";
68 };
69 cdev1 {
70 nvidia,pins = "cdev1";
71 nvidia,function = "plla_out";
72 };
73 cdev2 {
74 nvidia,pins = "cdev2";
75 nvidia,function = "pllp_out4";
76 };
77 crtp {
78 nvidia,pins = "crtp", "lm1";
79 nvidia,function = "crt";
80 };
81 csus {
82 nvidia,pins = "csus";
83 nvidia,function = "vi_sensor_clk";
84 };
85 dap1 {
86 nvidia,pins = "dap1";
87 nvidia,function = "dap1";
88 };
89 dap2 {
90 nvidia,pins = "dap2";
91 nvidia,function = "dap2";
92 };
93 dap3 {
94 nvidia,pins = "dap3";
95 nvidia,function = "dap3";
96 };
97 dap4 {
98 nvidia,pins = "dap4";
99 nvidia,function = "dap4";
100 };
101 dta {
102 nvidia,pins = "dta", "dtb", "dtc", "dtd", "dte";
103 nvidia,function = "vi";
104 };
105 dtf {
106 nvidia,pins = "dtf";
107 nvidia,function = "i2c3";
108 };
109 gmc {
110 nvidia,pins = "gmc";
111 nvidia,function = "uartd";
112 };
113 gmd {
114 nvidia,pins = "gmd";
115 nvidia,function = "sflash";
116 };
117 gpu {
118 nvidia,pins = "gpu";
119 nvidia,function = "pwm";
120 };
121 gpu7 {
122 nvidia,pins = "gpu7";
123 nvidia,function = "rtck";
124 };
125 gpv {
126 nvidia,pins = "gpv", "slxa", "slxk";
127 nvidia,function = "pcie";
128 };
129 hdint {
130 nvidia,pins = "hdint", "lpw0", "lpw2", "lsc1",
131 "lsck", "lsda";
132 nvidia,function = "hdmi";
133 };
134 i2cp {
135 nvidia,pins = "i2cp";
136 nvidia,function = "i2cp";
137 };
138 irrx {
139 nvidia,pins = "irrx", "irtx";
140 nvidia,function = "uartb";
141 };
142 kbca {
143 nvidia,pins = "kbca", "kbcb", "kbcc", "kbcd",
144 "kbce", "kbcf";
145 nvidia,function = "kbc";
146 };
147 lcsn {
148 nvidia,pins = "lcsn", "ldc", "lm0", "lpw1",
149 "lsdi", "lvp0";
150 nvidia,function = "rsvd4";
151 };
152 ld0 {
153 nvidia,pins = "ld0", "ld1", "ld2", "ld3", "ld4",
154 "ld5", "ld6", "ld7", "ld8", "ld9",
155 "ld10", "ld11", "ld12", "ld13", "ld14",
156 "ld15", "ld16", "ld17", "ldi", "lhp0",
157 "lhp1", "lhp2", "lhs", "lpp", "lsc0",
158 "lspi", "lvp1", "lvs";
159 nvidia,function = "displaya";
160 };
161 owc {
162 nvidia,pins = "owc", "spdi", "spdo", "uac";
163 nvidia,function = "rsvd2";
164 };
165 pmc {
166 nvidia,pins = "pmc";
167 nvidia,function = "pwr_on";
168 };
169 rm {
170 nvidia,pins = "rm";
171 nvidia,function = "i2c1";
172 };
173 sdb {
174 nvidia,pins = "sdb", "sdc", "sdd";
175 nvidia,function = "sdio3";
176 };
177 sdio1 {
178 nvidia,pins = "sdio1";
179 nvidia,function = "sdio1";
180 };
181 slxc {
182 nvidia,pins = "slxc", "slxd";
183 nvidia,function = "spdif";
184 };
185 spid {
186 nvidia,pins = "spid", "spie", "spif";
187 nvidia,function = "spi1";
188 };
189 spig {
190 nvidia,pins = "spig", "spih";
191 nvidia,function = "spi2_alt";
192 };
193 uaa {
194 nvidia,pins = "uaa", "uab", "uda";
195 nvidia,function = "ulpi";
196 };
197 uad {
198 nvidia,pins = "uad";
199 nvidia,function = "irda";
200 };
201 uca {
202 nvidia,pins = "uca", "ucb";
203 nvidia,function = "uartc";
204 };
205 conf_ata {
206 nvidia,pins = "ata", "atb", "atc", "atd",
207 "cdev1", "cdev2", "dap1", "dap2",
208 "dap4", "ddc", "dtf", "gma", "gmc", "gmd",
209 "gme", "gpu", "gpu7", "i2cp", "irrx",
210 "irtx", "pta", "rm", "sdc", "sdd",
211 "slxd", "slxk", "spdi", "spdo", "uac",
212 "uad", "uca", "ucb", "uda";
213 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
214 nvidia,tristate = <TEGRA_PIN_DISABLE>;
215 };
216 conf_ate {
217 nvidia,pins = "ate", "csus", "dap3",
218 "gpv", "owc", "slxc", "spib", "spid",
219 "spie";
220 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
221 nvidia,tristate = <TEGRA_PIN_ENABLE>;
222 };
223 conf_ck32 {
224 nvidia,pins = "ck32", "ddrc", "pmca", "pmcb",
225 "pmcc", "pmcd", "pmce", "xm2c", "xm2d";
226 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
227 };
228 conf_crtp {
229 nvidia,pins = "crtp", "gmb", "slxa", "spia",
230 "spig", "spih";
231 nvidia,pull = <TEGRA_PIN_PULL_UP>;
232 nvidia,tristate = <TEGRA_PIN_ENABLE>;
233 };
234 conf_dta {
235 nvidia,pins = "dta", "dtb", "dtc", "dtd";
236 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
237 nvidia,tristate = <TEGRA_PIN_DISABLE>;
238 };
239 conf_dte {
240 nvidia,pins = "dte", "spif";
241 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
242 nvidia,tristate = <TEGRA_PIN_ENABLE>;
243 };
244 conf_hdint {
245 nvidia,pins = "hdint", "lcsn", "ldc", "lm1",
246 "lpw1", "lsc1", "lsck", "lsda", "lsdi",
247 "lvp0";
248 nvidia,tristate = <TEGRA_PIN_ENABLE>;
249 };
250 conf_kbca {
251 nvidia,pins = "kbca", "kbcb", "kbcc", "kbcd",
252 "kbce", "kbcf", "sdio1", "spic", "uaa",
253 "uab";
254 nvidia,pull = <TEGRA_PIN_PULL_UP>;
255 nvidia,tristate = <TEGRA_PIN_DISABLE>;
256 };
257 conf_lc {
258 nvidia,pins = "lc", "ls";
259 nvidia,pull = <TEGRA_PIN_PULL_UP>;
260 };
261 conf_ld0 {
262 nvidia,pins = "ld0", "ld1", "ld2", "ld3", "ld4",
263 "ld5", "ld6", "ld7", "ld8", "ld9",
264 "ld10", "ld11", "ld12", "ld13", "ld14",
265 "ld15", "ld16", "ld17", "ldi", "lhp0",
266 "lhp1", "lhp2", "lhs", "lm0", "lpp",
267 "lpw0", "lpw2", "lsc0", "lspi", "lvp1",
268 "lvs", "pmc", "sdb";
269 nvidia,tristate = <TEGRA_PIN_DISABLE>;
270 };
271 conf_ld17_0 {
272 nvidia,pins = "ld17_0", "ld19_18", "ld21_20",
273 "ld23_22";
274 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
275 };
276 drive_sdio1 {
277 nvidia,pins = "drive_sdio1";
278 nvidia,high-speed-mode = <TEGRA_PIN_DISABLE>;
279 nvidia,schmitt = <TEGRA_PIN_DISABLE>;
280 nvidia,low-power-mode = <TEGRA_PIN_LP_DRIVE_DIV_1>;
281 nvidia,pull-down-strength = <31>;
282 nvidia,pull-up-strength = <31>;
283 nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_SLOWEST>;
284 nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_SLOWEST>;
285 };
286 };
287
288 state_i2cmux_ddc: pinmux-i2cmux-ddc {
289 ddc {
290 nvidia,pins = "ddc";
291 nvidia,function = "i2c2";
292 };
293 pta {
294 nvidia,pins = "pta";
295 nvidia,function = "rsvd4";
296 };
297 };
298
299 state_i2cmux_pta: pinmux-i2cmux-pta {
300 ddc {
301 nvidia,pins = "ddc";
302 nvidia,function = "rsvd4";
303 };
304 pta {
305 nvidia,pins = "pta";
306 nvidia,function = "i2c2";
307 };
308 };
309
310 state_i2cmux_idle: pinmux-i2cmux-idle {
311 ddc {
312 nvidia,pins = "ddc";
313 nvidia,function = "rsvd4";
314 };
315 pta {
316 nvidia,pins = "pta";
317 nvidia,function = "rsvd4";
318 };
319 };
320 };
321
322 i2s@70002800 {
323 status = "okay";
324 };
325
326 serial@70006300 {
327 status = "okay";
328 };
329
330 pwm: pwm@7000a000 {
331 status = "okay";
332 };
333
334 i2c@7000c000 {
335 status = "okay";
336 clock-frequency = <400000>;
337
338 wm8903: wm8903@1a {
339 compatible = "wlf,wm8903";
340 reg = <0x1a>;
341 interrupt-parent = <&gpio>;
342 interrupts = <TEGRA_GPIO(X, 3) IRQ_TYPE_LEVEL_HIGH>;
343
344 gpio-controller;
345 #gpio-cells = <2>;
346
347 micdet-cfg = <0>;
348 micdet-delay = <100>;
349 gpio-cfg = <0xffffffff 0xffffffff 0 0xffffffff 0xffffffff>;
350 };
351
352 /* ALS and proximity sensor */
353 isl29018@44 {
354 compatible = "isil,isl29018";
355 reg = <0x44>;
356 interrupt-parent = <&gpio>;
357 interrupts = <TEGRA_GPIO(Z, 2) IRQ_TYPE_LEVEL_HIGH>;
358 };
359
360 gyrometer@68 {
361 compatible = "invensense,mpu3050";
362 reg = <0x68>;
363 interrupt-parent = <&gpio>;
364 interrupts = <TEGRA_GPIO(Z, 4) IRQ_TYPE_LEVEL_HIGH>;
365 };
366 };
367
368 i2c@7000c400 {
369 status = "okay";
370 clock-frequency = <100000>;
371 };
372
373 i2cmux {
374 compatible = "i2c-mux-pinctrl";
375 #address-cells = <1>;
376 #size-cells = <0>;
377
378 i2c-parent = <&{/i2c@7000c400}>;
379
380 pinctrl-names = "ddc", "pta", "idle";
381 pinctrl-0 = <&state_i2cmux_ddc>;
382 pinctrl-1 = <&state_i2cmux_pta>;
383 pinctrl-2 = <&state_i2cmux_idle>;
384
385 hdmi_ddc: i2c@0 {
386 reg = <0>;
387 #address-cells = <1>;
388 #size-cells = <0>;
389 };
390
391 lvds_ddc: i2c@1 {
392 reg = <1>;
393 #address-cells = <1>;
394 #size-cells = <0>;
395
396 smart-battery@b {
397 compatible = "ti,bq20z75", "sbs,sbs-battery";
398 reg = <0xb>;
399 sbs,i2c-retry-count = <2>;
400 sbs,poll-retry-count = <10>;
401 };
402 };
403 };
404
405 i2c@7000c500 {
406 status = "okay";
407 clock-frequency = <400000>;
408 };
409
410 i2c@7000d000 {
411 status = "okay";
412 clock-frequency = <400000>;
413
414 magnetometer@c {
415 compatible = "asahi-kasei,ak8975";
416 reg = <0xc>;
417 interrupt-parent = <&gpio>;
418 interrupts = <TEGRA_GPIO(N, 5) IRQ_TYPE_LEVEL_HIGH>;
419 };
420
421 pmic: tps6586x@34 {
422 compatible = "ti,tps6586x";
423 reg = <0x34>;
424 interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
425
426 ti,system-power-controller;
427
428 #gpio-cells = <2>;
429 gpio-controller;
430
431 sys-supply = <&vdd_5v0_reg>;
432 vin-sm0-supply = <&sys_reg>;
433 vin-sm1-supply = <&sys_reg>;
434 vin-sm2-supply = <&sys_reg>;
435 vinldo01-supply = <&sm2_reg>;
436 vinldo23-supply = <&sm2_reg>;
437 vinldo4-supply = <&sm2_reg>;
438 vinldo678-supply = <&sm2_reg>;
439 vinldo9-supply = <&sm2_reg>;
440
441 regulators {
442 sys_reg: sys {
443 regulator-name = "vdd_sys";
444 regulator-always-on;
445 };
446
447 vdd_core: sm0 {
448 regulator-name = "vdd_sm0,vdd_core";
449 regulator-min-microvolt = <1300000>;
450 regulator-max-microvolt = <1300000>;
451 regulator-always-on;
452 };
453
454 sm1 {
455 regulator-name = "vdd_sm1,vdd_cpu";
456 regulator-min-microvolt = <1125000>;
457 regulator-max-microvolt = <1125000>;
458 regulator-always-on;
459 };
460
461 sm2_reg: sm2 {
462 regulator-name = "vdd_sm2,vin_ldo*";
463 regulator-min-microvolt = <3700000>;
464 regulator-max-microvolt = <3700000>;
465 regulator-always-on;
466 };
467
468 /* LDO0 is not connected to anything */
469
470 ldo1 {
471 regulator-name = "vdd_ldo1,avdd_pll*";
472 regulator-min-microvolt = <1100000>;
473 regulator-max-microvolt = <1100000>;
474 regulator-always-on;
475 };
476
477 ldo2 {
478 regulator-name = "vdd_ldo2,vdd_rtc";
479 regulator-min-microvolt = <1200000>;
480 regulator-max-microvolt = <1200000>;
481 };
482
483 ldo3 {
484 regulator-name = "vdd_ldo3,avdd_usb*";
485 regulator-min-microvolt = <3300000>;
486 regulator-max-microvolt = <3300000>;
487 regulator-always-on;
488 };
489
490 ldo4 {
491 regulator-name = "vdd_ldo4,avdd_osc,vddio_sys";
492 regulator-min-microvolt = <1800000>;
493 regulator-max-microvolt = <1800000>;
494 regulator-always-on;
495 };
496
497 ldo5 {
498 regulator-name = "vdd_ldo5,vcore_mmc";
499 regulator-min-microvolt = <2850000>;
500 regulator-max-microvolt = <2850000>;
501 regulator-always-on;
502 };
503
504 ldo6 {
505 regulator-name = "vdd_ldo6,avdd_vdac,vddio_vi,vddio_cam";
506 regulator-min-microvolt = <1800000>;
507 regulator-max-microvolt = <1800000>;
508 };
509
510 hdmi_vdd_reg: ldo7 {
511 regulator-name = "vdd_ldo7,avdd_hdmi,vdd_fuse";
512 regulator-min-microvolt = <3300000>;
513 regulator-max-microvolt = <3300000>;
514 };
515
516 hdmi_pll_reg: ldo8 {
517 regulator-name = "vdd_ldo8,avdd_hdmi_pll";
518 regulator-min-microvolt = <1800000>;
519 regulator-max-microvolt = <1800000>;
520 };
521
522 ldo9 {
523 regulator-name = "vdd_ldo9,avdd_2v85,vdd_ddr_rx";
524 regulator-min-microvolt = <2850000>;
525 regulator-max-microvolt = <2850000>;
526 regulator-always-on;
527 };
528
529 ldo_rtc {
530 regulator-name = "vdd_rtc_out,vdd_cell";
531 regulator-min-microvolt = <3300000>;
532 regulator-max-microvolt = <3300000>;
533 regulator-always-on;
534 };
535 };
536 };
537
538 temperature-sensor@4c {
539 compatible = "onnn,nct1008";
540 reg = <0x4c>;
541 };
542 };
543
544 kbc@7000e200 {
545 status = "okay";
546 nvidia,debounce-delay-ms = <32>;
547 nvidia,repeat-delay-ms = <160>;
548 nvidia,ghost-filter;
549 nvidia,kbc-row-pins = <0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15>;
550 nvidia,kbc-col-pins = <16 17 18 19 20 21 22 23>;
551 linux,keymap = <MATRIX_KEY(0x00, 0x02, KEY_W)
552 MATRIX_KEY(0x00, 0x03, KEY_S)
553 MATRIX_KEY(0x00, 0x04, KEY_A)
554 MATRIX_KEY(0x00, 0x05, KEY_Z)
555 MATRIX_KEY(0x00, 0x07, KEY_FN)
556
557 MATRIX_KEY(0x01, 0x07, KEY_LEFTMETA)
558 MATRIX_KEY(0x02, 0x06, KEY_RIGHTALT)
559 MATRIX_KEY(0x02, 0x07, KEY_LEFTALT)
560
561 MATRIX_KEY(0x03, 0x00, KEY_5)
562 MATRIX_KEY(0x03, 0x01, KEY_4)
563 MATRIX_KEY(0x03, 0x02, KEY_R)
564 MATRIX_KEY(0x03, 0x03, KEY_E)
565 MATRIX_KEY(0x03, 0x04, KEY_F)
566 MATRIX_KEY(0x03, 0x05, KEY_D)
567 MATRIX_KEY(0x03, 0x06, KEY_X)
568
569 MATRIX_KEY(0x04, 0x00, KEY_7)
570 MATRIX_KEY(0x04, 0x01, KEY_6)
571 MATRIX_KEY(0x04, 0x02, KEY_T)
572 MATRIX_KEY(0x04, 0x03, KEY_H)
573 MATRIX_KEY(0x04, 0x04, KEY_G)
574 MATRIX_KEY(0x04, 0x05, KEY_V)
575 MATRIX_KEY(0x04, 0x06, KEY_C)
576 MATRIX_KEY(0x04, 0x07, KEY_SPACE)
577
578 MATRIX_KEY(0x05, 0x00, KEY_9)
579 MATRIX_KEY(0x05, 0x01, KEY_8)
580 MATRIX_KEY(0x05, 0x02, KEY_U)
581 MATRIX_KEY(0x05, 0x03, KEY_Y)
582 MATRIX_KEY(0x05, 0x04, KEY_J)
583 MATRIX_KEY(0x05, 0x05, KEY_N)
584 MATRIX_KEY(0x05, 0x06, KEY_B)
585 MATRIX_KEY(0x05, 0x07, KEY_BACKSLASH)
586
587 MATRIX_KEY(0x06, 0x00, KEY_MINUS)
588 MATRIX_KEY(0x06, 0x01, KEY_0)
589 MATRIX_KEY(0x06, 0x02, KEY_O)
590 MATRIX_KEY(0x06, 0x03, KEY_I)
591 MATRIX_KEY(0x06, 0x04, KEY_L)
592 MATRIX_KEY(0x06, 0x05, KEY_K)
593 MATRIX_KEY(0x06, 0x06, KEY_COMMA)
594 MATRIX_KEY(0x06, 0x07, KEY_M)
595
596 MATRIX_KEY(0x07, 0x01, KEY_EQUAL)
597 MATRIX_KEY(0x07, 0x02, KEY_RIGHTBRACE)
598 MATRIX_KEY(0x07, 0x03, KEY_ENTER)
599 MATRIX_KEY(0x07, 0x07, KEY_MENU)
600
601 MATRIX_KEY(0x08, 0x04, KEY_RIGHTSHIFT)
602 MATRIX_KEY(0x08, 0x05, KEY_LEFTSHIFT)
603
604 MATRIX_KEY(0x09, 0x05, KEY_RIGHTCTRL)
605 MATRIX_KEY(0x09, 0x07, KEY_LEFTCTRL)
606
607 MATRIX_KEY(0x0B, 0x00, KEY_LEFTBRACE)
608 MATRIX_KEY(0x0B, 0x01, KEY_P)
609 MATRIX_KEY(0x0B, 0x02, KEY_APOSTROPHE)
610 MATRIX_KEY(0x0B, 0x03, KEY_SEMICOLON)
611 MATRIX_KEY(0x0B, 0x04, KEY_SLASH)
612 MATRIX_KEY(0x0B, 0x05, KEY_DOT)
613
614 MATRIX_KEY(0x0C, 0x00, KEY_F10)
615 MATRIX_KEY(0x0C, 0x01, KEY_F9)
616 MATRIX_KEY(0x0C, 0x02, KEY_BACKSPACE)
617 MATRIX_KEY(0x0C, 0x03, KEY_3)
618 MATRIX_KEY(0x0C, 0x04, KEY_2)
619 MATRIX_KEY(0x0C, 0x05, KEY_UP)
620 MATRIX_KEY(0x0C, 0x06, KEY_PRINT)
621 MATRIX_KEY(0x0C, 0x07, KEY_PAUSE)
622
623 MATRIX_KEY(0x0D, 0x00, KEY_INSERT)
624 MATRIX_KEY(0x0D, 0x01, KEY_DELETE)
625 MATRIX_KEY(0x0D, 0x03, KEY_PAGEUP )
626 MATRIX_KEY(0x0D, 0x04, KEY_PAGEDOWN)
627 MATRIX_KEY(0x0D, 0x05, KEY_RIGHT)
628 MATRIX_KEY(0x0D, 0x06, KEY_DOWN)
629 MATRIX_KEY(0x0D, 0x07, KEY_LEFT)
630
631 MATRIX_KEY(0x0E, 0x00, KEY_F11)
632 MATRIX_KEY(0x0E, 0x01, KEY_F12)
633 MATRIX_KEY(0x0E, 0x02, KEY_F8)
634 MATRIX_KEY(0x0E, 0x03, KEY_Q)
635 MATRIX_KEY(0x0E, 0x04, KEY_F4)
636 MATRIX_KEY(0x0E, 0x05, KEY_F3)
637 MATRIX_KEY(0x0E, 0x06, KEY_1)
638 MATRIX_KEY(0x0E, 0x07, KEY_F7)
639
640 MATRIX_KEY(0x0F, 0x00, KEY_ESC)
641 MATRIX_KEY(0x0F, 0x01, KEY_GRAVE)
642 MATRIX_KEY(0x0F, 0x02, KEY_F5)
643 MATRIX_KEY(0x0F, 0x03, KEY_TAB)
644 MATRIX_KEY(0x0F, 0x04, KEY_F1)
645 MATRIX_KEY(0x0F, 0x05, KEY_F2)
646 MATRIX_KEY(0x0F, 0x06, KEY_CAPSLOCK)
647 MATRIX_KEY(0x0F, 0x07, KEY_F6)
648
649 /* Software Handled Function Keys */
650 MATRIX_KEY(0x14, 0x00, KEY_KP7)
651
652 MATRIX_KEY(0x15, 0x00, KEY_KP9)
653 MATRIX_KEY(0x15, 0x01, KEY_KP8)
654 MATRIX_KEY(0x15, 0x02, KEY_KP4)
655 MATRIX_KEY(0x15, 0x04, KEY_KP1)
656
657 MATRIX_KEY(0x16, 0x01, KEY_KPSLASH)
658 MATRIX_KEY(0x16, 0x02, KEY_KP6)
659 MATRIX_KEY(0x16, 0x03, KEY_KP5)
660 MATRIX_KEY(0x16, 0x04, KEY_KP3)
661 MATRIX_KEY(0x16, 0x05, KEY_KP2)
662 MATRIX_KEY(0x16, 0x07, KEY_KP0)
663
664 MATRIX_KEY(0x1B, 0x01, KEY_KPASTERISK)
665 MATRIX_KEY(0x1B, 0x03, KEY_KPMINUS)
666 MATRIX_KEY(0x1B, 0x04, KEY_KPPLUS)
667 MATRIX_KEY(0x1B, 0x05, KEY_KPDOT)
668
669 MATRIX_KEY(0x1C, 0x05, KEY_VOLUMEUP)
670
671 MATRIX_KEY(0x1D, 0x03, KEY_HOME)
672 MATRIX_KEY(0x1D, 0x04, KEY_END)
673 MATRIX_KEY(0x1D, 0x05, KEY_BRIGHTNESSDOWN)
674 MATRIX_KEY(0x1D, 0x06, KEY_VOLUMEDOWN)
675 MATRIX_KEY(0x1D, 0x07, KEY_BRIGHTNESSUP)
676
677 MATRIX_KEY(0x1E, 0x00, KEY_NUMLOCK)
678 MATRIX_KEY(0x1E, 0x01, KEY_SCROLLLOCK)
679 MATRIX_KEY(0x1E, 0x02, KEY_MUTE)
680
681 MATRIX_KEY(0x1F, 0x04, KEY_HELP)>;
682 };
683
684 pmc@7000e400 {
685 nvidia,invert-interrupt;
686 nvidia,suspend-mode = <1>;
687 nvidia,cpu-pwr-good-time = <5000>;
688 nvidia,cpu-pwr-off-time = <5000>;
689 nvidia,core-pwr-good-time = <3845 3845>;
690 nvidia,core-pwr-off-time = <3875>;
691 nvidia,sys-clock-req-active-high;
692 core-supply = <&vdd_core>;
693 };
694
695 memory-controller@7000f400 {
696 emc-table@190000 {
697 reg = <190000>;
698 compatible = "nvidia,tegra20-emc-table";
699 clock-frequency = <190000>;
700 nvidia,emc-registers = <0x0000000c 0x00000026
701 0x00000009 0x00000003 0x00000004 0x00000004
702 0x00000002 0x0000000c 0x00000003 0x00000003
703 0x00000002 0x00000001 0x00000004 0x00000005
704 0x00000004 0x00000009 0x0000000d 0x0000059f
705 0x00000000 0x00000003 0x00000003 0x00000003
706 0x00000003 0x00000001 0x0000000b 0x000000c8
707 0x00000003 0x00000007 0x00000004 0x0000000f
708 0x00000002 0x00000000 0x00000000 0x00000002
709 0x00000000 0x00000000 0x00000083 0xa06204ae
710 0x007dc010 0x00000000 0x00000000 0x00000000
711 0x00000000 0x00000000 0x00000000 0x00000000>;
712 };
713
714 emc-table@380000 {
715 reg = <380000>;
716 compatible = "nvidia,tegra20-emc-table";
717 clock-frequency = <380000>;
718 nvidia,emc-registers = <0x00000017 0x0000004b
719 0x00000012 0x00000006 0x00000004 0x00000005
720 0x00000003 0x0000000c 0x00000006 0x00000006
721 0x00000003 0x00000001 0x00000004 0x00000005
722 0x00000004 0x00000009 0x0000000d 0x00000b5f
723 0x00000000 0x00000003 0x00000003 0x00000006
724 0x00000006 0x00000001 0x00000011 0x000000c8
725 0x00000003 0x0000000e 0x00000007 0x0000000f
726 0x00000002 0x00000000 0x00000000 0x00000002
727 0x00000000 0x00000000 0x00000083 0xe044048b
728 0x007d8010 0x00000000 0x00000000 0x00000000
729 0x00000000 0x00000000 0x00000000 0x00000000>;
730 };
731 };
732
733 usb@c5000000 {
734 status = "okay";
735 dr_mode = "otg";
736 };
737
738 usb-phy@c5000000 {
739 status = "okay";
740 vbus-supply = <&vbus_reg>;
741 dr_mode = "otg";
742 };
743
744 usb@c5004000 {
745 status = "okay";
746 };
747
748 usb-phy@c5004000 {
749 status = "okay";
750 nvidia,phy-reset-gpio = <&gpio TEGRA_GPIO(V, 1)
751 GPIO_ACTIVE_LOW>;
752 };
753
754 usb@c5008000 {
755 status = "okay";
756 };
757
758 usb-phy@c5008000 {
759 status = "okay";
760 };
761
762 mmc@c8000000 {
763 status = "okay";
764 power-gpios = <&gpio TEGRA_GPIO(K, 6) GPIO_ACTIVE_HIGH>;
765 bus-width = <4>;
766 keep-power-in-suspend;
767 };
768
769 mmc@c8000400 {
770 status = "okay";
771 cd-gpios = <&gpio TEGRA_GPIO(I, 5) GPIO_ACTIVE_LOW>;
772 wp-gpios = <&gpio TEGRA_GPIO(H, 1) GPIO_ACTIVE_HIGH>;
773 power-gpios = <&gpio TEGRA_GPIO(I, 6) GPIO_ACTIVE_HIGH>;
774 bus-width = <4>;
775 };
776
777 mmc@c8000600 {
778 status = "okay";
779 bus-width = <8>;
780 non-removable;
781 };
782
783 backlight: backlight {
784 compatible = "pwm-backlight";
785
786 enable-gpios = <&gpio TEGRA_GPIO(D, 4) GPIO_ACTIVE_HIGH>;
787 power-supply = <&vdd_bl_reg>;
788 pwms = <&pwm 2 5000000>;
789
790 brightness-levels = <0 4 8 16 32 64 128 255>;
791 default-brightness-level = <6>;
792 };
793
794 clk32k_in: clock-32k {
795 compatible = "fixed-clock";
796 clock-frequency = <32768>;
797 #clock-cells = <0>;
798 };
799
800 gpio-keys {
801 compatible = "gpio-keys";
802
803 key-power {
804 label = "Power";
805 gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_LOW>;
806 linux,code = <KEY_POWER>;
807 wakeup-source;
808 };
809
810 switch-lid {
811 label = "Lid";
812 gpios = <&gpio TEGRA_GPIO(C, 7) GPIO_ACTIVE_HIGH>;
813 linux,input-type = <5>; /* EV_SW */
814 linux,code = <0>; /* SW_LID */
815 debounce-interval = <1>;
816 wakeup-source;
817 };
818 };
819
820 panel: panel {
821 compatible = "chunghwa,claa101wa01a";
822
823 power-supply = <&vdd_pnl_reg>;
824 enable-gpios = <&gpio TEGRA_GPIO(B, 2) GPIO_ACTIVE_HIGH>;
825
826 backlight = <&backlight>;
827 ddc-i2c-bus = <&lvds_ddc>;
828 };
829
830 vdd_5v0_reg: regulator-5v0 {
831 compatible = "regulator-fixed";
832 regulator-name = "vdd_5v0";
833 regulator-min-microvolt = <5000000>;
834 regulator-max-microvolt = <5000000>;
835 regulator-always-on;
836 };
837
838 regulator-1v5 {
839 compatible = "regulator-fixed";
840 regulator-name = "vdd_1v5";
841 regulator-min-microvolt = <1500000>;
842 regulator-max-microvolt = <1500000>;
843 gpio = <&pmic 0 GPIO_ACTIVE_HIGH>;
844 };
845
846 regulator-1v2 {
847 compatible = "regulator-fixed";
848 regulator-name = "vdd_1v2";
849 regulator-min-microvolt = <1200000>;
850 regulator-max-microvolt = <1200000>;
851 gpio = <&pmic 1 GPIO_ACTIVE_HIGH>;
852 enable-active-high;
853 };
854
855 vbus_reg: regulator-vbus {
856 compatible = "regulator-fixed";
857 regulator-name = "vdd_vbus_wup1";
858 regulator-min-microvolt = <5000000>;
859 regulator-max-microvolt = <5000000>;
860 enable-active-high;
861 gpio = <&gpio TEGRA_GPIO(D, 0) 0>;
862 regulator-always-on;
863 regulator-boot-on;
864 };
865
866 vdd_pnl_reg: regulator-pnl {
867 compatible = "regulator-fixed";
868 regulator-name = "vdd_pnl";
869 regulator-min-microvolt = <2800000>;
870 regulator-max-microvolt = <2800000>;
871 gpio = <&gpio TEGRA_GPIO(C, 6) GPIO_ACTIVE_HIGH>;
872 enable-active-high;
873 };
874
875 vdd_bl_reg: regulator-bl {
876 compatible = "regulator-fixed";
877 regulator-name = "vdd_bl";
878 regulator-min-microvolt = <2800000>;
879 regulator-max-microvolt = <2800000>;
880 gpio = <&gpio TEGRA_GPIO(W, 0) GPIO_ACTIVE_HIGH>;
881 enable-active-high;
882 };
883
884 vdd_hdmi: regulator-hdmi {
885 compatible = "regulator-fixed";
886 regulator-name = "VDDIO_HDMI";
887 regulator-min-microvolt = <5000000>;
888 regulator-max-microvolt = <5000000>;
889 gpio = <&gpio TEGRA_GPIO(V, 5) GPIO_ACTIVE_HIGH>;
890 enable-active-high;
891 vin-supply = <&vdd_5v0_reg>;
892 };
893
894 sound {
895 compatible = "nvidia,tegra-audio-wm8903-seaboard",
896 "nvidia,tegra-audio-wm8903";
897 nvidia,model = "NVIDIA Tegra Seaboard";
898
899 nvidia,audio-routing =
900 "Headphone Jack", "HPOUTR",
901 "Headphone Jack", "HPOUTL",
902 "Int Spk", "ROP",
903 "Int Spk", "RON",
904 "Int Spk", "LOP",
905 "Int Spk", "LON",
906 "Mic Jack", "MICBIAS",
907 "IN1R", "Mic Jack";
908
909 nvidia,i2s-controller = <&tegra_i2s1>;
910 nvidia,audio-codec = <&wm8903>;
911
912 nvidia,spkr-en-gpios = <&wm8903 2 GPIO_ACTIVE_HIGH>;
913 nvidia,hp-det-gpios = <&gpio TEGRA_GPIO(X, 1) GPIO_ACTIVE_LOW>;
914
915 clocks = <&tegra_car TEGRA20_CLK_PLL_A>,
916 <&tegra_car TEGRA20_CLK_PLL_A_OUT0>,
917 <&tegra_car TEGRA20_CLK_CDEV1>;
918 clock-names = "pll_a", "pll_a_out0", "mclk";
919 };
920};
1/dts-v1/;
2
3#include <dt-bindings/input/input.h>
4#include "tegra20.dtsi"
5
6/ {
7 model = "NVIDIA Seaboard";
8 compatible = "nvidia,seaboard", "nvidia,tegra20";
9
10 aliases {
11 rtc0 = "/i2c@7000d000/tps6586x@34";
12 rtc1 = "/rtc@7000e000";
13 serial0 = &uartd;
14 };
15
16 chosen {
17 stdout-path = "serial0:115200n8";
18 };
19
20 memory {
21 reg = <0x00000000 0x40000000>;
22 };
23
24 host1x@50000000 {
25 dc@54200000 {
26 rgb {
27 status = "okay";
28
29 nvidia,panel = <&panel>;
30 };
31 };
32
33 hdmi@54280000 {
34 status = "okay";
35
36 vdd-supply = <&hdmi_vdd_reg>;
37 pll-supply = <&hdmi_pll_reg>;
38 hdmi-supply = <&vdd_hdmi>;
39
40 nvidia,ddc-i2c-bus = <&hdmi_ddc>;
41 nvidia,hpd-gpio = <&gpio TEGRA_GPIO(N, 7)
42 GPIO_ACTIVE_HIGH>;
43 };
44 };
45
46 pinmux@70000014 {
47 pinctrl-names = "default";
48 pinctrl-0 = <&state_default>;
49
50 state_default: pinmux {
51 ata {
52 nvidia,pins = "ata";
53 nvidia,function = "ide";
54 };
55 atb {
56 nvidia,pins = "atb", "gma", "gme";
57 nvidia,function = "sdio4";
58 };
59 atc {
60 nvidia,pins = "atc";
61 nvidia,function = "nand";
62 };
63 atd {
64 nvidia,pins = "atd", "ate", "gmb", "spia",
65 "spib", "spic";
66 nvidia,function = "gmi";
67 };
68 cdev1 {
69 nvidia,pins = "cdev1";
70 nvidia,function = "plla_out";
71 };
72 cdev2 {
73 nvidia,pins = "cdev2";
74 nvidia,function = "pllp_out4";
75 };
76 crtp {
77 nvidia,pins = "crtp", "lm1";
78 nvidia,function = "crt";
79 };
80 csus {
81 nvidia,pins = "csus";
82 nvidia,function = "vi_sensor_clk";
83 };
84 dap1 {
85 nvidia,pins = "dap1";
86 nvidia,function = "dap1";
87 };
88 dap2 {
89 nvidia,pins = "dap2";
90 nvidia,function = "dap2";
91 };
92 dap3 {
93 nvidia,pins = "dap3";
94 nvidia,function = "dap3";
95 };
96 dap4 {
97 nvidia,pins = "dap4";
98 nvidia,function = "dap4";
99 };
100 dta {
101 nvidia,pins = "dta", "dtb", "dtc", "dtd", "dte";
102 nvidia,function = "vi";
103 };
104 dtf {
105 nvidia,pins = "dtf";
106 nvidia,function = "i2c3";
107 };
108 gmc {
109 nvidia,pins = "gmc";
110 nvidia,function = "uartd";
111 };
112 gmd {
113 nvidia,pins = "gmd";
114 nvidia,function = "sflash";
115 };
116 gpu {
117 nvidia,pins = "gpu";
118 nvidia,function = "pwm";
119 };
120 gpu7 {
121 nvidia,pins = "gpu7";
122 nvidia,function = "rtck";
123 };
124 gpv {
125 nvidia,pins = "gpv", "slxa", "slxk";
126 nvidia,function = "pcie";
127 };
128 hdint {
129 nvidia,pins = "hdint", "lpw0", "lpw2", "lsc1",
130 "lsck", "lsda";
131 nvidia,function = "hdmi";
132 };
133 i2cp {
134 nvidia,pins = "i2cp";
135 nvidia,function = "i2cp";
136 };
137 irrx {
138 nvidia,pins = "irrx", "irtx";
139 nvidia,function = "uartb";
140 };
141 kbca {
142 nvidia,pins = "kbca", "kbcb", "kbcc", "kbcd",
143 "kbce", "kbcf";
144 nvidia,function = "kbc";
145 };
146 lcsn {
147 nvidia,pins = "lcsn", "ldc", "lm0", "lpw1",
148 "lsdi", "lvp0";
149 nvidia,function = "rsvd4";
150 };
151 ld0 {
152 nvidia,pins = "ld0", "ld1", "ld2", "ld3", "ld4",
153 "ld5", "ld6", "ld7", "ld8", "ld9",
154 "ld10", "ld11", "ld12", "ld13", "ld14",
155 "ld15", "ld16", "ld17", "ldi", "lhp0",
156 "lhp1", "lhp2", "lhs", "lpp", "lsc0",
157 "lspi", "lvp1", "lvs";
158 nvidia,function = "displaya";
159 };
160 owc {
161 nvidia,pins = "owc", "spdi", "spdo", "uac";
162 nvidia,function = "rsvd2";
163 };
164 pmc {
165 nvidia,pins = "pmc";
166 nvidia,function = "pwr_on";
167 };
168 rm {
169 nvidia,pins = "rm";
170 nvidia,function = "i2c1";
171 };
172 sdb {
173 nvidia,pins = "sdb", "sdc", "sdd";
174 nvidia,function = "sdio3";
175 };
176 sdio1 {
177 nvidia,pins = "sdio1";
178 nvidia,function = "sdio1";
179 };
180 slxc {
181 nvidia,pins = "slxc", "slxd";
182 nvidia,function = "spdif";
183 };
184 spid {
185 nvidia,pins = "spid", "spie", "spif";
186 nvidia,function = "spi1";
187 };
188 spig {
189 nvidia,pins = "spig", "spih";
190 nvidia,function = "spi2_alt";
191 };
192 uaa {
193 nvidia,pins = "uaa", "uab", "uda";
194 nvidia,function = "ulpi";
195 };
196 uad {
197 nvidia,pins = "uad";
198 nvidia,function = "irda";
199 };
200 uca {
201 nvidia,pins = "uca", "ucb";
202 nvidia,function = "uartc";
203 };
204 conf_ata {
205 nvidia,pins = "ata", "atb", "atc", "atd",
206 "cdev1", "cdev2", "dap1", "dap2",
207 "dap4", "ddc", "dtf", "gma", "gmc", "gmd",
208 "gme", "gpu", "gpu7", "i2cp", "irrx",
209 "irtx", "pta", "rm", "sdc", "sdd",
210 "slxd", "slxk", "spdi", "spdo", "uac",
211 "uad", "uca", "ucb", "uda";
212 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
213 nvidia,tristate = <TEGRA_PIN_DISABLE>;
214 };
215 conf_ate {
216 nvidia,pins = "ate", "csus", "dap3",
217 "gpv", "owc", "slxc", "spib", "spid",
218 "spie";
219 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
220 nvidia,tristate = <TEGRA_PIN_ENABLE>;
221 };
222 conf_ck32 {
223 nvidia,pins = "ck32", "ddrc", "pmca", "pmcb",
224 "pmcc", "pmcd", "pmce", "xm2c", "xm2d";
225 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
226 };
227 conf_crtp {
228 nvidia,pins = "crtp", "gmb", "slxa", "spia",
229 "spig", "spih";
230 nvidia,pull = <TEGRA_PIN_PULL_UP>;
231 nvidia,tristate = <TEGRA_PIN_ENABLE>;
232 };
233 conf_dta {
234 nvidia,pins = "dta", "dtb", "dtc", "dtd";
235 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
236 nvidia,tristate = <TEGRA_PIN_DISABLE>;
237 };
238 conf_dte {
239 nvidia,pins = "dte", "spif";
240 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
241 nvidia,tristate = <TEGRA_PIN_ENABLE>;
242 };
243 conf_hdint {
244 nvidia,pins = "hdint", "lcsn", "ldc", "lm1",
245 "lpw1", "lsc1", "lsck", "lsda", "lsdi",
246 "lvp0";
247 nvidia,tristate = <TEGRA_PIN_ENABLE>;
248 };
249 conf_kbca {
250 nvidia,pins = "kbca", "kbcb", "kbcc", "kbcd",
251 "kbce", "kbcf", "sdio1", "spic", "uaa",
252 "uab";
253 nvidia,pull = <TEGRA_PIN_PULL_UP>;
254 nvidia,tristate = <TEGRA_PIN_DISABLE>;
255 };
256 conf_lc {
257 nvidia,pins = "lc", "ls";
258 nvidia,pull = <TEGRA_PIN_PULL_UP>;
259 };
260 conf_ld0 {
261 nvidia,pins = "ld0", "ld1", "ld2", "ld3", "ld4",
262 "ld5", "ld6", "ld7", "ld8", "ld9",
263 "ld10", "ld11", "ld12", "ld13", "ld14",
264 "ld15", "ld16", "ld17", "ldi", "lhp0",
265 "lhp1", "lhp2", "lhs", "lm0", "lpp",
266 "lpw0", "lpw2", "lsc0", "lspi", "lvp1",
267 "lvs", "pmc", "sdb";
268 nvidia,tristate = <TEGRA_PIN_DISABLE>;
269 };
270 conf_ld17_0 {
271 nvidia,pins = "ld17_0", "ld19_18", "ld21_20",
272 "ld23_22";
273 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
274 };
275 drive_sdio1 {
276 nvidia,pins = "drive_sdio1";
277 nvidia,high-speed-mode = <TEGRA_PIN_DISABLE>;
278 nvidia,schmitt = <TEGRA_PIN_DISABLE>;
279 nvidia,low-power-mode = <TEGRA_PIN_LP_DRIVE_DIV_1>;
280 nvidia,pull-down-strength = <31>;
281 nvidia,pull-up-strength = <31>;
282 nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_SLOWEST>;
283 nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_SLOWEST>;
284 };
285 };
286
287 state_i2cmux_ddc: pinmux_i2cmux_ddc {
288 ddc {
289 nvidia,pins = "ddc";
290 nvidia,function = "i2c2";
291 };
292 pta {
293 nvidia,pins = "pta";
294 nvidia,function = "rsvd4";
295 };
296 };
297
298 state_i2cmux_pta: pinmux_i2cmux_pta {
299 ddc {
300 nvidia,pins = "ddc";
301 nvidia,function = "rsvd4";
302 };
303 pta {
304 nvidia,pins = "pta";
305 nvidia,function = "i2c2";
306 };
307 };
308
309 state_i2cmux_idle: pinmux_i2cmux_idle {
310 ddc {
311 nvidia,pins = "ddc";
312 nvidia,function = "rsvd4";
313 };
314 pta {
315 nvidia,pins = "pta";
316 nvidia,function = "rsvd4";
317 };
318 };
319 };
320
321 i2s@70002800 {
322 status = "okay";
323 };
324
325 serial@70006300 {
326 status = "okay";
327 };
328
329 pwm: pwm@7000a000 {
330 status = "okay";
331 };
332
333 i2c@7000c000 {
334 status = "okay";
335 clock-frequency = <400000>;
336
337 wm8903: wm8903@1a {
338 compatible = "wlf,wm8903";
339 reg = <0x1a>;
340 interrupt-parent = <&gpio>;
341 interrupts = <TEGRA_GPIO(X, 3) IRQ_TYPE_LEVEL_HIGH>;
342
343 gpio-controller;
344 #gpio-cells = <2>;
345
346 micdet-cfg = <0>;
347 micdet-delay = <100>;
348 gpio-cfg = <0xffffffff 0xffffffff 0 0xffffffff 0xffffffff>;
349 };
350
351 /* ALS and proximity sensor */
352 isl29018@44 {
353 compatible = "isil,isl29018";
354 reg = <0x44>;
355 interrupt-parent = <&gpio>;
356 interrupts = <TEGRA_GPIO(Z, 2) IRQ_TYPE_LEVEL_HIGH>;
357 };
358
359 gyrometer@68 {
360 compatible = "invn,mpu3050";
361 reg = <0x68>;
362 interrupt-parent = <&gpio>;
363 interrupts = <TEGRA_GPIO(Z, 4) IRQ_TYPE_LEVEL_HIGH>;
364 };
365 };
366
367 i2c@7000c400 {
368 status = "okay";
369 clock-frequency = <100000>;
370 };
371
372 i2cmux {
373 compatible = "i2c-mux-pinctrl";
374 #address-cells = <1>;
375 #size-cells = <0>;
376
377 i2c-parent = <&{/i2c@7000c400}>;
378
379 pinctrl-names = "ddc", "pta", "idle";
380 pinctrl-0 = <&state_i2cmux_ddc>;
381 pinctrl-1 = <&state_i2cmux_pta>;
382 pinctrl-2 = <&state_i2cmux_idle>;
383
384 hdmi_ddc: i2c@0 {
385 reg = <0>;
386 #address-cells = <1>;
387 #size-cells = <0>;
388 };
389
390 lvds_ddc: i2c@1 {
391 reg = <1>;
392 #address-cells = <1>;
393 #size-cells = <0>;
394
395 smart-battery@b {
396 compatible = "ti,bq20z75", "smart-battery-1.1";
397 reg = <0xb>;
398 ti,i2c-retry-count = <2>;
399 ti,poll-retry-count = <10>;
400 };
401 };
402 };
403
404 i2c@7000c500 {
405 status = "okay";
406 clock-frequency = <400000>;
407 };
408
409 i2c@7000d000 {
410 status = "okay";
411 clock-frequency = <400000>;
412
413 magnetometer@c {
414 compatible = "asahi-kasei,ak8975";
415 reg = <0xc>;
416 interrupt-parent = <&gpio>;
417 interrupts = <TEGRA_GPIO(N, 5) IRQ_TYPE_LEVEL_HIGH>;
418 };
419
420 pmic: tps6586x@34 {
421 compatible = "ti,tps6586x";
422 reg = <0x34>;
423 interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
424
425 ti,system-power-controller;
426
427 #gpio-cells = <2>;
428 gpio-controller;
429
430 sys-supply = <&vdd_5v0_reg>;
431 vin-sm0-supply = <&sys_reg>;
432 vin-sm1-supply = <&sys_reg>;
433 vin-sm2-supply = <&sys_reg>;
434 vinldo01-supply = <&sm2_reg>;
435 vinldo23-supply = <&sm2_reg>;
436 vinldo4-supply = <&sm2_reg>;
437 vinldo678-supply = <&sm2_reg>;
438 vinldo9-supply = <&sm2_reg>;
439
440 regulators {
441 sys_reg: sys {
442 regulator-name = "vdd_sys";
443 regulator-always-on;
444 };
445
446 sm0 {
447 regulator-name = "vdd_sm0,vdd_core";
448 regulator-min-microvolt = <1300000>;
449 regulator-max-microvolt = <1300000>;
450 regulator-always-on;
451 };
452
453 sm1 {
454 regulator-name = "vdd_sm1,vdd_cpu";
455 regulator-min-microvolt = <1125000>;
456 regulator-max-microvolt = <1125000>;
457 regulator-always-on;
458 };
459
460 sm2_reg: sm2 {
461 regulator-name = "vdd_sm2,vin_ldo*";
462 regulator-min-microvolt = <3700000>;
463 regulator-max-microvolt = <3700000>;
464 regulator-always-on;
465 };
466
467 /* LDO0 is not connected to anything */
468
469 ldo1 {
470 regulator-name = "vdd_ldo1,avdd_pll*";
471 regulator-min-microvolt = <1100000>;
472 regulator-max-microvolt = <1100000>;
473 regulator-always-on;
474 };
475
476 ldo2 {
477 regulator-name = "vdd_ldo2,vdd_rtc";
478 regulator-min-microvolt = <1200000>;
479 regulator-max-microvolt = <1200000>;
480 };
481
482 ldo3 {
483 regulator-name = "vdd_ldo3,avdd_usb*";
484 regulator-min-microvolt = <3300000>;
485 regulator-max-microvolt = <3300000>;
486 regulator-always-on;
487 };
488
489 ldo4 {
490 regulator-name = "vdd_ldo4,avdd_osc,vddio_sys";
491 regulator-min-microvolt = <1800000>;
492 regulator-max-microvolt = <1800000>;
493 regulator-always-on;
494 };
495
496 ldo5 {
497 regulator-name = "vdd_ldo5,vcore_mmc";
498 regulator-min-microvolt = <2850000>;
499 regulator-max-microvolt = <2850000>;
500 regulator-always-on;
501 };
502
503 ldo6 {
504 regulator-name = "vdd_ldo6,avdd_vdac,vddio_vi,vddio_cam";
505 regulator-min-microvolt = <1800000>;
506 regulator-max-microvolt = <1800000>;
507 };
508
509 hdmi_vdd_reg: ldo7 {
510 regulator-name = "vdd_ldo7,avdd_hdmi,vdd_fuse";
511 regulator-min-microvolt = <3300000>;
512 regulator-max-microvolt = <3300000>;
513 };
514
515 hdmi_pll_reg: ldo8 {
516 regulator-name = "vdd_ldo8,avdd_hdmi_pll";
517 regulator-min-microvolt = <1800000>;
518 regulator-max-microvolt = <1800000>;
519 };
520
521 ldo9 {
522 regulator-name = "vdd_ldo9,avdd_2v85,vdd_ddr_rx";
523 regulator-min-microvolt = <2850000>;
524 regulator-max-microvolt = <2850000>;
525 regulator-always-on;
526 };
527
528 ldo_rtc {
529 regulator-name = "vdd_rtc_out,vdd_cell";
530 regulator-min-microvolt = <3300000>;
531 regulator-max-microvolt = <3300000>;
532 regulator-always-on;
533 };
534 };
535 };
536
537 temperature-sensor@4c {
538 compatible = "onnn,nct1008";
539 reg = <0x4c>;
540 };
541 };
542
543 kbc@7000e200 {
544 status = "okay";
545 nvidia,debounce-delay-ms = <32>;
546 nvidia,repeat-delay-ms = <160>;
547 nvidia,ghost-filter;
548 nvidia,kbc-row-pins = <0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15>;
549 nvidia,kbc-col-pins = <16 17 18 19 20 21 22 23>;
550 linux,keymap = <MATRIX_KEY(0x00, 0x02, KEY_W)
551 MATRIX_KEY(0x00, 0x03, KEY_S)
552 MATRIX_KEY(0x00, 0x04, KEY_A)
553 MATRIX_KEY(0x00, 0x05, KEY_Z)
554 MATRIX_KEY(0x00, 0x07, KEY_FN)
555
556 MATRIX_KEY(0x01, 0x07, KEY_LEFTMETA)
557 MATRIX_KEY(0x02, 0x06, KEY_RIGHTALT)
558 MATRIX_KEY(0x02, 0x07, KEY_LEFTALT)
559
560 MATRIX_KEY(0x03, 0x00, KEY_5)
561 MATRIX_KEY(0x03, 0x01, KEY_4)
562 MATRIX_KEY(0x03, 0x02, KEY_R)
563 MATRIX_KEY(0x03, 0x03, KEY_E)
564 MATRIX_KEY(0x03, 0x04, KEY_F)
565 MATRIX_KEY(0x03, 0x05, KEY_D)
566 MATRIX_KEY(0x03, 0x06, KEY_X)
567
568 MATRIX_KEY(0x04, 0x00, KEY_7)
569 MATRIX_KEY(0x04, 0x01, KEY_6)
570 MATRIX_KEY(0x04, 0x02, KEY_T)
571 MATRIX_KEY(0x04, 0x03, KEY_H)
572 MATRIX_KEY(0x04, 0x04, KEY_G)
573 MATRIX_KEY(0x04, 0x05, KEY_V)
574 MATRIX_KEY(0x04, 0x06, KEY_C)
575 MATRIX_KEY(0x04, 0x07, KEY_SPACE)
576
577 MATRIX_KEY(0x05, 0x00, KEY_9)
578 MATRIX_KEY(0x05, 0x01, KEY_8)
579 MATRIX_KEY(0x05, 0x02, KEY_U)
580 MATRIX_KEY(0x05, 0x03, KEY_Y)
581 MATRIX_KEY(0x05, 0x04, KEY_J)
582 MATRIX_KEY(0x05, 0x05, KEY_N)
583 MATRIX_KEY(0x05, 0x06, KEY_B)
584 MATRIX_KEY(0x05, 0x07, KEY_BACKSLASH)
585
586 MATRIX_KEY(0x06, 0x00, KEY_MINUS)
587 MATRIX_KEY(0x06, 0x01, KEY_0)
588 MATRIX_KEY(0x06, 0x02, KEY_O)
589 MATRIX_KEY(0x06, 0x03, KEY_I)
590 MATRIX_KEY(0x06, 0x04, KEY_L)
591 MATRIX_KEY(0x06, 0x05, KEY_K)
592 MATRIX_KEY(0x06, 0x06, KEY_COMMA)
593 MATRIX_KEY(0x06, 0x07, KEY_M)
594
595 MATRIX_KEY(0x07, 0x01, KEY_EQUAL)
596 MATRIX_KEY(0x07, 0x02, KEY_RIGHTBRACE)
597 MATRIX_KEY(0x07, 0x03, KEY_ENTER)
598 MATRIX_KEY(0x07, 0x07, KEY_MENU)
599
600 MATRIX_KEY(0x08, 0x04, KEY_RIGHTSHIFT)
601 MATRIX_KEY(0x08, 0x05, KEY_LEFTSHIFT)
602
603 MATRIX_KEY(0x09, 0x05, KEY_RIGHTCTRL)
604 MATRIX_KEY(0x09, 0x07, KEY_LEFTCTRL)
605
606 MATRIX_KEY(0x0B, 0x00, KEY_LEFTBRACE)
607 MATRIX_KEY(0x0B, 0x01, KEY_P)
608 MATRIX_KEY(0x0B, 0x02, KEY_APOSTROPHE)
609 MATRIX_KEY(0x0B, 0x03, KEY_SEMICOLON)
610 MATRIX_KEY(0x0B, 0x04, KEY_SLASH)
611 MATRIX_KEY(0x0B, 0x05, KEY_DOT)
612
613 MATRIX_KEY(0x0C, 0x00, KEY_F10)
614 MATRIX_KEY(0x0C, 0x01, KEY_F9)
615 MATRIX_KEY(0x0C, 0x02, KEY_BACKSPACE)
616 MATRIX_KEY(0x0C, 0x03, KEY_3)
617 MATRIX_KEY(0x0C, 0x04, KEY_2)
618 MATRIX_KEY(0x0C, 0x05, KEY_UP)
619 MATRIX_KEY(0x0C, 0x06, KEY_PRINT)
620 MATRIX_KEY(0x0C, 0x07, KEY_PAUSE)
621
622 MATRIX_KEY(0x0D, 0x00, KEY_INSERT)
623 MATRIX_KEY(0x0D, 0x01, KEY_DELETE)
624 MATRIX_KEY(0x0D, 0x03, KEY_PAGEUP )
625 MATRIX_KEY(0x0D, 0x04, KEY_PAGEDOWN)
626 MATRIX_KEY(0x0D, 0x05, KEY_RIGHT)
627 MATRIX_KEY(0x0D, 0x06, KEY_DOWN)
628 MATRIX_KEY(0x0D, 0x07, KEY_LEFT)
629
630 MATRIX_KEY(0x0E, 0x00, KEY_F11)
631 MATRIX_KEY(0x0E, 0x01, KEY_F12)
632 MATRIX_KEY(0x0E, 0x02, KEY_F8)
633 MATRIX_KEY(0x0E, 0x03, KEY_Q)
634 MATRIX_KEY(0x0E, 0x04, KEY_F4)
635 MATRIX_KEY(0x0E, 0x05, KEY_F3)
636 MATRIX_KEY(0x0E, 0x06, KEY_1)
637 MATRIX_KEY(0x0E, 0x07, KEY_F7)
638
639 MATRIX_KEY(0x0F, 0x00, KEY_ESC)
640 MATRIX_KEY(0x0F, 0x01, KEY_GRAVE)
641 MATRIX_KEY(0x0F, 0x02, KEY_F5)
642 MATRIX_KEY(0x0F, 0x03, KEY_TAB)
643 MATRIX_KEY(0x0F, 0x04, KEY_F1)
644 MATRIX_KEY(0x0F, 0x05, KEY_F2)
645 MATRIX_KEY(0x0F, 0x06, KEY_CAPSLOCK)
646 MATRIX_KEY(0x0F, 0x07, KEY_F6)
647
648 /* Software Handled Function Keys */
649 MATRIX_KEY(0x14, 0x00, KEY_KP7)
650
651 MATRIX_KEY(0x15, 0x00, KEY_KP9)
652 MATRIX_KEY(0x15, 0x01, KEY_KP8)
653 MATRIX_KEY(0x15, 0x02, KEY_KP4)
654 MATRIX_KEY(0x15, 0x04, KEY_KP1)
655
656 MATRIX_KEY(0x16, 0x01, KEY_KPSLASH)
657 MATRIX_KEY(0x16, 0x02, KEY_KP6)
658 MATRIX_KEY(0x16, 0x03, KEY_KP5)
659 MATRIX_KEY(0x16, 0x04, KEY_KP3)
660 MATRIX_KEY(0x16, 0x05, KEY_KP2)
661 MATRIX_KEY(0x16, 0x07, KEY_KP0)
662
663 MATRIX_KEY(0x1B, 0x01, KEY_KPASTERISK)
664 MATRIX_KEY(0x1B, 0x03, KEY_KPMINUS)
665 MATRIX_KEY(0x1B, 0x04, KEY_KPPLUS)
666 MATRIX_KEY(0x1B, 0x05, KEY_KPDOT)
667
668 MATRIX_KEY(0x1C, 0x05, KEY_VOLUMEUP)
669
670 MATRIX_KEY(0x1D, 0x03, KEY_HOME)
671 MATRIX_KEY(0x1D, 0x04, KEY_END)
672 MATRIX_KEY(0x1D, 0x05, KEY_BRIGHTNESSDOWN)
673 MATRIX_KEY(0x1D, 0x06, KEY_VOLUMEDOWN)
674 MATRIX_KEY(0x1D, 0x07, KEY_BRIGHTNESSUP)
675
676 MATRIX_KEY(0x1E, 0x00, KEY_NUMLOCK)
677 MATRIX_KEY(0x1E, 0x01, KEY_SCROLLLOCK)
678 MATRIX_KEY(0x1E, 0x02, KEY_MUTE)
679
680 MATRIX_KEY(0x1F, 0x04, KEY_HELP)>;
681 };
682
683 pmc@7000e400 {
684 nvidia,invert-interrupt;
685 nvidia,suspend-mode = <1>;
686 nvidia,cpu-pwr-good-time = <5000>;
687 nvidia,cpu-pwr-off-time = <5000>;
688 nvidia,core-pwr-good-time = <3845 3845>;
689 nvidia,core-pwr-off-time = <3875>;
690 nvidia,sys-clock-req-active-high;
691 };
692
693 memory-controller@7000f400 {
694 emc-table@190000 {
695 reg = <190000>;
696 compatible = "nvidia,tegra20-emc-table";
697 clock-frequency = <190000>;
698 nvidia,emc-registers = <0x0000000c 0x00000026
699 0x00000009 0x00000003 0x00000004 0x00000004
700 0x00000002 0x0000000c 0x00000003 0x00000003
701 0x00000002 0x00000001 0x00000004 0x00000005
702 0x00000004 0x00000009 0x0000000d 0x0000059f
703 0x00000000 0x00000003 0x00000003 0x00000003
704 0x00000003 0x00000001 0x0000000b 0x000000c8
705 0x00000003 0x00000007 0x00000004 0x0000000f
706 0x00000002 0x00000000 0x00000000 0x00000002
707 0x00000000 0x00000000 0x00000083 0xa06204ae
708 0x007dc010 0x00000000 0x00000000 0x00000000
709 0x00000000 0x00000000 0x00000000 0x00000000>;
710 };
711
712 emc-table@380000 {
713 reg = <380000>;
714 compatible = "nvidia,tegra20-emc-table";
715 clock-frequency = <380000>;
716 nvidia,emc-registers = <0x00000017 0x0000004b
717 0x00000012 0x00000006 0x00000004 0x00000005
718 0x00000003 0x0000000c 0x00000006 0x00000006
719 0x00000003 0x00000001 0x00000004 0x00000005
720 0x00000004 0x00000009 0x0000000d 0x00000b5f
721 0x00000000 0x00000003 0x00000003 0x00000006
722 0x00000006 0x00000001 0x00000011 0x000000c8
723 0x00000003 0x0000000e 0x00000007 0x0000000f
724 0x00000002 0x00000000 0x00000000 0x00000002
725 0x00000000 0x00000000 0x00000083 0xe044048b
726 0x007d8010 0x00000000 0x00000000 0x00000000
727 0x00000000 0x00000000 0x00000000 0x00000000>;
728 };
729 };
730
731 usb@c5000000 {
732 status = "okay";
733 dr_mode = "otg";
734 };
735
736 usb-phy@c5000000 {
737 status = "okay";
738 vbus-supply = <&vbus_reg>;
739 dr_mode = "otg";
740 };
741
742 usb@c5004000 {
743 status = "okay";
744 nvidia,phy-reset-gpio = <&gpio TEGRA_GPIO(V, 1)
745 GPIO_ACTIVE_LOW>;
746 };
747
748 usb-phy@c5004000 {
749 status = "okay";
750 nvidia,phy-reset-gpio = <&gpio TEGRA_GPIO(V, 1)
751 GPIO_ACTIVE_LOW>;
752 };
753
754 usb@c5008000 {
755 status = "okay";
756 };
757
758 usb-phy@c5008000 {
759 status = "okay";
760 };
761
762 sdhci@c8000000 {
763 status = "okay";
764 power-gpios = <&gpio TEGRA_GPIO(K, 6) GPIO_ACTIVE_HIGH>;
765 bus-width = <4>;
766 keep-power-in-suspend;
767 };
768
769 sdhci@c8000400 {
770 status = "okay";
771 cd-gpios = <&gpio TEGRA_GPIO(I, 5) GPIO_ACTIVE_LOW>;
772 wp-gpios = <&gpio TEGRA_GPIO(H, 1) GPIO_ACTIVE_HIGH>;
773 power-gpios = <&gpio TEGRA_GPIO(I, 6) GPIO_ACTIVE_HIGH>;
774 bus-width = <4>;
775 };
776
777 sdhci@c8000600 {
778 status = "okay";
779 bus-width = <8>;
780 non-removable;
781 };
782
783 backlight: backlight {
784 compatible = "pwm-backlight";
785
786 enable-gpios = <&gpio TEGRA_GPIO(D, 4) GPIO_ACTIVE_HIGH>;
787 power-supply = <&vdd_bl_reg>;
788 pwms = <&pwm 2 5000000>;
789
790 brightness-levels = <0 4 8 16 32 64 128 255>;
791 default-brightness-level = <6>;
792 };
793
794 clocks {
795 compatible = "simple-bus";
796 #address-cells = <1>;
797 #size-cells = <0>;
798
799 clk32k_in: clock@0 {
800 compatible = "fixed-clock";
801 reg = <0>;
802 #clock-cells = <0>;
803 clock-frequency = <32768>;
804 };
805 };
806
807 gpio-keys {
808 compatible = "gpio-keys";
809
810 power {
811 label = "Power";
812 gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_LOW>;
813 linux,code = <KEY_POWER>;
814 wakeup-source;
815 };
816
817 lid {
818 label = "Lid";
819 gpios = <&gpio TEGRA_GPIO(C, 7) GPIO_ACTIVE_HIGH>;
820 linux,input-type = <5>; /* EV_SW */
821 linux,code = <0>; /* SW_LID */
822 debounce-interval = <1>;
823 wakeup-source;
824 };
825 };
826
827 panel: panel {
828 compatible = "chunghwa,claa101wa01a", "simple-panel";
829
830 power-supply = <&vdd_pnl_reg>;
831 enable-gpios = <&gpio TEGRA_GPIO(B, 2) GPIO_ACTIVE_HIGH>;
832
833 backlight = <&backlight>;
834 ddc-i2c-bus = <&lvds_ddc>;
835 };
836
837 regulators {
838 compatible = "simple-bus";
839 #address-cells = <1>;
840 #size-cells = <0>;
841
842 vdd_5v0_reg: regulator@0 {
843 compatible = "regulator-fixed";
844 reg = <0>;
845 regulator-name = "vdd_5v0";
846 regulator-min-microvolt = <5000000>;
847 regulator-max-microvolt = <5000000>;
848 regulator-always-on;
849 };
850
851 regulator@1 {
852 compatible = "regulator-fixed";
853 reg = <1>;
854 regulator-name = "vdd_1v5";
855 regulator-min-microvolt = <1500000>;
856 regulator-max-microvolt = <1500000>;
857 gpio = <&pmic 0 GPIO_ACTIVE_HIGH>;
858 };
859
860 regulator@2 {
861 compatible = "regulator-fixed";
862 reg = <2>;
863 regulator-name = "vdd_1v2";
864 regulator-min-microvolt = <1200000>;
865 regulator-max-microvolt = <1200000>;
866 gpio = <&pmic 1 GPIO_ACTIVE_HIGH>;
867 enable-active-high;
868 };
869
870 vbus_reg: regulator@3 {
871 compatible = "regulator-fixed";
872 reg = <3>;
873 regulator-name = "vdd_vbus_wup1";
874 regulator-min-microvolt = <5000000>;
875 regulator-max-microvolt = <5000000>;
876 enable-active-high;
877 gpio = <&gpio TEGRA_GPIO(D, 0) 0>;
878 regulator-always-on;
879 regulator-boot-on;
880 };
881
882 vdd_pnl_reg: regulator@4 {
883 compatible = "regulator-fixed";
884 reg = <4>;
885 regulator-name = "vdd_pnl";
886 regulator-min-microvolt = <2800000>;
887 regulator-max-microvolt = <2800000>;
888 gpio = <&gpio TEGRA_GPIO(C, 6) GPIO_ACTIVE_HIGH>;
889 enable-active-high;
890 };
891
892 vdd_bl_reg: regulator@5 {
893 compatible = "regulator-fixed";
894 reg = <5>;
895 regulator-name = "vdd_bl";
896 regulator-min-microvolt = <2800000>;
897 regulator-max-microvolt = <2800000>;
898 gpio = <&gpio TEGRA_GPIO(W, 0) GPIO_ACTIVE_HIGH>;
899 enable-active-high;
900 };
901
902 vdd_hdmi: regulator@6 {
903 compatible = "regulator-fixed";
904 reg = <6>;
905 regulator-name = "VDDIO_HDMI";
906 regulator-min-microvolt = <5000000>;
907 regulator-max-microvolt = <5000000>;
908 gpio = <&gpio TEGRA_GPIO(V, 5) GPIO_ACTIVE_HIGH>;
909 enable-active-high;
910 vin-supply = <&vdd_5v0_reg>;
911 };
912 };
913
914 sound {
915 compatible = "nvidia,tegra-audio-wm8903-seaboard",
916 "nvidia,tegra-audio-wm8903";
917 nvidia,model = "NVIDIA Tegra Seaboard";
918
919 nvidia,audio-routing =
920 "Headphone Jack", "HPOUTR",
921 "Headphone Jack", "HPOUTL",
922 "Int Spk", "ROP",
923 "Int Spk", "RON",
924 "Int Spk", "LOP",
925 "Int Spk", "LON",
926 "Mic Jack", "MICBIAS",
927 "IN1R", "Mic Jack";
928
929 nvidia,i2s-controller = <&tegra_i2s1>;
930 nvidia,audio-codec = <&wm8903>;
931
932 nvidia,spkr-en-gpios = <&wm8903 2 GPIO_ACTIVE_HIGH>;
933 nvidia,hp-det-gpios = <&gpio TEGRA_GPIO(X, 1) GPIO_ACTIVE_HIGH>;
934
935 clocks = <&tegra_car TEGRA20_CLK_PLL_A>,
936 <&tegra_car TEGRA20_CLK_PLL_A_OUT0>,
937 <&tegra_car TEGRA20_CLK_CDEV1>;
938 clock-names = "pll_a", "pll_a_out0", "mclk";
939 };
940};