Loading...
1// SPDX-License-Identifier: GPL-2.0-or-later
2/*
3 * at91sam9260.dtsi - Device Tree Include file for AT91SAM9260 family SoC
4 *
5 * Copyright (C) 2011 Atmel,
6 * 2011 Nicolas Ferre <nicolas.ferre@atmel.com>,
7 * 2011 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
8 */
9
10#include <dt-bindings/pinctrl/at91.h>
11#include <dt-bindings/interrupt-controller/irq.h>
12#include <dt-bindings/gpio/gpio.h>
13#include <dt-bindings/clock/at91.h>
14#include <dt-bindings/mfd/at91-usart.h>
15
16/ {
17 #address-cells = <1>;
18 #size-cells = <1>;
19 model = "Atmel AT91SAM9260 family SoC";
20 compatible = "atmel,at91sam9260";
21 interrupt-parent = <&aic>;
22
23 aliases {
24 serial0 = &dbgu;
25 serial1 = &usart0;
26 serial2 = &usart1;
27 serial3 = &usart2;
28 serial4 = &usart3;
29 serial5 = &uart0;
30 serial6 = &uart1;
31 gpio0 = &pioA;
32 gpio1 = &pioB;
33 gpio2 = &pioC;
34 tcb0 = &tcb0;
35 tcb1 = &tcb1;
36 i2c0 = &i2c0;
37 ssc0 = &ssc0;
38 };
39 cpus {
40 #address-cells = <1>;
41 #size-cells = <0>;
42
43 cpu@0 {
44 compatible = "arm,arm926ej-s";
45 device_type = "cpu";
46 reg = <0>;
47 };
48 };
49
50 memory@20000000 {
51 device_type = "memory";
52 reg = <0x20000000 0x04000000>;
53 };
54
55 clocks {
56 slow_xtal: slow_xtal {
57 compatible = "fixed-clock";
58 #clock-cells = <0>;
59 clock-frequency = <0>;
60 };
61
62 main_xtal: main_xtal {
63 compatible = "fixed-clock";
64 #clock-cells = <0>;
65 clock-frequency = <0>;
66 };
67
68 adc_op_clk: adc_op_clk{
69 compatible = "fixed-clock";
70 #clock-cells = <0>;
71 clock-frequency = <5000000>;
72 };
73 };
74
75 sram0: sram@2ff000 {
76 compatible = "mmio-sram";
77 reg = <0x002ff000 0x2000>;
78 #address-cells = <1>;
79 #size-cells = <1>;
80 ranges = <0 0x002ff000 0x2000>;
81 };
82
83 ahb {
84 compatible = "simple-bus";
85 #address-cells = <1>;
86 #size-cells = <1>;
87 ranges;
88
89 apb {
90 compatible = "simple-bus";
91 #address-cells = <1>;
92 #size-cells = <1>;
93 ranges;
94
95 aic: interrupt-controller@fffff000 {
96 #interrupt-cells = <3>;
97 compatible = "atmel,at91rm9200-aic";
98 interrupt-controller;
99 reg = <0xfffff000 0x200>;
100 atmel,external-irqs = <29 30 31>;
101 };
102
103 ramc0: ramc@ffffea00 {
104 compatible = "atmel,at91sam9260-sdramc";
105 reg = <0xffffea00 0x200>;
106 };
107
108 smc: smc@ffffec00 {
109 compatible = "atmel,at91sam9260-smc", "syscon";
110 reg = <0xffffec00 0x200>;
111 };
112
113 matrix: matrix@ffffee00 {
114 compatible = "atmel,at91sam9260-matrix", "syscon";
115 reg = <0xffffee00 0x200>;
116 };
117
118 pmc: pmc@fffffc00 {
119 compatible = "atmel,at91sam9260-pmc", "syscon";
120 reg = <0xfffffc00 0x100>;
121 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
122 #clock-cells = <2>;
123 clocks = <&slow_xtal>, <&main_xtal>;
124 clock-names = "slow_xtal", "main_xtal";
125 };
126
127 reset-controller@fffffd00 {
128 compatible = "atmel,at91sam9260-rstc";
129 reg = <0xfffffd00 0x10>;
130 clocks = <&pmc PMC_TYPE_CORE PMC_SLOW>;
131 };
132
133 shdwc@fffffd10 {
134 compatible = "atmel,at91sam9260-shdwc";
135 reg = <0xfffffd10 0x10>;
136 clocks = <&pmc PMC_TYPE_CORE PMC_SLOW>;
137 };
138
139 pit: timer@fffffd30 {
140 compatible = "atmel,at91sam9260-pit";
141 reg = <0xfffffd30 0xf>;
142 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
143 clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
144 };
145
146 tcb0: timer@fffa0000 {
147 compatible = "atmel,at91rm9200-tcb", "simple-mfd", "syscon";
148 #address-cells = <1>;
149 #size-cells = <0>;
150 reg = <0xfffa0000 0x100>;
151 interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0
152 18 IRQ_TYPE_LEVEL_HIGH 0
153 19 IRQ_TYPE_LEVEL_HIGH 0>;
154 clocks = <&pmc PMC_TYPE_PERIPHERAL 17>, <&pmc PMC_TYPE_PERIPHERAL 18>, <&pmc PMC_TYPE_PERIPHERAL 19>, <&pmc PMC_TYPE_CORE PMC_SLOW>;
155 clock-names = "t0_clk", "t1_clk", "t2_clk", "slow_clk";
156 };
157
158 tcb1: timer@fffdc000 {
159 compatible = "atmel,at91rm9200-tcb", "simple-mfd", "syscon";
160 #address-cells = <1>;
161 #size-cells = <0>;
162 reg = <0xfffdc000 0x100>;
163 interrupts = <26 IRQ_TYPE_LEVEL_HIGH 0
164 27 IRQ_TYPE_LEVEL_HIGH 0
165 28 IRQ_TYPE_LEVEL_HIGH 0>;
166 clocks = <&pmc PMC_TYPE_PERIPHERAL 26>, <&pmc PMC_TYPE_PERIPHERAL 27>, <&pmc PMC_TYPE_PERIPHERAL 28>, <&pmc PMC_TYPE_CORE PMC_SLOW>;
167 clock-names = "t0_clk", "t1_clk", "t2_clk", "slow_clk";
168 };
169
170 pinctrl: pinctrl@fffff400 {
171 #address-cells = <1>;
172 #size-cells = <1>;
173 compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
174 ranges = <0xfffff400 0xfffff400 0x600>;
175
176 atmel,mux-mask = <
177 /* A B */
178 0xffffffff 0xffc00c3b /* pioA */
179 0xffffffff 0x7fff3ccf /* pioB */
180 0xffffffff 0x007fffff /* pioC */
181 >;
182
183 /* shared pinctrl settings */
184 dbgu {
185 pinctrl_dbgu: dbgu-0 {
186 atmel,pins =
187 <AT91_PIOB 14 AT91_PERIPH_A AT91_PINCTRL_PULL_UP
188 AT91_PIOB 15 AT91_PERIPH_A AT91_PINCTRL_NONE>;
189 };
190 };
191
192 usart0 {
193 pinctrl_usart0: usart0-0 {
194 atmel,pins =
195 <AT91_PIOB 4 AT91_PERIPH_A AT91_PINCTRL_PULL_UP
196 AT91_PIOB 5 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
197 };
198
199 pinctrl_usart0_rts: usart0_rts-0 {
200 atmel,pins =
201 <AT91_PIOB 26 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB26 periph A */
202 };
203
204 pinctrl_usart0_cts: usart0_cts-0 {
205 atmel,pins =
206 <AT91_PIOB 27 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB27 periph A */
207 };
208
209 pinctrl_usart0_dtr_dsr: usart0_dtr_dsr-0 {
210 atmel,pins =
211 <AT91_PIOB 24 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB24 periph A */
212 AT91_PIOB 22 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB22 periph A */
213 };
214
215 pinctrl_usart0_dcd: usart0_dcd-0 {
216 atmel,pins =
217 <AT91_PIOB 23 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB23 periph A */
218 };
219
220 pinctrl_usart0_ri: usart0_ri-0 {
221 atmel,pins =
222 <AT91_PIOB 25 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB25 periph A */
223 };
224 };
225
226 usart1 {
227 pinctrl_usart1: usart1-0 {
228 atmel,pins =
229 <AT91_PIOB 6 AT91_PERIPH_A AT91_PINCTRL_PULL_UP
230 AT91_PIOB 7 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
231 };
232
233 pinctrl_usart1_rts: usart1_rts-0 {
234 atmel,pins =
235 <AT91_PIOB 28 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB28 periph A */
236 };
237
238 pinctrl_usart1_cts: usart1_cts-0 {
239 atmel,pins =
240 <AT91_PIOB 29 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB29 periph A */
241 };
242 };
243
244 usart2 {
245 pinctrl_usart2: usart2-0 {
246 atmel,pins =
247 <AT91_PIOB 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP
248 AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
249 };
250
251 pinctrl_usart2_rts: usart2_rts-0 {
252 atmel,pins =
253 <AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA4 periph A */
254 };
255
256 pinctrl_usart2_cts: usart2_cts-0 {
257 atmel,pins =
258 <AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA5 periph A */
259 };
260 };
261
262 usart3 {
263 pinctrl_usart3: usart3-0 {
264 atmel,pins =
265 <AT91_PIOB 10 AT91_PERIPH_A AT91_PINCTRL_PULL_UP
266 AT91_PIOB 11 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
267 };
268
269 pinctrl_usart3_rts: usart3_rts-0 {
270 atmel,pins =
271 <AT91_PIOC 8 AT91_PERIPH_B AT91_PINCTRL_NONE>;
272 };
273
274 pinctrl_usart3_cts: usart3_cts-0 {
275 atmel,pins =
276 <AT91_PIOC 10 AT91_PERIPH_B AT91_PINCTRL_NONE>;
277 };
278 };
279
280 uart0 {
281 pinctrl_uart0: uart0-0 {
282 atmel,pins =
283 <AT91_PIOA 31 AT91_PERIPH_B AT91_PINCTRL_PULL_UP
284 AT91_PIOA 30 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>;
285 };
286 };
287
288 uart1 {
289 pinctrl_uart1: uart1-0 {
290 atmel,pins =
291 <AT91_PIOB 12 AT91_PERIPH_A AT91_PINCTRL_PULL_UP
292 AT91_PIOB 13 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
293 };
294 };
295
296 nand {
297 pinctrl_nand_rb: nand-rb-0 {
298 atmel,pins =
299 <AT91_PIOC 13 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>;
300 };
301
302 pinctrl_nand_cs: nand-cs-0 {
303 atmel,pins =
304 <AT91_PIOC 14 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>;
305 };
306 };
307
308 macb {
309 pinctrl_macb_rmii: macb_rmii-0 {
310 atmel,pins =
311 <AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA12 periph A */
312 AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA13 periph A */
313 AT91_PIOA 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA14 periph A */
314 AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA15 periph A */
315 AT91_PIOA 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA16 periph A */
316 AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA17 periph A */
317 AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA18 periph A */
318 AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA19 periph A */
319 AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA20 periph A */
320 AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA21 periph A */
321 };
322
323 pinctrl_macb_rmii_mii: macb_rmii_mii-0 {
324 atmel,pins =
325 <AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA22 periph B */
326 AT91_PIOA 23 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA23 periph B */
327 AT91_PIOA 24 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA24 periph B */
328 AT91_PIOA 25 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA25 periph B */
329 AT91_PIOA 26 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA26 periph B */
330 AT91_PIOA 27 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA27 periph B */
331 AT91_PIOA 28 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA28 periph B */
332 AT91_PIOA 29 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA29 periph B */
333 };
334
335 pinctrl_macb_rmii_mii_alt: macb_rmii_mii-1 {
336 atmel,pins =
337 <AT91_PIOA 10 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA10 periph B */
338 AT91_PIOA 11 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA11 periph B */
339 AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA22 periph B */
340 AT91_PIOA 25 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA25 periph B */
341 AT91_PIOA 26 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA26 periph B */
342 AT91_PIOA 27 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA27 periph B */
343 AT91_PIOA 28 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA28 periph B */
344 AT91_PIOA 29 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA29 periph B */
345 };
346 };
347
348 mmc0 {
349 pinctrl_mmc0_clk: mmc0_clk-0 {
350 atmel,pins =
351 <AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA8 periph A */
352 };
353
354 pinctrl_mmc0_slot0_cmd_dat0: mmc0_slot0_cmd_dat0-0 {
355 atmel,pins =
356 <AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA7 periph A with pullup */
357 AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA6 periph A with pullup */
358 };
359
360 pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
361 atmel,pins =
362 <AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA9 periph A with pullup */
363 AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA10 periph A with pullup */
364 AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA11 periph A with pullup */
365 };
366
367 pinctrl_mmc0_slot1_cmd_dat0: mmc0_slot1_cmd_dat0-0 {
368 atmel,pins =
369 <AT91_PIOA 1 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA1 periph B with pullup */
370 AT91_PIOA 0 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PA0 periph B with pullup */
371 };
372
373 pinctrl_mmc0_slot1_dat1_3: mmc0_slot1_dat1_3-0 {
374 atmel,pins =
375 <AT91_PIOA 5 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA5 periph B with pullup */
376 AT91_PIOA 4 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA4 periph B with pullup */
377 AT91_PIOA 3 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PA3 periph B with pullup */
378 };
379 };
380
381 ssc0 {
382 pinctrl_ssc0_tx: ssc0_tx-0 {
383 atmel,pins =
384 <AT91_PIOB 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB16 periph A */
385 AT91_PIOB 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB17 periph A */
386 AT91_PIOB 18 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB18 periph A */
387 };
388
389 pinctrl_ssc0_rx: ssc0_rx-0 {
390 atmel,pins =
391 <AT91_PIOB 19 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB19 periph A */
392 AT91_PIOB 20 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB20 periph A */
393 AT91_PIOB 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB21 periph A */
394 };
395 };
396
397 spi0 {
398 pinctrl_spi0: spi0-0 {
399 atmel,pins =
400 <AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA0 periph A SPI0_MISO pin */
401 AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA1 periph A SPI0_MOSI pin */
402 AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA2 periph A SPI0_SPCK pin */
403 };
404 };
405
406 spi1 {
407 pinctrl_spi1: spi1-0 {
408 atmel,pins =
409 <AT91_PIOB 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB0 periph A SPI1_MISO pin */
410 AT91_PIOB 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB1 periph A SPI1_MOSI pin */
411 AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB2 periph A SPI1_SPCK pin */
412 };
413 };
414
415 i2c_gpio0 {
416 pinctrl_i2c_gpio0: i2c_gpio0-0 {
417 atmel,pins =
418 <AT91_PIOA 23 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE
419 AT91_PIOA 24 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>;
420 };
421 };
422
423 tcb0 {
424 pinctrl_tcb0_tclk0: tcb0_tclk0-0 {
425 atmel,pins = <AT91_PIOA 25 AT91_PERIPH_A AT91_PINCTRL_NONE>;
426 };
427
428 pinctrl_tcb0_tclk1: tcb0_tclk1-0 {
429 atmel,pins = <AT91_PIOB 6 AT91_PERIPH_B AT91_PINCTRL_NONE>;
430 };
431
432 pinctrl_tcb0_tclk2: tcb0_tclk2-0 {
433 atmel,pins = <AT91_PIOB 7 AT91_PERIPH_B AT91_PINCTRL_NONE>;
434 };
435
436 pinctrl_tcb0_tioa0: tcb0_tioa0-0 {
437 atmel,pins = <AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_NONE>;
438 };
439
440 pinctrl_tcb0_tioa1: tcb0_tioa1-0 {
441 atmel,pins = <AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_NONE>;
442 };
443
444 pinctrl_tcb0_tioa2: tcb0_tioa2-0 {
445 atmel,pins = <AT91_PIOA 28 AT91_PERIPH_A AT91_PINCTRL_NONE>;
446 };
447
448 pinctrl_tcb0_tiob0: tcb0_tiob0-0 {
449 atmel,pins = <AT91_PIOC 9 AT91_PERIPH_B AT91_PINCTRL_NONE>;
450 };
451
452 pinctrl_tcb0_tiob1: tcb0_tiob1-0 {
453 atmel,pins = <AT91_PIOC 7 AT91_PERIPH_A AT91_PINCTRL_NONE>;
454 };
455
456 pinctrl_tcb0_tiob2: tcb0_tiob2-0 {
457 atmel,pins = <AT91_PIOC 6 AT91_PERIPH_A AT91_PINCTRL_NONE>;
458 };
459 };
460
461 tcb1 {
462 pinctrl_tcb1_tclk0: tcb1_tclk0-0 {
463 atmel,pins = <AT91_PIOB 16 AT91_PERIPH_B AT91_PINCTRL_NONE>;
464 };
465
466 pinctrl_tcb1_tclk1: tcb1_tclk1-0 {
467 atmel,pins = <AT91_PIOB 17 AT91_PERIPH_B AT91_PINCTRL_NONE>;
468 };
469
470 pinctrl_tcb1_tclk2: tcb1_tclk2-0 {
471 atmel,pins = <AT91_PIOC 22 AT91_PERIPH_B AT91_PINCTRL_NONE>;
472 };
473
474 pinctrl_tcb1_tioa0: tcb1_tioa0-0 {
475 atmel,pins = <AT91_PIOB 0 AT91_PERIPH_B AT91_PINCTRL_NONE>;
476 };
477
478 pinctrl_tcb1_tioa1: tcb1_tioa1-0 {
479 atmel,pins = <AT91_PIOB 2 AT91_PERIPH_B AT91_PINCTRL_NONE>;
480 };
481
482 pinctrl_tcb1_tioa2: tcb1_tioa2-0 {
483 atmel,pins = <AT91_PIOB 3 AT91_PERIPH_B AT91_PINCTRL_NONE>;
484 };
485
486 pinctrl_tcb1_tiob0: tcb1_tiob0-0 {
487 atmel,pins = <AT91_PIOB 1 AT91_PERIPH_B AT91_PINCTRL_NONE>;
488 };
489
490 pinctrl_tcb1_tiob1: tcb1_tiob1-0 {
491 atmel,pins = <AT91_PIOB 18 AT91_PERIPH_B AT91_PINCTRL_NONE>;
492 };
493
494 pinctrl_tcb1_tiob2: tcb1_tiob2-0 {
495 atmel,pins = <AT91_PIOB 19 AT91_PERIPH_B AT91_PINCTRL_NONE>;
496 };
497 };
498
499 pioA: gpio@fffff400 {
500 compatible = "atmel,at91rm9200-gpio";
501 reg = <0xfffff400 0x200>;
502 interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
503 #gpio-cells = <2>;
504 gpio-controller;
505 interrupt-controller;
506 #interrupt-cells = <2>;
507 clocks = <&pmc PMC_TYPE_PERIPHERAL 2>;
508 };
509
510 pioB: gpio@fffff600 {
511 compatible = "atmel,at91rm9200-gpio";
512 reg = <0xfffff600 0x200>;
513 interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
514 #gpio-cells = <2>;
515 gpio-controller;
516 interrupt-controller;
517 #interrupt-cells = <2>;
518 clocks = <&pmc PMC_TYPE_PERIPHERAL 3>;
519 };
520
521 pioC: gpio@fffff800 {
522 compatible = "atmel,at91rm9200-gpio";
523 reg = <0xfffff800 0x200>;
524 interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>;
525 #gpio-cells = <2>;
526 gpio-controller;
527 interrupt-controller;
528 #interrupt-cells = <2>;
529 clocks = <&pmc PMC_TYPE_PERIPHERAL 4>;
530 };
531 };
532
533 dbgu: serial@fffff200 {
534 compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";
535 reg = <0xfffff200 0x200>;
536 atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
537 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
538 pinctrl-names = "default";
539 pinctrl-0 = <&pinctrl_dbgu>;
540 clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
541 clock-names = "usart";
542 status = "disabled";
543 };
544
545 usart0: serial@fffb0000 {
546 compatible = "atmel,at91sam9260-usart";
547 reg = <0xfffb0000 0x200>;
548 atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
549 interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>;
550 atmel,use-dma-rx;
551 atmel,use-dma-tx;
552 pinctrl-names = "default";
553 pinctrl-0 = <&pinctrl_usart0>;
554 clocks = <&pmc PMC_TYPE_PERIPHERAL 6>;
555 clock-names = "usart";
556 status = "disabled";
557 };
558
559 usart1: serial@fffb4000 {
560 compatible = "atmel,at91sam9260-usart";
561 reg = <0xfffb4000 0x200>;
562 atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
563 interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
564 atmel,use-dma-rx;
565 atmel,use-dma-tx;
566 pinctrl-names = "default";
567 pinctrl-0 = <&pinctrl_usart1>;
568 clocks = <&pmc PMC_TYPE_PERIPHERAL 7>;
569 clock-names = "usart";
570 status = "disabled";
571 };
572
573 usart2: serial@fffb8000 {
574 compatible = "atmel,at91sam9260-usart";
575 reg = <0xfffb8000 0x200>;
576 atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
577 interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>;
578 atmel,use-dma-rx;
579 atmel,use-dma-tx;
580 pinctrl-names = "default";
581 pinctrl-0 = <&pinctrl_usart2>;
582 clocks = <&pmc PMC_TYPE_PERIPHERAL 8>;
583 clock-names = "usart";
584 status = "disabled";
585 };
586
587 usart3: serial@fffd0000 {
588 compatible = "atmel,at91sam9260-usart";
589 reg = <0xfffd0000 0x200>;
590 atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
591 interrupts = <23 IRQ_TYPE_LEVEL_HIGH 5>;
592 atmel,use-dma-rx;
593 atmel,use-dma-tx;
594 pinctrl-names = "default";
595 pinctrl-0 = <&pinctrl_usart3>;
596 clocks = <&pmc PMC_TYPE_PERIPHERAL 23>;
597 clock-names = "usart";
598 status = "disabled";
599 };
600
601 uart0: serial@fffd4000 {
602 compatible = "atmel,at91sam9260-usart";
603 reg = <0xfffd4000 0x200>;
604 atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
605 interrupts = <24 IRQ_TYPE_LEVEL_HIGH 5>;
606 atmel,use-dma-rx;
607 atmel,use-dma-tx;
608 pinctrl-names = "default";
609 pinctrl-0 = <&pinctrl_uart0>;
610 clocks = <&pmc PMC_TYPE_PERIPHERAL 24>;
611 clock-names = "usart";
612 status = "disabled";
613 };
614
615 uart1: serial@fffd8000 {
616 compatible = "atmel,at91sam9260-usart";
617 reg = <0xfffd8000 0x200>;
618 atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
619 interrupts = <25 IRQ_TYPE_LEVEL_HIGH 5>;
620 atmel,use-dma-rx;
621 atmel,use-dma-tx;
622 pinctrl-names = "default";
623 pinctrl-0 = <&pinctrl_uart1>;
624 clocks = <&pmc PMC_TYPE_PERIPHERAL 25>;
625 clock-names = "usart";
626 status = "disabled";
627 };
628
629 macb0: ethernet@fffc4000 {
630 compatible = "cdns,at91sam9260-macb", "cdns,macb";
631 reg = <0xfffc4000 0x100>;
632 interrupts = <21 IRQ_TYPE_LEVEL_HIGH 3>;
633 pinctrl-names = "default";
634 pinctrl-0 = <&pinctrl_macb_rmii>;
635 clocks = <&pmc PMC_TYPE_PERIPHERAL 21>, <&pmc PMC_TYPE_PERIPHERAL 21>;
636 clock-names = "hclk", "pclk";
637 status = "disabled";
638 };
639
640 usb1: gadget@fffa4000 {
641 compatible = "atmel,at91sam9260-udc";
642 reg = <0xfffa4000 0x4000>;
643 interrupts = <10 IRQ_TYPE_LEVEL_HIGH 2>;
644 clocks = <&pmc PMC_TYPE_PERIPHERAL 10>, <&pmc PMC_TYPE_SYSTEM 7>;
645 clock-names = "pclk", "hclk";
646 status = "disabled";
647 };
648
649 i2c0: i2c@fffac000 {
650 compatible = "atmel,at91sam9260-i2c";
651 reg = <0xfffac000 0x100>;
652 interrupts = <11 IRQ_TYPE_LEVEL_HIGH 6>;
653 #address-cells = <1>;
654 #size-cells = <0>;
655 clocks = <&pmc PMC_TYPE_PERIPHERAL 11>;
656 status = "disabled";
657 };
658
659 mmc0: mmc@fffa8000 {
660 compatible = "atmel,hsmci";
661 reg = <0xfffa8000 0x600>;
662 interrupts = <9 IRQ_TYPE_LEVEL_HIGH 0>;
663 #address-cells = <1>;
664 #size-cells = <0>;
665 clocks = <&pmc PMC_TYPE_PERIPHERAL 9>;
666 clock-names = "mci_clk";
667 status = "disabled";
668 };
669
670 ssc0: ssc@fffbc000 {
671 compatible = "atmel,at91rm9200-ssc";
672 reg = <0xfffbc000 0x4000>;
673 interrupts = <14 IRQ_TYPE_LEVEL_HIGH 5>;
674 pinctrl-names = "default";
675 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
676 clocks = <&pmc PMC_TYPE_PERIPHERAL 14>;
677 clock-names = "pclk";
678 status = "disabled";
679 };
680
681 spi0: spi@fffc8000 {
682 #address-cells = <1>;
683 #size-cells = <0>;
684 compatible = "atmel,at91rm9200-spi";
685 reg = <0xfffc8000 0x200>;
686 interrupts = <12 IRQ_TYPE_LEVEL_HIGH 3>;
687 pinctrl-names = "default";
688 pinctrl-0 = <&pinctrl_spi0>;
689 clocks = <&pmc PMC_TYPE_PERIPHERAL 12>;
690 clock-names = "spi_clk";
691 status = "disabled";
692 };
693
694 spi1: spi@fffcc000 {
695 #address-cells = <1>;
696 #size-cells = <0>;
697 compatible = "atmel,at91rm9200-spi";
698 reg = <0xfffcc000 0x200>;
699 interrupts = <13 IRQ_TYPE_LEVEL_HIGH 3>;
700 pinctrl-names = "default";
701 pinctrl-0 = <&pinctrl_spi1>;
702 clocks = <&pmc PMC_TYPE_PERIPHERAL 13>;
703 clock-names = "spi_clk";
704 status = "disabled";
705 };
706
707 adc0: adc@fffe0000 {
708 compatible = "atmel,at91sam9260-adc";
709 reg = <0xfffe0000 0x100>;
710 interrupts = <5 IRQ_TYPE_LEVEL_HIGH 0>;
711 clocks = <&pmc PMC_TYPE_PERIPHERAL 5>, <&adc_op_clk>;
712 clock-names = "adc_clk", "adc_op_clk";
713 atmel,adc-use-external-triggers;
714 atmel,adc-channels-used = <0xf>;
715 atmel,adc-vref = <3300>;
716 atmel,adc-startup-time = <15>;
717 };
718
719 rtc@fffffd20 {
720 compatible = "atmel,at91sam9260-rtt";
721 reg = <0xfffffd20 0x10>;
722 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
723 clocks = <&pmc PMC_TYPE_CORE PMC_SLOW>;
724 status = "disabled";
725 };
726
727 watchdog: watchdog@fffffd40 {
728 compatible = "atmel,at91sam9260-wdt";
729 reg = <0xfffffd40 0x10>;
730 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
731 clocks = <&pmc PMC_TYPE_CORE PMC_SLOW>;
732 atmel,watchdog-type = "hardware";
733 atmel,reset-type = "all";
734 atmel,dbg-halt;
735 status = "disabled";
736 };
737
738 gpbr: syscon@fffffd50 {
739 compatible = "atmel,at91sam9260-gpbr", "syscon";
740 reg = <0xfffffd50 0x10>;
741 status = "disabled";
742 };
743 };
744
745 usb0: ohci@500000 {
746 compatible = "atmel,at91rm9200-ohci", "usb-ohci";
747 reg = <0x00500000 0x100000>;
748 interrupts = <20 IRQ_TYPE_LEVEL_HIGH 2>;
749 clocks = <&pmc PMC_TYPE_PERIPHERAL 20>, <&pmc PMC_TYPE_PERIPHERAL 20>, <&pmc PMC_TYPE_SYSTEM 6>;
750 clock-names = "ohci_clk", "hclk", "uhpck";
751 status = "disabled";
752 };
753
754 ebi: ebi@10000000 {
755 compatible = "atmel,at91sam9260-ebi";
756 #address-cells = <2>;
757 #size-cells = <1>;
758 atmel,smc = <&smc>;
759 atmel,matrix = <&matrix>;
760 reg = <0x10000000 0x80000000>;
761 ranges = <0x0 0x0 0x10000000 0x10000000
762 0x1 0x0 0x20000000 0x10000000
763 0x2 0x0 0x30000000 0x10000000
764 0x3 0x0 0x40000000 0x10000000
765 0x4 0x0 0x50000000 0x10000000
766 0x5 0x0 0x60000000 0x10000000
767 0x6 0x0 0x70000000 0x10000000
768 0x7 0x0 0x80000000 0x10000000>;
769 clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
770 status = "disabled";
771
772 nand_controller: nand-controller {
773 compatible = "atmel,at91sam9260-nand-controller";
774 #address-cells = <2>;
775 #size-cells = <1>;
776 ranges;
777 status = "disabled";
778 };
779 };
780 };
781
782 i2c_gpio0: i2c-gpio-0 {
783 compatible = "i2c-gpio";
784 gpios = <&pioA 23 GPIO_ACTIVE_HIGH /* sda */
785 &pioA 24 GPIO_ACTIVE_HIGH /* scl */
786 >;
787 i2c-gpio,sda-open-drain;
788 i2c-gpio,scl-open-drain;
789 i2c-gpio,delay-us = <2>; /* ~100 kHz */
790 #address-cells = <1>;
791 #size-cells = <0>;
792 pinctrl-names = "default";
793 pinctrl-0 = <&pinctrl_i2c_gpio0>;
794 status = "disabled";
795 };
796};
1/*
2 * at91sam9260.dtsi - Device Tree Include file for AT91SAM9260 family SoC
3 *
4 * Copyright (C) 2011 Atmel,
5 * 2011 Nicolas Ferre <nicolas.ferre@atmel.com>,
6 * 2011 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
7 *
8 * Licensed under GPLv2 or later.
9 */
10
11#include "skeleton.dtsi"
12#include <dt-bindings/pinctrl/at91.h>
13#include <dt-bindings/interrupt-controller/irq.h>
14#include <dt-bindings/gpio/gpio.h>
15#include <dt-bindings/clock/at91.h>
16
17/ {
18 model = "Atmel AT91SAM9260 family SoC";
19 compatible = "atmel,at91sam9260";
20 interrupt-parent = <&aic>;
21
22 aliases {
23 serial0 = &dbgu;
24 serial1 = &usart0;
25 serial2 = &usart1;
26 serial3 = &usart2;
27 serial4 = &usart3;
28 serial5 = &uart0;
29 serial6 = &uart1;
30 gpio0 = &pioA;
31 gpio1 = &pioB;
32 gpio2 = &pioC;
33 tcb0 = &tcb0;
34 tcb1 = &tcb1;
35 i2c0 = &i2c0;
36 ssc0 = &ssc0;
37 };
38 cpus {
39 #address-cells = <0>;
40 #size-cells = <0>;
41
42 cpu {
43 compatible = "arm,arm926ej-s";
44 device_type = "cpu";
45 };
46 };
47
48 memory {
49 reg = <0x20000000 0x04000000>;
50 };
51
52 clocks {
53 slow_xtal: slow_xtal {
54 compatible = "fixed-clock";
55 #clock-cells = <0>;
56 clock-frequency = <0>;
57 };
58
59 main_xtal: main_xtal {
60 compatible = "fixed-clock";
61 #clock-cells = <0>;
62 clock-frequency = <0>;
63 };
64
65 adc_op_clk: adc_op_clk{
66 compatible = "fixed-clock";
67 #clock-cells = <0>;
68 clock-frequency = <5000000>;
69 };
70 };
71
72 sram0: sram@002ff000 {
73 compatible = "mmio-sram";
74 reg = <0x002ff000 0x2000>;
75 };
76
77 ahb {
78 compatible = "simple-bus";
79 #address-cells = <1>;
80 #size-cells = <1>;
81 ranges;
82
83 apb {
84 compatible = "simple-bus";
85 #address-cells = <1>;
86 #size-cells = <1>;
87 ranges;
88
89 aic: interrupt-controller@fffff000 {
90 #interrupt-cells = <3>;
91 compatible = "atmel,at91rm9200-aic";
92 interrupt-controller;
93 reg = <0xfffff000 0x200>;
94 atmel,external-irqs = <29 30 31>;
95 };
96
97 ramc0: ramc@ffffea00 {
98 compatible = "atmel,at91sam9260-sdramc";
99 reg = <0xffffea00 0x200>;
100 };
101
102 pmc: pmc@fffffc00 {
103 compatible = "atmel,at91sam9260-pmc", "syscon";
104 reg = <0xfffffc00 0x100>;
105 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
106 interrupt-controller;
107 #address-cells = <1>;
108 #size-cells = <0>;
109 #interrupt-cells = <1>;
110
111 main_osc: main_osc {
112 compatible = "atmel,at91rm9200-clk-main-osc";
113 #clock-cells = <0>;
114 interrupts-extended = <&pmc AT91_PMC_MOSCS>;
115 clocks = <&main_xtal>;
116 };
117
118 main: mainck {
119 compatible = "atmel,at91rm9200-clk-main";
120 #clock-cells = <0>;
121 clocks = <&main_osc>;
122 };
123
124 slow_rc_osc: slow_rc_osc {
125 compatible = "fixed-clock";
126 #clock-cells = <0>;
127 clock-frequency = <32768>;
128 clock-accuracy = <50000000>;
129 };
130
131 clk32k: slck {
132 compatible = "atmel,at91sam9260-clk-slow";
133 #clock-cells = <0>;
134 clocks = <&slow_rc_osc>, <&slow_xtal>;
135 };
136
137 plla: pllack {
138 compatible = "atmel,at91rm9200-clk-pll";
139 #clock-cells = <0>;
140 interrupts-extended = <&pmc AT91_PMC_LOCKA>;
141 clocks = <&main>;
142 reg = <0>;
143 atmel,clk-input-range = <1000000 32000000>;
144 #atmel,pll-clk-output-range-cells = <4>;
145 atmel,pll-clk-output-ranges = <80000000 160000000 0 1>,
146 <150000000 240000000 2 1>;
147 };
148
149 pllb: pllbck {
150 compatible = "atmel,at91rm9200-clk-pll";
151 #clock-cells = <0>;
152 interrupts-extended = <&pmc AT91_PMC_LOCKB>;
153 clocks = <&main>;
154 reg = <1>;
155 atmel,clk-input-range = <1000000 5000000>;
156 #atmel,pll-clk-output-range-cells = <4>;
157 atmel,pll-clk-output-ranges = <70000000 130000000 1 1>;
158 };
159
160 mck: masterck {
161 compatible = "atmel,at91rm9200-clk-master";
162 #clock-cells = <0>;
163 interrupts-extended = <&pmc AT91_PMC_MCKRDY>;
164 clocks = <&clk32k>, <&main>, <&plla>, <&pllb>;
165 atmel,clk-output-range = <0 105000000>;
166 atmel,clk-divisors = <1 2 4 0>;
167 };
168
169 usb: usbck {
170 compatible = "atmel,at91rm9200-clk-usb";
171 #clock-cells = <0>;
172 atmel,clk-divisors = <1 2 4 0>;
173 clocks = <&pllb>;
174 };
175
176 prog: progck {
177 compatible = "atmel,at91rm9200-clk-programmable";
178 #address-cells = <1>;
179 #size-cells = <0>;
180 interrupt-parent = <&pmc>;
181 clocks = <&clk32k>, <&main>, <&plla>, <&pllb>;
182
183 prog0: prog0 {
184 #clock-cells = <0>;
185 reg = <0>;
186 interrupts = <AT91_PMC_PCKRDY(0)>;
187 };
188
189 prog1: prog1 {
190 #clock-cells = <0>;
191 reg = <1>;
192 interrupts = <AT91_PMC_PCKRDY(1)>;
193 };
194 };
195
196 systemck {
197 compatible = "atmel,at91rm9200-clk-system";
198 #address-cells = <1>;
199 #size-cells = <0>;
200
201 uhpck: uhpck {
202 #clock-cells = <0>;
203 reg = <6>;
204 clocks = <&usb>;
205 };
206
207 udpck: udpck {
208 #clock-cells = <0>;
209 reg = <7>;
210 clocks = <&usb>;
211 };
212
213 pck0: pck0 {
214 #clock-cells = <0>;
215 reg = <8>;
216 clocks = <&prog0>;
217 };
218
219 pck1: pck1 {
220 #clock-cells = <0>;
221 reg = <9>;
222 clocks = <&prog1>;
223 };
224 };
225
226 periphck {
227 compatible = "atmel,at91rm9200-clk-peripheral";
228 #address-cells = <1>;
229 #size-cells = <0>;
230 clocks = <&mck>;
231
232 pioA_clk: pioA_clk {
233 #clock-cells = <0>;
234 reg = <2>;
235 };
236
237 pioB_clk: pioB_clk {
238 #clock-cells = <0>;
239 reg = <3>;
240 };
241
242 pioC_clk: pioC_clk {
243 #clock-cells = <0>;
244 reg = <4>;
245 };
246
247 adc_clk: adc_clk {
248 #clock-cells = <0>;
249 reg = <5>;
250 };
251
252 usart0_clk: usart0_clk {
253 #clock-cells = <0>;
254 reg = <6>;
255 };
256
257 usart1_clk: usart1_clk {
258 #clock-cells = <0>;
259 reg = <7>;
260 };
261
262 usart2_clk: usart2_clk {
263 #clock-cells = <0>;
264 reg = <8>;
265 };
266
267 mci0_clk: mci0_clk {
268 #clock-cells = <0>;
269 reg = <9>;
270 };
271
272 udc_clk: udc_clk {
273 #clock-cells = <0>;
274 reg = <10>;
275 };
276
277 twi0_clk: twi0_clk {
278 reg = <11>;
279 #clock-cells = <0>;
280 };
281
282 spi0_clk: spi0_clk {
283 #clock-cells = <0>;
284 reg = <12>;
285 };
286
287 spi1_clk: spi1_clk {
288 #clock-cells = <0>;
289 reg = <13>;
290 };
291
292 ssc0_clk: ssc0_clk {
293 #clock-cells = <0>;
294 reg = <14>;
295 };
296
297 tc0_clk: tc0_clk {
298 #clock-cells = <0>;
299 reg = <17>;
300 };
301
302 tc1_clk: tc1_clk {
303 #clock-cells = <0>;
304 reg = <18>;
305 };
306
307 tc2_clk: tc2_clk {
308 #clock-cells = <0>;
309 reg = <19>;
310 };
311
312 ohci_clk: ohci_clk {
313 #clock-cells = <0>;
314 reg = <20>;
315 };
316
317 macb0_clk: macb0_clk {
318 #clock-cells = <0>;
319 reg = <21>;
320 };
321
322 isi_clk: isi_clk {
323 #clock-cells = <0>;
324 reg = <22>;
325 };
326
327 usart3_clk: usart3_clk {
328 #clock-cells = <0>;
329 reg = <23>;
330 };
331
332 uart0_clk: uart0_clk {
333 #clock-cells = <0>;
334 reg = <24>;
335 };
336
337 uart1_clk: uart1_clk {
338 #clock-cells = <0>;
339 reg = <25>;
340 };
341
342 tc3_clk: tc3_clk {
343 #clock-cells = <0>;
344 reg = <26>;
345 };
346
347 tc4_clk: tc4_clk {
348 #clock-cells = <0>;
349 reg = <27>;
350 };
351
352 tc5_clk: tc5_clk {
353 #clock-cells = <0>;
354 reg = <28>;
355 };
356 };
357 };
358
359 rstc@fffffd00 {
360 compatible = "atmel,at91sam9260-rstc";
361 reg = <0xfffffd00 0x10>;
362 clocks = <&clk32k>;
363 };
364
365 shdwc@fffffd10 {
366 compatible = "atmel,at91sam9260-shdwc";
367 reg = <0xfffffd10 0x10>;
368 clocks = <&clk32k>;
369 };
370
371 pit: timer@fffffd30 {
372 compatible = "atmel,at91sam9260-pit";
373 reg = <0xfffffd30 0xf>;
374 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
375 clocks = <&mck>;
376 };
377
378 tcb0: timer@fffa0000 {
379 compatible = "atmel,at91rm9200-tcb";
380 reg = <0xfffa0000 0x100>;
381 interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0
382 18 IRQ_TYPE_LEVEL_HIGH 0
383 19 IRQ_TYPE_LEVEL_HIGH 0>;
384 clocks = <&tc0_clk>, <&tc1_clk>, <&tc2_clk>, <&clk32k>;
385 clock-names = "t0_clk", "t1_clk", "t2_clk", "slow_clk";
386 };
387
388 tcb1: timer@fffdc000 {
389 compatible = "atmel,at91rm9200-tcb";
390 reg = <0xfffdc000 0x100>;
391 interrupts = <26 IRQ_TYPE_LEVEL_HIGH 0
392 27 IRQ_TYPE_LEVEL_HIGH 0
393 28 IRQ_TYPE_LEVEL_HIGH 0>;
394 clocks = <&tc3_clk>, <&tc4_clk>, <&tc5_clk>, <&clk32k>;
395 clock-names = "t0_clk", "t1_clk", "t2_clk", "slow_clk";
396 };
397
398 pinctrl@fffff400 {
399 #address-cells = <1>;
400 #size-cells = <1>;
401 compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
402 ranges = <0xfffff400 0xfffff400 0x600>;
403
404 atmel,mux-mask = <
405 /* A B */
406 0xffffffff 0xffc00c3b /* pioA */
407 0xffffffff 0x7fff3ccf /* pioB */
408 0xffffffff 0x007fffff /* pioC */
409 >;
410
411 /* shared pinctrl settings */
412 dbgu {
413 pinctrl_dbgu: dbgu-0 {
414 atmel,pins =
415 <AT91_PIOB 14 AT91_PERIPH_A AT91_PINCTRL_PULL_UP
416 AT91_PIOB 15 AT91_PERIPH_A AT91_PINCTRL_NONE>;
417 };
418 };
419
420 usart0 {
421 pinctrl_usart0: usart0-0 {
422 atmel,pins =
423 <AT91_PIOB 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB4 periph A */
424 AT91_PIOB 5 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB5 periph A */
425 };
426
427 pinctrl_usart0_rts: usart0_rts-0 {
428 atmel,pins =
429 <AT91_PIOB 26 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB26 periph A */
430 };
431
432 pinctrl_usart0_cts: usart0_cts-0 {
433 atmel,pins =
434 <AT91_PIOB 27 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB27 periph A */
435 };
436
437 pinctrl_usart0_dtr_dsr: usart0_dtr_dsr-0 {
438 atmel,pins =
439 <AT91_PIOB 24 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB24 periph A */
440 AT91_PIOB 22 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB22 periph A */
441 };
442
443 pinctrl_usart0_dcd: usart0_dcd-0 {
444 atmel,pins =
445 <AT91_PIOB 23 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB23 periph A */
446 };
447
448 pinctrl_usart0_ri: usart0_ri-0 {
449 atmel,pins =
450 <AT91_PIOB 25 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB25 periph A */
451 };
452 };
453
454 usart1 {
455 pinctrl_usart1: usart1-0 {
456 atmel,pins =
457 <AT91_PIOB 6 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB6 periph A with pullup */
458 AT91_PIOB 7 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB7 periph A */
459 };
460
461 pinctrl_usart1_rts: usart1_rts-0 {
462 atmel,pins =
463 <AT91_PIOB 28 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB28 periph A */
464 };
465
466 pinctrl_usart1_cts: usart1_cts-0 {
467 atmel,pins =
468 <AT91_PIOB 29 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB29 periph A */
469 };
470 };
471
472 usart2 {
473 pinctrl_usart2: usart2-0 {
474 atmel,pins =
475 <AT91_PIOB 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB8 periph A with pullup */
476 AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB9 periph A */
477 };
478
479 pinctrl_usart2_rts: usart2_rts-0 {
480 atmel,pins =
481 <AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA4 periph A */
482 };
483
484 pinctrl_usart2_cts: usart2_cts-0 {
485 atmel,pins =
486 <AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA5 periph A */
487 };
488 };
489
490 usart3 {
491 pinctrl_usart3: usart3-0 {
492 atmel,pins =
493 <AT91_PIOB 10 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB10 periph A with pullup */
494 AT91_PIOB 11 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB11 periph A */
495 };
496
497 pinctrl_usart3_rts: usart3_rts-0 {
498 atmel,pins =
499 <AT91_PIOC 8 AT91_PERIPH_B AT91_PINCTRL_NONE>;
500 };
501
502 pinctrl_usart3_cts: usart3_cts-0 {
503 atmel,pins =
504 <AT91_PIOC 10 AT91_PERIPH_B AT91_PINCTRL_NONE>;
505 };
506 };
507
508 uart0 {
509 pinctrl_uart0: uart0-0 {
510 atmel,pins =
511 <AT91_PIOA 31 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA31 periph B with pullup */
512 AT91_PIOA 30 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA30 periph B */
513 };
514 };
515
516 uart1 {
517 pinctrl_uart1: uart1-0 {
518 atmel,pins =
519 <AT91_PIOB 12 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB12 periph A with pullup */
520 AT91_PIOB 13 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB13 periph A */
521 };
522 };
523
524 nand {
525 pinctrl_nand: nand-0 {
526 atmel,pins =
527 <AT91_PIOC 13 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP /* PC13 gpio RDY pin pull_up */
528 AT91_PIOC 14 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>; /* PC14 gpio enable pin pull_up */
529 };
530 };
531
532 macb {
533 pinctrl_macb_rmii: macb_rmii-0 {
534 atmel,pins =
535 <AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA12 periph A */
536 AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA13 periph A */
537 AT91_PIOA 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA14 periph A */
538 AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA15 periph A */
539 AT91_PIOA 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA16 periph A */
540 AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA17 periph A */
541 AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA18 periph A */
542 AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA19 periph A */
543 AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA20 periph A */
544 AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA21 periph A */
545 };
546
547 pinctrl_macb_rmii_mii: macb_rmii_mii-0 {
548 atmel,pins =
549 <AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA22 periph B */
550 AT91_PIOA 23 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA23 periph B */
551 AT91_PIOA 24 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA24 periph B */
552 AT91_PIOA 25 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA25 periph B */
553 AT91_PIOA 26 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA26 periph B */
554 AT91_PIOA 27 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA27 periph B */
555 AT91_PIOA 28 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA28 periph B */
556 AT91_PIOA 29 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA29 periph B */
557 };
558
559 pinctrl_macb_rmii_mii_alt: macb_rmii_mii-1 {
560 atmel,pins =
561 <AT91_PIOA 10 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA10 periph B */
562 AT91_PIOA 11 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA11 periph B */
563 AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA22 periph B */
564 AT91_PIOA 25 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA25 periph B */
565 AT91_PIOA 26 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA26 periph B */
566 AT91_PIOA 27 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA27 periph B */
567 AT91_PIOA 28 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA28 periph B */
568 AT91_PIOA 29 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA29 periph B */
569 };
570 };
571
572 mmc0 {
573 pinctrl_mmc0_clk: mmc0_clk-0 {
574 atmel,pins =
575 <AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA8 periph A */
576 };
577
578 pinctrl_mmc0_slot0_cmd_dat0: mmc0_slot0_cmd_dat0-0 {
579 atmel,pins =
580 <AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA7 periph A with pullup */
581 AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA6 periph A with pullup */
582 };
583
584 pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
585 atmel,pins =
586 <AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA9 periph A with pullup */
587 AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA10 periph A with pullup */
588 AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA11 periph A with pullup */
589 };
590
591 pinctrl_mmc0_slot1_cmd_dat0: mmc0_slot1_cmd_dat0-0 {
592 atmel,pins =
593 <AT91_PIOA 1 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA1 periph B with pullup */
594 AT91_PIOA 0 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PA0 periph B with pullup */
595 };
596
597 pinctrl_mmc0_slot1_dat1_3: mmc0_slot1_dat1_3-0 {
598 atmel,pins =
599 <AT91_PIOA 5 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA5 periph B with pullup */
600 AT91_PIOA 4 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA4 periph B with pullup */
601 AT91_PIOA 3 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PA3 periph B with pullup */
602 };
603 };
604
605 ssc0 {
606 pinctrl_ssc0_tx: ssc0_tx-0 {
607 atmel,pins =
608 <AT91_PIOB 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB16 periph A */
609 AT91_PIOB 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB17 periph A */
610 AT91_PIOB 18 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB18 periph A */
611 };
612
613 pinctrl_ssc0_rx: ssc0_rx-0 {
614 atmel,pins =
615 <AT91_PIOB 19 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB19 periph A */
616 AT91_PIOB 20 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB20 periph A */
617 AT91_PIOB 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB21 periph A */
618 };
619 };
620
621 spi0 {
622 pinctrl_spi0: spi0-0 {
623 atmel,pins =
624 <AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA0 periph A SPI0_MISO pin */
625 AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA1 periph A SPI0_MOSI pin */
626 AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA2 periph A SPI0_SPCK pin */
627 };
628 };
629
630 spi1 {
631 pinctrl_spi1: spi1-0 {
632 atmel,pins =
633 <AT91_PIOB 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB0 periph A SPI1_MISO pin */
634 AT91_PIOB 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB1 periph A SPI1_MOSI pin */
635 AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB2 periph A SPI1_SPCK pin */
636 };
637 };
638
639 i2c_gpio0 {
640 pinctrl_i2c_gpio0: i2c_gpio0-0 {
641 atmel,pins =
642 <AT91_PIOA 23 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE
643 AT91_PIOA 24 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>;
644 };
645 };
646
647 tcb0 {
648 pinctrl_tcb0_tclk0: tcb0_tclk0-0 {
649 atmel,pins = <AT91_PIOA 25 AT91_PERIPH_A AT91_PINCTRL_NONE>;
650 };
651
652 pinctrl_tcb0_tclk1: tcb0_tclk1-0 {
653 atmel,pins = <AT91_PIOB 6 AT91_PERIPH_B AT91_PINCTRL_NONE>;
654 };
655
656 pinctrl_tcb0_tclk2: tcb0_tclk2-0 {
657 atmel,pins = <AT91_PIOB 7 AT91_PERIPH_B AT91_PINCTRL_NONE>;
658 };
659
660 pinctrl_tcb0_tioa0: tcb0_tioa0-0 {
661 atmel,pins = <AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_NONE>;
662 };
663
664 pinctrl_tcb0_tioa1: tcb0_tioa1-0 {
665 atmel,pins = <AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_NONE>;
666 };
667
668 pinctrl_tcb0_tioa2: tcb0_tioa2-0 {
669 atmel,pins = <AT91_PIOA 28 AT91_PERIPH_A AT91_PINCTRL_NONE>;
670 };
671
672 pinctrl_tcb0_tiob0: tcb0_tiob0-0 {
673 atmel,pins = <AT91_PIOC 9 AT91_PERIPH_B AT91_PINCTRL_NONE>;
674 };
675
676 pinctrl_tcb0_tiob1: tcb0_tiob1-0 {
677 atmel,pins = <AT91_PIOC 7 AT91_PERIPH_A AT91_PINCTRL_NONE>;
678 };
679
680 pinctrl_tcb0_tiob2: tcb0_tiob2-0 {
681 atmel,pins = <AT91_PIOC 6 AT91_PERIPH_A AT91_PINCTRL_NONE>;
682 };
683 };
684
685 tcb1 {
686 pinctrl_tcb1_tclk0: tcb1_tclk0-0 {
687 atmel,pins = <AT91_PIOB 16 AT91_PERIPH_B AT91_PINCTRL_NONE>;
688 };
689
690 pinctrl_tcb1_tclk1: tcb1_tclk1-0 {
691 atmel,pins = <AT91_PIOB 17 AT91_PERIPH_B AT91_PINCTRL_NONE>;
692 };
693
694 pinctrl_tcb1_tclk2: tcb1_tclk2-0 {
695 atmel,pins = <AT91_PIOC 22 AT91_PERIPH_B AT91_PINCTRL_NONE>;
696 };
697
698 pinctrl_tcb1_tioa0: tcb1_tioa0-0 {
699 atmel,pins = <AT91_PIOB 0 AT91_PERIPH_B AT91_PINCTRL_NONE>;
700 };
701
702 pinctrl_tcb1_tioa1: tcb1_tioa1-0 {
703 atmel,pins = <AT91_PIOB 2 AT91_PERIPH_B AT91_PINCTRL_NONE>;
704 };
705
706 pinctrl_tcb1_tioa2: tcb1_tioa2-0 {
707 atmel,pins = <AT91_PIOB 3 AT91_PERIPH_B AT91_PINCTRL_NONE>;
708 };
709
710 pinctrl_tcb1_tiob0: tcb1_tiob0-0 {
711 atmel,pins = <AT91_PIOB 1 AT91_PERIPH_B AT91_PINCTRL_NONE>;
712 };
713
714 pinctrl_tcb1_tiob1: tcb1_tiob1-0 {
715 atmel,pins = <AT91_PIOB 18 AT91_PERIPH_B AT91_PINCTRL_NONE>;
716 };
717
718 pinctrl_tcb1_tiob2: tcb1_tiob2-0 {
719 atmel,pins = <AT91_PIOB 19 AT91_PERIPH_B AT91_PINCTRL_NONE>;
720 };
721 };
722
723 pioA: gpio@fffff400 {
724 compatible = "atmel,at91rm9200-gpio";
725 reg = <0xfffff400 0x200>;
726 interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
727 #gpio-cells = <2>;
728 gpio-controller;
729 interrupt-controller;
730 #interrupt-cells = <2>;
731 clocks = <&pioA_clk>;
732 };
733
734 pioB: gpio@fffff600 {
735 compatible = "atmel,at91rm9200-gpio";
736 reg = <0xfffff600 0x200>;
737 interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
738 #gpio-cells = <2>;
739 gpio-controller;
740 interrupt-controller;
741 #interrupt-cells = <2>;
742 clocks = <&pioB_clk>;
743 };
744
745 pioC: gpio@fffff800 {
746 compatible = "atmel,at91rm9200-gpio";
747 reg = <0xfffff800 0x200>;
748 interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>;
749 #gpio-cells = <2>;
750 gpio-controller;
751 interrupt-controller;
752 #interrupt-cells = <2>;
753 clocks = <&pioC_clk>;
754 };
755 };
756
757 dbgu: serial@fffff200 {
758 compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";
759 reg = <0xfffff200 0x200>;
760 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
761 pinctrl-names = "default";
762 pinctrl-0 = <&pinctrl_dbgu>;
763 clocks = <&mck>;
764 clock-names = "usart";
765 status = "disabled";
766 };
767
768 usart0: serial@fffb0000 {
769 compatible = "atmel,at91sam9260-usart";
770 reg = <0xfffb0000 0x200>;
771 interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>;
772 atmel,use-dma-rx;
773 atmel,use-dma-tx;
774 pinctrl-names = "default";
775 pinctrl-0 = <&pinctrl_usart0>;
776 clocks = <&usart0_clk>;
777 clock-names = "usart";
778 status = "disabled";
779 };
780
781 usart1: serial@fffb4000 {
782 compatible = "atmel,at91sam9260-usart";
783 reg = <0xfffb4000 0x200>;
784 interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
785 atmel,use-dma-rx;
786 atmel,use-dma-tx;
787 pinctrl-names = "default";
788 pinctrl-0 = <&pinctrl_usart1>;
789 clocks = <&usart1_clk>;
790 clock-names = "usart";
791 status = "disabled";
792 };
793
794 usart2: serial@fffb8000 {
795 compatible = "atmel,at91sam9260-usart";
796 reg = <0xfffb8000 0x200>;
797 interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>;
798 atmel,use-dma-rx;
799 atmel,use-dma-tx;
800 pinctrl-names = "default";
801 pinctrl-0 = <&pinctrl_usart2>;
802 clocks = <&usart2_clk>;
803 clock-names = "usart";
804 status = "disabled";
805 };
806
807 usart3: serial@fffd0000 {
808 compatible = "atmel,at91sam9260-usart";
809 reg = <0xfffd0000 0x200>;
810 interrupts = <23 IRQ_TYPE_LEVEL_HIGH 5>;
811 atmel,use-dma-rx;
812 atmel,use-dma-tx;
813 pinctrl-names = "default";
814 pinctrl-0 = <&pinctrl_usart3>;
815 clocks = <&usart3_clk>;
816 clock-names = "usart";
817 status = "disabled";
818 };
819
820 uart0: serial@fffd4000 {
821 compatible = "atmel,at91sam9260-usart";
822 reg = <0xfffd4000 0x200>;
823 interrupts = <24 IRQ_TYPE_LEVEL_HIGH 5>;
824 atmel,use-dma-rx;
825 atmel,use-dma-tx;
826 pinctrl-names = "default";
827 pinctrl-0 = <&pinctrl_uart0>;
828 clocks = <&uart0_clk>;
829 clock-names = "usart";
830 status = "disabled";
831 };
832
833 uart1: serial@fffd8000 {
834 compatible = "atmel,at91sam9260-usart";
835 reg = <0xfffd8000 0x200>;
836 interrupts = <25 IRQ_TYPE_LEVEL_HIGH 5>;
837 atmel,use-dma-rx;
838 atmel,use-dma-tx;
839 pinctrl-names = "default";
840 pinctrl-0 = <&pinctrl_uart1>;
841 clocks = <&uart1_clk>;
842 clock-names = "usart";
843 status = "disabled";
844 };
845
846 macb0: ethernet@fffc4000 {
847 compatible = "cdns,at91sam9260-macb", "cdns,macb";
848 reg = <0xfffc4000 0x100>;
849 interrupts = <21 IRQ_TYPE_LEVEL_HIGH 3>;
850 pinctrl-names = "default";
851 pinctrl-0 = <&pinctrl_macb_rmii>;
852 clocks = <&macb0_clk>, <&macb0_clk>;
853 clock-names = "hclk", "pclk";
854 status = "disabled";
855 };
856
857 usb1: gadget@fffa4000 {
858 compatible = "atmel,at91sam9260-udc";
859 reg = <0xfffa4000 0x4000>;
860 interrupts = <10 IRQ_TYPE_LEVEL_HIGH 2>;
861 clocks = <&udc_clk>, <&udpck>;
862 clock-names = "pclk", "hclk";
863 status = "disabled";
864 };
865
866 i2c0: i2c@fffac000 {
867 compatible = "atmel,at91sam9260-i2c";
868 reg = <0xfffac000 0x100>;
869 interrupts = <11 IRQ_TYPE_LEVEL_HIGH 6>;
870 #address-cells = <1>;
871 #size-cells = <0>;
872 clocks = <&twi0_clk>;
873 status = "disabled";
874 };
875
876 mmc0: mmc@fffa8000 {
877 compatible = "atmel,hsmci";
878 reg = <0xfffa8000 0x600>;
879 interrupts = <9 IRQ_TYPE_LEVEL_HIGH 0>;
880 #address-cells = <1>;
881 #size-cells = <0>;
882 pinctrl-names = "default";
883 clocks = <&mci0_clk>;
884 clock-names = "mci_clk";
885 status = "disabled";
886 };
887
888 ssc0: ssc@fffbc000 {
889 compatible = "atmel,at91rm9200-ssc";
890 reg = <0xfffbc000 0x4000>;
891 interrupts = <14 IRQ_TYPE_LEVEL_HIGH 5>;
892 pinctrl-names = "default";
893 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
894 clocks = <&ssc0_clk>;
895 clock-names = "pclk";
896 status = "disabled";
897 };
898
899 spi0: spi@fffc8000 {
900 #address-cells = <1>;
901 #size-cells = <0>;
902 compatible = "atmel,at91rm9200-spi";
903 reg = <0xfffc8000 0x200>;
904 interrupts = <12 IRQ_TYPE_LEVEL_HIGH 3>;
905 pinctrl-names = "default";
906 pinctrl-0 = <&pinctrl_spi0>;
907 clocks = <&spi0_clk>;
908 clock-names = "spi_clk";
909 status = "disabled";
910 };
911
912 spi1: spi@fffcc000 {
913 #address-cells = <1>;
914 #size-cells = <0>;
915 compatible = "atmel,at91rm9200-spi";
916 reg = <0xfffcc000 0x200>;
917 interrupts = <13 IRQ_TYPE_LEVEL_HIGH 3>;
918 pinctrl-names = "default";
919 pinctrl-0 = <&pinctrl_spi1>;
920 clocks = <&spi1_clk>;
921 clock-names = "spi_clk";
922 status = "disabled";
923 };
924
925 adc0: adc@fffe0000 {
926 #address-cells = <1>;
927 #size-cells = <0>;
928 compatible = "atmel,at91sam9260-adc";
929 reg = <0xfffe0000 0x100>;
930 interrupts = <5 IRQ_TYPE_LEVEL_HIGH 0>;
931 clocks = <&adc_clk>, <&adc_op_clk>;
932 clock-names = "adc_clk", "adc_op_clk";
933 atmel,adc-use-external-triggers;
934 atmel,adc-channels-used = <0xf>;
935 atmel,adc-vref = <3300>;
936 atmel,adc-startup-time = <15>;
937 atmel,adc-res = <8 10>;
938 atmel,adc-res-names = "lowres", "highres";
939 atmel,adc-use-res = "highres";
940
941 trigger0 {
942 trigger-name = "timer-counter-0";
943 trigger-value = <0x1>;
944 };
945 trigger1 {
946 trigger-name = "timer-counter-1";
947 trigger-value = <0x3>;
948 };
949
950 trigger2 {
951 trigger-name = "timer-counter-2";
952 trigger-value = <0x5>;
953 };
954
955 trigger3 {
956 trigger-name = "external";
957 trigger-value = <0xd>;
958 trigger-external;
959 };
960 };
961
962 rtc@fffffd20 {
963 compatible = "atmel,at91sam9260-rtt";
964 reg = <0xfffffd20 0x10>;
965 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
966 clocks = <&clk32k>;
967 status = "disabled";
968 };
969
970 watchdog@fffffd40 {
971 compatible = "atmel,at91sam9260-wdt";
972 reg = <0xfffffd40 0x10>;
973 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
974 clocks = <&clk32k>;
975 atmel,watchdog-type = "hardware";
976 atmel,reset-type = "all";
977 atmel,dbg-halt;
978 status = "disabled";
979 };
980
981 gpbr: syscon@fffffd50 {
982 compatible = "atmel,at91sam9260-gpbr", "syscon";
983 reg = <0xfffffd50 0x10>;
984 status = "disabled";
985 };
986 };
987
988 nand0: nand@40000000 {
989 compatible = "atmel,at91rm9200-nand";
990 #address-cells = <1>;
991 #size-cells = <1>;
992 reg = <0x40000000 0x10000000
993 0xffffe800 0x200
994 >;
995 atmel,nand-addr-offset = <21>;
996 atmel,nand-cmd-offset = <22>;
997 pinctrl-names = "default";
998 pinctrl-0 = <&pinctrl_nand>;
999 gpios = <&pioC 13 GPIO_ACTIVE_HIGH
1000 &pioC 14 GPIO_ACTIVE_HIGH
1001 0
1002 >;
1003 status = "disabled";
1004 };
1005
1006 usb0: ohci@500000 {
1007 compatible = "atmel,at91rm9200-ohci", "usb-ohci";
1008 reg = <0x00500000 0x100000>;
1009 interrupts = <20 IRQ_TYPE_LEVEL_HIGH 2>;
1010 clocks = <&ohci_clk>, <&ohci_clk>, <&uhpck>;
1011 clock-names = "ohci_clk", "hclk", "uhpck";
1012 status = "disabled";
1013 };
1014 };
1015
1016 i2c-gpio-0 {
1017 compatible = "i2c-gpio";
1018 gpios = <&pioA 23 GPIO_ACTIVE_HIGH /* sda */
1019 &pioA 24 GPIO_ACTIVE_HIGH /* scl */
1020 >;
1021 i2c-gpio,sda-open-drain;
1022 i2c-gpio,scl-open-drain;
1023 i2c-gpio,delay-us = <2>; /* ~100 kHz */
1024 #address-cells = <1>;
1025 #size-cells = <0>;
1026 pinctrl-names = "default";
1027 pinctrl-0 = <&pinctrl_i2c_gpio0>;
1028 status = "disabled";
1029 };
1030};