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v6.2
  1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
  2/*
  3 * Device Tree Include file for Marvell Armada 398 Development Board
  4 *
  5 * Copyright (C) 2015 Marvell
  6 *
  7 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
  8 */
  9
 10/dts-v1/;
 11#include "armada-398.dtsi"
 12
 13/ {
 14	model = "Marvell Armada 398 Development Board";
 15	compatible = "marvell,a398-db", "marvell,armada398", "marvell,armada390";
 16
 17	chosen {
 18		stdout-path = "serial0:115200n8";
 19	};
 20
 21	memory {
 22		device_type = "memory";
 23		reg = <0x00000000 0x80000000>; /* 2 GB */
 24	};
 25
 26	soc {
 27		ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000
 28			  MBUS_ID(0x01, 0x1d) 0 0xfff00000 0x100000>;
 29
 30		internal-regs {
 31			i2c@11000 {
 32				pinctrl-0 = <&i2c0_pins>;
 33				pinctrl-names = "default";
 34				status = "okay";
 35				clock-frequency = <100000>;
 36			};
 37
 38			serial@12000 {
 39				pinctrl-0 = <&uart0_pins>;
 40				pinctrl-names = "default";
 41				status = "okay";
 42			};
 43
 44			serial@12100 {
 45				pinctrl-0 = <&uart1_pins>;
 46				pinctrl-names = "default";
 47				status = "okay";
 48			};
 49
 50			usb@58000 {
 51				status = "okay";
 52			};
 53
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 54			usb3@f8000 {
 55				status = "okay";
 56			};
 57		};
 58
 59		pcie {
 60			status = "okay";
 61
 62			pcie@1,0 {
 63				status = "okay";
 64			};
 65
 66			pcie@2,0 {
 67				status = "okay";
 68			};
 69
 70			pcie@3,0 {
 71				status = "okay";
 72			};
 73		};
 74	};
 75};
 76
 77&spi1 {
 78	status = "okay";
 79	pinctrl-0 = <&spi1_pins>;
 80	pinctrl-names = "default";
 81
 82	flash@0 {
 83		#address-cells = <1>;
 84		#size-cells = <0>;
 85		compatible = "n25q128a13", "jedec,spi-nor";
 86		reg = <0>;
 87		spi-max-frequency = <108000000>;
 88
 89		partition@0 {
 90			label = "U-Boot";
 91			reg = <0 0x400000>;
 92		};
 93
 94		partition@400000 {
 95			label = "Filesystem";
 96			reg = <0x400000 0x1000000>;
 97		};
 98	};
 99};
100
101&nand_controller {
102	status = "okay";
103	pinctrl-0 = <&nand_pins>;
104	pinctrl-names = "default";
105
106	nand@0 {
107		reg = <0>;
108		label = "pxa3xx_nand-0";
109		nand-rb = <0>;
110		marvell,nand-keep-config;
111		nand-on-flash-bbt;
112		nand-ecc-strength = <8>;
113		nand-ecc-step-size = <512>;
114
115		partitions {
116			compatible = "fixed-partitions";
117			#address-cells = <1>;
118			#size-cells = <1>;
119
120			partition@0 {
121				label = "U-Boot";
122				reg = <0 0x800000>;
123			};
124			partition@800000 {
125				label = "Linux";
126				reg = <0x800000 0x800000>;
127			};
128			partition@1000000 {
129				label = "Filesystem";
130				reg = <0x1000000 0x3f000000>;
131			};
132		};
133	};
134};
v4.10.11
 
  1/*
  2 * Device Tree Include file for Marvell Armada 398 Development Board
  3 *
  4 * Copyright (C) 2015 Marvell
  5 *
  6 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
  7 *
  8 * This file is dual-licensed: you can use it either under the terms
  9 * of the GPL or the X11 license, at your option. Note that this dual
 10 * licensing only applies to this file, and not this project as a
 11 * whole.
 12 *
 13 *  a) This file is free software; you can redistribute it and/or
 14 *     modify it under the terms of the GNU General Public License as
 15 *     published by the Free Software Foundation; either version 2 of the
 16 *     License, or (at your option) any later version.
 17 *
 18 *     This file is distributed in the hope that it will be useful
 19 *     but WITHOUT ANY WARRANTY; without even the implied warranty of
 20 *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 21 *     GNU General Public License for more details.
 22 *
 23 * Or, alternatively
 24 *
 25 *  b) Permission is hereby granted, free of charge, to any person
 26 *     obtaining a copy of this software and associated documentation
 27 *     files (the "Software"), to deal in the Software without
 28 *     restriction, including without limitation the rights to use
 29 *     copy, modify, merge, publish, distribute, sublicense, and/or
 30 *     sell copies of the Software, and to permit persons to whom the
 31 *     Software is furnished to do so, subject to the following
 32 *     conditions:
 33 *
 34 *     The above copyright notice and this permission notice shall be
 35 *     included in all copies or substantial portions of the Software.
 36 *
 37 *     THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
 38 *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
 39 *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
 40 *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
 41 *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
 42 *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
 43 *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 44 *     OTHER DEALINGS IN THE SOFTWARE.
 45 */
 46
 47/dts-v1/;
 48#include "armada-398.dtsi"
 49
 50/ {
 51	model = "Marvell Armada 398 Development Board";
 52	compatible = "marvell,a398-db", "marvell,armada398", "marvell,armada390";
 53
 54	chosen {
 55		stdout-path = "serial0:115200n8";
 56	};
 57
 58	memory {
 59		device_type = "memory";
 60		reg = <0x00000000 0x80000000>; /* 2 GB */
 61	};
 62
 63	soc {
 64		ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000
 65			  MBUS_ID(0x01, 0x1d) 0 0xfff00000 0x100000>;
 66
 67		internal-regs {
 68			i2c@11000 {
 69				pinctrl-0 = <&i2c0_pins>;
 70				pinctrl-names = "default";
 71				status = "okay";
 72				clock-frequency = <100000>;
 73			};
 74
 75			serial@12000 {
 76				pinctrl-0 = <&uart0_pins>;
 77				pinctrl-names = "default";
 78				status = "okay";
 79			};
 80
 81			serial@12100 {
 82				pinctrl-0 = <&uart1_pins>;
 83				pinctrl-names = "default";
 84				status = "okay";
 85			};
 86
 87			usb@58000 {
 88				status = "okay";
 89			};
 90
 91			flash@d0000 {
 92				status = "okay";
 93				pinctrl-0 = <&nand_pins>;
 94				pinctrl-names = "default";
 95				num-cs = <1>;
 96				marvell,nand-keep-config;
 97				marvell,nand-enable-arbiter;
 98				nand-on-flash-bbt;
 99				nand-ecc-strength = <8>;
100				nand-ecc-step-size = <512>;
101
102				partition@0 {
103					label = "U-Boot";
104					reg = <0 0x800000>;
105				};
106				partition@800000 {
107					label = "Linux";
108					reg = <0x800000 0x800000>;
109				};
110				partition@1000000 {
111					label = "Filesystem";
112					reg = <0x1000000 0x3f000000>;
113				};
114			};
115
116			usb3@f8000 {
117				status = "okay";
118			};
119		};
120
121		pcie-controller {
122			status = "okay";
123
124			pcie@1,0 {
125				status = "okay";
126			};
127
128			pcie@2,0 {
129				status = "okay";
130			};
131
132			pcie@3,0 {
133				status = "okay";
134			};
135		};
136	};
137};
138
139&spi1 {
140	status = "okay";
141	pinctrl-0 = <&spi1_pins>;
142	pinctrl-names = "default";
143
144	spi-flash@0 {
145		#address-cells = <1>;
146		#size-cells = <0>;
147		compatible = "n25q128a13", "jedec,spi-nor";
148		reg = <0>;
149		spi-max-frequency = <108000000>;
150
151		partition@0 {
152			label = "U-Boot";
153			reg = <0 0x400000>;
154		};
155
156		partition@400000 {
157			label = "Filesystem";
158			reg = <0x400000 0x1000000>;
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
159		};
160	};
161};