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v6.2
  1// SPDX-License-Identifier: GPL-2.0-only
  2/*
  3 * PCI glue driver for SPI PXA2xx compatible controllers.
  4 * CE4100's SPI device is more or less the same one as found on PXA.
  5 *
  6 * Copyright (C) 2016, 2021 Intel Corporation
  7 */
  8#include <linux/clk-provider.h>
  9#include <linux/module.h>
 
 10#include <linux/pci.h>
 11#include <linux/platform_device.h>
 12
 13#include <linux/spi/pxa2xx_spi.h>
 14
 15#include <linux/dmaengine.h>
 16#include <linux/platform_data/dma-dw.h>
 17
 18#define PCI_DEVICE_ID_INTEL_QUARK_X1000		0x0935
 19#define PCI_DEVICE_ID_INTEL_BYT			0x0f0e
 20#define PCI_DEVICE_ID_INTEL_MRFLD		0x1194
 21#define PCI_DEVICE_ID_INTEL_BSW0		0x228e
 22#define PCI_DEVICE_ID_INTEL_BSW1		0x2290
 23#define PCI_DEVICE_ID_INTEL_BSW2		0x22ac
 24#define PCI_DEVICE_ID_INTEL_CE4100		0x2e6a
 25#define PCI_DEVICE_ID_INTEL_LPT0_0		0x9c65
 26#define PCI_DEVICE_ID_INTEL_LPT0_1		0x9c66
 27#define PCI_DEVICE_ID_INTEL_LPT1_0		0x9ce5
 28#define PCI_DEVICE_ID_INTEL_LPT1_1		0x9ce6
 29
 30struct pxa_spi_info {
 31	int (*setup)(struct pci_dev *pdev, struct pxa2xx_spi_controller *c);
 
 
 
 
 
 
 
 
 
 
 32};
 33
 34static struct dw_dma_slave byt_tx_param = { .dst_id = 0 };
 35static struct dw_dma_slave byt_rx_param = { .src_id = 1 };
 36
 37static struct dw_dma_slave mrfld3_tx_param = { .dst_id = 15 };
 38static struct dw_dma_slave mrfld3_rx_param = { .src_id = 14 };
 39static struct dw_dma_slave mrfld5_tx_param = { .dst_id = 13 };
 40static struct dw_dma_slave mrfld5_rx_param = { .src_id = 12 };
 41static struct dw_dma_slave mrfld6_tx_param = { .dst_id = 11 };
 42static struct dw_dma_slave mrfld6_rx_param = { .src_id = 10 };
 43
 44static struct dw_dma_slave bsw0_tx_param = { .dst_id = 0 };
 45static struct dw_dma_slave bsw0_rx_param = { .src_id = 1 };
 46static struct dw_dma_slave bsw1_tx_param = { .dst_id = 6 };
 47static struct dw_dma_slave bsw1_rx_param = { .src_id = 7 };
 48static struct dw_dma_slave bsw2_tx_param = { .dst_id = 8 };
 49static struct dw_dma_slave bsw2_rx_param = { .src_id = 9 };
 50
 51static struct dw_dma_slave lpt1_tx_param = { .dst_id = 0 };
 52static struct dw_dma_slave lpt1_rx_param = { .src_id = 1 };
 53static struct dw_dma_slave lpt0_tx_param = { .dst_id = 2 };
 54static struct dw_dma_slave lpt0_rx_param = { .src_id = 3 };
 55
 56static void pxa2xx_spi_pci_clk_unregister(void *clk)
 57{
 58	clk_unregister(clk);
 59}
 60
 61static int pxa2xx_spi_pci_clk_register(struct pci_dev *dev, struct ssp_device *ssp,
 62				       unsigned long rate)
 63{
 64	char buf[40];
 65
 66	snprintf(buf, sizeof(buf), "pxa2xx-spi.%d", ssp->port_id);
 67	ssp->clk = clk_register_fixed_rate(&dev->dev, buf, NULL, 0, rate);
 68	if (IS_ERR(ssp->clk))
 69		return PTR_ERR(ssp->clk);
 70
 71	return devm_add_action_or_reset(&dev->dev, pxa2xx_spi_pci_clk_unregister, ssp->clk);
 72}
 73
 74static bool lpss_dma_filter(struct dma_chan *chan, void *param)
 75{
 76	struct dw_dma_slave *dws = param;
 77
 78	if (dws->dma_dev != chan->device->dev)
 79		return false;
 80
 81	chan->private = dws;
 82	return true;
 83}
 84
 85static void lpss_dma_put_device(void *dma_dev)
 86{
 87	pci_dev_put(dma_dev);
 88}
 89
 90static int lpss_spi_setup(struct pci_dev *dev, struct pxa2xx_spi_controller *c)
 91{
 92	struct ssp_device *ssp = &c->ssp;
 93	struct dw_dma_slave *tx, *rx;
 94	struct pci_dev *dma_dev;
 95	int ret;
 96
 97	switch (dev->device) {
 98	case PCI_DEVICE_ID_INTEL_BYT:
 99		ssp->type = LPSS_BYT_SSP;
100		ssp->port_id = 0;
101		c->tx_param = &byt_tx_param;
102		c->rx_param = &byt_rx_param;
103		break;
104	case PCI_DEVICE_ID_INTEL_BSW0:
105		ssp->type = LPSS_BSW_SSP;
106		ssp->port_id = 0;
107		c->tx_param = &bsw0_tx_param;
108		c->rx_param = &bsw0_rx_param;
109		break;
110	case PCI_DEVICE_ID_INTEL_BSW1:
111		ssp->type = LPSS_BSW_SSP;
112		ssp->port_id = 1;
113		c->tx_param = &bsw1_tx_param;
114		c->rx_param = &bsw1_rx_param;
115		break;
116	case PCI_DEVICE_ID_INTEL_BSW2:
117		ssp->type = LPSS_BSW_SSP;
118		ssp->port_id = 2;
119		c->tx_param = &bsw2_tx_param;
120		c->rx_param = &bsw2_rx_param;
121		break;
122	case PCI_DEVICE_ID_INTEL_LPT0_0:
123	case PCI_DEVICE_ID_INTEL_LPT1_0:
124		ssp->type = LPSS_LPT_SSP;
125		ssp->port_id = 0;
126		c->tx_param = &lpt0_tx_param;
127		c->rx_param = &lpt0_rx_param;
128		break;
129	case PCI_DEVICE_ID_INTEL_LPT0_1:
130	case PCI_DEVICE_ID_INTEL_LPT1_1:
131		ssp->type = LPSS_LPT_SSP;
132		ssp->port_id = 1;
133		c->tx_param = &lpt1_tx_param;
134		c->rx_param = &lpt1_rx_param;
135		break;
136	default:
137		return -ENODEV;
138	}
139
140	c->num_chipselect = 1;
141
142	ret = pxa2xx_spi_pci_clk_register(dev, ssp, 50000000);
143	if (ret)
144		return ret;
145
146	dma_dev = pci_get_slot(dev->bus, PCI_DEVFN(PCI_SLOT(dev->devfn), 0));
147	ret = devm_add_action_or_reset(&dev->dev, lpss_dma_put_device, dma_dev);
148	if (ret)
149		return ret;
150
151	tx = c->tx_param;
152	tx->dma_dev = &dma_dev->dev;
153	tx->m_master = 0;
154	tx->p_master = 1;
155
156	rx = c->rx_param;
157	rx->dma_dev = &dma_dev->dev;
158	rx->m_master = 0;
159	rx->p_master = 1;
160
161	c->dma_filter = lpss_dma_filter;
162	c->dma_burst_size = 1;
163	c->enable_dma = 1;
164	return 0;
165}
166
167static const struct pxa_spi_info lpss_info_config = {
168	.setup = lpss_spi_setup,
169};
 
170
171static int ce4100_spi_setup(struct pci_dev *dev, struct pxa2xx_spi_controller *c)
172{
173	struct ssp_device *ssp = &c->ssp;
174
175	ssp->type = PXA25x_SSP;
176	ssp->port_id = dev->devfn;
177	c->num_chipselect = dev->devfn;
 
178
179	return pxa2xx_spi_pci_clk_register(dev, ssp, 3686400);
 
180}
181
182static const struct pxa_spi_info ce4100_info_config = {
183	.setup = ce4100_spi_setup,
184};
185
186static int mrfld_spi_setup(struct pci_dev *dev, struct pxa2xx_spi_controller *c)
187{
188	struct ssp_device *ssp = &c->ssp;
189	struct dw_dma_slave *tx, *rx;
190	struct pci_dev *dma_dev;
191	int ret;
192
193	ssp->type = MRFLD_SSP;
194
195	switch (PCI_FUNC(dev->devfn)) {
196	case 0:
197		ssp->port_id = 3;
198		c->num_chipselect = 1;
199		c->tx_param = &mrfld3_tx_param;
200		c->rx_param = &mrfld3_rx_param;
201		break;
202	case 1:
203		ssp->port_id = 5;
204		c->num_chipselect = 4;
205		c->tx_param = &mrfld5_tx_param;
206		c->rx_param = &mrfld5_rx_param;
207		break;
208	case 2:
209		ssp->port_id = 6;
210		c->num_chipselect = 1;
211		c->tx_param = &mrfld6_tx_param;
212		c->rx_param = &mrfld6_rx_param;
213		break;
214	default:
215		return -ENODEV;
216	}
217
218	ret = pxa2xx_spi_pci_clk_register(dev, ssp, 25000000);
219	if (ret)
220		return ret;
221
222	dma_dev = pci_get_slot(dev->bus, PCI_DEVFN(21, 0));
223	ret = devm_add_action_or_reset(&dev->dev, lpss_dma_put_device, dma_dev);
224	if (ret)
225		return ret;
226
227	tx = c->tx_param;
228	tx->dma_dev = &dma_dev->dev;
229
230	rx = c->rx_param;
231	rx->dma_dev = &dma_dev->dev;
232
233	c->dma_filter = lpss_dma_filter;
234	c->dma_burst_size = 8;
235	c->enable_dma = 1;
236	return 0;
237}
238
239static const struct pxa_spi_info mrfld_info_config = {
240	.setup = mrfld_spi_setup,
241};
242
243static int qrk_spi_setup(struct pci_dev *dev, struct pxa2xx_spi_controller *c)
244{
245	struct ssp_device *ssp = &c->ssp;
246
247	ssp->type = QUARK_X1000_SSP;
248	ssp->port_id = dev->devfn;
249	c->num_chipselect = 1;
250
251	return pxa2xx_spi_pci_clk_register(dev, ssp, 50000000);
252}
253
254static const struct pxa_spi_info qrk_info_config = {
255	.setup = qrk_spi_setup,
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
256};
257
258static int pxa2xx_spi_pci_probe(struct pci_dev *dev,
259		const struct pci_device_id *ent)
260{
261	const struct pxa_spi_info *info;
262	struct platform_device_info pi;
263	int ret;
264	struct platform_device *pdev;
265	struct pxa2xx_spi_controller spi_pdata;
266	struct ssp_device *ssp;
 
 
267
268	ret = pcim_enable_device(dev);
269	if (ret)
270		return ret;
271
272	ret = pcim_iomap_regions(dev, 1 << 0, "PXA2xx SPI");
273	if (ret)
274		return ret;
275
 
 
 
 
 
 
 
276	memset(&spi_pdata, 0, sizeof(spi_pdata));
 
 
 
 
 
277
278	ssp = &spi_pdata.ssp;
279	ssp->dev = &dev->dev;
280	ssp->phys_base = pci_resource_start(dev, 0);
281	ssp->mmio_base = pcim_iomap_table(dev)[0];
 
 
 
282
283	info = (struct pxa_spi_info *)ent->driver_data;
284	ret = info->setup(dev, &spi_pdata);
285	if (ret)
286		return ret;
287
288	pci_set_master(dev);
289
290	ret = pci_alloc_irq_vectors(dev, 1, 1, PCI_IRQ_ALL_TYPES);
291	if (ret < 0)
292		return ret;
293	ssp->irq = pci_irq_vector(dev, 0);
294
295	memset(&pi, 0, sizeof(pi));
296	pi.fwnode = dev_fwnode(&dev->dev);
297	pi.parent = &dev->dev;
298	pi.name = "pxa2xx-spi";
299	pi.id = ssp->port_id;
300	pi.data = &spi_pdata;
301	pi.size_data = sizeof(spi_pdata);
302
303	pdev = platform_device_register_full(&pi);
304	if (IS_ERR(pdev))
 
305		return PTR_ERR(pdev);
 
306
307	pci_set_drvdata(dev, pdev);
308
309	return 0;
310}
311
312static void pxa2xx_spi_pci_remove(struct pci_dev *dev)
313{
314	struct platform_device *pdev = pci_get_drvdata(dev);
 
 
 
315
316	platform_device_unregister(pdev);
 
317}
318
319static const struct pci_device_id pxa2xx_spi_pci_devices[] = {
320	{ PCI_DEVICE_DATA(INTEL, QUARK_X1000, &qrk_info_config) },
321	{ PCI_DEVICE_DATA(INTEL, BYT, &lpss_info_config) },
322	{ PCI_DEVICE_DATA(INTEL, MRFLD, &mrfld_info_config) },
323	{ PCI_DEVICE_DATA(INTEL, BSW0, &lpss_info_config) },
324	{ PCI_DEVICE_DATA(INTEL, BSW1, &lpss_info_config) },
325	{ PCI_DEVICE_DATA(INTEL, BSW2, &lpss_info_config) },
326	{ PCI_DEVICE_DATA(INTEL, CE4100, &ce4100_info_config) },
327	{ PCI_DEVICE_DATA(INTEL, LPT0_0, &lpss_info_config) },
328	{ PCI_DEVICE_DATA(INTEL, LPT0_1, &lpss_info_config) },
329	{ PCI_DEVICE_DATA(INTEL, LPT1_0, &lpss_info_config) },
330	{ PCI_DEVICE_DATA(INTEL, LPT1_1, &lpss_info_config) },
331	{ }
332};
333MODULE_DEVICE_TABLE(pci, pxa2xx_spi_pci_devices);
334
335static struct pci_driver pxa2xx_spi_pci_driver = {
336	.name           = "pxa2xx_spi_pci",
337	.id_table       = pxa2xx_spi_pci_devices,
338	.probe          = pxa2xx_spi_pci_probe,
339	.remove         = pxa2xx_spi_pci_remove,
340};
341
342module_pci_driver(pxa2xx_spi_pci_driver);
343
344MODULE_DESCRIPTION("CE4100/LPSS PCI-SPI glue code for PXA's driver");
345MODULE_LICENSE("GPL v2");
346MODULE_AUTHOR("Sebastian Andrzej Siewior <bigeasy@linutronix.de>");
v4.10.11
 
  1/*
  2 * CE4100's SPI device is more or less the same one as found on PXA
 
  3 *
  4 * Copyright (C) 2016, Intel Corporation
  5 */
  6#include <linux/clk-provider.h>
  7#include <linux/module.h>
  8#include <linux/of_device.h>
  9#include <linux/pci.h>
 10#include <linux/platform_device.h>
 
 11#include <linux/spi/pxa2xx_spi.h>
 12
 13#include <linux/dmaengine.h>
 14#include <linux/platform_data/dma-dw.h>
 15
 16enum {
 17	PORT_QUARK_X1000,
 18	PORT_BYT,
 19	PORT_MRFLD,
 20	PORT_BSW0,
 21	PORT_BSW1,
 22	PORT_BSW2,
 23	PORT_CE4100,
 24	PORT_LPT,
 25};
 
 26
 27struct pxa_spi_info {
 28	enum pxa_ssp_type type;
 29	int port_id;
 30	int num_chipselect;
 31	unsigned long max_clk_rate;
 32
 33	/* DMA channel request parameters */
 34	bool (*dma_filter)(struct dma_chan *chan, void *param);
 35	void *tx_param;
 36	void *rx_param;
 37
 38	int (*setup)(struct pci_dev *pdev, struct pxa_spi_info *c);
 39};
 40
 41static struct dw_dma_slave byt_tx_param = { .dst_id = 0 };
 42static struct dw_dma_slave byt_rx_param = { .src_id = 1 };
 43
 
 
 
 
 
 
 
 44static struct dw_dma_slave bsw0_tx_param = { .dst_id = 0 };
 45static struct dw_dma_slave bsw0_rx_param = { .src_id = 1 };
 46static struct dw_dma_slave bsw1_tx_param = { .dst_id = 6 };
 47static struct dw_dma_slave bsw1_rx_param = { .src_id = 7 };
 48static struct dw_dma_slave bsw2_tx_param = { .dst_id = 8 };
 49static struct dw_dma_slave bsw2_rx_param = { .src_id = 9 };
 50
 51static struct dw_dma_slave lpt_tx_param = { .dst_id = 0 };
 52static struct dw_dma_slave lpt_rx_param = { .src_id = 1 };
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 53
 54static bool lpss_dma_filter(struct dma_chan *chan, void *param)
 55{
 56	struct dw_dma_slave *dws = param;
 57
 58	if (dws->dma_dev != chan->device->dev)
 59		return false;
 60
 61	chan->private = dws;
 62	return true;
 63}
 64
 65static int lpss_spi_setup(struct pci_dev *dev, struct pxa_spi_info *c)
 66{
 
 
 
 
 
 
 
 67	struct pci_dev *dma_dev;
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 68
 69	c->num_chipselect = 1;
 70	c->max_clk_rate = 50000000;
 
 
 
 71
 72	dma_dev = pci_get_slot(dev->bus, PCI_DEVFN(PCI_SLOT(dev->devfn), 0));
 
 
 
 
 
 
 
 
 
 
 
 
 
 73
 74	if (c->tx_param) {
 75		struct dw_dma_slave *slave = c->tx_param;
 
 
 
 76
 77		slave->dma_dev = &dma_dev->dev;
 78		slave->m_master = 0;
 79		slave->p_master = 1;
 80	}
 81
 82	if (c->rx_param) {
 83		struct dw_dma_slave *slave = c->rx_param;
 
 84
 85		slave->dma_dev = &dma_dev->dev;
 86		slave->m_master = 0;
 87		slave->p_master = 1;
 88	}
 89
 90	c->dma_filter = lpss_dma_filter;
 91	return 0;
 92}
 93
 94static int mrfld_spi_setup(struct pci_dev *dev, struct pxa_spi_info *c)
 
 
 
 
 95{
 
 
 
 
 
 
 
 96	switch (PCI_FUNC(dev->devfn)) {
 97	case 0:
 98		c->port_id = 3;
 99		c->num_chipselect = 1;
 
 
100		break;
101	case 1:
102		c->port_id = 5;
103		c->num_chipselect = 4;
 
 
104		break;
105	case 2:
106		c->port_id = 6;
107		c->num_chipselect = 1;
 
 
108		break;
109	default:
110		return -ENODEV;
111	}
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
112	return 0;
113}
114
115static struct pxa_spi_info spi_info_configs[] = {
116	[PORT_CE4100] = {
117		.type = PXA25x_SSP,
118		.port_id =  -1,
119		.num_chipselect = -1,
120		.max_clk_rate = 3686400,
121	},
122	[PORT_BYT] = {
123		.type = LPSS_BYT_SSP,
124		.port_id = 0,
125		.setup = lpss_spi_setup,
126		.tx_param = &byt_tx_param,
127		.rx_param = &byt_rx_param,
128	},
129	[PORT_BSW0] = {
130		.type = LPSS_BSW_SSP,
131		.port_id = 0,
132		.setup = lpss_spi_setup,
133		.tx_param = &bsw0_tx_param,
134		.rx_param = &bsw0_rx_param,
135	},
136	[PORT_BSW1] = {
137		.type = LPSS_BSW_SSP,
138		.port_id = 1,
139		.setup = lpss_spi_setup,
140		.tx_param = &bsw1_tx_param,
141		.rx_param = &bsw1_rx_param,
142	},
143	[PORT_BSW2] = {
144		.type = LPSS_BSW_SSP,
145		.port_id = 2,
146		.setup = lpss_spi_setup,
147		.tx_param = &bsw2_tx_param,
148		.rx_param = &bsw2_rx_param,
149	},
150	[PORT_MRFLD] = {
151		.type = PXA27x_SSP,
152		.max_clk_rate = 25000000,
153		.setup = mrfld_spi_setup,
154	},
155	[PORT_QUARK_X1000] = {
156		.type = QUARK_X1000_SSP,
157		.port_id = -1,
158		.num_chipselect = 1,
159		.max_clk_rate = 50000000,
160	},
161	[PORT_LPT] = {
162		.type = LPSS_LPT_SSP,
163		.port_id = 0,
164		.setup = lpss_spi_setup,
165		.tx_param = &lpt_tx_param,
166		.rx_param = &lpt_rx_param,
167	},
168};
169
170static int pxa2xx_spi_pci_probe(struct pci_dev *dev,
171		const struct pci_device_id *ent)
172{
 
173	struct platform_device_info pi;
174	int ret;
175	struct platform_device *pdev;
176	struct pxa2xx_spi_master spi_pdata;
177	struct ssp_device *ssp;
178	struct pxa_spi_info *c;
179	char buf[40];
180
181	ret = pcim_enable_device(dev);
182	if (ret)
183		return ret;
184
185	ret = pcim_iomap_regions(dev, 1 << 0, "PXA2xx SPI");
186	if (ret)
187		return ret;
188
189	c = &spi_info_configs[ent->driver_data];
190	if (c->setup) {
191		ret = c->setup(dev, c);
192		if (ret)
193			return ret;
194	}
195
196	memset(&spi_pdata, 0, sizeof(spi_pdata));
197	spi_pdata.num_chipselect = (c->num_chipselect > 0) ? c->num_chipselect : dev->devfn;
198	spi_pdata.dma_filter = c->dma_filter;
199	spi_pdata.tx_param = c->tx_param;
200	spi_pdata.rx_param = c->rx_param;
201	spi_pdata.enable_dma = c->rx_param && c->tx_param;
202
203	ssp = &spi_pdata.ssp;
 
204	ssp->phys_base = pci_resource_start(dev, 0);
205	ssp->mmio_base = pcim_iomap_table(dev)[0];
206	ssp->irq = dev->irq;
207	ssp->port_id = (c->port_id >= 0) ? c->port_id : dev->devfn;
208	ssp->type = c->type;
209
210	snprintf(buf, sizeof(buf), "pxa2xx-spi.%d", ssp->port_id);
211	ssp->clk = clk_register_fixed_rate(&dev->dev, buf , NULL, 0,
212					   c->max_clk_rate);
213	 if (IS_ERR(ssp->clk))
214		return PTR_ERR(ssp->clk);
 
 
 
 
 
 
215
216	memset(&pi, 0, sizeof(pi));
217	pi.fwnode = dev->dev.fwnode;
218	pi.parent = &dev->dev;
219	pi.name = "pxa2xx-spi";
220	pi.id = ssp->port_id;
221	pi.data = &spi_pdata;
222	pi.size_data = sizeof(spi_pdata);
223
224	pdev = platform_device_register_full(&pi);
225	if (IS_ERR(pdev)) {
226		clk_unregister(ssp->clk);
227		return PTR_ERR(pdev);
228	}
229
230	pci_set_drvdata(dev, pdev);
231
232	return 0;
233}
234
235static void pxa2xx_spi_pci_remove(struct pci_dev *dev)
236{
237	struct platform_device *pdev = pci_get_drvdata(dev);
238	struct pxa2xx_spi_master *spi_pdata;
239
240	spi_pdata = dev_get_platdata(&pdev->dev);
241
242	platform_device_unregister(pdev);
243	clk_unregister(spi_pdata->ssp.clk);
244}
245
246static const struct pci_device_id pxa2xx_spi_pci_devices[] = {
247	{ PCI_VDEVICE(INTEL, 0x0935), PORT_QUARK_X1000 },
248	{ PCI_VDEVICE(INTEL, 0x0f0e), PORT_BYT },
249	{ PCI_VDEVICE(INTEL, 0x1194), PORT_MRFLD },
250	{ PCI_VDEVICE(INTEL, 0x228e), PORT_BSW0 },
251	{ PCI_VDEVICE(INTEL, 0x2290), PORT_BSW1 },
252	{ PCI_VDEVICE(INTEL, 0x22ac), PORT_BSW2 },
253	{ PCI_VDEVICE(INTEL, 0x2e6a), PORT_CE4100 },
254	{ PCI_VDEVICE(INTEL, 0x9ce6), PORT_LPT },
255	{ },
 
 
 
256};
257MODULE_DEVICE_TABLE(pci, pxa2xx_spi_pci_devices);
258
259static struct pci_driver pxa2xx_spi_pci_driver = {
260	.name           = "pxa2xx_spi_pci",
261	.id_table       = pxa2xx_spi_pci_devices,
262	.probe          = pxa2xx_spi_pci_probe,
263	.remove         = pxa2xx_spi_pci_remove,
264};
265
266module_pci_driver(pxa2xx_spi_pci_driver);
267
268MODULE_DESCRIPTION("CE4100/LPSS PCI-SPI glue code for PXA's driver");
269MODULE_LICENSE("GPL v2");
270MODULE_AUTHOR("Sebastian Andrzej Siewior <bigeasy@linutronix.de>");