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1// SPDX-License-Identifier: GPL-2.0
2/*
3 * EBI driver for Atmel chips
4 * inspired by the fsl weim bus driver
5 *
6 * Copyright (C) 2013 Jean-Jacques Hiblot <jjhiblot@traphandler.com>
7 */
8
9#include <linux/clk.h>
10#include <linux/io.h>
11#include <linux/mfd/syscon.h>
12#include <linux/mfd/syscon/atmel-matrix.h>
13#include <linux/mfd/syscon/atmel-smc.h>
14#include <linux/init.h>
15#include <linux/of_device.h>
16#include <linux/regmap.h>
17#include <soc/at91/atmel-sfr.h>
18
19#define AT91_EBI_NUM_CS 8
20
21struct atmel_ebi_dev_config {
22 int cs;
23 struct atmel_smc_cs_conf smcconf;
24};
25
26struct atmel_ebi;
27
28struct atmel_ebi_dev {
29 struct list_head node;
30 struct atmel_ebi *ebi;
31 u32 mode;
32 int numcs;
33 struct atmel_ebi_dev_config configs[];
34};
35
36struct atmel_ebi_caps {
37 unsigned int available_cs;
38 unsigned int ebi_csa_offs;
39 const char *regmap_name;
40 void (*get_config)(struct atmel_ebi_dev *ebid,
41 struct atmel_ebi_dev_config *conf);
42 int (*xlate_config)(struct atmel_ebi_dev *ebid,
43 struct device_node *configs_np,
44 struct atmel_ebi_dev_config *conf);
45 void (*apply_config)(struct atmel_ebi_dev *ebid,
46 struct atmel_ebi_dev_config *conf);
47};
48
49struct atmel_ebi {
50 struct clk *clk;
51 struct regmap *regmap;
52 struct {
53 struct regmap *regmap;
54 struct clk *clk;
55 const struct atmel_hsmc_reg_layout *layout;
56 } smc;
57
58 struct device *dev;
59 const struct atmel_ebi_caps *caps;
60 struct list_head devs;
61};
62
63struct atmel_smc_timing_xlate {
64 const char *name;
65 int (*converter)(struct atmel_smc_cs_conf *conf,
66 unsigned int shift, unsigned int nycles);
67 unsigned int shift;
68};
69
70#define ATMEL_SMC_SETUP_XLATE(nm, pos) \
71 { .name = nm, .converter = atmel_smc_cs_conf_set_setup, .shift = pos}
72
73#define ATMEL_SMC_PULSE_XLATE(nm, pos) \
74 { .name = nm, .converter = atmel_smc_cs_conf_set_pulse, .shift = pos}
75
76#define ATMEL_SMC_CYCLE_XLATE(nm, pos) \
77 { .name = nm, .converter = atmel_smc_cs_conf_set_cycle, .shift = pos}
78
79static void at91sam9_ebi_get_config(struct atmel_ebi_dev *ebid,
80 struct atmel_ebi_dev_config *conf)
81{
82 atmel_smc_cs_conf_get(ebid->ebi->smc.regmap, conf->cs,
83 &conf->smcconf);
84}
85
86static void sama5_ebi_get_config(struct atmel_ebi_dev *ebid,
87 struct atmel_ebi_dev_config *conf)
88{
89 atmel_hsmc_cs_conf_get(ebid->ebi->smc.regmap, ebid->ebi->smc.layout,
90 conf->cs, &conf->smcconf);
91}
92
93static const struct atmel_smc_timing_xlate timings_xlate_table[] = {
94 ATMEL_SMC_SETUP_XLATE("atmel,smc-ncs-rd-setup-ns",
95 ATMEL_SMC_NCS_RD_SHIFT),
96 ATMEL_SMC_SETUP_XLATE("atmel,smc-ncs-wr-setup-ns",
97 ATMEL_SMC_NCS_WR_SHIFT),
98 ATMEL_SMC_SETUP_XLATE("atmel,smc-nrd-setup-ns", ATMEL_SMC_NRD_SHIFT),
99 ATMEL_SMC_SETUP_XLATE("atmel,smc-nwe-setup-ns", ATMEL_SMC_NWE_SHIFT),
100 ATMEL_SMC_PULSE_XLATE("atmel,smc-ncs-rd-pulse-ns",
101 ATMEL_SMC_NCS_RD_SHIFT),
102 ATMEL_SMC_PULSE_XLATE("atmel,smc-ncs-wr-pulse-ns",
103 ATMEL_SMC_NCS_WR_SHIFT),
104 ATMEL_SMC_PULSE_XLATE("atmel,smc-nrd-pulse-ns", ATMEL_SMC_NRD_SHIFT),
105 ATMEL_SMC_PULSE_XLATE("atmel,smc-nwe-pulse-ns", ATMEL_SMC_NWE_SHIFT),
106 ATMEL_SMC_CYCLE_XLATE("atmel,smc-nrd-cycle-ns", ATMEL_SMC_NRD_SHIFT),
107 ATMEL_SMC_CYCLE_XLATE("atmel,smc-nwe-cycle-ns", ATMEL_SMC_NWE_SHIFT),
108};
109
110static int atmel_ebi_xslate_smc_timings(struct atmel_ebi_dev *ebid,
111 struct device_node *np,
112 struct atmel_smc_cs_conf *smcconf)
113{
114 unsigned int clk_rate = clk_get_rate(ebid->ebi->clk);
115 unsigned int clk_period_ns = NSEC_PER_SEC / clk_rate;
116 bool required = false;
117 unsigned int ncycles;
118 int ret, i;
119 u32 val;
120
121 ret = of_property_read_u32(np, "atmel,smc-tdf-ns", &val);
122 if (!ret) {
123 required = true;
124 ncycles = DIV_ROUND_UP(val, clk_period_ns);
125 if (ncycles > ATMEL_SMC_MODE_TDF_MAX) {
126 ret = -EINVAL;
127 goto out;
128 }
129
130 if (ncycles < ATMEL_SMC_MODE_TDF_MIN)
131 ncycles = ATMEL_SMC_MODE_TDF_MIN;
132
133 smcconf->mode |= ATMEL_SMC_MODE_TDF(ncycles);
134 }
135
136 for (i = 0; i < ARRAY_SIZE(timings_xlate_table); i++) {
137 const struct atmel_smc_timing_xlate *xlate;
138
139 xlate = &timings_xlate_table[i];
140
141 ret = of_property_read_u32(np, xlate->name, &val);
142 if (ret) {
143 if (!required)
144 continue;
145 else
146 break;
147 }
148
149 if (!required) {
150 ret = -EINVAL;
151 break;
152 }
153
154 ncycles = DIV_ROUND_UP(val, clk_period_ns);
155 ret = xlate->converter(smcconf, xlate->shift, ncycles);
156 if (ret)
157 goto out;
158 }
159
160out:
161 if (ret) {
162 dev_err(ebid->ebi->dev,
163 "missing or invalid timings definition in %pOF",
164 np);
165 return ret;
166 }
167
168 return required;
169}
170
171static int atmel_ebi_xslate_smc_config(struct atmel_ebi_dev *ebid,
172 struct device_node *np,
173 struct atmel_ebi_dev_config *conf)
174{
175 struct atmel_smc_cs_conf *smcconf = &conf->smcconf;
176 bool required = false;
177 const char *tmp_str;
178 u32 tmp;
179 int ret;
180
181 ret = of_property_read_u32(np, "atmel,smc-bus-width", &tmp);
182 if (!ret) {
183 switch (tmp) {
184 case 8:
185 smcconf->mode |= ATMEL_SMC_MODE_DBW_8;
186 break;
187
188 case 16:
189 smcconf->mode |= ATMEL_SMC_MODE_DBW_16;
190 break;
191
192 case 32:
193 smcconf->mode |= ATMEL_SMC_MODE_DBW_32;
194 break;
195
196 default:
197 return -EINVAL;
198 }
199
200 required = true;
201 }
202
203 if (of_property_read_bool(np, "atmel,smc-tdf-optimized")) {
204 smcconf->mode |= ATMEL_SMC_MODE_TDFMODE_OPTIMIZED;
205 required = true;
206 }
207
208 tmp_str = NULL;
209 of_property_read_string(np, "atmel,smc-byte-access-type", &tmp_str);
210 if (tmp_str && !strcmp(tmp_str, "write")) {
211 smcconf->mode |= ATMEL_SMC_MODE_BAT_WRITE;
212 required = true;
213 }
214
215 tmp_str = NULL;
216 of_property_read_string(np, "atmel,smc-read-mode", &tmp_str);
217 if (tmp_str && !strcmp(tmp_str, "nrd")) {
218 smcconf->mode |= ATMEL_SMC_MODE_READMODE_NRD;
219 required = true;
220 }
221
222 tmp_str = NULL;
223 of_property_read_string(np, "atmel,smc-write-mode", &tmp_str);
224 if (tmp_str && !strcmp(tmp_str, "nwe")) {
225 smcconf->mode |= ATMEL_SMC_MODE_WRITEMODE_NWE;
226 required = true;
227 }
228
229 tmp_str = NULL;
230 of_property_read_string(np, "atmel,smc-exnw-mode", &tmp_str);
231 if (tmp_str) {
232 if (!strcmp(tmp_str, "frozen"))
233 smcconf->mode |= ATMEL_SMC_MODE_EXNWMODE_FROZEN;
234 else if (!strcmp(tmp_str, "ready"))
235 smcconf->mode |= ATMEL_SMC_MODE_EXNWMODE_READY;
236 else if (strcmp(tmp_str, "disabled"))
237 return -EINVAL;
238
239 required = true;
240 }
241
242 ret = of_property_read_u32(np, "atmel,smc-page-mode", &tmp);
243 if (!ret) {
244 switch (tmp) {
245 case 4:
246 smcconf->mode |= ATMEL_SMC_MODE_PS_4;
247 break;
248
249 case 8:
250 smcconf->mode |= ATMEL_SMC_MODE_PS_8;
251 break;
252
253 case 16:
254 smcconf->mode |= ATMEL_SMC_MODE_PS_16;
255 break;
256
257 case 32:
258 smcconf->mode |= ATMEL_SMC_MODE_PS_32;
259 break;
260
261 default:
262 return -EINVAL;
263 }
264
265 smcconf->mode |= ATMEL_SMC_MODE_PMEN;
266 required = true;
267 }
268
269 ret = atmel_ebi_xslate_smc_timings(ebid, np, &conf->smcconf);
270 if (ret < 0)
271 return -EINVAL;
272
273 if ((ret > 0 && !required) || (!ret && required)) {
274 dev_err(ebid->ebi->dev, "missing atmel,smc- properties in %pOF",
275 np);
276 return -EINVAL;
277 }
278
279 return required;
280}
281
282static void at91sam9_ebi_apply_config(struct atmel_ebi_dev *ebid,
283 struct atmel_ebi_dev_config *conf)
284{
285 atmel_smc_cs_conf_apply(ebid->ebi->smc.regmap, conf->cs,
286 &conf->smcconf);
287}
288
289static void sama5_ebi_apply_config(struct atmel_ebi_dev *ebid,
290 struct atmel_ebi_dev_config *conf)
291{
292 atmel_hsmc_cs_conf_apply(ebid->ebi->smc.regmap, ebid->ebi->smc.layout,
293 conf->cs, &conf->smcconf);
294}
295
296static int atmel_ebi_dev_setup(struct atmel_ebi *ebi, struct device_node *np,
297 int reg_cells)
298{
299 const struct atmel_ebi_caps *caps = ebi->caps;
300 struct atmel_ebi_dev_config conf = { };
301 struct device *dev = ebi->dev;
302 struct atmel_ebi_dev *ebid;
303 unsigned long cslines = 0;
304 int ret, numcs = 0, nentries, i;
305 bool apply = false;
306 u32 cs;
307
308 nentries = of_property_count_elems_of_size(np, "reg",
309 reg_cells * sizeof(u32));
310 for (i = 0; i < nentries; i++) {
311 ret = of_property_read_u32_index(np, "reg", i * reg_cells,
312 &cs);
313 if (ret)
314 return ret;
315
316 if (cs >= AT91_EBI_NUM_CS ||
317 !(ebi->caps->available_cs & BIT(cs))) {
318 dev_err(dev, "invalid reg property in %pOF\n", np);
319 return -EINVAL;
320 }
321
322 if (!test_and_set_bit(cs, &cslines))
323 numcs++;
324 }
325
326 if (!numcs) {
327 dev_err(dev, "invalid reg property in %pOF\n", np);
328 return -EINVAL;
329 }
330
331 ebid = devm_kzalloc(ebi->dev, struct_size(ebid, configs, numcs),
332 GFP_KERNEL);
333 if (!ebid)
334 return -ENOMEM;
335
336 ebid->ebi = ebi;
337 ebid->numcs = numcs;
338
339 ret = caps->xlate_config(ebid, np, &conf);
340 if (ret < 0)
341 return ret;
342 else if (ret)
343 apply = true;
344
345 i = 0;
346 for_each_set_bit(cs, &cslines, AT91_EBI_NUM_CS) {
347 ebid->configs[i].cs = cs;
348
349 if (apply) {
350 conf.cs = cs;
351 caps->apply_config(ebid, &conf);
352 }
353
354 caps->get_config(ebid, &ebid->configs[i]);
355
356 /*
357 * Attach the EBI device to the generic SMC logic if at least
358 * one "atmel,smc-" property is present.
359 */
360 if (ebi->caps->ebi_csa_offs && apply)
361 regmap_update_bits(ebi->regmap,
362 ebi->caps->ebi_csa_offs,
363 BIT(cs), 0);
364
365 i++;
366 }
367
368 list_add_tail(&ebid->node, &ebi->devs);
369
370 return 0;
371}
372
373static const struct atmel_ebi_caps at91sam9260_ebi_caps = {
374 .available_cs = 0xff,
375 .ebi_csa_offs = AT91SAM9260_MATRIX_EBICSA,
376 .regmap_name = "atmel,matrix",
377 .get_config = at91sam9_ebi_get_config,
378 .xlate_config = atmel_ebi_xslate_smc_config,
379 .apply_config = at91sam9_ebi_apply_config,
380};
381
382static const struct atmel_ebi_caps at91sam9261_ebi_caps = {
383 .available_cs = 0xff,
384 .ebi_csa_offs = AT91SAM9261_MATRIX_EBICSA,
385 .regmap_name = "atmel,matrix",
386 .get_config = at91sam9_ebi_get_config,
387 .xlate_config = atmel_ebi_xslate_smc_config,
388 .apply_config = at91sam9_ebi_apply_config,
389};
390
391static const struct atmel_ebi_caps at91sam9263_ebi0_caps = {
392 .available_cs = 0x3f,
393 .ebi_csa_offs = AT91SAM9263_MATRIX_EBI0CSA,
394 .regmap_name = "atmel,matrix",
395 .get_config = at91sam9_ebi_get_config,
396 .xlate_config = atmel_ebi_xslate_smc_config,
397 .apply_config = at91sam9_ebi_apply_config,
398};
399
400static const struct atmel_ebi_caps at91sam9263_ebi1_caps = {
401 .available_cs = 0x7,
402 .ebi_csa_offs = AT91SAM9263_MATRIX_EBI1CSA,
403 .regmap_name = "atmel,matrix",
404 .get_config = at91sam9_ebi_get_config,
405 .xlate_config = atmel_ebi_xslate_smc_config,
406 .apply_config = at91sam9_ebi_apply_config,
407};
408
409static const struct atmel_ebi_caps at91sam9rl_ebi_caps = {
410 .available_cs = 0x3f,
411 .ebi_csa_offs = AT91SAM9RL_MATRIX_EBICSA,
412 .regmap_name = "atmel,matrix",
413 .get_config = at91sam9_ebi_get_config,
414 .xlate_config = atmel_ebi_xslate_smc_config,
415 .apply_config = at91sam9_ebi_apply_config,
416};
417
418static const struct atmel_ebi_caps at91sam9g45_ebi_caps = {
419 .available_cs = 0x3f,
420 .ebi_csa_offs = AT91SAM9G45_MATRIX_EBICSA,
421 .regmap_name = "atmel,matrix",
422 .get_config = at91sam9_ebi_get_config,
423 .xlate_config = atmel_ebi_xslate_smc_config,
424 .apply_config = at91sam9_ebi_apply_config,
425};
426
427static const struct atmel_ebi_caps at91sam9x5_ebi_caps = {
428 .available_cs = 0x3f,
429 .ebi_csa_offs = AT91SAM9X5_MATRIX_EBICSA,
430 .regmap_name = "atmel,matrix",
431 .get_config = at91sam9_ebi_get_config,
432 .xlate_config = atmel_ebi_xslate_smc_config,
433 .apply_config = at91sam9_ebi_apply_config,
434};
435
436static const struct atmel_ebi_caps sama5d3_ebi_caps = {
437 .available_cs = 0xf,
438 .get_config = sama5_ebi_get_config,
439 .xlate_config = atmel_ebi_xslate_smc_config,
440 .apply_config = sama5_ebi_apply_config,
441};
442
443static const struct atmel_ebi_caps sam9x60_ebi_caps = {
444 .available_cs = 0x3f,
445 .ebi_csa_offs = AT91_SFR_CCFG_EBICSA,
446 .regmap_name = "microchip,sfr",
447 .get_config = at91sam9_ebi_get_config,
448 .xlate_config = atmel_ebi_xslate_smc_config,
449 .apply_config = at91sam9_ebi_apply_config,
450};
451
452static const struct of_device_id atmel_ebi_id_table[] = {
453 {
454 .compatible = "atmel,at91sam9260-ebi",
455 .data = &at91sam9260_ebi_caps,
456 },
457 {
458 .compatible = "atmel,at91sam9261-ebi",
459 .data = &at91sam9261_ebi_caps,
460 },
461 {
462 .compatible = "atmel,at91sam9263-ebi0",
463 .data = &at91sam9263_ebi0_caps,
464 },
465 {
466 .compatible = "atmel,at91sam9263-ebi1",
467 .data = &at91sam9263_ebi1_caps,
468 },
469 {
470 .compatible = "atmel,at91sam9rl-ebi",
471 .data = &at91sam9rl_ebi_caps,
472 },
473 {
474 .compatible = "atmel,at91sam9g45-ebi",
475 .data = &at91sam9g45_ebi_caps,
476 },
477 {
478 .compatible = "atmel,at91sam9x5-ebi",
479 .data = &at91sam9x5_ebi_caps,
480 },
481 {
482 .compatible = "atmel,sama5d3-ebi",
483 .data = &sama5d3_ebi_caps,
484 },
485 {
486 .compatible = "microchip,sam9x60-ebi",
487 .data = &sam9x60_ebi_caps,
488 },
489 { /* sentinel */ }
490};
491
492static int atmel_ebi_dev_disable(struct atmel_ebi *ebi, struct device_node *np)
493{
494 struct device *dev = ebi->dev;
495 struct property *newprop;
496
497 newprop = devm_kzalloc(dev, sizeof(*newprop), GFP_KERNEL);
498 if (!newprop)
499 return -ENOMEM;
500
501 newprop->name = devm_kstrdup(dev, "status", GFP_KERNEL);
502 if (!newprop->name)
503 return -ENOMEM;
504
505 newprop->value = devm_kstrdup(dev, "disabled", GFP_KERNEL);
506 if (!newprop->value)
507 return -ENOMEM;
508
509 newprop->length = sizeof("disabled");
510
511 return of_update_property(np, newprop);
512}
513
514static int atmel_ebi_probe(struct platform_device *pdev)
515{
516 struct device *dev = &pdev->dev;
517 struct device_node *child, *np = dev->of_node, *smc_np;
518 const struct of_device_id *match;
519 struct atmel_ebi *ebi;
520 int ret, reg_cells;
521 struct clk *clk;
522 u32 val;
523
524 match = of_match_device(atmel_ebi_id_table, dev);
525 if (!match || !match->data)
526 return -EINVAL;
527
528 ebi = devm_kzalloc(dev, sizeof(*ebi), GFP_KERNEL);
529 if (!ebi)
530 return -ENOMEM;
531
532 platform_set_drvdata(pdev, ebi);
533
534 INIT_LIST_HEAD(&ebi->devs);
535 ebi->caps = match->data;
536 ebi->dev = dev;
537
538 clk = devm_clk_get(dev, NULL);
539 if (IS_ERR(clk))
540 return PTR_ERR(clk);
541
542 ebi->clk = clk;
543
544 smc_np = of_parse_phandle(dev->of_node, "atmel,smc", 0);
545
546 ebi->smc.regmap = syscon_node_to_regmap(smc_np);
547 if (IS_ERR(ebi->smc.regmap)) {
548 ret = PTR_ERR(ebi->smc.regmap);
549 goto put_node;
550 }
551
552 ebi->smc.layout = atmel_hsmc_get_reg_layout(smc_np);
553 if (IS_ERR(ebi->smc.layout)) {
554 ret = PTR_ERR(ebi->smc.layout);
555 goto put_node;
556 }
557
558 ebi->smc.clk = of_clk_get(smc_np, 0);
559 if (IS_ERR(ebi->smc.clk)) {
560 if (PTR_ERR(ebi->smc.clk) != -ENOENT) {
561 ret = PTR_ERR(ebi->smc.clk);
562 goto put_node;
563 }
564
565 ebi->smc.clk = NULL;
566 }
567 of_node_put(smc_np);
568 ret = clk_prepare_enable(ebi->smc.clk);
569 if (ret)
570 return ret;
571
572 /*
573 * The sama5d3 does not provide an EBICSA register and thus does need
574 * to access it.
575 */
576 if (ebi->caps->ebi_csa_offs) {
577 ebi->regmap =
578 syscon_regmap_lookup_by_phandle(np,
579 ebi->caps->regmap_name);
580 if (IS_ERR(ebi->regmap))
581 return PTR_ERR(ebi->regmap);
582 }
583
584 ret = of_property_read_u32(np, "#address-cells", &val);
585 if (ret) {
586 dev_err(dev, "missing #address-cells property\n");
587 return ret;
588 }
589
590 reg_cells = val;
591
592 ret = of_property_read_u32(np, "#size-cells", &val);
593 if (ret) {
594 dev_err(dev, "missing #address-cells property\n");
595 return ret;
596 }
597
598 reg_cells += val;
599
600 for_each_available_child_of_node(np, child) {
601 if (!of_find_property(child, "reg", NULL))
602 continue;
603
604 ret = atmel_ebi_dev_setup(ebi, child, reg_cells);
605 if (ret) {
606 dev_err(dev, "failed to configure EBI bus for %pOF, disabling the device",
607 child);
608
609 ret = atmel_ebi_dev_disable(ebi, child);
610 if (ret) {
611 of_node_put(child);
612 return ret;
613 }
614 }
615 }
616
617 return of_platform_populate(np, NULL, NULL, dev);
618
619put_node:
620 of_node_put(smc_np);
621 return ret;
622}
623
624static __maybe_unused int atmel_ebi_resume(struct device *dev)
625{
626 struct atmel_ebi *ebi = dev_get_drvdata(dev);
627 struct atmel_ebi_dev *ebid;
628
629 list_for_each_entry(ebid, &ebi->devs, node) {
630 int i;
631
632 for (i = 0; i < ebid->numcs; i++)
633 ebid->ebi->caps->apply_config(ebid, &ebid->configs[i]);
634 }
635
636 return 0;
637}
638
639static SIMPLE_DEV_PM_OPS(atmel_ebi_pm_ops, NULL, atmel_ebi_resume);
640
641static struct platform_driver atmel_ebi_driver = {
642 .driver = {
643 .name = "atmel-ebi",
644 .of_match_table = atmel_ebi_id_table,
645 .pm = &atmel_ebi_pm_ops,
646 },
647};
648builtin_platform_driver_probe(atmel_ebi_driver, atmel_ebi_probe);
1/*
2 * EBI driver for Atmel chips
3 * inspired by the fsl weim bus driver
4 *
5 * Copyright (C) 2013 Jean-Jacques Hiblot <jjhiblot@traphandler.com>
6 *
7 * This file is licensed under the terms of the GNU General Public
8 * License version 2. This program is licensed "as is" without any
9 * warranty of any kind, whether express or implied.
10 */
11
12#include <linux/clk.h>
13#include <linux/io.h>
14#include <linux/mfd/syscon.h>
15#include <linux/mfd/syscon/atmel-matrix.h>
16#include <linux/mfd/syscon/atmel-smc.h>
17#include <linux/init.h>
18#include <linux/of_device.h>
19#include <linux/regmap.h>
20
21struct at91sam9_smc_timings {
22 u32 ncs_rd_setup_ns;
23 u32 nrd_setup_ns;
24 u32 ncs_wr_setup_ns;
25 u32 nwe_setup_ns;
26 u32 ncs_rd_pulse_ns;
27 u32 nrd_pulse_ns;
28 u32 ncs_wr_pulse_ns;
29 u32 nwe_pulse_ns;
30 u32 nrd_cycle_ns;
31 u32 nwe_cycle_ns;
32 u32 tdf_ns;
33};
34
35struct at91sam9_smc_generic_fields {
36 struct regmap_field *setup;
37 struct regmap_field *pulse;
38 struct regmap_field *cycle;
39 struct regmap_field *mode;
40};
41
42struct at91sam9_ebi_dev_config {
43 struct at91sam9_smc_timings timings;
44 u32 mode;
45};
46
47struct at91_ebi_dev_config {
48 int cs;
49 union {
50 struct at91sam9_ebi_dev_config sam9;
51 };
52};
53
54struct at91_ebi;
55
56struct at91_ebi_dev {
57 struct list_head node;
58 struct at91_ebi *ebi;
59 u32 mode;
60 int numcs;
61 struct at91_ebi_dev_config configs[];
62};
63
64struct at91_ebi_caps {
65 unsigned int available_cs;
66 const struct reg_field *ebi_csa;
67 void (*get_config)(struct at91_ebi_dev *ebid,
68 struct at91_ebi_dev_config *conf);
69 int (*xlate_config)(struct at91_ebi_dev *ebid,
70 struct device_node *configs_np,
71 struct at91_ebi_dev_config *conf);
72 int (*apply_config)(struct at91_ebi_dev *ebid,
73 struct at91_ebi_dev_config *conf);
74 int (*init)(struct at91_ebi *ebi);
75};
76
77struct at91_ebi {
78 struct clk *clk;
79 struct regmap *smc;
80 struct regmap *matrix;
81
82 struct regmap_field *ebi_csa;
83
84 struct device *dev;
85 const struct at91_ebi_caps *caps;
86 struct list_head devs;
87 union {
88 struct at91sam9_smc_generic_fields sam9;
89 };
90};
91
92static void at91sam9_ebi_get_config(struct at91_ebi_dev *ebid,
93 struct at91_ebi_dev_config *conf)
94{
95 struct at91sam9_smc_generic_fields *fields = &ebid->ebi->sam9;
96 unsigned int clk_period = NSEC_PER_SEC / clk_get_rate(ebid->ebi->clk);
97 struct at91sam9_ebi_dev_config *config = &conf->sam9;
98 struct at91sam9_smc_timings *timings = &config->timings;
99 unsigned int val;
100
101 regmap_fields_read(fields->mode, conf->cs, &val);
102 config->mode = val & ~AT91_SMC_TDF;
103
104 val = (val & AT91_SMC_TDF) >> 16;
105 timings->tdf_ns = clk_period * val;
106
107 regmap_fields_read(fields->setup, conf->cs, &val);
108 timings->ncs_rd_setup_ns = (val >> 24) & 0x1f;
109 timings->ncs_rd_setup_ns += ((val >> 29) & 0x1) * 128;
110 timings->ncs_rd_setup_ns *= clk_period;
111 timings->nrd_setup_ns = (val >> 16) & 0x1f;
112 timings->nrd_setup_ns += ((val >> 21) & 0x1) * 128;
113 timings->nrd_setup_ns *= clk_period;
114 timings->ncs_wr_setup_ns = (val >> 8) & 0x1f;
115 timings->ncs_wr_setup_ns += ((val >> 13) & 0x1) * 128;
116 timings->ncs_wr_setup_ns *= clk_period;
117 timings->nwe_setup_ns = val & 0x1f;
118 timings->nwe_setup_ns += ((val >> 5) & 0x1) * 128;
119 timings->nwe_setup_ns *= clk_period;
120
121 regmap_fields_read(fields->pulse, conf->cs, &val);
122 timings->ncs_rd_pulse_ns = (val >> 24) & 0x3f;
123 timings->ncs_rd_pulse_ns += ((val >> 30) & 0x1) * 256;
124 timings->ncs_rd_pulse_ns *= clk_period;
125 timings->nrd_pulse_ns = (val >> 16) & 0x3f;
126 timings->nrd_pulse_ns += ((val >> 22) & 0x1) * 256;
127 timings->nrd_pulse_ns *= clk_period;
128 timings->ncs_wr_pulse_ns = (val >> 8) & 0x3f;
129 timings->ncs_wr_pulse_ns += ((val >> 14) & 0x1) * 256;
130 timings->ncs_wr_pulse_ns *= clk_period;
131 timings->nwe_pulse_ns = val & 0x3f;
132 timings->nwe_pulse_ns += ((val >> 6) & 0x1) * 256;
133 timings->nwe_pulse_ns *= clk_period;
134
135 regmap_fields_read(fields->cycle, conf->cs, &val);
136 timings->nrd_cycle_ns = (val >> 16) & 0x7f;
137 timings->nrd_cycle_ns += ((val >> 23) & 0x3) * 256;
138 timings->nrd_cycle_ns *= clk_period;
139 timings->nwe_cycle_ns = val & 0x7f;
140 timings->nwe_cycle_ns += ((val >> 7) & 0x3) * 256;
141 timings->nwe_cycle_ns *= clk_period;
142}
143
144static int at91_xlate_timing(struct device_node *np, const char *prop,
145 u32 *val, bool *required)
146{
147 if (!of_property_read_u32(np, prop, val)) {
148 *required = true;
149 return 0;
150 }
151
152 if (*required)
153 return -EINVAL;
154
155 return 0;
156}
157
158static int at91sam9_smc_xslate_timings(struct at91_ebi_dev *ebid,
159 struct device_node *np,
160 struct at91sam9_smc_timings *timings,
161 bool *required)
162{
163 int ret;
164
165 ret = at91_xlate_timing(np, "atmel,smc-ncs-rd-setup-ns",
166 &timings->ncs_rd_setup_ns, required);
167 if (ret)
168 goto out;
169
170 ret = at91_xlate_timing(np, "atmel,smc-nrd-setup-ns",
171 &timings->nrd_setup_ns, required);
172 if (ret)
173 goto out;
174
175 ret = at91_xlate_timing(np, "atmel,smc-ncs-wr-setup-ns",
176 &timings->ncs_wr_setup_ns, required);
177 if (ret)
178 goto out;
179
180 ret = at91_xlate_timing(np, "atmel,smc-nwe-setup-ns",
181 &timings->nwe_setup_ns, required);
182 if (ret)
183 goto out;
184
185 ret = at91_xlate_timing(np, "atmel,smc-ncs-rd-pulse-ns",
186 &timings->ncs_rd_pulse_ns, required);
187 if (ret)
188 goto out;
189
190 ret = at91_xlate_timing(np, "atmel,smc-nrd-pulse-ns",
191 &timings->nrd_pulse_ns, required);
192 if (ret)
193 goto out;
194
195 ret = at91_xlate_timing(np, "atmel,smc-ncs-wr-pulse-ns",
196 &timings->ncs_wr_pulse_ns, required);
197 if (ret)
198 goto out;
199
200 ret = at91_xlate_timing(np, "atmel,smc-nwe-pulse-ns",
201 &timings->nwe_pulse_ns, required);
202 if (ret)
203 goto out;
204
205 ret = at91_xlate_timing(np, "atmel,smc-nwe-cycle-ns",
206 &timings->nwe_cycle_ns, required);
207 if (ret)
208 goto out;
209
210 ret = at91_xlate_timing(np, "atmel,smc-nrd-cycle-ns",
211 &timings->nrd_cycle_ns, required);
212 if (ret)
213 goto out;
214
215 ret = at91_xlate_timing(np, "atmel,smc-tdf-ns",
216 &timings->tdf_ns, required);
217
218out:
219 if (ret)
220 dev_err(ebid->ebi->dev,
221 "missing or invalid timings definition in %s",
222 np->full_name);
223
224 return ret;
225}
226
227static int at91sam9_ebi_xslate_config(struct at91_ebi_dev *ebid,
228 struct device_node *np,
229 struct at91_ebi_dev_config *conf)
230{
231 struct at91sam9_ebi_dev_config *config = &conf->sam9;
232 bool required = false;
233 const char *tmp_str;
234 u32 tmp;
235 int ret;
236
237 ret = of_property_read_u32(np, "atmel,smc-bus-width", &tmp);
238 if (!ret) {
239 switch (tmp) {
240 case 8:
241 config->mode |= AT91_SMC_DBW_8;
242 break;
243
244 case 16:
245 config->mode |= AT91_SMC_DBW_16;
246 break;
247
248 case 32:
249 config->mode |= AT91_SMC_DBW_32;
250 break;
251
252 default:
253 return -EINVAL;
254 }
255
256 required = true;
257 }
258
259 if (of_property_read_bool(np, "atmel,smc-tdf-optimized")) {
260 config->mode |= AT91_SMC_TDFMODE_OPTIMIZED;
261 required = true;
262 }
263
264 tmp_str = NULL;
265 of_property_read_string(np, "atmel,smc-byte-access-type", &tmp_str);
266 if (tmp_str && !strcmp(tmp_str, "write")) {
267 config->mode |= AT91_SMC_BAT_WRITE;
268 required = true;
269 }
270
271 tmp_str = NULL;
272 of_property_read_string(np, "atmel,smc-read-mode", &tmp_str);
273 if (tmp_str && !strcmp(tmp_str, "nrd")) {
274 config->mode |= AT91_SMC_READMODE_NRD;
275 required = true;
276 }
277
278 tmp_str = NULL;
279 of_property_read_string(np, "atmel,smc-write-mode", &tmp_str);
280 if (tmp_str && !strcmp(tmp_str, "nwe")) {
281 config->mode |= AT91_SMC_WRITEMODE_NWE;
282 required = true;
283 }
284
285 tmp_str = NULL;
286 of_property_read_string(np, "atmel,smc-exnw-mode", &tmp_str);
287 if (tmp_str) {
288 if (!strcmp(tmp_str, "frozen"))
289 config->mode |= AT91_SMC_EXNWMODE_FROZEN;
290 else if (!strcmp(tmp_str, "ready"))
291 config->mode |= AT91_SMC_EXNWMODE_READY;
292 else if (strcmp(tmp_str, "disabled"))
293 return -EINVAL;
294
295 required = true;
296 }
297
298 ret = of_property_read_u32(np, "atmel,smc-page-mode", &tmp);
299 if (!ret) {
300 switch (tmp) {
301 case 4:
302 config->mode |= AT91_SMC_PS_4;
303 break;
304
305 case 8:
306 config->mode |= AT91_SMC_PS_8;
307 break;
308
309 case 16:
310 config->mode |= AT91_SMC_PS_16;
311 break;
312
313 case 32:
314 config->mode |= AT91_SMC_PS_32;
315 break;
316
317 default:
318 return -EINVAL;
319 }
320
321 config->mode |= AT91_SMC_PMEN;
322 required = true;
323 }
324
325 ret = at91sam9_smc_xslate_timings(ebid, np, &config->timings,
326 &required);
327 if (ret)
328 return ret;
329
330 return required;
331}
332
333static int at91sam9_ebi_apply_config(struct at91_ebi_dev *ebid,
334 struct at91_ebi_dev_config *conf)
335{
336 unsigned int clk_rate = clk_get_rate(ebid->ebi->clk);
337 unsigned int clk_period = NSEC_PER_SEC / clk_rate;
338 struct at91sam9_ebi_dev_config *config = &conf->sam9;
339 struct at91sam9_smc_timings *timings = &config->timings;
340 struct at91sam9_smc_generic_fields *fields = &ebid->ebi->sam9;
341 u32 coded_val;
342 u32 val;
343
344 coded_val = at91sam9_smc_setup_ns_to_cycles(clk_rate,
345 timings->ncs_rd_setup_ns);
346 val = AT91SAM9_SMC_NCS_NRDSETUP(coded_val);
347 coded_val = at91sam9_smc_setup_ns_to_cycles(clk_rate,
348 timings->nrd_setup_ns);
349 val |= AT91SAM9_SMC_NRDSETUP(coded_val);
350 coded_val = at91sam9_smc_setup_ns_to_cycles(clk_rate,
351 timings->ncs_wr_setup_ns);
352 val |= AT91SAM9_SMC_NCS_WRSETUP(coded_val);
353 coded_val = at91sam9_smc_setup_ns_to_cycles(clk_rate,
354 timings->nwe_setup_ns);
355 val |= AT91SAM9_SMC_NWESETUP(coded_val);
356 regmap_fields_write(fields->setup, conf->cs, val);
357
358 coded_val = at91sam9_smc_pulse_ns_to_cycles(clk_rate,
359 timings->ncs_rd_pulse_ns);
360 val = AT91SAM9_SMC_NCS_NRDPULSE(coded_val);
361 coded_val = at91sam9_smc_pulse_ns_to_cycles(clk_rate,
362 timings->nrd_pulse_ns);
363 val |= AT91SAM9_SMC_NRDPULSE(coded_val);
364 coded_val = at91sam9_smc_pulse_ns_to_cycles(clk_rate,
365 timings->ncs_wr_pulse_ns);
366 val |= AT91SAM9_SMC_NCS_WRPULSE(coded_val);
367 coded_val = at91sam9_smc_pulse_ns_to_cycles(clk_rate,
368 timings->nwe_pulse_ns);
369 val |= AT91SAM9_SMC_NWEPULSE(coded_val);
370 regmap_fields_write(fields->pulse, conf->cs, val);
371
372 coded_val = at91sam9_smc_cycle_ns_to_cycles(clk_rate,
373 timings->nrd_cycle_ns);
374 val = AT91SAM9_SMC_NRDCYCLE(coded_val);
375 coded_val = at91sam9_smc_cycle_ns_to_cycles(clk_rate,
376 timings->nwe_cycle_ns);
377 val |= AT91SAM9_SMC_NWECYCLE(coded_val);
378 regmap_fields_write(fields->cycle, conf->cs, val);
379
380 val = DIV_ROUND_UP(timings->tdf_ns, clk_period);
381 if (val > AT91_SMC_TDF_MAX)
382 val = AT91_SMC_TDF_MAX;
383 regmap_fields_write(fields->mode, conf->cs,
384 config->mode | AT91_SMC_TDF_(val));
385
386 return 0;
387}
388
389static int at91sam9_ebi_init(struct at91_ebi *ebi)
390{
391 struct at91sam9_smc_generic_fields *fields = &ebi->sam9;
392 struct reg_field field = REG_FIELD(0, 0, 31);
393
394 field.id_size = fls(ebi->caps->available_cs);
395 field.id_offset = AT91SAM9_SMC_GENERIC_BLK_SZ;
396
397 field.reg = AT91SAM9_SMC_SETUP(AT91SAM9_SMC_GENERIC);
398 fields->setup = devm_regmap_field_alloc(ebi->dev, ebi->smc, field);
399 if (IS_ERR(fields->setup))
400 return PTR_ERR(fields->setup);
401
402 field.reg = AT91SAM9_SMC_PULSE(AT91SAM9_SMC_GENERIC);
403 fields->pulse = devm_regmap_field_alloc(ebi->dev, ebi->smc, field);
404 if (IS_ERR(fields->pulse))
405 return PTR_ERR(fields->pulse);
406
407 field.reg = AT91SAM9_SMC_CYCLE(AT91SAM9_SMC_GENERIC);
408 fields->cycle = devm_regmap_field_alloc(ebi->dev, ebi->smc, field);
409 if (IS_ERR(fields->cycle))
410 return PTR_ERR(fields->cycle);
411
412 field.reg = AT91SAM9_SMC_MODE(AT91SAM9_SMC_GENERIC);
413 fields->mode = devm_regmap_field_alloc(ebi->dev, ebi->smc, field);
414 return PTR_ERR_OR_ZERO(fields->mode);
415}
416
417static int sama5d3_ebi_init(struct at91_ebi *ebi)
418{
419 struct at91sam9_smc_generic_fields *fields = &ebi->sam9;
420 struct reg_field field = REG_FIELD(0, 0, 31);
421
422 field.id_size = fls(ebi->caps->available_cs);
423 field.id_offset = SAMA5_SMC_GENERIC_BLK_SZ;
424
425 field.reg = AT91SAM9_SMC_SETUP(SAMA5_SMC_GENERIC);
426 fields->setup = devm_regmap_field_alloc(ebi->dev, ebi->smc, field);
427 if (IS_ERR(fields->setup))
428 return PTR_ERR(fields->setup);
429
430 field.reg = AT91SAM9_SMC_PULSE(SAMA5_SMC_GENERIC);
431 fields->pulse = devm_regmap_field_alloc(ebi->dev, ebi->smc, field);
432 if (IS_ERR(fields->pulse))
433 return PTR_ERR(fields->pulse);
434
435 field.reg = AT91SAM9_SMC_CYCLE(SAMA5_SMC_GENERIC);
436 fields->cycle = devm_regmap_field_alloc(ebi->dev, ebi->smc, field);
437 if (IS_ERR(fields->cycle))
438 return PTR_ERR(fields->cycle);
439
440 field.reg = SAMA5_SMC_MODE(SAMA5_SMC_GENERIC);
441 fields->mode = devm_regmap_field_alloc(ebi->dev, ebi->smc, field);
442 return PTR_ERR_OR_ZERO(fields->mode);
443}
444
445static int at91_ebi_dev_setup(struct at91_ebi *ebi, struct device_node *np,
446 int reg_cells)
447{
448 const struct at91_ebi_caps *caps = ebi->caps;
449 struct at91_ebi_dev_config conf = { };
450 struct device *dev = ebi->dev;
451 struct at91_ebi_dev *ebid;
452 int ret, numcs = 0, i;
453 bool apply = false;
454
455 numcs = of_property_count_elems_of_size(np, "reg",
456 reg_cells * sizeof(u32));
457 if (numcs <= 0) {
458 dev_err(dev, "invalid reg property in %s\n", np->full_name);
459 return -EINVAL;
460 }
461
462 ebid = devm_kzalloc(ebi->dev,
463 sizeof(*ebid) + (numcs * sizeof(*ebid->configs)),
464 GFP_KERNEL);
465 if (!ebid)
466 return -ENOMEM;
467
468 ebid->ebi = ebi;
469
470 ret = caps->xlate_config(ebid, np, &conf);
471 if (ret < 0)
472 return ret;
473 else if (ret)
474 apply = true;
475
476 for (i = 0; i < numcs; i++) {
477 u32 cs;
478
479 ret = of_property_read_u32_index(np, "reg", i * reg_cells,
480 &cs);
481 if (ret)
482 return ret;
483
484 if (cs > AT91_MATRIX_EBI_NUM_CS ||
485 !(ebi->caps->available_cs & BIT(cs))) {
486 dev_err(dev, "invalid reg property in %s\n",
487 np->full_name);
488 return -EINVAL;
489 }
490
491 ebid->configs[i].cs = cs;
492
493 if (apply) {
494 conf.cs = cs;
495 ret = caps->apply_config(ebid, &conf);
496 if (ret)
497 return ret;
498 }
499
500 caps->get_config(ebid, &ebid->configs[i]);
501
502 /*
503 * Attach the EBI device to the generic SMC logic if at least
504 * one "atmel,smc-" property is present.
505 */
506 if (ebi->ebi_csa && ret)
507 regmap_field_update_bits(ebi->ebi_csa,
508 BIT(cs), 0);
509 }
510
511 list_add_tail(&ebid->node, &ebi->devs);
512
513 return 0;
514}
515
516static const struct reg_field at91sam9260_ebi_csa =
517 REG_FIELD(AT91SAM9260_MATRIX_EBICSA, 0,
518 AT91_MATRIX_EBI_NUM_CS - 1);
519
520static const struct at91_ebi_caps at91sam9260_ebi_caps = {
521 .available_cs = 0xff,
522 .ebi_csa = &at91sam9260_ebi_csa,
523 .get_config = at91sam9_ebi_get_config,
524 .xlate_config = at91sam9_ebi_xslate_config,
525 .apply_config = at91sam9_ebi_apply_config,
526 .init = at91sam9_ebi_init,
527};
528
529static const struct reg_field at91sam9261_ebi_csa =
530 REG_FIELD(AT91SAM9261_MATRIX_EBICSA, 0,
531 AT91_MATRIX_EBI_NUM_CS - 1);
532
533static const struct at91_ebi_caps at91sam9261_ebi_caps = {
534 .available_cs = 0xff,
535 .ebi_csa = &at91sam9261_ebi_csa,
536 .get_config = at91sam9_ebi_get_config,
537 .xlate_config = at91sam9_ebi_xslate_config,
538 .apply_config = at91sam9_ebi_apply_config,
539 .init = at91sam9_ebi_init,
540};
541
542static const struct reg_field at91sam9263_ebi0_csa =
543 REG_FIELD(AT91SAM9263_MATRIX_EBI0CSA, 0,
544 AT91_MATRIX_EBI_NUM_CS - 1);
545
546static const struct at91_ebi_caps at91sam9263_ebi0_caps = {
547 .available_cs = 0x3f,
548 .ebi_csa = &at91sam9263_ebi0_csa,
549 .get_config = at91sam9_ebi_get_config,
550 .xlate_config = at91sam9_ebi_xslate_config,
551 .apply_config = at91sam9_ebi_apply_config,
552 .init = at91sam9_ebi_init,
553};
554
555static const struct reg_field at91sam9263_ebi1_csa =
556 REG_FIELD(AT91SAM9263_MATRIX_EBI1CSA, 0,
557 AT91_MATRIX_EBI_NUM_CS - 1);
558
559static const struct at91_ebi_caps at91sam9263_ebi1_caps = {
560 .available_cs = 0x7,
561 .ebi_csa = &at91sam9263_ebi1_csa,
562 .get_config = at91sam9_ebi_get_config,
563 .xlate_config = at91sam9_ebi_xslate_config,
564 .apply_config = at91sam9_ebi_apply_config,
565 .init = at91sam9_ebi_init,
566};
567
568static const struct reg_field at91sam9rl_ebi_csa =
569 REG_FIELD(AT91SAM9RL_MATRIX_EBICSA, 0,
570 AT91_MATRIX_EBI_NUM_CS - 1);
571
572static const struct at91_ebi_caps at91sam9rl_ebi_caps = {
573 .available_cs = 0x3f,
574 .ebi_csa = &at91sam9rl_ebi_csa,
575 .get_config = at91sam9_ebi_get_config,
576 .xlate_config = at91sam9_ebi_xslate_config,
577 .apply_config = at91sam9_ebi_apply_config,
578 .init = at91sam9_ebi_init,
579};
580
581static const struct reg_field at91sam9g45_ebi_csa =
582 REG_FIELD(AT91SAM9G45_MATRIX_EBICSA, 0,
583 AT91_MATRIX_EBI_NUM_CS - 1);
584
585static const struct at91_ebi_caps at91sam9g45_ebi_caps = {
586 .available_cs = 0x3f,
587 .ebi_csa = &at91sam9g45_ebi_csa,
588 .get_config = at91sam9_ebi_get_config,
589 .xlate_config = at91sam9_ebi_xslate_config,
590 .apply_config = at91sam9_ebi_apply_config,
591 .init = at91sam9_ebi_init,
592};
593
594static const struct at91_ebi_caps at91sam9x5_ebi_caps = {
595 .available_cs = 0x3f,
596 .ebi_csa = &at91sam9263_ebi0_csa,
597 .get_config = at91sam9_ebi_get_config,
598 .xlate_config = at91sam9_ebi_xslate_config,
599 .apply_config = at91sam9_ebi_apply_config,
600 .init = at91sam9_ebi_init,
601};
602
603static const struct at91_ebi_caps sama5d3_ebi_caps = {
604 .available_cs = 0xf,
605 .get_config = at91sam9_ebi_get_config,
606 .xlate_config = at91sam9_ebi_xslate_config,
607 .apply_config = at91sam9_ebi_apply_config,
608 .init = sama5d3_ebi_init,
609};
610
611static const struct of_device_id at91_ebi_id_table[] = {
612 {
613 .compatible = "atmel,at91sam9260-ebi",
614 .data = &at91sam9260_ebi_caps,
615 },
616 {
617 .compatible = "atmel,at91sam9261-ebi",
618 .data = &at91sam9261_ebi_caps,
619 },
620 {
621 .compatible = "atmel,at91sam9263-ebi0",
622 .data = &at91sam9263_ebi0_caps,
623 },
624 {
625 .compatible = "atmel,at91sam9263-ebi1",
626 .data = &at91sam9263_ebi1_caps,
627 },
628 {
629 .compatible = "atmel,at91sam9rl-ebi",
630 .data = &at91sam9rl_ebi_caps,
631 },
632 {
633 .compatible = "atmel,at91sam9g45-ebi",
634 .data = &at91sam9g45_ebi_caps,
635 },
636 {
637 .compatible = "atmel,at91sam9x5-ebi",
638 .data = &at91sam9x5_ebi_caps,
639 },
640 {
641 .compatible = "atmel,sama5d3-ebi",
642 .data = &sama5d3_ebi_caps,
643 },
644 { /* sentinel */ }
645};
646
647static int at91_ebi_dev_disable(struct at91_ebi *ebi, struct device_node *np)
648{
649 struct device *dev = ebi->dev;
650 struct property *newprop;
651
652 newprop = devm_kzalloc(dev, sizeof(*newprop), GFP_KERNEL);
653 if (!newprop)
654 return -ENOMEM;
655
656 newprop->name = devm_kstrdup(dev, "status", GFP_KERNEL);
657 if (!newprop->name)
658 return -ENOMEM;
659
660 newprop->value = devm_kstrdup(dev, "disabled", GFP_KERNEL);
661 if (!newprop->value)
662 return -ENOMEM;
663
664 newprop->length = sizeof("disabled");
665
666 return of_update_property(np, newprop);
667}
668
669static int at91_ebi_probe(struct platform_device *pdev)
670{
671 struct device *dev = &pdev->dev;
672 struct device_node *child, *np = dev->of_node;
673 const struct of_device_id *match;
674 struct at91_ebi *ebi;
675 int ret, reg_cells;
676 struct clk *clk;
677 u32 val;
678
679 match = of_match_device(at91_ebi_id_table, dev);
680 if (!match || !match->data)
681 return -EINVAL;
682
683 ebi = devm_kzalloc(dev, sizeof(*ebi), GFP_KERNEL);
684 if (!ebi)
685 return -ENOMEM;
686
687 INIT_LIST_HEAD(&ebi->devs);
688 ebi->caps = match->data;
689 ebi->dev = dev;
690
691 clk = devm_clk_get(dev, NULL);
692 if (IS_ERR(clk))
693 return PTR_ERR(clk);
694
695 ebi->clk = clk;
696
697 ebi->smc = syscon_regmap_lookup_by_phandle(np, "atmel,smc");
698 if (IS_ERR(ebi->smc))
699 return PTR_ERR(ebi->smc);
700
701 /*
702 * The sama5d3 does not provide an EBICSA register and thus does need
703 * to access the matrix registers.
704 */
705 if (ebi->caps->ebi_csa) {
706 ebi->matrix =
707 syscon_regmap_lookup_by_phandle(np, "atmel,matrix");
708 if (IS_ERR(ebi->matrix))
709 return PTR_ERR(ebi->matrix);
710
711 ebi->ebi_csa = regmap_field_alloc(ebi->matrix,
712 *ebi->caps->ebi_csa);
713 if (IS_ERR(ebi->ebi_csa))
714 return PTR_ERR(ebi->ebi_csa);
715 }
716
717 ret = ebi->caps->init(ebi);
718 if (ret)
719 return ret;
720
721 ret = of_property_read_u32(np, "#address-cells", &val);
722 if (ret) {
723 dev_err(dev, "missing #address-cells property\n");
724 return ret;
725 }
726
727 reg_cells = val;
728
729 ret = of_property_read_u32(np, "#size-cells", &val);
730 if (ret) {
731 dev_err(dev, "missing #address-cells property\n");
732 return ret;
733 }
734
735 reg_cells += val;
736
737 for_each_available_child_of_node(np, child) {
738 if (!of_find_property(child, "reg", NULL))
739 continue;
740
741 ret = at91_ebi_dev_setup(ebi, child, reg_cells);
742 if (ret) {
743 dev_err(dev, "failed to configure EBI bus for %s, disabling the device",
744 child->full_name);
745
746 ret = at91_ebi_dev_disable(ebi, child);
747 if (ret)
748 return ret;
749 }
750 }
751
752 return of_platform_populate(np, NULL, NULL, dev);
753}
754
755static struct platform_driver at91_ebi_driver = {
756 .driver = {
757 .name = "atmel-ebi",
758 .of_match_table = at91_ebi_id_table,
759 },
760};
761builtin_platform_driver_probe(at91_ebi_driver, at91_ebi_probe);