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1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * HDMI driver for OMAP5
4 *
5 * Copyright (C) 2014 Texas Instruments Incorporated - https://www.ti.com/
6 *
7 * Authors:
8 * Yong Zhi
9 * Mythri pk
10 * Archit Taneja <archit@ti.com>
11 * Tomi Valkeinen <tomi.valkeinen@ti.com>
12 */
13
14#define DSS_SUBSYS_NAME "HDMI"
15
16#include <linux/kernel.h>
17#include <linux/module.h>
18#include <linux/err.h>
19#include <linux/io.h>
20#include <linux/interrupt.h>
21#include <linux/mutex.h>
22#include <linux/delay.h>
23#include <linux/string.h>
24#include <linux/platform_device.h>
25#include <linux/pm_runtime.h>
26#include <linux/clk.h>
27#include <linux/regulator/consumer.h>
28#include <linux/component.h>
29#include <linux/of.h>
30#include <linux/of_graph.h>
31#include <sound/omap-hdmi-audio.h>
32
33#include <drm/drm_atomic.h>
34#include <drm/drm_atomic_state_helper.h>
35#include <drm/drm_edid.h>
36
37#include "omapdss.h"
38#include "hdmi5_core.h"
39#include "dss.h"
40
41static int hdmi_runtime_get(struct omap_hdmi *hdmi)
42{
43 int r;
44
45 DSSDBG("hdmi_runtime_get\n");
46
47 r = pm_runtime_get_sync(&hdmi->pdev->dev);
48 if (WARN_ON(r < 0)) {
49 pm_runtime_put_noidle(&hdmi->pdev->dev);
50 return r;
51 }
52 return 0;
53}
54
55static void hdmi_runtime_put(struct omap_hdmi *hdmi)
56{
57 int r;
58
59 DSSDBG("hdmi_runtime_put\n");
60
61 r = pm_runtime_put_sync(&hdmi->pdev->dev);
62 WARN_ON(r < 0 && r != -ENOSYS);
63}
64
65static irqreturn_t hdmi_irq_handler(int irq, void *data)
66{
67 struct omap_hdmi *hdmi = data;
68 struct hdmi_wp_data *wp = &hdmi->wp;
69 u32 irqstatus;
70
71 irqstatus = hdmi_wp_get_irqstatus(wp);
72 hdmi_wp_set_irqstatus(wp, irqstatus);
73
74 if ((irqstatus & HDMI_IRQ_LINK_CONNECT) &&
75 irqstatus & HDMI_IRQ_LINK_DISCONNECT) {
76 u32 v;
77 /*
78 * If we get both connect and disconnect interrupts at the same
79 * time, turn off the PHY, clear interrupts, and restart, which
80 * raises connect interrupt if a cable is connected, or nothing
81 * if cable is not connected.
82 */
83
84 hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_OFF);
85
86 /*
87 * We always get bogus CONNECT & DISCONNECT interrupts when
88 * setting the PHY to LDOON. To ignore those, we force the RXDET
89 * line to 0 until the PHY power state has been changed.
90 */
91 v = hdmi_read_reg(hdmi->phy.base, HDMI_TXPHY_PAD_CFG_CTRL);
92 v = FLD_MOD(v, 1, 15, 15); /* FORCE_RXDET_HIGH */
93 v = FLD_MOD(v, 0, 14, 7); /* RXDET_LINE */
94 hdmi_write_reg(hdmi->phy.base, HDMI_TXPHY_PAD_CFG_CTRL, v);
95
96 hdmi_wp_set_irqstatus(wp, HDMI_IRQ_LINK_CONNECT |
97 HDMI_IRQ_LINK_DISCONNECT);
98
99 hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_LDOON);
100
101 REG_FLD_MOD(hdmi->phy.base, HDMI_TXPHY_PAD_CFG_CTRL, 0, 15, 15);
102
103 } else if (irqstatus & HDMI_IRQ_LINK_CONNECT) {
104 hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_TXON);
105 } else if (irqstatus & HDMI_IRQ_LINK_DISCONNECT) {
106 hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_LDOON);
107 }
108
109 return IRQ_HANDLED;
110}
111
112static int hdmi_power_on_core(struct omap_hdmi *hdmi)
113{
114 int r;
115
116 r = regulator_enable(hdmi->vdda_reg);
117 if (r)
118 return r;
119
120 r = hdmi_runtime_get(hdmi);
121 if (r)
122 goto err_runtime_get;
123
124 /* Make selection of HDMI in DSS */
125 dss_select_hdmi_venc_clk_source(hdmi->dss, DSS_HDMI_M_PCLK);
126
127 hdmi->core_enabled = true;
128
129 return 0;
130
131err_runtime_get:
132 regulator_disable(hdmi->vdda_reg);
133
134 return r;
135}
136
137static void hdmi_power_off_core(struct omap_hdmi *hdmi)
138{
139 hdmi->core_enabled = false;
140
141 hdmi_runtime_put(hdmi);
142 regulator_disable(hdmi->vdda_reg);
143}
144
145static int hdmi_power_on_full(struct omap_hdmi *hdmi)
146{
147 int r;
148 const struct videomode *vm;
149 struct dss_pll_clock_info hdmi_cinfo = { 0 };
150 unsigned int pc;
151
152 r = hdmi_power_on_core(hdmi);
153 if (r)
154 return r;
155
156 vm = &hdmi->cfg.vm;
157
158 DSSDBG("hdmi_power_on hactive= %d vactive = %d\n", vm->hactive,
159 vm->vactive);
160
161 pc = vm->pixelclock;
162 if (vm->flags & DISPLAY_FLAGS_DOUBLECLK)
163 pc *= 2;
164
165 /* DSS_HDMI_TCLK is bitclk / 10 */
166 pc *= 10;
167
168 dss_pll_calc_b(&hdmi->pll.pll, clk_get_rate(hdmi->pll.pll.clkin),
169 pc, &hdmi_cinfo);
170
171 /* disable and clear irqs */
172 hdmi_wp_clear_irqenable(&hdmi->wp, 0xffffffff);
173 hdmi_wp_set_irqstatus(&hdmi->wp,
174 hdmi_wp_get_irqstatus(&hdmi->wp));
175
176 r = dss_pll_enable(&hdmi->pll.pll);
177 if (r) {
178 DSSERR("Failed to enable PLL\n");
179 goto err_pll_enable;
180 }
181
182 r = dss_pll_set_config(&hdmi->pll.pll, &hdmi_cinfo);
183 if (r) {
184 DSSERR("Failed to configure PLL\n");
185 goto err_pll_cfg;
186 }
187
188 r = hdmi_phy_configure(&hdmi->phy, hdmi_cinfo.clkdco,
189 hdmi_cinfo.clkout[0]);
190 if (r) {
191 DSSDBG("Failed to start PHY\n");
192 goto err_phy_cfg;
193 }
194
195 r = hdmi_wp_set_phy_pwr(&hdmi->wp, HDMI_PHYPWRCMD_LDOON);
196 if (r)
197 goto err_phy_pwr;
198
199 hdmi5_configure(&hdmi->core, &hdmi->wp, &hdmi->cfg);
200
201 r = dss_mgr_enable(&hdmi->output);
202 if (r)
203 goto err_mgr_enable;
204
205 r = hdmi_wp_video_start(&hdmi->wp);
206 if (r)
207 goto err_vid_enable;
208
209 hdmi_wp_set_irqenable(&hdmi->wp,
210 HDMI_IRQ_LINK_CONNECT | HDMI_IRQ_LINK_DISCONNECT);
211
212 return 0;
213
214err_vid_enable:
215 dss_mgr_disable(&hdmi->output);
216err_mgr_enable:
217 hdmi_wp_set_phy_pwr(&hdmi->wp, HDMI_PHYPWRCMD_OFF);
218err_phy_pwr:
219err_phy_cfg:
220err_pll_cfg:
221 dss_pll_disable(&hdmi->pll.pll);
222err_pll_enable:
223 hdmi_power_off_core(hdmi);
224 return -EIO;
225}
226
227static void hdmi_power_off_full(struct omap_hdmi *hdmi)
228{
229 hdmi_wp_clear_irqenable(&hdmi->wp, 0xffffffff);
230
231 hdmi_wp_video_stop(&hdmi->wp);
232
233 dss_mgr_disable(&hdmi->output);
234
235 hdmi_wp_set_phy_pwr(&hdmi->wp, HDMI_PHYPWRCMD_OFF);
236
237 dss_pll_disable(&hdmi->pll.pll);
238
239 hdmi_power_off_core(hdmi);
240}
241
242static int hdmi_dump_regs(struct seq_file *s, void *p)
243{
244 struct omap_hdmi *hdmi = s->private;
245
246 mutex_lock(&hdmi->lock);
247
248 if (hdmi_runtime_get(hdmi)) {
249 mutex_unlock(&hdmi->lock);
250 return 0;
251 }
252
253 hdmi_wp_dump(&hdmi->wp, s);
254 hdmi_pll_dump(&hdmi->pll, s);
255 hdmi_phy_dump(&hdmi->phy, s);
256 hdmi5_core_dump(&hdmi->core, s);
257
258 hdmi_runtime_put(hdmi);
259 mutex_unlock(&hdmi->lock);
260 return 0;
261}
262
263static void hdmi_start_audio_stream(struct omap_hdmi *hd)
264{
265 REG_FLD_MOD(hd->wp.base, HDMI_WP_SYSCONFIG, 1, 3, 2);
266 hdmi_wp_audio_enable(&hd->wp, true);
267 hdmi_wp_audio_core_req_enable(&hd->wp, true);
268}
269
270static void hdmi_stop_audio_stream(struct omap_hdmi *hd)
271{
272 hdmi_wp_audio_core_req_enable(&hd->wp, false);
273 hdmi_wp_audio_enable(&hd->wp, false);
274 REG_FLD_MOD(hd->wp.base, HDMI_WP_SYSCONFIG, hd->wp_idlemode, 3, 2);
275}
276
277static int hdmi_core_enable(struct omap_hdmi *hdmi)
278{
279 int r = 0;
280
281 DSSDBG("ENTER omapdss_hdmi_core_enable\n");
282
283 mutex_lock(&hdmi->lock);
284
285 r = hdmi_power_on_core(hdmi);
286 if (r) {
287 DSSERR("failed to power on device\n");
288 goto err0;
289 }
290
291 mutex_unlock(&hdmi->lock);
292 return 0;
293
294err0:
295 mutex_unlock(&hdmi->lock);
296 return r;
297}
298
299static void hdmi_core_disable(struct omap_hdmi *hdmi)
300{
301 DSSDBG("Enter omapdss_hdmi_core_disable\n");
302
303 mutex_lock(&hdmi->lock);
304
305 hdmi_power_off_core(hdmi);
306
307 mutex_unlock(&hdmi->lock);
308}
309
310/* -----------------------------------------------------------------------------
311 * DRM Bridge Operations
312 */
313
314static int hdmi5_bridge_attach(struct drm_bridge *bridge,
315 enum drm_bridge_attach_flags flags)
316{
317 struct omap_hdmi *hdmi = drm_bridge_to_hdmi(bridge);
318
319 if (!(flags & DRM_BRIDGE_ATTACH_NO_CONNECTOR))
320 return -EINVAL;
321
322 return drm_bridge_attach(bridge->encoder, hdmi->output.next_bridge,
323 bridge, flags);
324}
325
326static void hdmi5_bridge_mode_set(struct drm_bridge *bridge,
327 const struct drm_display_mode *mode,
328 const struct drm_display_mode *adjusted_mode)
329{
330 struct omap_hdmi *hdmi = drm_bridge_to_hdmi(bridge);
331
332 mutex_lock(&hdmi->lock);
333
334 drm_display_mode_to_videomode(adjusted_mode, &hdmi->cfg.vm);
335
336 dispc_set_tv_pclk(hdmi->dss->dispc, adjusted_mode->clock * 1000);
337
338 mutex_unlock(&hdmi->lock);
339}
340
341static void hdmi5_bridge_enable(struct drm_bridge *bridge,
342 struct drm_bridge_state *bridge_state)
343{
344 struct omap_hdmi *hdmi = drm_bridge_to_hdmi(bridge);
345 struct drm_atomic_state *state = bridge_state->base.state;
346 struct drm_connector_state *conn_state;
347 struct drm_connector *connector;
348 struct drm_crtc_state *crtc_state;
349 unsigned long flags;
350 int ret;
351
352 /*
353 * None of these should fail, as the bridge can't be enabled without a
354 * valid CRTC to connector path with fully populated new states.
355 */
356 connector = drm_atomic_get_new_connector_for_encoder(state,
357 bridge->encoder);
358 if (WARN_ON(!connector))
359 return;
360 conn_state = drm_atomic_get_new_connector_state(state, connector);
361 if (WARN_ON(!conn_state))
362 return;
363 crtc_state = drm_atomic_get_new_crtc_state(state, conn_state->crtc);
364 if (WARN_ON(!crtc_state))
365 return;
366
367 hdmi->cfg.hdmi_dvi_mode = connector->display_info.is_hdmi
368 ? HDMI_HDMI : HDMI_DVI;
369
370 if (connector->display_info.is_hdmi) {
371 const struct drm_display_mode *mode;
372 struct hdmi_avi_infoframe avi;
373
374 mode = &crtc_state->adjusted_mode;
375 ret = drm_hdmi_avi_infoframe_from_display_mode(&avi, connector,
376 mode);
377 if (ret == 0)
378 hdmi->cfg.infoframe = avi;
379 }
380
381 mutex_lock(&hdmi->lock);
382
383 ret = hdmi_power_on_full(hdmi);
384 if (ret) {
385 DSSERR("failed to power on device\n");
386 goto done;
387 }
388
389 if (hdmi->audio_configured) {
390 ret = hdmi5_audio_config(&hdmi->core, &hdmi->wp,
391 &hdmi->audio_config,
392 hdmi->cfg.vm.pixelclock);
393 if (ret) {
394 DSSERR("Error restoring audio configuration: %d", ret);
395 hdmi->audio_abort_cb(&hdmi->pdev->dev);
396 hdmi->audio_configured = false;
397 }
398 }
399
400 spin_lock_irqsave(&hdmi->audio_playing_lock, flags);
401 if (hdmi->audio_configured && hdmi->audio_playing)
402 hdmi_start_audio_stream(hdmi);
403 hdmi->display_enabled = true;
404 spin_unlock_irqrestore(&hdmi->audio_playing_lock, flags);
405
406done:
407 mutex_unlock(&hdmi->lock);
408}
409
410static void hdmi5_bridge_disable(struct drm_bridge *bridge,
411 struct drm_bridge_state *bridge_state)
412{
413 struct omap_hdmi *hdmi = drm_bridge_to_hdmi(bridge);
414 unsigned long flags;
415
416 mutex_lock(&hdmi->lock);
417
418 spin_lock_irqsave(&hdmi->audio_playing_lock, flags);
419 hdmi_stop_audio_stream(hdmi);
420 hdmi->display_enabled = false;
421 spin_unlock_irqrestore(&hdmi->audio_playing_lock, flags);
422
423 hdmi_power_off_full(hdmi);
424
425 mutex_unlock(&hdmi->lock);
426}
427
428static struct edid *hdmi5_bridge_get_edid(struct drm_bridge *bridge,
429 struct drm_connector *connector)
430{
431 struct omap_hdmi *hdmi = drm_bridge_to_hdmi(bridge);
432 struct edid *edid;
433 bool need_enable;
434 int idlemode;
435 int r;
436
437 need_enable = hdmi->core_enabled == false;
438
439 if (need_enable) {
440 r = hdmi_core_enable(hdmi);
441 if (r)
442 return NULL;
443 }
444
445 mutex_lock(&hdmi->lock);
446 r = hdmi_runtime_get(hdmi);
447 BUG_ON(r);
448
449 idlemode = REG_GET(hdmi->wp.base, HDMI_WP_SYSCONFIG, 3, 2);
450 /* No-idle mode */
451 REG_FLD_MOD(hdmi->wp.base, HDMI_WP_SYSCONFIG, 1, 3, 2);
452
453 hdmi5_core_ddc_init(&hdmi->core);
454
455 edid = drm_do_get_edid(connector, hdmi5_core_ddc_read, &hdmi->core);
456
457 hdmi5_core_ddc_uninit(&hdmi->core);
458
459 REG_FLD_MOD(hdmi->wp.base, HDMI_WP_SYSCONFIG, idlemode, 3, 2);
460
461 hdmi_runtime_put(hdmi);
462 mutex_unlock(&hdmi->lock);
463
464 if (need_enable)
465 hdmi_core_disable(hdmi);
466
467 return (struct edid *)edid;
468}
469
470static const struct drm_bridge_funcs hdmi5_bridge_funcs = {
471 .attach = hdmi5_bridge_attach,
472 .mode_set = hdmi5_bridge_mode_set,
473 .atomic_duplicate_state = drm_atomic_helper_bridge_duplicate_state,
474 .atomic_destroy_state = drm_atomic_helper_bridge_destroy_state,
475 .atomic_reset = drm_atomic_helper_bridge_reset,
476 .atomic_enable = hdmi5_bridge_enable,
477 .atomic_disable = hdmi5_bridge_disable,
478 .get_edid = hdmi5_bridge_get_edid,
479};
480
481static void hdmi5_bridge_init(struct omap_hdmi *hdmi)
482{
483 hdmi->bridge.funcs = &hdmi5_bridge_funcs;
484 hdmi->bridge.of_node = hdmi->pdev->dev.of_node;
485 hdmi->bridge.ops = DRM_BRIDGE_OP_EDID;
486 hdmi->bridge.type = DRM_MODE_CONNECTOR_HDMIA;
487
488 drm_bridge_add(&hdmi->bridge);
489}
490
491static void hdmi5_bridge_cleanup(struct omap_hdmi *hdmi)
492{
493 drm_bridge_remove(&hdmi->bridge);
494}
495
496/* -----------------------------------------------------------------------------
497 * Audio Callbacks
498 */
499
500static int hdmi_audio_startup(struct device *dev,
501 void (*abort_cb)(struct device *dev))
502{
503 struct omap_hdmi *hd = dev_get_drvdata(dev);
504
505 mutex_lock(&hd->lock);
506
507 WARN_ON(hd->audio_abort_cb != NULL);
508
509 hd->audio_abort_cb = abort_cb;
510
511 mutex_unlock(&hd->lock);
512
513 return 0;
514}
515
516static int hdmi_audio_shutdown(struct device *dev)
517{
518 struct omap_hdmi *hd = dev_get_drvdata(dev);
519
520 mutex_lock(&hd->lock);
521 hd->audio_abort_cb = NULL;
522 hd->audio_configured = false;
523 hd->audio_playing = false;
524 mutex_unlock(&hd->lock);
525
526 return 0;
527}
528
529static int hdmi_audio_start(struct device *dev)
530{
531 struct omap_hdmi *hd = dev_get_drvdata(dev);
532 unsigned long flags;
533
534 spin_lock_irqsave(&hd->audio_playing_lock, flags);
535
536 if (hd->display_enabled) {
537 if (!hdmi_mode_has_audio(&hd->cfg))
538 DSSERR("%s: Video mode does not support audio\n",
539 __func__);
540 hdmi_start_audio_stream(hd);
541 }
542 hd->audio_playing = true;
543
544 spin_unlock_irqrestore(&hd->audio_playing_lock, flags);
545 return 0;
546}
547
548static void hdmi_audio_stop(struct device *dev)
549{
550 struct omap_hdmi *hd = dev_get_drvdata(dev);
551 unsigned long flags;
552
553 if (!hdmi_mode_has_audio(&hd->cfg))
554 DSSERR("%s: Video mode does not support audio\n", __func__);
555
556 spin_lock_irqsave(&hd->audio_playing_lock, flags);
557
558 if (hd->display_enabled)
559 hdmi_stop_audio_stream(hd);
560 hd->audio_playing = false;
561
562 spin_unlock_irqrestore(&hd->audio_playing_lock, flags);
563}
564
565static int hdmi_audio_config(struct device *dev,
566 struct omap_dss_audio *dss_audio)
567{
568 struct omap_hdmi *hd = dev_get_drvdata(dev);
569 int ret = 0;
570
571 mutex_lock(&hd->lock);
572
573 if (hd->display_enabled) {
574 ret = hdmi5_audio_config(&hd->core, &hd->wp, dss_audio,
575 hd->cfg.vm.pixelclock);
576 if (ret)
577 goto out;
578 }
579
580 hd->audio_configured = true;
581 hd->audio_config = *dss_audio;
582out:
583 mutex_unlock(&hd->lock);
584
585 return ret;
586}
587
588static const struct omap_hdmi_audio_ops hdmi_audio_ops = {
589 .audio_startup = hdmi_audio_startup,
590 .audio_shutdown = hdmi_audio_shutdown,
591 .audio_start = hdmi_audio_start,
592 .audio_stop = hdmi_audio_stop,
593 .audio_config = hdmi_audio_config,
594};
595
596static int hdmi_audio_register(struct omap_hdmi *hdmi)
597{
598 struct omap_hdmi_audio_pdata pdata = {
599 .dev = &hdmi->pdev->dev,
600 .version = 5,
601 .audio_dma_addr = hdmi_wp_get_audio_dma_addr(&hdmi->wp),
602 .ops = &hdmi_audio_ops,
603 };
604
605 hdmi->audio_pdev = platform_device_register_data(
606 &hdmi->pdev->dev, "omap-hdmi-audio", PLATFORM_DEVID_AUTO,
607 &pdata, sizeof(pdata));
608
609 if (IS_ERR(hdmi->audio_pdev))
610 return PTR_ERR(hdmi->audio_pdev);
611
612 hdmi_runtime_get(hdmi);
613 hdmi->wp_idlemode =
614 REG_GET(hdmi->wp.base, HDMI_WP_SYSCONFIG, 3, 2);
615 hdmi_runtime_put(hdmi);
616
617 return 0;
618}
619
620/* -----------------------------------------------------------------------------
621 * Component Bind & Unbind
622 */
623
624static int hdmi5_bind(struct device *dev, struct device *master, void *data)
625{
626 struct dss_device *dss = dss_get_device(master);
627 struct omap_hdmi *hdmi = dev_get_drvdata(dev);
628 int r;
629
630 hdmi->dss = dss;
631
632 r = hdmi_pll_init(dss, hdmi->pdev, &hdmi->pll, &hdmi->wp);
633 if (r)
634 return r;
635
636 r = hdmi_audio_register(hdmi);
637 if (r) {
638 DSSERR("Registering HDMI audio failed %d\n", r);
639 goto err_pll_uninit;
640 }
641
642 hdmi->debugfs = dss_debugfs_create_file(dss, "hdmi", hdmi_dump_regs,
643 hdmi);
644
645 return 0;
646
647err_pll_uninit:
648 hdmi_pll_uninit(&hdmi->pll);
649 return r;
650}
651
652static void hdmi5_unbind(struct device *dev, struct device *master, void *data)
653{
654 struct omap_hdmi *hdmi = dev_get_drvdata(dev);
655
656 dss_debugfs_remove_file(hdmi->debugfs);
657
658 if (hdmi->audio_pdev)
659 platform_device_unregister(hdmi->audio_pdev);
660
661 hdmi_pll_uninit(&hdmi->pll);
662}
663
664static const struct component_ops hdmi5_component_ops = {
665 .bind = hdmi5_bind,
666 .unbind = hdmi5_unbind,
667};
668
669/* -----------------------------------------------------------------------------
670 * Probe & Remove, Suspend & Resume
671 */
672
673static int hdmi5_init_output(struct omap_hdmi *hdmi)
674{
675 struct omap_dss_device *out = &hdmi->output;
676 int r;
677
678 hdmi5_bridge_init(hdmi);
679
680 out->dev = &hdmi->pdev->dev;
681 out->id = OMAP_DSS_OUTPUT_HDMI;
682 out->type = OMAP_DISPLAY_TYPE_HDMI;
683 out->name = "hdmi.0";
684 out->dispc_channel = OMAP_DSS_CHANNEL_DIGIT;
685 out->of_port = 0;
686
687 r = omapdss_device_init_output(out, &hdmi->bridge);
688 if (r < 0) {
689 hdmi5_bridge_cleanup(hdmi);
690 return r;
691 }
692
693 omapdss_device_register(out);
694
695 return 0;
696}
697
698static void hdmi5_uninit_output(struct omap_hdmi *hdmi)
699{
700 struct omap_dss_device *out = &hdmi->output;
701
702 omapdss_device_unregister(out);
703 omapdss_device_cleanup_output(out);
704
705 hdmi5_bridge_cleanup(hdmi);
706}
707
708static int hdmi5_probe_of(struct omap_hdmi *hdmi)
709{
710 struct platform_device *pdev = hdmi->pdev;
711 struct device_node *node = pdev->dev.of_node;
712 struct device_node *ep;
713 int r;
714
715 ep = of_graph_get_endpoint_by_regs(node, 0, 0);
716 if (!ep)
717 return 0;
718
719 r = hdmi_parse_lanes_of(pdev, ep, &hdmi->phy);
720 of_node_put(ep);
721 return r;
722}
723
724static int hdmi5_probe(struct platform_device *pdev)
725{
726 struct omap_hdmi *hdmi;
727 int irq;
728 int r;
729
730 hdmi = kzalloc(sizeof(*hdmi), GFP_KERNEL);
731 if (!hdmi)
732 return -ENOMEM;
733
734 hdmi->pdev = pdev;
735
736 dev_set_drvdata(&pdev->dev, hdmi);
737
738 mutex_init(&hdmi->lock);
739 spin_lock_init(&hdmi->audio_playing_lock);
740
741 r = hdmi5_probe_of(hdmi);
742 if (r)
743 goto err_free;
744
745 r = hdmi_wp_init(pdev, &hdmi->wp, 5);
746 if (r)
747 goto err_free;
748
749 r = hdmi_phy_init(pdev, &hdmi->phy, 5);
750 if (r)
751 goto err_free;
752
753 r = hdmi5_core_init(pdev, &hdmi->core);
754 if (r)
755 goto err_free;
756
757 irq = platform_get_irq(pdev, 0);
758 if (irq < 0) {
759 DSSERR("platform_get_irq failed\n");
760 r = -ENODEV;
761 goto err_free;
762 }
763
764 r = devm_request_threaded_irq(&pdev->dev, irq,
765 NULL, hdmi_irq_handler,
766 IRQF_ONESHOT, "OMAP HDMI", hdmi);
767 if (r) {
768 DSSERR("HDMI IRQ request failed\n");
769 goto err_free;
770 }
771
772 hdmi->vdda_reg = devm_regulator_get(&pdev->dev, "vdda");
773 if (IS_ERR(hdmi->vdda_reg)) {
774 r = PTR_ERR(hdmi->vdda_reg);
775 if (r != -EPROBE_DEFER)
776 DSSERR("can't get VDDA regulator\n");
777 goto err_free;
778 }
779
780 pm_runtime_enable(&pdev->dev);
781
782 r = hdmi5_init_output(hdmi);
783 if (r)
784 goto err_pm_disable;
785
786 r = component_add(&pdev->dev, &hdmi5_component_ops);
787 if (r)
788 goto err_uninit_output;
789
790 return 0;
791
792err_uninit_output:
793 hdmi5_uninit_output(hdmi);
794err_pm_disable:
795 pm_runtime_disable(&pdev->dev);
796err_free:
797 kfree(hdmi);
798 return r;
799}
800
801static int hdmi5_remove(struct platform_device *pdev)
802{
803 struct omap_hdmi *hdmi = platform_get_drvdata(pdev);
804
805 component_del(&pdev->dev, &hdmi5_component_ops);
806
807 hdmi5_uninit_output(hdmi);
808
809 pm_runtime_disable(&pdev->dev);
810
811 kfree(hdmi);
812 return 0;
813}
814
815static const struct of_device_id hdmi_of_match[] = {
816 { .compatible = "ti,omap5-hdmi", },
817 { .compatible = "ti,dra7-hdmi", },
818 {},
819};
820
821struct platform_driver omapdss_hdmi5hw_driver = {
822 .probe = hdmi5_probe,
823 .remove = hdmi5_remove,
824 .driver = {
825 .name = "omapdss_hdmi5",
826 .of_match_table = hdmi_of_match,
827 .suppress_bind_attrs = true,
828 },
829};
1/*
2 * HDMI driver for OMAP5
3 *
4 * Copyright (C) 2014 Texas Instruments Incorporated
5 *
6 * Authors:
7 * Yong Zhi
8 * Mythri pk
9 * Archit Taneja <archit@ti.com>
10 * Tomi Valkeinen <tomi.valkeinen@ti.com>
11 *
12 * This program is free software; you can redistribute it and/or modify it
13 * under the terms of the GNU General Public License version 2 as published by
14 * the Free Software Foundation.
15 *
16 * This program is distributed in the hope that it will be useful, but WITHOUT
17 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
18 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
19 * more details.
20 *
21 * You should have received a copy of the GNU General Public License along with
22 * this program. If not, see <http://www.gnu.org/licenses/>.
23 */
24
25#define DSS_SUBSYS_NAME "HDMI"
26
27#include <linux/kernel.h>
28#include <linux/module.h>
29#include <linux/err.h>
30#include <linux/io.h>
31#include <linux/interrupt.h>
32#include <linux/mutex.h>
33#include <linux/delay.h>
34#include <linux/string.h>
35#include <linux/platform_device.h>
36#include <linux/pm_runtime.h>
37#include <linux/clk.h>
38#include <linux/gpio.h>
39#include <linux/regulator/consumer.h>
40#include <linux/component.h>
41#include <linux/of.h>
42#include <sound/omap-hdmi-audio.h>
43
44#include "omapdss.h"
45#include "hdmi5_core.h"
46#include "dss.h"
47#include "dss_features.h"
48
49static struct omap_hdmi hdmi;
50
51static int hdmi_runtime_get(void)
52{
53 int r;
54
55 DSSDBG("hdmi_runtime_get\n");
56
57 r = pm_runtime_get_sync(&hdmi.pdev->dev);
58 WARN_ON(r < 0);
59 if (r < 0)
60 return r;
61
62 return 0;
63}
64
65static void hdmi_runtime_put(void)
66{
67 int r;
68
69 DSSDBG("hdmi_runtime_put\n");
70
71 r = pm_runtime_put_sync(&hdmi.pdev->dev);
72 WARN_ON(r < 0 && r != -ENOSYS);
73}
74
75static irqreturn_t hdmi_irq_handler(int irq, void *data)
76{
77 struct hdmi_wp_data *wp = data;
78 u32 irqstatus;
79
80 irqstatus = hdmi_wp_get_irqstatus(wp);
81 hdmi_wp_set_irqstatus(wp, irqstatus);
82
83 if ((irqstatus & HDMI_IRQ_LINK_CONNECT) &&
84 irqstatus & HDMI_IRQ_LINK_DISCONNECT) {
85 u32 v;
86 /*
87 * If we get both connect and disconnect interrupts at the same
88 * time, turn off the PHY, clear interrupts, and restart, which
89 * raises connect interrupt if a cable is connected, or nothing
90 * if cable is not connected.
91 */
92
93 hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_OFF);
94
95 /*
96 * We always get bogus CONNECT & DISCONNECT interrupts when
97 * setting the PHY to LDOON. To ignore those, we force the RXDET
98 * line to 0 until the PHY power state has been changed.
99 */
100 v = hdmi_read_reg(hdmi.phy.base, HDMI_TXPHY_PAD_CFG_CTRL);
101 v = FLD_MOD(v, 1, 15, 15); /* FORCE_RXDET_HIGH */
102 v = FLD_MOD(v, 0, 14, 7); /* RXDET_LINE */
103 hdmi_write_reg(hdmi.phy.base, HDMI_TXPHY_PAD_CFG_CTRL, v);
104
105 hdmi_wp_set_irqstatus(wp, HDMI_IRQ_LINK_CONNECT |
106 HDMI_IRQ_LINK_DISCONNECT);
107
108 hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_LDOON);
109
110 REG_FLD_MOD(hdmi.phy.base, HDMI_TXPHY_PAD_CFG_CTRL, 0, 15, 15);
111
112 } else if (irqstatus & HDMI_IRQ_LINK_CONNECT) {
113 hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_TXON);
114 } else if (irqstatus & HDMI_IRQ_LINK_DISCONNECT) {
115 hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_LDOON);
116 }
117
118 return IRQ_HANDLED;
119}
120
121static int hdmi_init_regulator(void)
122{
123 struct regulator *reg;
124
125 if (hdmi.vdda_reg != NULL)
126 return 0;
127
128 reg = devm_regulator_get(&hdmi.pdev->dev, "vdda");
129 if (IS_ERR(reg)) {
130 DSSERR("can't get VDDA regulator\n");
131 return PTR_ERR(reg);
132 }
133
134 hdmi.vdda_reg = reg;
135
136 return 0;
137}
138
139static int hdmi_power_on_core(struct omap_dss_device *dssdev)
140{
141 int r;
142
143 r = regulator_enable(hdmi.vdda_reg);
144 if (r)
145 return r;
146
147 r = hdmi_runtime_get();
148 if (r)
149 goto err_runtime_get;
150
151 /* Make selection of HDMI in DSS */
152 dss_select_hdmi_venc_clk_source(DSS_HDMI_M_PCLK);
153
154 hdmi.core_enabled = true;
155
156 return 0;
157
158err_runtime_get:
159 regulator_disable(hdmi.vdda_reg);
160
161 return r;
162}
163
164static void hdmi_power_off_core(struct omap_dss_device *dssdev)
165{
166 hdmi.core_enabled = false;
167
168 hdmi_runtime_put();
169 regulator_disable(hdmi.vdda_reg);
170}
171
172static int hdmi_power_on_full(struct omap_dss_device *dssdev)
173{
174 int r;
175 struct videomode *vm;
176 enum omap_channel channel = dssdev->dispc_channel;
177 struct dss_pll_clock_info hdmi_cinfo = { 0 };
178 unsigned pc;
179
180 r = hdmi_power_on_core(dssdev);
181 if (r)
182 return r;
183
184 vm = &hdmi.cfg.vm;
185
186 DSSDBG("hdmi_power_on hactive= %d vactive = %d\n", vm->hactive,
187 vm->vactive);
188
189 pc = vm->pixelclock;
190 if (vm->flags & DISPLAY_FLAGS_DOUBLECLK)
191 pc *= 2;
192
193 /* DSS_HDMI_TCLK is bitclk / 10 */
194 pc *= 10;
195
196 dss_pll_calc_b(&hdmi.pll.pll, clk_get_rate(hdmi.pll.pll.clkin),
197 pc, &hdmi_cinfo);
198
199 /* disable and clear irqs */
200 hdmi_wp_clear_irqenable(&hdmi.wp, 0xffffffff);
201 hdmi_wp_set_irqstatus(&hdmi.wp,
202 hdmi_wp_get_irqstatus(&hdmi.wp));
203
204 r = dss_pll_enable(&hdmi.pll.pll);
205 if (r) {
206 DSSERR("Failed to enable PLL\n");
207 goto err_pll_enable;
208 }
209
210 r = dss_pll_set_config(&hdmi.pll.pll, &hdmi_cinfo);
211 if (r) {
212 DSSERR("Failed to configure PLL\n");
213 goto err_pll_cfg;
214 }
215
216 r = hdmi_phy_configure(&hdmi.phy, hdmi_cinfo.clkdco,
217 hdmi_cinfo.clkout[0]);
218 if (r) {
219 DSSDBG("Failed to start PHY\n");
220 goto err_phy_cfg;
221 }
222
223 r = hdmi_wp_set_phy_pwr(&hdmi.wp, HDMI_PHYPWRCMD_LDOON);
224 if (r)
225 goto err_phy_pwr;
226
227 hdmi5_configure(&hdmi.core, &hdmi.wp, &hdmi.cfg);
228
229 /* tv size */
230 dss_mgr_set_timings(channel, vm);
231
232 r = dss_mgr_enable(channel);
233 if (r)
234 goto err_mgr_enable;
235
236 r = hdmi_wp_video_start(&hdmi.wp);
237 if (r)
238 goto err_vid_enable;
239
240 hdmi_wp_set_irqenable(&hdmi.wp,
241 HDMI_IRQ_LINK_CONNECT | HDMI_IRQ_LINK_DISCONNECT);
242
243 return 0;
244
245err_vid_enable:
246 dss_mgr_disable(channel);
247err_mgr_enable:
248 hdmi_wp_set_phy_pwr(&hdmi.wp, HDMI_PHYPWRCMD_OFF);
249err_phy_pwr:
250err_phy_cfg:
251err_pll_cfg:
252 dss_pll_disable(&hdmi.pll.pll);
253err_pll_enable:
254 hdmi_power_off_core(dssdev);
255 return -EIO;
256}
257
258static void hdmi_power_off_full(struct omap_dss_device *dssdev)
259{
260 enum omap_channel channel = dssdev->dispc_channel;
261
262 hdmi_wp_clear_irqenable(&hdmi.wp, 0xffffffff);
263
264 hdmi_wp_video_stop(&hdmi.wp);
265
266 dss_mgr_disable(channel);
267
268 hdmi_wp_set_phy_pwr(&hdmi.wp, HDMI_PHYPWRCMD_OFF);
269
270 dss_pll_disable(&hdmi.pll.pll);
271
272 hdmi_power_off_core(dssdev);
273}
274
275static int hdmi_display_check_timing(struct omap_dss_device *dssdev,
276 struct videomode *vm)
277{
278 if (!dispc_mgr_timings_ok(dssdev->dispc_channel, vm))
279 return -EINVAL;
280
281 return 0;
282}
283
284static void hdmi_display_set_timing(struct omap_dss_device *dssdev,
285 struct videomode *vm)
286{
287 mutex_lock(&hdmi.lock);
288
289 hdmi.cfg.vm = *vm;
290
291 dispc_set_tv_pclk(vm->pixelclock);
292
293 mutex_unlock(&hdmi.lock);
294}
295
296static void hdmi_display_get_timings(struct omap_dss_device *dssdev,
297 struct videomode *vm)
298{
299 *vm = hdmi.cfg.vm;
300}
301
302static void hdmi_dump_regs(struct seq_file *s)
303{
304 mutex_lock(&hdmi.lock);
305
306 if (hdmi_runtime_get()) {
307 mutex_unlock(&hdmi.lock);
308 return;
309 }
310
311 hdmi_wp_dump(&hdmi.wp, s);
312 hdmi_pll_dump(&hdmi.pll, s);
313 hdmi_phy_dump(&hdmi.phy, s);
314 hdmi5_core_dump(&hdmi.core, s);
315
316 hdmi_runtime_put();
317 mutex_unlock(&hdmi.lock);
318}
319
320static int read_edid(u8 *buf, int len)
321{
322 int r;
323 int idlemode;
324
325 mutex_lock(&hdmi.lock);
326
327 r = hdmi_runtime_get();
328 BUG_ON(r);
329
330 idlemode = REG_GET(hdmi.wp.base, HDMI_WP_SYSCONFIG, 3, 2);
331 /* No-idle mode */
332 REG_FLD_MOD(hdmi.wp.base, HDMI_WP_SYSCONFIG, 1, 3, 2);
333
334 r = hdmi5_read_edid(&hdmi.core, buf, len);
335
336 REG_FLD_MOD(hdmi.wp.base, HDMI_WP_SYSCONFIG, idlemode, 3, 2);
337
338 hdmi_runtime_put();
339 mutex_unlock(&hdmi.lock);
340
341 return r;
342}
343
344static void hdmi_start_audio_stream(struct omap_hdmi *hd)
345{
346 REG_FLD_MOD(hdmi.wp.base, HDMI_WP_SYSCONFIG, 1, 3, 2);
347 hdmi_wp_audio_enable(&hd->wp, true);
348 hdmi_wp_audio_core_req_enable(&hd->wp, true);
349}
350
351static void hdmi_stop_audio_stream(struct omap_hdmi *hd)
352{
353 hdmi_wp_audio_core_req_enable(&hd->wp, false);
354 hdmi_wp_audio_enable(&hd->wp, false);
355 REG_FLD_MOD(hd->wp.base, HDMI_WP_SYSCONFIG, hd->wp_idlemode, 3, 2);
356}
357
358static int hdmi_display_enable(struct omap_dss_device *dssdev)
359{
360 struct omap_dss_device *out = &hdmi.output;
361 unsigned long flags;
362 int r = 0;
363
364 DSSDBG("ENTER hdmi_display_enable\n");
365
366 mutex_lock(&hdmi.lock);
367
368 if (!out->dispc_channel_connected) {
369 DSSERR("failed to enable display: no output/manager\n");
370 r = -ENODEV;
371 goto err0;
372 }
373
374 r = hdmi_power_on_full(dssdev);
375 if (r) {
376 DSSERR("failed to power on device\n");
377 goto err0;
378 }
379
380 if (hdmi.audio_configured) {
381 r = hdmi5_audio_config(&hdmi.core, &hdmi.wp, &hdmi.audio_config,
382 hdmi.cfg.vm.pixelclock);
383 if (r) {
384 DSSERR("Error restoring audio configuration: %d", r);
385 hdmi.audio_abort_cb(&hdmi.pdev->dev);
386 hdmi.audio_configured = false;
387 }
388 }
389
390 spin_lock_irqsave(&hdmi.audio_playing_lock, flags);
391 if (hdmi.audio_configured && hdmi.audio_playing)
392 hdmi_start_audio_stream(&hdmi);
393 hdmi.display_enabled = true;
394 spin_unlock_irqrestore(&hdmi.audio_playing_lock, flags);
395
396 mutex_unlock(&hdmi.lock);
397 return 0;
398
399err0:
400 mutex_unlock(&hdmi.lock);
401 return r;
402}
403
404static void hdmi_display_disable(struct omap_dss_device *dssdev)
405{
406 unsigned long flags;
407
408 DSSDBG("Enter hdmi_display_disable\n");
409
410 mutex_lock(&hdmi.lock);
411
412 spin_lock_irqsave(&hdmi.audio_playing_lock, flags);
413 hdmi_stop_audio_stream(&hdmi);
414 hdmi.display_enabled = false;
415 spin_unlock_irqrestore(&hdmi.audio_playing_lock, flags);
416
417 hdmi_power_off_full(dssdev);
418
419 mutex_unlock(&hdmi.lock);
420}
421
422static int hdmi_core_enable(struct omap_dss_device *dssdev)
423{
424 int r = 0;
425
426 DSSDBG("ENTER omapdss_hdmi_core_enable\n");
427
428 mutex_lock(&hdmi.lock);
429
430 r = hdmi_power_on_core(dssdev);
431 if (r) {
432 DSSERR("failed to power on device\n");
433 goto err0;
434 }
435
436 mutex_unlock(&hdmi.lock);
437 return 0;
438
439err0:
440 mutex_unlock(&hdmi.lock);
441 return r;
442}
443
444static void hdmi_core_disable(struct omap_dss_device *dssdev)
445{
446 DSSDBG("Enter omapdss_hdmi_core_disable\n");
447
448 mutex_lock(&hdmi.lock);
449
450 hdmi_power_off_core(dssdev);
451
452 mutex_unlock(&hdmi.lock);
453}
454
455static int hdmi_connect(struct omap_dss_device *dssdev,
456 struct omap_dss_device *dst)
457{
458 enum omap_channel channel = dssdev->dispc_channel;
459 int r;
460
461 r = hdmi_init_regulator();
462 if (r)
463 return r;
464
465 r = dss_mgr_connect(channel, dssdev);
466 if (r)
467 return r;
468
469 r = omapdss_output_set_device(dssdev, dst);
470 if (r) {
471 DSSERR("failed to connect output to new device: %s\n",
472 dst->name);
473 dss_mgr_disconnect(channel, dssdev);
474 return r;
475 }
476
477 return 0;
478}
479
480static void hdmi_disconnect(struct omap_dss_device *dssdev,
481 struct omap_dss_device *dst)
482{
483 enum omap_channel channel = dssdev->dispc_channel;
484
485 WARN_ON(dst != dssdev->dst);
486
487 if (dst != dssdev->dst)
488 return;
489
490 omapdss_output_unset_device(dssdev);
491
492 dss_mgr_disconnect(channel, dssdev);
493}
494
495static int hdmi_read_edid(struct omap_dss_device *dssdev,
496 u8 *edid, int len)
497{
498 bool need_enable;
499 int r;
500
501 need_enable = hdmi.core_enabled == false;
502
503 if (need_enable) {
504 r = hdmi_core_enable(dssdev);
505 if (r)
506 return r;
507 }
508
509 r = read_edid(edid, len);
510
511 if (need_enable)
512 hdmi_core_disable(dssdev);
513
514 return r;
515}
516
517static int hdmi_set_infoframe(struct omap_dss_device *dssdev,
518 const struct hdmi_avi_infoframe *avi)
519{
520 hdmi.cfg.infoframe = *avi;
521 return 0;
522}
523
524static int hdmi_set_hdmi_mode(struct omap_dss_device *dssdev,
525 bool hdmi_mode)
526{
527 hdmi.cfg.hdmi_dvi_mode = hdmi_mode ? HDMI_HDMI : HDMI_DVI;
528 return 0;
529}
530
531static const struct omapdss_hdmi_ops hdmi_ops = {
532 .connect = hdmi_connect,
533 .disconnect = hdmi_disconnect,
534
535 .enable = hdmi_display_enable,
536 .disable = hdmi_display_disable,
537
538 .check_timings = hdmi_display_check_timing,
539 .set_timings = hdmi_display_set_timing,
540 .get_timings = hdmi_display_get_timings,
541
542 .read_edid = hdmi_read_edid,
543 .set_infoframe = hdmi_set_infoframe,
544 .set_hdmi_mode = hdmi_set_hdmi_mode,
545};
546
547static void hdmi_init_output(struct platform_device *pdev)
548{
549 struct omap_dss_device *out = &hdmi.output;
550
551 out->dev = &pdev->dev;
552 out->id = OMAP_DSS_OUTPUT_HDMI;
553 out->output_type = OMAP_DISPLAY_TYPE_HDMI;
554 out->name = "hdmi.0";
555 out->dispc_channel = OMAP_DSS_CHANNEL_DIGIT;
556 out->ops.hdmi = &hdmi_ops;
557 out->owner = THIS_MODULE;
558
559 omapdss_register_output(out);
560}
561
562static void hdmi_uninit_output(struct platform_device *pdev)
563{
564 struct omap_dss_device *out = &hdmi.output;
565
566 omapdss_unregister_output(out);
567}
568
569static int hdmi_probe_of(struct platform_device *pdev)
570{
571 struct device_node *node = pdev->dev.of_node;
572 struct device_node *ep;
573 int r;
574
575 ep = omapdss_of_get_first_endpoint(node);
576 if (!ep)
577 return 0;
578
579 r = hdmi_parse_lanes_of(pdev, ep, &hdmi.phy);
580 if (r)
581 goto err;
582
583 of_node_put(ep);
584 return 0;
585
586err:
587 of_node_put(ep);
588 return r;
589}
590
591/* Audio callbacks */
592static int hdmi_audio_startup(struct device *dev,
593 void (*abort_cb)(struct device *dev))
594{
595 struct omap_hdmi *hd = dev_get_drvdata(dev);
596 int ret = 0;
597
598 mutex_lock(&hd->lock);
599
600 if (!hdmi_mode_has_audio(&hd->cfg) || !hd->display_enabled) {
601 ret = -EPERM;
602 goto out;
603 }
604
605 hd->audio_abort_cb = abort_cb;
606
607out:
608 mutex_unlock(&hd->lock);
609
610 return ret;
611}
612
613static int hdmi_audio_shutdown(struct device *dev)
614{
615 struct omap_hdmi *hd = dev_get_drvdata(dev);
616
617 mutex_lock(&hd->lock);
618 hd->audio_abort_cb = NULL;
619 hd->audio_configured = false;
620 hd->audio_playing = false;
621 mutex_unlock(&hd->lock);
622
623 return 0;
624}
625
626static int hdmi_audio_start(struct device *dev)
627{
628 struct omap_hdmi *hd = dev_get_drvdata(dev);
629 unsigned long flags;
630
631 WARN_ON(!hdmi_mode_has_audio(&hd->cfg));
632
633 spin_lock_irqsave(&hd->audio_playing_lock, flags);
634
635 if (hd->display_enabled)
636 hdmi_start_audio_stream(hd);
637 hd->audio_playing = true;
638
639 spin_unlock_irqrestore(&hd->audio_playing_lock, flags);
640 return 0;
641}
642
643static void hdmi_audio_stop(struct device *dev)
644{
645 struct omap_hdmi *hd = dev_get_drvdata(dev);
646 unsigned long flags;
647
648 WARN_ON(!hdmi_mode_has_audio(&hd->cfg));
649
650 spin_lock_irqsave(&hd->audio_playing_lock, flags);
651
652 if (hd->display_enabled)
653 hdmi_stop_audio_stream(hd);
654 hd->audio_playing = false;
655
656 spin_unlock_irqrestore(&hd->audio_playing_lock, flags);
657}
658
659static int hdmi_audio_config(struct device *dev,
660 struct omap_dss_audio *dss_audio)
661{
662 struct omap_hdmi *hd = dev_get_drvdata(dev);
663 int ret;
664
665 mutex_lock(&hd->lock);
666
667 if (!hdmi_mode_has_audio(&hd->cfg) || !hd->display_enabled) {
668 ret = -EPERM;
669 goto out;
670 }
671
672 ret = hdmi5_audio_config(&hd->core, &hd->wp, dss_audio,
673 hd->cfg.vm.pixelclock);
674
675 if (!ret) {
676 hd->audio_configured = true;
677 hd->audio_config = *dss_audio;
678 }
679out:
680 mutex_unlock(&hd->lock);
681
682 return ret;
683}
684
685static const struct omap_hdmi_audio_ops hdmi_audio_ops = {
686 .audio_startup = hdmi_audio_startup,
687 .audio_shutdown = hdmi_audio_shutdown,
688 .audio_start = hdmi_audio_start,
689 .audio_stop = hdmi_audio_stop,
690 .audio_config = hdmi_audio_config,
691};
692
693static int hdmi_audio_register(struct device *dev)
694{
695 struct omap_hdmi_audio_pdata pdata = {
696 .dev = dev,
697 .dss_version = omapdss_get_version(),
698 .audio_dma_addr = hdmi_wp_get_audio_dma_addr(&hdmi.wp),
699 .ops = &hdmi_audio_ops,
700 };
701
702 hdmi.audio_pdev = platform_device_register_data(
703 dev, "omap-hdmi-audio", PLATFORM_DEVID_AUTO,
704 &pdata, sizeof(pdata));
705
706 if (IS_ERR(hdmi.audio_pdev))
707 return PTR_ERR(hdmi.audio_pdev);
708
709 hdmi_runtime_get();
710 hdmi.wp_idlemode =
711 REG_GET(hdmi.wp.base, HDMI_WP_SYSCONFIG, 3, 2);
712 hdmi_runtime_put();
713
714 return 0;
715}
716
717/* HDMI HW IP initialisation */
718static int hdmi5_bind(struct device *dev, struct device *master, void *data)
719{
720 struct platform_device *pdev = to_platform_device(dev);
721 int r;
722 int irq;
723
724 hdmi.pdev = pdev;
725 dev_set_drvdata(&pdev->dev, &hdmi);
726
727 mutex_init(&hdmi.lock);
728 spin_lock_init(&hdmi.audio_playing_lock);
729
730 if (pdev->dev.of_node) {
731 r = hdmi_probe_of(pdev);
732 if (r)
733 return r;
734 }
735
736 r = hdmi_wp_init(pdev, &hdmi.wp);
737 if (r)
738 return r;
739
740 r = hdmi_pll_init(pdev, &hdmi.pll, &hdmi.wp);
741 if (r)
742 return r;
743
744 r = hdmi_phy_init(pdev, &hdmi.phy);
745 if (r)
746 goto err;
747
748 r = hdmi5_core_init(pdev, &hdmi.core);
749 if (r)
750 goto err;
751
752 irq = platform_get_irq(pdev, 0);
753 if (irq < 0) {
754 DSSERR("platform_get_irq failed\n");
755 r = -ENODEV;
756 goto err;
757 }
758
759 r = devm_request_threaded_irq(&pdev->dev, irq,
760 NULL, hdmi_irq_handler,
761 IRQF_ONESHOT, "OMAP HDMI", &hdmi.wp);
762 if (r) {
763 DSSERR("HDMI IRQ request failed\n");
764 goto err;
765 }
766
767 pm_runtime_enable(&pdev->dev);
768
769 hdmi_init_output(pdev);
770
771 r = hdmi_audio_register(&pdev->dev);
772 if (r) {
773 DSSERR("Registering HDMI audio failed %d\n", r);
774 hdmi_uninit_output(pdev);
775 pm_runtime_disable(&pdev->dev);
776 return r;
777 }
778
779 dss_debugfs_create_file("hdmi", hdmi_dump_regs);
780
781 return 0;
782err:
783 hdmi_pll_uninit(&hdmi.pll);
784 return r;
785}
786
787static void hdmi5_unbind(struct device *dev, struct device *master, void *data)
788{
789 struct platform_device *pdev = to_platform_device(dev);
790
791 if (hdmi.audio_pdev)
792 platform_device_unregister(hdmi.audio_pdev);
793
794 hdmi_uninit_output(pdev);
795
796 hdmi_pll_uninit(&hdmi.pll);
797
798 pm_runtime_disable(&pdev->dev);
799}
800
801static const struct component_ops hdmi5_component_ops = {
802 .bind = hdmi5_bind,
803 .unbind = hdmi5_unbind,
804};
805
806static int hdmi5_probe(struct platform_device *pdev)
807{
808 return component_add(&pdev->dev, &hdmi5_component_ops);
809}
810
811static int hdmi5_remove(struct platform_device *pdev)
812{
813 component_del(&pdev->dev, &hdmi5_component_ops);
814 return 0;
815}
816
817static int hdmi_runtime_suspend(struct device *dev)
818{
819 dispc_runtime_put();
820
821 return 0;
822}
823
824static int hdmi_runtime_resume(struct device *dev)
825{
826 int r;
827
828 r = dispc_runtime_get();
829 if (r < 0)
830 return r;
831
832 return 0;
833}
834
835static const struct dev_pm_ops hdmi_pm_ops = {
836 .runtime_suspend = hdmi_runtime_suspend,
837 .runtime_resume = hdmi_runtime_resume,
838};
839
840static const struct of_device_id hdmi_of_match[] = {
841 { .compatible = "ti,omap5-hdmi", },
842 { .compatible = "ti,dra7-hdmi", },
843 {},
844};
845
846static struct platform_driver omapdss_hdmihw_driver = {
847 .probe = hdmi5_probe,
848 .remove = hdmi5_remove,
849 .driver = {
850 .name = "omapdss_hdmi5",
851 .pm = &hdmi_pm_ops,
852 .of_match_table = hdmi_of_match,
853 .suppress_bind_attrs = true,
854 },
855};
856
857int __init hdmi5_init_platform_driver(void)
858{
859 return platform_driver_register(&omapdss_hdmihw_driver);
860}
861
862void hdmi5_uninit_platform_driver(void)
863{
864 platform_driver_unregister(&omapdss_hdmihw_driver);
865}