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1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * irq_comm.c: Common API for in kernel interrupt controller
4 * Copyright (c) 2007, Intel Corporation.
5 *
6 * Authors:
7 * Yaozu (Eddie) Dong <Eddie.dong@intel.com>
8 *
9 * Copyright 2010 Red Hat, Inc. and/or its affiliates.
10 */
11
12#include <linux/kvm_host.h>
13#include <linux/slab.h>
14#include <linux/export.h>
15#include <linux/rculist.h>
16
17#include <trace/events/kvm.h>
18
19#include "irq.h"
20
21#include "ioapic.h"
22
23#include "lapic.h"
24
25#include "hyperv.h"
26#include "x86.h"
27#include "xen.h"
28
29static int kvm_set_pic_irq(struct kvm_kernel_irq_routing_entry *e,
30 struct kvm *kvm, int irq_source_id, int level,
31 bool line_status)
32{
33 struct kvm_pic *pic = kvm->arch.vpic;
34 return kvm_pic_set_irq(pic, e->irqchip.pin, irq_source_id, level);
35}
36
37static int kvm_set_ioapic_irq(struct kvm_kernel_irq_routing_entry *e,
38 struct kvm *kvm, int irq_source_id, int level,
39 bool line_status)
40{
41 struct kvm_ioapic *ioapic = kvm->arch.vioapic;
42 return kvm_ioapic_set_irq(ioapic, e->irqchip.pin, irq_source_id, level,
43 line_status);
44}
45
46int kvm_irq_delivery_to_apic(struct kvm *kvm, struct kvm_lapic *src,
47 struct kvm_lapic_irq *irq, struct dest_map *dest_map)
48{
49 int r = -1;
50 struct kvm_vcpu *vcpu, *lowest = NULL;
51 unsigned long i, dest_vcpu_bitmap[BITS_TO_LONGS(KVM_MAX_VCPUS)];
52 unsigned int dest_vcpus = 0;
53
54 if (kvm_irq_delivery_to_apic_fast(kvm, src, irq, &r, dest_map))
55 return r;
56
57 if (irq->dest_mode == APIC_DEST_PHYSICAL &&
58 irq->dest_id == 0xff && kvm_lowest_prio_delivery(irq)) {
59 printk(KERN_INFO "kvm: apic: phys broadcast and lowest prio\n");
60 irq->delivery_mode = APIC_DM_FIXED;
61 }
62
63 memset(dest_vcpu_bitmap, 0, sizeof(dest_vcpu_bitmap));
64
65 kvm_for_each_vcpu(i, vcpu, kvm) {
66 if (!kvm_apic_present(vcpu))
67 continue;
68
69 if (!kvm_apic_match_dest(vcpu, src, irq->shorthand,
70 irq->dest_id, irq->dest_mode))
71 continue;
72
73 if (!kvm_lowest_prio_delivery(irq)) {
74 if (r < 0)
75 r = 0;
76 r += kvm_apic_set_irq(vcpu, irq, dest_map);
77 } else if (kvm_apic_sw_enabled(vcpu->arch.apic)) {
78 if (!kvm_vector_hashing_enabled()) {
79 if (!lowest)
80 lowest = vcpu;
81 else if (kvm_apic_compare_prio(vcpu, lowest) < 0)
82 lowest = vcpu;
83 } else {
84 __set_bit(i, dest_vcpu_bitmap);
85 dest_vcpus++;
86 }
87 }
88 }
89
90 if (dest_vcpus != 0) {
91 int idx = kvm_vector_to_index(irq->vector, dest_vcpus,
92 dest_vcpu_bitmap, KVM_MAX_VCPUS);
93
94 lowest = kvm_get_vcpu(kvm, idx);
95 }
96
97 if (lowest)
98 r = kvm_apic_set_irq(lowest, irq, dest_map);
99
100 return r;
101}
102
103void kvm_set_msi_irq(struct kvm *kvm, struct kvm_kernel_irq_routing_entry *e,
104 struct kvm_lapic_irq *irq)
105{
106 struct msi_msg msg = { .address_lo = e->msi.address_lo,
107 .address_hi = e->msi.address_hi,
108 .data = e->msi.data };
109
110 trace_kvm_msi_set_irq(msg.address_lo | (kvm->arch.x2apic_format ?
111 (u64)msg.address_hi << 32 : 0), msg.data);
112
113 irq->dest_id = x86_msi_msg_get_destid(&msg, kvm->arch.x2apic_format);
114 irq->vector = msg.arch_data.vector;
115 irq->dest_mode = kvm_lapic_irq_dest_mode(msg.arch_addr_lo.dest_mode_logical);
116 irq->trig_mode = msg.arch_data.is_level;
117 irq->delivery_mode = msg.arch_data.delivery_mode << 8;
118 irq->msi_redir_hint = msg.arch_addr_lo.redirect_hint;
119 irq->level = 1;
120 irq->shorthand = APIC_DEST_NOSHORT;
121}
122EXPORT_SYMBOL_GPL(kvm_set_msi_irq);
123
124static inline bool kvm_msi_route_invalid(struct kvm *kvm,
125 struct kvm_kernel_irq_routing_entry *e)
126{
127 return kvm->arch.x2apic_format && (e->msi.address_hi & 0xff);
128}
129
130int kvm_set_msi(struct kvm_kernel_irq_routing_entry *e,
131 struct kvm *kvm, int irq_source_id, int level, bool line_status)
132{
133 struct kvm_lapic_irq irq;
134
135 if (kvm_msi_route_invalid(kvm, e))
136 return -EINVAL;
137
138 if (!level)
139 return -1;
140
141 kvm_set_msi_irq(kvm, e, &irq);
142
143 return kvm_irq_delivery_to_apic(kvm, NULL, &irq, NULL);
144}
145
146
147static int kvm_hv_set_sint(struct kvm_kernel_irq_routing_entry *e,
148 struct kvm *kvm, int irq_source_id, int level,
149 bool line_status)
150{
151 if (!level)
152 return -1;
153
154 return kvm_hv_synic_set_irq(kvm, e->hv_sint.vcpu, e->hv_sint.sint);
155}
156
157int kvm_arch_set_irq_inatomic(struct kvm_kernel_irq_routing_entry *e,
158 struct kvm *kvm, int irq_source_id, int level,
159 bool line_status)
160{
161 struct kvm_lapic_irq irq;
162 int r;
163
164 switch (e->type) {
165 case KVM_IRQ_ROUTING_HV_SINT:
166 return kvm_hv_set_sint(e, kvm, irq_source_id, level,
167 line_status);
168
169 case KVM_IRQ_ROUTING_MSI:
170 if (kvm_msi_route_invalid(kvm, e))
171 return -EINVAL;
172
173 kvm_set_msi_irq(kvm, e, &irq);
174
175 if (kvm_irq_delivery_to_apic_fast(kvm, NULL, &irq, &r, NULL))
176 return r;
177 break;
178
179#ifdef CONFIG_KVM_XEN
180 case KVM_IRQ_ROUTING_XEN_EVTCHN:
181 if (!level)
182 return -1;
183
184 return kvm_xen_set_evtchn_fast(&e->xen_evtchn, kvm);
185#endif
186 default:
187 break;
188 }
189
190 return -EWOULDBLOCK;
191}
192
193int kvm_request_irq_source_id(struct kvm *kvm)
194{
195 unsigned long *bitmap = &kvm->arch.irq_sources_bitmap;
196 int irq_source_id;
197
198 mutex_lock(&kvm->irq_lock);
199 irq_source_id = find_first_zero_bit(bitmap, BITS_PER_LONG);
200
201 if (irq_source_id >= BITS_PER_LONG) {
202 printk(KERN_WARNING "kvm: exhaust allocatable IRQ sources!\n");
203 irq_source_id = -EFAULT;
204 goto unlock;
205 }
206
207 ASSERT(irq_source_id != KVM_USERSPACE_IRQ_SOURCE_ID);
208 ASSERT(irq_source_id != KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID);
209 set_bit(irq_source_id, bitmap);
210unlock:
211 mutex_unlock(&kvm->irq_lock);
212
213 return irq_source_id;
214}
215
216void kvm_free_irq_source_id(struct kvm *kvm, int irq_source_id)
217{
218 ASSERT(irq_source_id != KVM_USERSPACE_IRQ_SOURCE_ID);
219 ASSERT(irq_source_id != KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID);
220
221 mutex_lock(&kvm->irq_lock);
222 if (irq_source_id < 0 ||
223 irq_source_id >= BITS_PER_LONG) {
224 printk(KERN_ERR "kvm: IRQ source ID out of range!\n");
225 goto unlock;
226 }
227 clear_bit(irq_source_id, &kvm->arch.irq_sources_bitmap);
228 if (!irqchip_kernel(kvm))
229 goto unlock;
230
231 kvm_ioapic_clear_all(kvm->arch.vioapic, irq_source_id);
232 kvm_pic_clear_all(kvm->arch.vpic, irq_source_id);
233unlock:
234 mutex_unlock(&kvm->irq_lock);
235}
236
237void kvm_register_irq_mask_notifier(struct kvm *kvm, int irq,
238 struct kvm_irq_mask_notifier *kimn)
239{
240 mutex_lock(&kvm->irq_lock);
241 kimn->irq = irq;
242 hlist_add_head_rcu(&kimn->link, &kvm->arch.mask_notifier_list);
243 mutex_unlock(&kvm->irq_lock);
244}
245
246void kvm_unregister_irq_mask_notifier(struct kvm *kvm, int irq,
247 struct kvm_irq_mask_notifier *kimn)
248{
249 mutex_lock(&kvm->irq_lock);
250 hlist_del_rcu(&kimn->link);
251 mutex_unlock(&kvm->irq_lock);
252 synchronize_srcu(&kvm->irq_srcu);
253}
254
255void kvm_fire_mask_notifiers(struct kvm *kvm, unsigned irqchip, unsigned pin,
256 bool mask)
257{
258 struct kvm_irq_mask_notifier *kimn;
259 int idx, gsi;
260
261 idx = srcu_read_lock(&kvm->irq_srcu);
262 gsi = kvm_irq_map_chip_pin(kvm, irqchip, pin);
263 if (gsi != -1)
264 hlist_for_each_entry_rcu(kimn, &kvm->arch.mask_notifier_list, link)
265 if (kimn->irq == gsi)
266 kimn->func(kimn, mask);
267 srcu_read_unlock(&kvm->irq_srcu, idx);
268}
269
270bool kvm_arch_can_set_irq_routing(struct kvm *kvm)
271{
272 return irqchip_in_kernel(kvm);
273}
274
275int kvm_set_routing_entry(struct kvm *kvm,
276 struct kvm_kernel_irq_routing_entry *e,
277 const struct kvm_irq_routing_entry *ue)
278{
279 /* We can't check irqchip_in_kernel() here as some callers are
280 * currently initializing the irqchip. Other callers should therefore
281 * check kvm_arch_can_set_irq_routing() before calling this function.
282 */
283 switch (ue->type) {
284 case KVM_IRQ_ROUTING_IRQCHIP:
285 if (irqchip_split(kvm))
286 return -EINVAL;
287 e->irqchip.pin = ue->u.irqchip.pin;
288 switch (ue->u.irqchip.irqchip) {
289 case KVM_IRQCHIP_PIC_SLAVE:
290 e->irqchip.pin += PIC_NUM_PINS / 2;
291 fallthrough;
292 case KVM_IRQCHIP_PIC_MASTER:
293 if (ue->u.irqchip.pin >= PIC_NUM_PINS / 2)
294 return -EINVAL;
295 e->set = kvm_set_pic_irq;
296 break;
297 case KVM_IRQCHIP_IOAPIC:
298 if (ue->u.irqchip.pin >= KVM_IOAPIC_NUM_PINS)
299 return -EINVAL;
300 e->set = kvm_set_ioapic_irq;
301 break;
302 default:
303 return -EINVAL;
304 }
305 e->irqchip.irqchip = ue->u.irqchip.irqchip;
306 break;
307 case KVM_IRQ_ROUTING_MSI:
308 e->set = kvm_set_msi;
309 e->msi.address_lo = ue->u.msi.address_lo;
310 e->msi.address_hi = ue->u.msi.address_hi;
311 e->msi.data = ue->u.msi.data;
312
313 if (kvm_msi_route_invalid(kvm, e))
314 return -EINVAL;
315 break;
316 case KVM_IRQ_ROUTING_HV_SINT:
317 e->set = kvm_hv_set_sint;
318 e->hv_sint.vcpu = ue->u.hv_sint.vcpu;
319 e->hv_sint.sint = ue->u.hv_sint.sint;
320 break;
321#ifdef CONFIG_KVM_XEN
322 case KVM_IRQ_ROUTING_XEN_EVTCHN:
323 return kvm_xen_setup_evtchn(kvm, e, ue);
324#endif
325 default:
326 return -EINVAL;
327 }
328
329 return 0;
330}
331
332bool kvm_intr_is_single_vcpu(struct kvm *kvm, struct kvm_lapic_irq *irq,
333 struct kvm_vcpu **dest_vcpu)
334{
335 int r = 0;
336 unsigned long i;
337 struct kvm_vcpu *vcpu;
338
339 if (kvm_intr_is_single_vcpu_fast(kvm, irq, dest_vcpu))
340 return true;
341
342 kvm_for_each_vcpu(i, vcpu, kvm) {
343 if (!kvm_apic_present(vcpu))
344 continue;
345
346 if (!kvm_apic_match_dest(vcpu, NULL, irq->shorthand,
347 irq->dest_id, irq->dest_mode))
348 continue;
349
350 if (++r == 2)
351 return false;
352
353 *dest_vcpu = vcpu;
354 }
355
356 return r == 1;
357}
358EXPORT_SYMBOL_GPL(kvm_intr_is_single_vcpu);
359
360#define IOAPIC_ROUTING_ENTRY(irq) \
361 { .gsi = irq, .type = KVM_IRQ_ROUTING_IRQCHIP, \
362 .u.irqchip = { .irqchip = KVM_IRQCHIP_IOAPIC, .pin = (irq) } }
363#define ROUTING_ENTRY1(irq) IOAPIC_ROUTING_ENTRY(irq)
364
365#define PIC_ROUTING_ENTRY(irq) \
366 { .gsi = irq, .type = KVM_IRQ_ROUTING_IRQCHIP, \
367 .u.irqchip = { .irqchip = SELECT_PIC(irq), .pin = (irq) % 8 } }
368#define ROUTING_ENTRY2(irq) \
369 IOAPIC_ROUTING_ENTRY(irq), PIC_ROUTING_ENTRY(irq)
370
371static const struct kvm_irq_routing_entry default_routing[] = {
372 ROUTING_ENTRY2(0), ROUTING_ENTRY2(1),
373 ROUTING_ENTRY2(2), ROUTING_ENTRY2(3),
374 ROUTING_ENTRY2(4), ROUTING_ENTRY2(5),
375 ROUTING_ENTRY2(6), ROUTING_ENTRY2(7),
376 ROUTING_ENTRY2(8), ROUTING_ENTRY2(9),
377 ROUTING_ENTRY2(10), ROUTING_ENTRY2(11),
378 ROUTING_ENTRY2(12), ROUTING_ENTRY2(13),
379 ROUTING_ENTRY2(14), ROUTING_ENTRY2(15),
380 ROUTING_ENTRY1(16), ROUTING_ENTRY1(17),
381 ROUTING_ENTRY1(18), ROUTING_ENTRY1(19),
382 ROUTING_ENTRY1(20), ROUTING_ENTRY1(21),
383 ROUTING_ENTRY1(22), ROUTING_ENTRY1(23),
384};
385
386int kvm_setup_default_irq_routing(struct kvm *kvm)
387{
388 return kvm_set_irq_routing(kvm, default_routing,
389 ARRAY_SIZE(default_routing), 0);
390}
391
392static const struct kvm_irq_routing_entry empty_routing[] = {};
393
394int kvm_setup_empty_irq_routing(struct kvm *kvm)
395{
396 return kvm_set_irq_routing(kvm, empty_routing, 0, 0);
397}
398
399void kvm_arch_post_irq_routing_update(struct kvm *kvm)
400{
401 if (!irqchip_split(kvm))
402 return;
403 kvm_make_scan_ioapic_request(kvm);
404}
405
406void kvm_scan_ioapic_routes(struct kvm_vcpu *vcpu,
407 ulong *ioapic_handled_vectors)
408{
409 struct kvm *kvm = vcpu->kvm;
410 struct kvm_kernel_irq_routing_entry *entry;
411 struct kvm_irq_routing_table *table;
412 u32 i, nr_ioapic_pins;
413 int idx;
414
415 idx = srcu_read_lock(&kvm->irq_srcu);
416 table = srcu_dereference(kvm->irq_routing, &kvm->irq_srcu);
417 nr_ioapic_pins = min_t(u32, table->nr_rt_entries,
418 kvm->arch.nr_reserved_ioapic_pins);
419 for (i = 0; i < nr_ioapic_pins; ++i) {
420 hlist_for_each_entry(entry, &table->map[i], link) {
421 struct kvm_lapic_irq irq;
422
423 if (entry->type != KVM_IRQ_ROUTING_MSI)
424 continue;
425
426 kvm_set_msi_irq(vcpu->kvm, entry, &irq);
427
428 if (irq.trig_mode &&
429 (kvm_apic_match_dest(vcpu, NULL, APIC_DEST_NOSHORT,
430 irq.dest_id, irq.dest_mode) ||
431 kvm_apic_pending_eoi(vcpu, irq.vector)))
432 __set_bit(irq.vector, ioapic_handled_vectors);
433 }
434 }
435 srcu_read_unlock(&kvm->irq_srcu, idx);
436}
437
438void kvm_arch_irq_routing_update(struct kvm *kvm)
439{
440 kvm_hv_irq_routing_update(kvm);
441}
1/*
2 * irq_comm.c: Common API for in kernel interrupt controller
3 * Copyright (c) 2007, Intel Corporation.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms and conditions of the GNU General Public License,
7 * version 2, as published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc., 59 Temple
16 * Place - Suite 330, Boston, MA 02111-1307 USA.
17 * Authors:
18 * Yaozu (Eddie) Dong <Eddie.dong@intel.com>
19 *
20 * Copyright 2010 Red Hat, Inc. and/or its affiliates.
21 */
22
23#include <linux/kvm_host.h>
24#include <linux/slab.h>
25#include <linux/export.h>
26#include <trace/events/kvm.h>
27
28#include <asm/msidef.h>
29
30#include "irq.h"
31
32#include "ioapic.h"
33
34#include "lapic.h"
35
36#include "hyperv.h"
37#include "x86.h"
38
39static int kvm_set_pic_irq(struct kvm_kernel_irq_routing_entry *e,
40 struct kvm *kvm, int irq_source_id, int level,
41 bool line_status)
42{
43 struct kvm_pic *pic = pic_irqchip(kvm);
44
45 /*
46 * XXX: rejecting pic routes when pic isn't in use would be better,
47 * but the default routing table is installed while kvm->arch.vpic is
48 * NULL and KVM_CREATE_IRQCHIP can race with KVM_IRQ_LINE.
49 */
50 if (!pic)
51 return -1;
52
53 return kvm_pic_set_irq(pic, e->irqchip.pin, irq_source_id, level);
54}
55
56static int kvm_set_ioapic_irq(struct kvm_kernel_irq_routing_entry *e,
57 struct kvm *kvm, int irq_source_id, int level,
58 bool line_status)
59{
60 struct kvm_ioapic *ioapic = kvm->arch.vioapic;
61
62 if (!ioapic)
63 return -1;
64
65 return kvm_ioapic_set_irq(ioapic, e->irqchip.pin, irq_source_id, level,
66 line_status);
67}
68
69int kvm_irq_delivery_to_apic(struct kvm *kvm, struct kvm_lapic *src,
70 struct kvm_lapic_irq *irq, struct dest_map *dest_map)
71{
72 int i, r = -1;
73 struct kvm_vcpu *vcpu, *lowest = NULL;
74 unsigned long dest_vcpu_bitmap[BITS_TO_LONGS(KVM_MAX_VCPUS)];
75 unsigned int dest_vcpus = 0;
76
77 if (irq->dest_mode == 0 && irq->dest_id == 0xff &&
78 kvm_lowest_prio_delivery(irq)) {
79 printk(KERN_INFO "kvm: apic: phys broadcast and lowest prio\n");
80 irq->delivery_mode = APIC_DM_FIXED;
81 }
82
83 if (kvm_irq_delivery_to_apic_fast(kvm, src, irq, &r, dest_map))
84 return r;
85
86 memset(dest_vcpu_bitmap, 0, sizeof(dest_vcpu_bitmap));
87
88 kvm_for_each_vcpu(i, vcpu, kvm) {
89 if (!kvm_apic_present(vcpu))
90 continue;
91
92 if (!kvm_apic_match_dest(vcpu, src, irq->shorthand,
93 irq->dest_id, irq->dest_mode))
94 continue;
95
96 if (!kvm_lowest_prio_delivery(irq)) {
97 if (r < 0)
98 r = 0;
99 r += kvm_apic_set_irq(vcpu, irq, dest_map);
100 } else if (kvm_lapic_enabled(vcpu)) {
101 if (!kvm_vector_hashing_enabled()) {
102 if (!lowest)
103 lowest = vcpu;
104 else if (kvm_apic_compare_prio(vcpu, lowest) < 0)
105 lowest = vcpu;
106 } else {
107 __set_bit(i, dest_vcpu_bitmap);
108 dest_vcpus++;
109 }
110 }
111 }
112
113 if (dest_vcpus != 0) {
114 int idx = kvm_vector_to_index(irq->vector, dest_vcpus,
115 dest_vcpu_bitmap, KVM_MAX_VCPUS);
116
117 lowest = kvm_get_vcpu(kvm, idx);
118 }
119
120 if (lowest)
121 r = kvm_apic_set_irq(lowest, irq, dest_map);
122
123 return r;
124}
125
126void kvm_set_msi_irq(struct kvm *kvm, struct kvm_kernel_irq_routing_entry *e,
127 struct kvm_lapic_irq *irq)
128{
129 trace_kvm_msi_set_irq(e->msi.address_lo | (kvm->arch.x2apic_format ?
130 (u64)e->msi.address_hi << 32 : 0),
131 e->msi.data);
132
133 irq->dest_id = (e->msi.address_lo &
134 MSI_ADDR_DEST_ID_MASK) >> MSI_ADDR_DEST_ID_SHIFT;
135 if (kvm->arch.x2apic_format)
136 irq->dest_id |= MSI_ADDR_EXT_DEST_ID(e->msi.address_hi);
137 irq->vector = (e->msi.data &
138 MSI_DATA_VECTOR_MASK) >> MSI_DATA_VECTOR_SHIFT;
139 irq->dest_mode = (1 << MSI_ADDR_DEST_MODE_SHIFT) & e->msi.address_lo;
140 irq->trig_mode = (1 << MSI_DATA_TRIGGER_SHIFT) & e->msi.data;
141 irq->delivery_mode = e->msi.data & 0x700;
142 irq->msi_redir_hint = ((e->msi.address_lo
143 & MSI_ADDR_REDIRECTION_LOWPRI) > 0);
144 irq->level = 1;
145 irq->shorthand = 0;
146}
147EXPORT_SYMBOL_GPL(kvm_set_msi_irq);
148
149static inline bool kvm_msi_route_invalid(struct kvm *kvm,
150 struct kvm_kernel_irq_routing_entry *e)
151{
152 return kvm->arch.x2apic_format && (e->msi.address_hi & 0xff);
153}
154
155int kvm_set_msi(struct kvm_kernel_irq_routing_entry *e,
156 struct kvm *kvm, int irq_source_id, int level, bool line_status)
157{
158 struct kvm_lapic_irq irq;
159
160 if (kvm_msi_route_invalid(kvm, e))
161 return -EINVAL;
162
163 if (!level)
164 return -1;
165
166 kvm_set_msi_irq(kvm, e, &irq);
167
168 return kvm_irq_delivery_to_apic(kvm, NULL, &irq, NULL);
169}
170
171
172static int kvm_hv_set_sint(struct kvm_kernel_irq_routing_entry *e,
173 struct kvm *kvm, int irq_source_id, int level,
174 bool line_status)
175{
176 if (!level)
177 return -1;
178
179 return kvm_hv_synic_set_irq(kvm, e->hv_sint.vcpu, e->hv_sint.sint);
180}
181
182int kvm_arch_set_irq_inatomic(struct kvm_kernel_irq_routing_entry *e,
183 struct kvm *kvm, int irq_source_id, int level,
184 bool line_status)
185{
186 struct kvm_lapic_irq irq;
187 int r;
188
189 switch (e->type) {
190 case KVM_IRQ_ROUTING_HV_SINT:
191 return kvm_hv_set_sint(e, kvm, irq_source_id, level,
192 line_status);
193
194 case KVM_IRQ_ROUTING_MSI:
195 if (kvm_msi_route_invalid(kvm, e))
196 return -EINVAL;
197
198 kvm_set_msi_irq(kvm, e, &irq);
199
200 if (kvm_irq_delivery_to_apic_fast(kvm, NULL, &irq, &r, NULL))
201 return r;
202 break;
203
204 default:
205 break;
206 }
207
208 return -EWOULDBLOCK;
209}
210
211int kvm_request_irq_source_id(struct kvm *kvm)
212{
213 unsigned long *bitmap = &kvm->arch.irq_sources_bitmap;
214 int irq_source_id;
215
216 mutex_lock(&kvm->irq_lock);
217 irq_source_id = find_first_zero_bit(bitmap, BITS_PER_LONG);
218
219 if (irq_source_id >= BITS_PER_LONG) {
220 printk(KERN_WARNING "kvm: exhaust allocatable IRQ sources!\n");
221 irq_source_id = -EFAULT;
222 goto unlock;
223 }
224
225 ASSERT(irq_source_id != KVM_USERSPACE_IRQ_SOURCE_ID);
226 ASSERT(irq_source_id != KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID);
227 set_bit(irq_source_id, bitmap);
228unlock:
229 mutex_unlock(&kvm->irq_lock);
230
231 return irq_source_id;
232}
233
234void kvm_free_irq_source_id(struct kvm *kvm, int irq_source_id)
235{
236 ASSERT(irq_source_id != KVM_USERSPACE_IRQ_SOURCE_ID);
237 ASSERT(irq_source_id != KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID);
238
239 mutex_lock(&kvm->irq_lock);
240 if (irq_source_id < 0 ||
241 irq_source_id >= BITS_PER_LONG) {
242 printk(KERN_ERR "kvm: IRQ source ID out of range!\n");
243 goto unlock;
244 }
245 clear_bit(irq_source_id, &kvm->arch.irq_sources_bitmap);
246 if (!ioapic_in_kernel(kvm))
247 goto unlock;
248
249 kvm_ioapic_clear_all(kvm->arch.vioapic, irq_source_id);
250 kvm_pic_clear_all(pic_irqchip(kvm), irq_source_id);
251unlock:
252 mutex_unlock(&kvm->irq_lock);
253}
254
255void kvm_register_irq_mask_notifier(struct kvm *kvm, int irq,
256 struct kvm_irq_mask_notifier *kimn)
257{
258 mutex_lock(&kvm->irq_lock);
259 kimn->irq = irq;
260 hlist_add_head_rcu(&kimn->link, &kvm->arch.mask_notifier_list);
261 mutex_unlock(&kvm->irq_lock);
262}
263
264void kvm_unregister_irq_mask_notifier(struct kvm *kvm, int irq,
265 struct kvm_irq_mask_notifier *kimn)
266{
267 mutex_lock(&kvm->irq_lock);
268 hlist_del_rcu(&kimn->link);
269 mutex_unlock(&kvm->irq_lock);
270 synchronize_srcu(&kvm->irq_srcu);
271}
272
273void kvm_fire_mask_notifiers(struct kvm *kvm, unsigned irqchip, unsigned pin,
274 bool mask)
275{
276 struct kvm_irq_mask_notifier *kimn;
277 int idx, gsi;
278
279 idx = srcu_read_lock(&kvm->irq_srcu);
280 gsi = kvm_irq_map_chip_pin(kvm, irqchip, pin);
281 if (gsi != -1)
282 hlist_for_each_entry_rcu(kimn, &kvm->arch.mask_notifier_list, link)
283 if (kimn->irq == gsi)
284 kimn->func(kimn, mask);
285 srcu_read_unlock(&kvm->irq_srcu, idx);
286}
287
288int kvm_set_routing_entry(struct kvm *kvm,
289 struct kvm_kernel_irq_routing_entry *e,
290 const struct kvm_irq_routing_entry *ue)
291{
292 int r = -EINVAL;
293 int delta;
294 unsigned max_pin;
295
296 switch (ue->type) {
297 case KVM_IRQ_ROUTING_IRQCHIP:
298 delta = 0;
299 switch (ue->u.irqchip.irqchip) {
300 case KVM_IRQCHIP_PIC_MASTER:
301 e->set = kvm_set_pic_irq;
302 max_pin = PIC_NUM_PINS;
303 break;
304 case KVM_IRQCHIP_PIC_SLAVE:
305 e->set = kvm_set_pic_irq;
306 max_pin = PIC_NUM_PINS;
307 delta = 8;
308 break;
309 case KVM_IRQCHIP_IOAPIC:
310 max_pin = KVM_IOAPIC_NUM_PINS;
311 e->set = kvm_set_ioapic_irq;
312 break;
313 default:
314 goto out;
315 }
316 e->irqchip.irqchip = ue->u.irqchip.irqchip;
317 e->irqchip.pin = ue->u.irqchip.pin + delta;
318 if (e->irqchip.pin >= max_pin)
319 goto out;
320 break;
321 case KVM_IRQ_ROUTING_MSI:
322 e->set = kvm_set_msi;
323 e->msi.address_lo = ue->u.msi.address_lo;
324 e->msi.address_hi = ue->u.msi.address_hi;
325 e->msi.data = ue->u.msi.data;
326
327 if (kvm_msi_route_invalid(kvm, e))
328 goto out;
329 break;
330 case KVM_IRQ_ROUTING_HV_SINT:
331 e->set = kvm_hv_set_sint;
332 e->hv_sint.vcpu = ue->u.hv_sint.vcpu;
333 e->hv_sint.sint = ue->u.hv_sint.sint;
334 break;
335 default:
336 goto out;
337 }
338
339 r = 0;
340out:
341 return r;
342}
343
344bool kvm_intr_is_single_vcpu(struct kvm *kvm, struct kvm_lapic_irq *irq,
345 struct kvm_vcpu **dest_vcpu)
346{
347 int i, r = 0;
348 struct kvm_vcpu *vcpu;
349
350 if (kvm_intr_is_single_vcpu_fast(kvm, irq, dest_vcpu))
351 return true;
352
353 kvm_for_each_vcpu(i, vcpu, kvm) {
354 if (!kvm_apic_present(vcpu))
355 continue;
356
357 if (!kvm_apic_match_dest(vcpu, NULL, irq->shorthand,
358 irq->dest_id, irq->dest_mode))
359 continue;
360
361 if (++r == 2)
362 return false;
363
364 *dest_vcpu = vcpu;
365 }
366
367 return r == 1;
368}
369EXPORT_SYMBOL_GPL(kvm_intr_is_single_vcpu);
370
371#define IOAPIC_ROUTING_ENTRY(irq) \
372 { .gsi = irq, .type = KVM_IRQ_ROUTING_IRQCHIP, \
373 .u.irqchip = { .irqchip = KVM_IRQCHIP_IOAPIC, .pin = (irq) } }
374#define ROUTING_ENTRY1(irq) IOAPIC_ROUTING_ENTRY(irq)
375
376#define PIC_ROUTING_ENTRY(irq) \
377 { .gsi = irq, .type = KVM_IRQ_ROUTING_IRQCHIP, \
378 .u.irqchip = { .irqchip = SELECT_PIC(irq), .pin = (irq) % 8 } }
379#define ROUTING_ENTRY2(irq) \
380 IOAPIC_ROUTING_ENTRY(irq), PIC_ROUTING_ENTRY(irq)
381
382static const struct kvm_irq_routing_entry default_routing[] = {
383 ROUTING_ENTRY2(0), ROUTING_ENTRY2(1),
384 ROUTING_ENTRY2(2), ROUTING_ENTRY2(3),
385 ROUTING_ENTRY2(4), ROUTING_ENTRY2(5),
386 ROUTING_ENTRY2(6), ROUTING_ENTRY2(7),
387 ROUTING_ENTRY2(8), ROUTING_ENTRY2(9),
388 ROUTING_ENTRY2(10), ROUTING_ENTRY2(11),
389 ROUTING_ENTRY2(12), ROUTING_ENTRY2(13),
390 ROUTING_ENTRY2(14), ROUTING_ENTRY2(15),
391 ROUTING_ENTRY1(16), ROUTING_ENTRY1(17),
392 ROUTING_ENTRY1(18), ROUTING_ENTRY1(19),
393 ROUTING_ENTRY1(20), ROUTING_ENTRY1(21),
394 ROUTING_ENTRY1(22), ROUTING_ENTRY1(23),
395};
396
397int kvm_setup_default_irq_routing(struct kvm *kvm)
398{
399 return kvm_set_irq_routing(kvm, default_routing,
400 ARRAY_SIZE(default_routing), 0);
401}
402
403static const struct kvm_irq_routing_entry empty_routing[] = {};
404
405int kvm_setup_empty_irq_routing(struct kvm *kvm)
406{
407 return kvm_set_irq_routing(kvm, empty_routing, 0, 0);
408}
409
410void kvm_arch_post_irq_routing_update(struct kvm *kvm)
411{
412 if (ioapic_in_kernel(kvm) || !irqchip_in_kernel(kvm))
413 return;
414 kvm_make_scan_ioapic_request(kvm);
415}
416
417void kvm_scan_ioapic_routes(struct kvm_vcpu *vcpu,
418 ulong *ioapic_handled_vectors)
419{
420 struct kvm *kvm = vcpu->kvm;
421 struct kvm_kernel_irq_routing_entry *entry;
422 struct kvm_irq_routing_table *table;
423 u32 i, nr_ioapic_pins;
424 int idx;
425
426 idx = srcu_read_lock(&kvm->irq_srcu);
427 table = srcu_dereference(kvm->irq_routing, &kvm->irq_srcu);
428 nr_ioapic_pins = min_t(u32, table->nr_rt_entries,
429 kvm->arch.nr_reserved_ioapic_pins);
430 for (i = 0; i < nr_ioapic_pins; ++i) {
431 hlist_for_each_entry(entry, &table->map[i], link) {
432 struct kvm_lapic_irq irq;
433
434 if (entry->type != KVM_IRQ_ROUTING_MSI)
435 continue;
436
437 kvm_set_msi_irq(vcpu->kvm, entry, &irq);
438
439 if (irq.level && kvm_apic_match_dest(vcpu, NULL, 0,
440 irq.dest_id, irq.dest_mode))
441 __set_bit(irq.vector, ioapic_handled_vectors);
442 }
443 }
444 srcu_read_unlock(&kvm->irq_srcu, idx);
445}
446
447void kvm_arch_irq_routing_update(struct kvm *kvm)
448{
449 kvm_hv_irq_routing_update(kvm);
450}