1// SPDX-License-Identifier: GPL-2.0
 2/ {
 3	#address-cells = <1>;
 4	#size-cells = <1>;
 5	compatible = "ralink,mtk7620a-soc";
 6
 7	cpus {
 8		cpu@0 {
 9			compatible = "mips,mips24KEc";
10		};
11	};
12
13	cpuintc: cpuintc {
14		#address-cells = <0>;
15		#interrupt-cells = <1>;
16		interrupt-controller;
17		compatible = "mti,cpu-interrupt-controller";
18	};
19
20	palmbus@10000000 {
21		compatible = "palmbus";
22		reg = <0x10000000 0x200000>;
23                ranges = <0x0 0x10000000 0x1FFFFF>;
24
25		#address-cells = <1>;
26		#size-cells = <1>;
27
28		sysc@0 {
29			compatible = "ralink,mt7620a-sysc";
30			reg = <0x0 0x100>;
31		};
32
33		intc: intc@200 {
34			compatible = "ralink,mt7620a-intc", "ralink,rt2880-intc";
35			reg = <0x200 0x100>;
36
37			interrupt-controller;
38			#interrupt-cells = <1>;
39
40			interrupt-parent = <&cpuintc>;
41			interrupts = <2>;
42		};
43
44		memc@300 {
45			compatible = "ralink,mt7620a-memc", "ralink,rt3050-memc";
46			reg = <0x300 0x100>;
47		};
48
49		uartlite@c00 {
50			compatible = "ralink,mt7620a-uart", "ralink,rt2880-uart", "ns16550a";
51			reg = <0xc00 0x100>;
52
53			interrupt-parent = <&intc>;
54			interrupts = <12>;
55
56			reg-shift = <2>;
57		};
58	};
59};

 
 1/ {
 2	#address-cells = <1>;
 3	#size-cells = <1>;
 4	compatible = "ralink,mtk7620a-soc";
 5
 6	cpus {
 7		cpu@0 {
 8			compatible = "mips,mips24KEc";
 9		};
10	};
11
12	cpuintc: cpuintc {
13		#address-cells = <0>;
14		#interrupt-cells = <1>;
15		interrupt-controller;
16		compatible = "mti,cpu-interrupt-controller";
17	};
18
19	palmbus@10000000 {
20		compatible = "palmbus";
21		reg = <0x10000000 0x200000>;
22                ranges = <0x0 0x10000000 0x1FFFFF>;
23
24		#address-cells = <1>;
25		#size-cells = <1>;
26
27		sysc@0 {
28			compatible = "ralink,mt7620a-sysc";
29			reg = <0x0 0x100>;
30		};
31
32		intc: intc@200 {
33			compatible = "ralink,mt7620a-intc", "ralink,rt2880-intc";
34			reg = <0x200 0x100>;
35
36			interrupt-controller;
37			#interrupt-cells = <1>;
38
39			interrupt-parent = <&cpuintc>;
40			interrupts = <2>;
41		};
42
43		memc@300 {
44			compatible = "ralink,mt7620a-memc", "ralink,rt3050-memc";
45			reg = <0x300 0x100>;
46		};
47
48		uartlite@c00 {
49			compatible = "ralink,mt7620a-uart", "ralink,rt2880-uart", "ns16550a";
50			reg = <0xc00 0x100>;
51
52			interrupt-parent = <&intc>;
53			interrupts = <12>;
54
55			reg-shift = <2>;
56		};
57	};
58};