1/*
  2 * Copyright (c) 2007 Dave Airlie <airlied@linux.ie>
  3 * Copyright (c) 2007 Jakob Bornecrantz <wallbraker@gmail.com>
  4 * Copyright (c) 2008 Red Hat Inc.
  5 * Copyright (c) 2007-2008 Tungsten Graphics, Inc., Cedar Park, TX., USA
  6 * Copyright (c) 2007-2008 Intel Corporation
  7 *
  8 * Permission is hereby granted, free of charge, to any person obtaining a
  9 * copy of this software and associated documentation files (the "Software"),
 10 * to deal in the Software without restriction, including without limitation
 11 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 12 * and/or sell copies of the Software, and to permit persons to whom the
 13 * Software is furnished to do so, subject to the following conditions:
 14 *
 15 * The above copyright notice and this permission notice shall be included in
 16 * all copies or substantial portions of the Software.
 17 *
 18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 20 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
 21 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
 22 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
 23 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
 24 * IN THE SOFTWARE.
 25 */
 26
 27#ifndef _DRM_MODE_H
 28#define _DRM_MODE_H
 29
 30#include <linux/types.h>
 31
 32#define DRM_DISPLAY_INFO_LEN	32
 33#define DRM_CONNECTOR_NAME_LEN	32
 34#define DRM_DISPLAY_MODE_LEN	32
 35#define DRM_PROP_NAME_LEN	32
 36
 37#define DRM_MODE_TYPE_BUILTIN	(1<<0)
 38#define DRM_MODE_TYPE_CLOCK_C	((1<<1) | DRM_MODE_TYPE_BUILTIN)
 39#define DRM_MODE_TYPE_CRTC_C	((1<<2) | DRM_MODE_TYPE_BUILTIN)
 40#define DRM_MODE_TYPE_PREFERRED	(1<<3)
 41#define DRM_MODE_TYPE_DEFAULT	(1<<4)
 42#define DRM_MODE_TYPE_USERDEF	(1<<5)
 43#define DRM_MODE_TYPE_DRIVER	(1<<6)
 44
 45/* Video mode flags */
 46/* bit compatible with the xorg definitions. */
 47#define DRM_MODE_FLAG_PHSYNC	(1<<0)
 48#define DRM_MODE_FLAG_NHSYNC	(1<<1)
 49#define DRM_MODE_FLAG_PVSYNC	(1<<2)
 50#define DRM_MODE_FLAG_NVSYNC	(1<<3)
 51#define DRM_MODE_FLAG_INTERLACE	(1<<4)
 52#define DRM_MODE_FLAG_DBLSCAN	(1<<5)
 53#define DRM_MODE_FLAG_CSYNC	(1<<6)
 54#define DRM_MODE_FLAG_PCSYNC	(1<<7)
 55#define DRM_MODE_FLAG_NCSYNC	(1<<8)
 56#define DRM_MODE_FLAG_HSKEW	(1<<9) /* hskew provided */
 57#define DRM_MODE_FLAG_BCAST	(1<<10)
 58#define DRM_MODE_FLAG_PIXMUX	(1<<11)
 59#define DRM_MODE_FLAG_DBLCLK	(1<<12)
 60#define DRM_MODE_FLAG_CLKDIV2	(1<<13)
 61
 62/* DPMS flags */
 63/* bit compatible with the xorg definitions. */
 64#define DRM_MODE_DPMS_ON	0
 65#define DRM_MODE_DPMS_STANDBY	1
 66#define DRM_MODE_DPMS_SUSPEND	2
 67#define DRM_MODE_DPMS_OFF	3
 68
 69/* Scaling mode options */
 70#define DRM_MODE_SCALE_NONE		0 /* Unmodified timing (display or
 71					     software can still scale) */
 72#define DRM_MODE_SCALE_FULLSCREEN	1 /* Full screen, ignore aspect */
 73#define DRM_MODE_SCALE_CENTER		2 /* Centered, no scaling */
 74#define DRM_MODE_SCALE_ASPECT		3 /* Full screen, preserve aspect */
 75
 76/* Dithering mode options */
 77#define DRM_MODE_DITHERING_OFF	0
 78#define DRM_MODE_DITHERING_ON	1
 79#define DRM_MODE_DITHERING_AUTO 2
 80
 81/* Dirty info options */
 82#define DRM_MODE_DIRTY_OFF      0
 83#define DRM_MODE_DIRTY_ON       1
 84#define DRM_MODE_DIRTY_ANNOTATE 2
 85
 86struct drm_mode_modeinfo {
 87	__u32 clock;
 88	__u16 hdisplay, hsync_start, hsync_end, htotal, hskew;
 89	__u16 vdisplay, vsync_start, vsync_end, vtotal, vscan;
 90
 91	__u32 vrefresh;
 92
 93	__u32 flags;
 94	__u32 type;
 95	char name[DRM_DISPLAY_MODE_LEN];
 96};
 97
 98struct drm_mode_card_res {
 99	__u64 fb_id_ptr;
100	__u64 crtc_id_ptr;
101	__u64 connector_id_ptr;
102	__u64 encoder_id_ptr;
103	__u32 count_fbs;
104	__u32 count_crtcs;
105	__u32 count_connectors;
106	__u32 count_encoders;
107	__u32 min_width, max_width;
108	__u32 min_height, max_height;
109};
110
111struct drm_mode_crtc {
112	__u64 set_connectors_ptr;
113	__u32 count_connectors;
114
115	__u32 crtc_id; /**< Id */
116	__u32 fb_id; /**< Id of framebuffer */
117
118	__u32 x, y; /**< Position on the frameuffer */
119
120	__u32 gamma_size;
121	__u32 mode_valid;
122	struct drm_mode_modeinfo mode;
123};
124
125#define DRM_MODE_PRESENT_TOP_FIELD	(1<<0)
126#define DRM_MODE_PRESENT_BOTTOM_FIELD	(1<<1)
127
128/* Planes blend with or override other bits on the CRTC */
129struct drm_mode_set_plane {
130	__u32 plane_id;
131	__u32 crtc_id;
132	__u32 fb_id; /* fb object contains surface format type */
133	__u32 flags; /* see above flags */
134
135	/* Signed dest location allows it to be partially off screen */
136	__s32 crtc_x, crtc_y;
137	__u32 crtc_w, crtc_h;
138
139	/* Source values are 16.16 fixed point */
140	__u32 src_x, src_y;
141	__u32 src_h, src_w;
142};
143
144struct drm_mode_get_plane {
145	__u32 plane_id;
146
147	__u32 crtc_id;
148	__u32 fb_id;
149
150	__u32 possible_crtcs;
151	__u32 gamma_size;
152
153	__u32 count_format_types;
154	__u64 format_type_ptr;
155};
156
157struct drm_mode_get_plane_res {
158	__u64 plane_id_ptr;
159	__u32 count_planes;
160};
161
162#define DRM_MODE_ENCODER_NONE	0
163#define DRM_MODE_ENCODER_DAC	1
164#define DRM_MODE_ENCODER_TMDS	2
165#define DRM_MODE_ENCODER_LVDS	3
166#define DRM_MODE_ENCODER_TVDAC	4
167#define DRM_MODE_ENCODER_VIRTUAL 5
168
169struct drm_mode_get_encoder {
170	__u32 encoder_id;
171	__u32 encoder_type;
172
173	__u32 crtc_id; /**< Id of crtc */
174
175	__u32 possible_crtcs;
176	__u32 possible_clones;
177};
178
179/* This is for connectors with multiple signal types. */
180/* Try to match DRM_MODE_CONNECTOR_X as closely as possible. */
181#define DRM_MODE_SUBCONNECTOR_Automatic	0
182#define DRM_MODE_SUBCONNECTOR_Unknown	0
183#define DRM_MODE_SUBCONNECTOR_DVID	3
184#define DRM_MODE_SUBCONNECTOR_DVIA	4
185#define DRM_MODE_SUBCONNECTOR_Composite	5
186#define DRM_MODE_SUBCONNECTOR_SVIDEO	6
187#define DRM_MODE_SUBCONNECTOR_Component	8
188#define DRM_MODE_SUBCONNECTOR_SCART	9
189
190#define DRM_MODE_CONNECTOR_Unknown	0
191#define DRM_MODE_CONNECTOR_VGA		1
192#define DRM_MODE_CONNECTOR_DVII		2
193#define DRM_MODE_CONNECTOR_DVID		3
194#define DRM_MODE_CONNECTOR_DVIA		4
195#define DRM_MODE_CONNECTOR_Composite	5
196#define DRM_MODE_CONNECTOR_SVIDEO	6
197#define DRM_MODE_CONNECTOR_LVDS		7
198#define DRM_MODE_CONNECTOR_Component	8
199#define DRM_MODE_CONNECTOR_9PinDIN	9
200#define DRM_MODE_CONNECTOR_DisplayPort	10
201#define DRM_MODE_CONNECTOR_HDMIA	11
202#define DRM_MODE_CONNECTOR_HDMIB	12
203#define DRM_MODE_CONNECTOR_TV		13
204#define DRM_MODE_CONNECTOR_eDP		14
205#define DRM_MODE_CONNECTOR_VIRTUAL      15
206
207struct drm_mode_get_connector {
208
209	__u64 encoders_ptr;
210	__u64 modes_ptr;
211	__u64 props_ptr;
212	__u64 prop_values_ptr;
213
214	__u32 count_modes;
215	__u32 count_props;
216	__u32 count_encoders;
217
218	__u32 encoder_id; /**< Current Encoder */
219	__u32 connector_id; /**< Id */
220	__u32 connector_type;
221	__u32 connector_type_id;
222
223	__u32 connection;
224	__u32 mm_width, mm_height; /**< HxW in millimeters */
225	__u32 subpixel;
226};
227
228#define DRM_MODE_PROP_PENDING	(1<<0)
229#define DRM_MODE_PROP_RANGE	(1<<1)
230#define DRM_MODE_PROP_IMMUTABLE	(1<<2)
231#define DRM_MODE_PROP_ENUM	(1<<3) /* enumerated type with text strings */
232#define DRM_MODE_PROP_BLOB	(1<<4)
233#define DRM_MODE_PROP_BITMASK	(1<<5) /* bitmask of enumerated types */
234
235struct drm_mode_property_enum {
236	__u64 value;
237	char name[DRM_PROP_NAME_LEN];
238};
239
240struct drm_mode_get_property {
241	__u64 values_ptr; /* values and blob lengths */
242	__u64 enum_blob_ptr; /* enum and blob id ptrs */
243
244	__u32 prop_id;
245	__u32 flags;
246	char name[DRM_PROP_NAME_LEN];
247
248	__u32 count_values;
249	__u32 count_enum_blobs;
250};
251
252struct drm_mode_connector_set_property {
253	__u64 value;
254	__u32 prop_id;
255	__u32 connector_id;
256};
257
258struct drm_mode_obj_get_properties {
259	__u64 props_ptr;
260	__u64 prop_values_ptr;
261	__u32 count_props;
262	__u32 obj_id;
263	__u32 obj_type;
264};
265
266struct drm_mode_obj_set_property {
267	__u64 value;
268	__u32 prop_id;
269	__u32 obj_id;
270	__u32 obj_type;
271};
272
273struct drm_mode_get_blob {
274	__u32 blob_id;
275	__u32 length;
276	__u64 data;
277};
278
279struct drm_mode_fb_cmd {
280	__u32 fb_id;
281	__u32 width, height;
282	__u32 pitch;
283	__u32 bpp;
284	__u32 depth;
285	/* driver specific handle */
286	__u32 handle;
287};
288
289#define DRM_MODE_FB_INTERLACED	(1<<0) /* for interlaced framebuffers */
290
291struct drm_mode_fb_cmd2 {
292	__u32 fb_id;
293	__u32 width, height;
294	__u32 pixel_format; /* fourcc code from drm_fourcc.h */
295	__u32 flags; /* see above flags */
296
297	/*
298	 * In case of planar formats, this ioctl allows up to 4
299	 * buffer objects with offets and pitches per plane.
300	 * The pitch and offset order is dictated by the fourcc,
301	 * e.g. NV12 (http://fourcc.org/yuv.php#NV12) is described as:
302	 *
303	 *   YUV 4:2:0 image with a plane of 8 bit Y samples
304	 *   followed by an interleaved U/V plane containing
305	 *   8 bit 2x2 subsampled colour difference samples.
306	 *
307	 * So it would consist of Y as offset[0] and UV as
308	 * offeset[1].  Note that offset[0] will generally
309	 * be 0.
310	 */
311	__u32 handles[4];
312	__u32 pitches[4]; /* pitch for each plane */
313	__u32 offsets[4]; /* offset of each plane */
314};
315
316#define DRM_MODE_FB_DIRTY_ANNOTATE_COPY 0x01
317#define DRM_MODE_FB_DIRTY_ANNOTATE_FILL 0x02
318#define DRM_MODE_FB_DIRTY_FLAGS         0x03
319
320#define DRM_MODE_FB_DIRTY_MAX_CLIPS     256
321
322/*
323 * Mark a region of a framebuffer as dirty.
324 *
325 * Some hardware does not automatically update display contents
326 * as a hardware or software draw to a framebuffer. This ioctl
327 * allows userspace to tell the kernel and the hardware what
328 * regions of the framebuffer have changed.
329 *
330 * The kernel or hardware is free to update more then just the
331 * region specified by the clip rects. The kernel or hardware
332 * may also delay and/or coalesce several calls to dirty into a
333 * single update.
334 *
335 * Userspace may annotate the updates, the annotates are a
336 * promise made by the caller that the change is either a copy
337 * of pixels or a fill of a single color in the region specified.
338 *
339 * If the DRM_MODE_FB_DIRTY_ANNOTATE_COPY flag is given then
340 * the number of updated regions are half of num_clips given,
341 * where the clip rects are paired in src and dst. The width and
342 * height of each one of the pairs must match.
343 *
344 * If the DRM_MODE_FB_DIRTY_ANNOTATE_FILL flag is given the caller
345 * promises that the region specified of the clip rects is filled
346 * completely with a single color as given in the color argument.
347 */
348
349struct drm_mode_fb_dirty_cmd {
350	__u32 fb_id;
351	__u32 flags;
352	__u32 color;
353	__u32 num_clips;
354	__u64 clips_ptr;
355};
356
357struct drm_mode_mode_cmd {
358	__u32 connector_id;
359	struct drm_mode_modeinfo mode;
360};
361
362#define DRM_MODE_CURSOR_BO	0x01
363#define DRM_MODE_CURSOR_MOVE	0x02
364#define DRM_MODE_CURSOR_FLAGS	0x03
365
366/*
367 * depending on the value in flags different members are used.
368 *
369 * CURSOR_BO uses
370 *    crtc
371 *    width
372 *    height
373 *    handle - if 0 turns the cursor of
374 *
375 * CURSOR_MOVE uses
376 *    crtc
377 *    x
378 *    y
379 */
380struct drm_mode_cursor {
381	__u32 flags;
382	__u32 crtc_id;
383	__s32 x;
384	__s32 y;
385	__u32 width;
386	__u32 height;
387	/* driver specific handle */
388	__u32 handle;
389};
390
391struct drm_mode_crtc_lut {
392	__u32 crtc_id;
393	__u32 gamma_size;
394
395	/* pointers to arrays */
396	__u64 red;
397	__u64 green;
398	__u64 blue;
399};
400
401#define DRM_MODE_PAGE_FLIP_EVENT 0x01
402#define DRM_MODE_PAGE_FLIP_FLAGS DRM_MODE_PAGE_FLIP_EVENT
403
404/*
405 * Request a page flip on the specified crtc.
406 *
407 * This ioctl will ask KMS to schedule a page flip for the specified
408 * crtc.  Once any pending rendering targeting the specified fb (as of
409 * ioctl time) has completed, the crtc will be reprogrammed to display
410 * that fb after the next vertical refresh.  The ioctl returns
411 * immediately, but subsequent rendering to the current fb will block
412 * in the execbuffer ioctl until the page flip happens.  If a page
413 * flip is already pending as the ioctl is called, EBUSY will be
414 * returned.
415 *
416 * The ioctl supports one flag, DRM_MODE_PAGE_FLIP_EVENT, which will
417 * request that drm sends back a vblank event (see drm.h: struct
418 * drm_event_vblank) when the page flip is done.  The user_data field
419 * passed in with this ioctl will be returned as the user_data field
420 * in the vblank event struct.
421 *
422 * The reserved field must be zero until we figure out something
423 * clever to use it for.
424 */
425
426struct drm_mode_crtc_page_flip {
427	__u32 crtc_id;
428	__u32 fb_id;
429	__u32 flags;
430	__u32 reserved;
431	__u64 user_data;
432};
433
434/* create a dumb scanout buffer */
435struct drm_mode_create_dumb {
436	uint32_t height;
437	uint32_t width;
438	uint32_t bpp;
439	uint32_t flags;
440	/* handle, pitch, size will be returned */
441	uint32_t handle;
442	uint32_t pitch;
443	uint64_t size;
444};
445
446/* set up for mmap of a dumb scanout buffer */
447struct drm_mode_map_dumb {
448	/** Handle for the object being mapped. */
449	__u32 handle;
450	__u32 pad;
451	/**
452	 * Fake offset to use for subsequent mmap call
453	 *
454	 * This is a fixed-size type for 32/64 compatibility.
455	 */
456	__u64 offset;
457};
458
459struct drm_mode_destroy_dumb {
460	uint32_t handle;
461};
462
463#endif