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1// SPDX-License-Identifier: GPL-2.0+
2/*
3 * icom.c
4 *
5 * Copyright (C) 2001 IBM Corporation. All rights reserved.
6 *
7 * Serial device driver.
8 *
9 * Based on code from serial.c
10 */
11#include <linux/module.h>
12#include <linux/kernel.h>
13#include <linux/errno.h>
14#include <linux/signal.h>
15#include <linux/timer.h>
16#include <linux/interrupt.h>
17#include <linux/tty.h>
18#include <linux/termios.h>
19#include <linux/fs.h>
20#include <linux/tty_flip.h>
21#include <linux/serial.h>
22#include <linux/serial_core.h>
23#include <linux/serial_reg.h>
24#include <linux/major.h>
25#include <linux/string.h>
26#include <linux/fcntl.h>
27#include <linux/ptrace.h>
28#include <linux/ioport.h>
29#include <linux/mm.h>
30#include <linux/slab.h>
31#include <linux/init.h>
32#include <linux/delay.h>
33#include <linux/pci.h>
34#include <linux/vmalloc.h>
35#include <linux/smp.h>
36#include <linux/spinlock.h>
37#include <linux/kref.h>
38#include <linux/firmware.h>
39#include <linux/bitops.h>
40
41#include <linux/io.h>
42#include <asm/irq.h>
43#include <linux/uaccess.h>
44
45/*#define ICOM_TRACE enable port trace capabilities */
46
47#define ICOM_DRIVER_NAME "icom"
48#define NR_PORTS 128
49
50static const unsigned int icom_acfg_baud[] = {
51 300,
52 600,
53 900,
54 1200,
55 1800,
56 2400,
57 3600,
58 4800,
59 7200,
60 9600,
61 14400,
62 19200,
63 28800,
64 38400,
65 57600,
66 76800,
67 115200,
68 153600,
69 230400,
70 307200,
71 460800,
72};
73#define BAUD_TABLE_LIMIT (ARRAY_SIZE(icom_acfg_baud) - 1)
74
75struct icom_regs {
76 u32 control; /* Adapter Control Register */
77 u32 interrupt; /* Adapter Interrupt Register */
78 u32 int_mask; /* Adapter Interrupt Mask Reg */
79 u32 int_pri; /* Adapter Interrupt Priority r */
80 u32 int_reg_b; /* Adapter non-masked Interrupt */
81 u32 resvd01;
82 u32 resvd02;
83 u32 resvd03;
84 u32 control_2; /* Adapter Control Register 2 */
85 u32 interrupt_2; /* Adapter Interrupt Register 2 */
86 u32 int_mask_2; /* Adapter Interrupt Mask 2 */
87 u32 int_pri_2; /* Adapter Interrupt Prior 2 */
88 u32 int_reg_2b; /* Adapter non-masked 2 */
89};
90
91struct func_dram {
92 u32 reserved[108]; /* 0-1B0 reserved by personality code */
93 u32 RcvStatusAddr; /* 1B0-1B3 Status Address for Next rcv */
94 u8 RcvStnAddr; /* 1B4 Receive Station Addr */
95 u8 IdleState; /* 1B5 Idle State */
96 u8 IdleMonitor; /* 1B6 Idle Monitor */
97 u8 FlagFillIdleTimer; /* 1B7 Flag Fill Idle Timer */
98 u32 XmitStatusAddr; /* 1B8-1BB Transmit Status Address */
99 u8 StartXmitCmd; /* 1BC Start Xmit Command */
100 u8 HDLCConfigReg; /* 1BD Reserved */
101 u8 CauseCode; /* 1BE Cause code for fatal error */
102 u8 xchar; /* 1BF High priority send */
103 u32 reserved3; /* 1C0-1C3 Reserved */
104 u8 PrevCmdReg; /* 1C4 Reserved */
105 u8 CmdReg; /* 1C5 Command Register */
106 u8 async_config2; /* 1C6 Async Config Byte 2 */
107 u8 async_config3; /* 1C7 Async Config Byte 3 */
108 u8 dce_resvd[20]; /* 1C8-1DB DCE Rsvd */
109 u8 dce_resvd21; /* 1DC DCE Rsvd (21st byte */
110 u8 misc_flags; /* 1DD misc flags */
111#define V2_HARDWARE 0x40
112#define ICOM_HDW_ACTIVE 0x01
113 u8 call_length; /* 1DE Phone #/CFI buff ln */
114 u8 call_length2; /* 1DF Upper byte (unused) */
115 u32 call_addr; /* 1E0-1E3 Phn #/CFI buff addr */
116 u16 timer_value; /* 1E4-1E5 general timer value */
117 u8 timer_command; /* 1E6 general timer cmd */
118 u8 dce_command; /* 1E7 dce command reg */
119 u8 dce_cmd_status; /* 1E8 dce command stat */
120 u8 x21_r1_ioff; /* 1E9 dce ready counter */
121 u8 x21_r0_ioff; /* 1EA dce not ready ctr */
122 u8 x21_ralt_ioff; /* 1EB dce CNR counter */
123 u8 x21_r1_ion; /* 1EC dce ready I on ctr */
124 u8 rsvd_ier; /* 1ED Rsvd for IER (if ne */
125 u8 ier; /* 1EE Interrupt Enable */
126 u8 isr; /* 1EF Input Signal Reg */
127 u8 osr; /* 1F0 Output Signal Reg */
128 u8 reset; /* 1F1 Reset/Reload Reg */
129 u8 disable; /* 1F2 Disable Reg */
130 u8 sync; /* 1F3 Sync Reg */
131 u8 error_stat; /* 1F4 Error Status */
132 u8 cable_id; /* 1F5 Cable ID */
133 u8 cs_length; /* 1F6 CS Load Length */
134 u8 mac_length; /* 1F7 Mac Load Length */
135 u32 cs_load_addr; /* 1F8-1FB Call Load PCI Addr */
136 u32 mac_load_addr; /* 1FC-1FF Mac Load PCI Addr */
137};
138
139/*
140 * adapter defines and structures
141 */
142#define ICOM_CONTROL_START_A 0x00000008
143#define ICOM_CONTROL_STOP_A 0x00000004
144#define ICOM_CONTROL_START_B 0x00000002
145#define ICOM_CONTROL_STOP_B 0x00000001
146#define ICOM_CONTROL_START_C 0x00000008
147#define ICOM_CONTROL_STOP_C 0x00000004
148#define ICOM_CONTROL_START_D 0x00000002
149#define ICOM_CONTROL_STOP_D 0x00000001
150#define ICOM_IRAM_OFFSET 0x1000
151#define ICOM_IRAM_SIZE 0x0C00
152#define ICOM_DCE_IRAM_OFFSET 0x0A00
153#define ICOM_CABLE_ID_VALID 0x01
154#define ICOM_CABLE_ID_MASK 0xF0
155#define ICOM_DISABLE 0x80
156#define CMD_XMIT_RCV_ENABLE 0xC0
157#define CMD_XMIT_ENABLE 0x40
158#define CMD_RCV_DISABLE 0x00
159#define CMD_RCV_ENABLE 0x80
160#define CMD_RESTART 0x01
161#define CMD_HOLD_XMIT 0x02
162#define CMD_SND_BREAK 0x04
163#define RS232_CABLE 0x06
164#define V24_CABLE 0x0E
165#define V35_CABLE 0x0C
166#define V36_CABLE 0x02
167#define NO_CABLE 0x00
168#define START_DOWNLOAD 0x80
169#define ICOM_INT_MASK_PRC_A 0x00003FFF
170#define ICOM_INT_MASK_PRC_B 0x3FFF0000
171#define ICOM_INT_MASK_PRC_C 0x00003FFF
172#define ICOM_INT_MASK_PRC_D 0x3FFF0000
173#define INT_RCV_COMPLETED 0x1000
174#define INT_XMIT_COMPLETED 0x2000
175#define INT_IDLE_DETECT 0x0800
176#define INT_RCV_DISABLED 0x0400
177#define INT_XMIT_DISABLED 0x0200
178#define INT_RCV_XMIT_SHUTDOWN 0x0100
179#define INT_FATAL_ERROR 0x0080
180#define INT_CABLE_PULL 0x0020
181#define INT_SIGNAL_CHANGE 0x0010
182#define HDLC_PPP_PURE_ASYNC 0x02
183#define HDLC_FF_FILL 0x00
184#define HDLC_HDW_FLOW 0x01
185#define START_XMIT 0x80
186#define ICOM_ACFG_DRIVE1 0x20
187#define ICOM_ACFG_NO_PARITY 0x00
188#define ICOM_ACFG_PARITY_ENAB 0x02
189#define ICOM_ACFG_PARITY_ODD 0x01
190#define ICOM_ACFG_8BPC 0x00
191#define ICOM_ACFG_7BPC 0x04
192#define ICOM_ACFG_6BPC 0x08
193#define ICOM_ACFG_5BPC 0x0C
194#define ICOM_ACFG_1STOP_BIT 0x00
195#define ICOM_ACFG_2STOP_BIT 0x10
196#define ICOM_DTR 0x80
197#define ICOM_RTS 0x40
198#define ICOM_RI 0x08
199#define ICOM_DSR 0x80
200#define ICOM_DCD 0x20
201#define ICOM_CTS 0x40
202
203#define NUM_XBUFFS 1
204#define NUM_RBUFFS 2
205#define RCV_BUFF_SZ 0x0200
206#define XMIT_BUFF_SZ 0x1000
207struct statusArea {
208 /**********************************************/
209 /* Transmit Status Area */
210 /**********************************************/
211 struct xmit_status_area{
212 __le32 leNext; /* Next entry in Little Endian on Adapter */
213 __le32 leNextASD;
214 __le32 leBuffer; /* Buffer for entry in LE for Adapter */
215 __le16 leLengthASD;
216 __le16 leOffsetASD;
217 __le16 leLength; /* Length of data in segment */
218 __le16 flags;
219#define SA_FLAGS_DONE 0x0080 /* Done with Segment */
220#define SA_FLAGS_CONTINUED 0x8000 /* More Segments */
221#define SA_FLAGS_IDLE 0x4000 /* Mark IDLE after frm */
222#define SA_FLAGS_READY_TO_XMIT 0x0800
223#define SA_FLAGS_STAT_MASK 0x007F
224 } xmit[NUM_XBUFFS];
225
226 /**********************************************/
227 /* Receive Status Area */
228 /**********************************************/
229 struct {
230 __le32 leNext; /* Next entry in Little Endian on Adapter */
231 __le32 leNextASD;
232 __le32 leBuffer; /* Buffer for entry in LE for Adapter */
233 __le16 WorkingLength; /* size of segment */
234 __le16 reserv01;
235 __le16 leLength; /* Length of data in segment */
236 __le16 flags;
237#define SA_FL_RCV_DONE 0x0010 /* Data ready */
238#define SA_FLAGS_OVERRUN 0x0040
239#define SA_FLAGS_PARITY_ERROR 0x0080
240#define SA_FLAGS_FRAME_ERROR 0x0001
241#define SA_FLAGS_FRAME_TRUNC 0x0002
242#define SA_FLAGS_BREAK_DET 0x0004 /* set conditionally by device driver, not hardware */
243#define SA_FLAGS_RCV_MASK 0xFFE6
244 } rcv[NUM_RBUFFS];
245};
246
247struct icom_adapter;
248
249
250#define ICOM_MAJOR 243
251#define ICOM_MINOR_START 0
252
253struct icom_port {
254 struct uart_port uart_port;
255 unsigned char cable_id;
256 unsigned char read_status_mask;
257 unsigned char ignore_status_mask;
258 void __iomem * int_reg;
259 struct icom_regs __iomem *global_reg;
260 struct func_dram __iomem *dram;
261 int port;
262 struct statusArea *statStg;
263 dma_addr_t statStg_pci;
264 __le32 *xmitRestart;
265 dma_addr_t xmitRestart_pci;
266 unsigned char *xmit_buf;
267 dma_addr_t xmit_buf_pci;
268 unsigned char *recv_buf;
269 dma_addr_t recv_buf_pci;
270 int next_rcv;
271 int status;
272#define ICOM_PORT_ACTIVE 1 /* Port exists. */
273#define ICOM_PORT_OFF 0 /* Port does not exist. */
274 struct icom_adapter *adapter;
275};
276
277struct icom_adapter {
278 void __iomem * base_addr;
279 unsigned long base_addr_pci;
280 struct pci_dev *pci_dev;
281 struct icom_port port_info[4];
282 int index;
283 int version;
284#define ADAPTER_V1 0x0001
285#define ADAPTER_V2 0x0002
286 u32 subsystem_id;
287#define FOUR_PORT_MODEL 0x0252
288#define V2_TWO_PORTS_RVX 0x021A
289#define V2_ONE_PORT_RVX_ONE_PORT_IMBED_MDM 0x0251
290 int numb_ports;
291 struct list_head icom_adapter_entry;
292 struct kref kref;
293};
294
295/* prototype */
296extern void iCom_sercons_init(void);
297
298struct lookup_proc_table {
299 u32 __iomem *global_control_reg;
300 unsigned long processor_id;
301};
302
303struct lookup_int_table {
304 u32 __iomem *global_int_mask;
305 unsigned long processor_id;
306};
307
308static inline struct icom_port *to_icom_port(struct uart_port *port)
309{
310 return container_of(port, struct icom_port, uart_port);
311}
312
313static const struct pci_device_id icom_pci_table[] = {
314 {
315 .vendor = PCI_VENDOR_ID_IBM,
316 .device = PCI_DEVICE_ID_IBM_ICOM_DEV_ID_1,
317 .subvendor = PCI_ANY_ID,
318 .subdevice = PCI_ANY_ID,
319 .driver_data = ADAPTER_V1,
320 },
321 {
322 .vendor = PCI_VENDOR_ID_IBM,
323 .device = PCI_DEVICE_ID_IBM_ICOM_DEV_ID_2,
324 .subvendor = PCI_VENDOR_ID_IBM,
325 .subdevice = PCI_DEVICE_ID_IBM_ICOM_V2_TWO_PORTS_RVX,
326 .driver_data = ADAPTER_V2,
327 },
328 {
329 .vendor = PCI_VENDOR_ID_IBM,
330 .device = PCI_DEVICE_ID_IBM_ICOM_DEV_ID_2,
331 .subvendor = PCI_VENDOR_ID_IBM,
332 .subdevice = PCI_DEVICE_ID_IBM_ICOM_V2_ONE_PORT_RVX_ONE_PORT_MDM,
333 .driver_data = ADAPTER_V2,
334 },
335 {
336 .vendor = PCI_VENDOR_ID_IBM,
337 .device = PCI_DEVICE_ID_IBM_ICOM_DEV_ID_2,
338 .subvendor = PCI_VENDOR_ID_IBM,
339 .subdevice = PCI_DEVICE_ID_IBM_ICOM_FOUR_PORT_MODEL,
340 .driver_data = ADAPTER_V2,
341 },
342 {
343 .vendor = PCI_VENDOR_ID_IBM,
344 .device = PCI_DEVICE_ID_IBM_ICOM_DEV_ID_2,
345 .subvendor = PCI_VENDOR_ID_IBM,
346 .subdevice = PCI_DEVICE_ID_IBM_ICOM_V2_ONE_PORT_RVX_ONE_PORT_MDM_PCIE,
347 .driver_data = ADAPTER_V2,
348 },
349 {}
350};
351
352static struct lookup_proc_table start_proc[4] = {
353 {NULL, ICOM_CONTROL_START_A},
354 {NULL, ICOM_CONTROL_START_B},
355 {NULL, ICOM_CONTROL_START_C},
356 {NULL, ICOM_CONTROL_START_D}
357};
358
359
360static struct lookup_proc_table stop_proc[4] = {
361 {NULL, ICOM_CONTROL_STOP_A},
362 {NULL, ICOM_CONTROL_STOP_B},
363 {NULL, ICOM_CONTROL_STOP_C},
364 {NULL, ICOM_CONTROL_STOP_D}
365};
366
367static struct lookup_int_table int_mask_tbl[4] = {
368 {NULL, ICOM_INT_MASK_PRC_A},
369 {NULL, ICOM_INT_MASK_PRC_B},
370 {NULL, ICOM_INT_MASK_PRC_C},
371 {NULL, ICOM_INT_MASK_PRC_D},
372};
373
374
375MODULE_DEVICE_TABLE(pci, icom_pci_table);
376
377static LIST_HEAD(icom_adapter_head);
378
379/* spinlock for adapter initialization and changing adapter operations */
380static DEFINE_SPINLOCK(icom_lock);
381
382#ifdef ICOM_TRACE
383static inline void trace(struct icom_port *icom_port, char *trace_pt,
384 unsigned long trace_data)
385{
386 dev_info(&icom_port->adapter->pci_dev->dev, ":%d:%s - %lx\n",
387 icom_port->port, trace_pt, trace_data);
388}
389#else
390static inline void trace(struct icom_port *icom_port, char *trace_pt, unsigned long trace_data) {};
391#endif
392static void icom_kref_release(struct kref *kref);
393
394static void free_port_memory(struct icom_port *icom_port)
395{
396 struct pci_dev *dev = icom_port->adapter->pci_dev;
397
398 trace(icom_port, "RET_PORT_MEM", 0);
399 if (icom_port->recv_buf) {
400 dma_free_coherent(&dev->dev, 4096, icom_port->recv_buf,
401 icom_port->recv_buf_pci);
402 icom_port->recv_buf = NULL;
403 }
404 if (icom_port->xmit_buf) {
405 dma_free_coherent(&dev->dev, 4096, icom_port->xmit_buf,
406 icom_port->xmit_buf_pci);
407 icom_port->xmit_buf = NULL;
408 }
409 if (icom_port->statStg) {
410 dma_free_coherent(&dev->dev, 4096, icom_port->statStg,
411 icom_port->statStg_pci);
412 icom_port->statStg = NULL;
413 }
414
415 if (icom_port->xmitRestart) {
416 dma_free_coherent(&dev->dev, 4096, icom_port->xmitRestart,
417 icom_port->xmitRestart_pci);
418 icom_port->xmitRestart = NULL;
419 }
420}
421
422static int get_port_memory(struct icom_port *icom_port)
423{
424 int index;
425 unsigned long stgAddr;
426 unsigned long startStgAddr;
427 unsigned long offset;
428 struct pci_dev *dev = icom_port->adapter->pci_dev;
429
430 icom_port->xmit_buf =
431 dma_alloc_coherent(&dev->dev, 4096, &icom_port->xmit_buf_pci,
432 GFP_KERNEL);
433 if (!icom_port->xmit_buf) {
434 dev_err(&dev->dev, "Can not allocate Transmit buffer\n");
435 return -ENOMEM;
436 }
437
438 trace(icom_port, "GET_PORT_MEM",
439 (unsigned long) icom_port->xmit_buf);
440
441 icom_port->recv_buf =
442 dma_alloc_coherent(&dev->dev, 4096, &icom_port->recv_buf_pci,
443 GFP_KERNEL);
444 if (!icom_port->recv_buf) {
445 dev_err(&dev->dev, "Can not allocate Receive buffer\n");
446 free_port_memory(icom_port);
447 return -ENOMEM;
448 }
449 trace(icom_port, "GET_PORT_MEM",
450 (unsigned long) icom_port->recv_buf);
451
452 icom_port->statStg =
453 dma_alloc_coherent(&dev->dev, 4096, &icom_port->statStg_pci,
454 GFP_KERNEL);
455 if (!icom_port->statStg) {
456 dev_err(&dev->dev, "Can not allocate Status buffer\n");
457 free_port_memory(icom_port);
458 return -ENOMEM;
459 }
460 trace(icom_port, "GET_PORT_MEM",
461 (unsigned long) icom_port->statStg);
462
463 icom_port->xmitRestart =
464 dma_alloc_coherent(&dev->dev, 4096, &icom_port->xmitRestart_pci,
465 GFP_KERNEL);
466 if (!icom_port->xmitRestart) {
467 dev_err(&dev->dev,
468 "Can not allocate xmit Restart buffer\n");
469 free_port_memory(icom_port);
470 return -ENOMEM;
471 }
472
473 /* FODs: Frame Out Descriptor Queue, this is a FIFO queue that
474 indicates that frames are to be transmitted
475 */
476
477 stgAddr = (unsigned long) icom_port->statStg;
478 for (index = 0; index < NUM_XBUFFS; index++) {
479 trace(icom_port, "FOD_ADDR", stgAddr);
480 stgAddr = stgAddr + sizeof(icom_port->statStg->xmit[0]);
481 if (index < (NUM_XBUFFS - 1)) {
482 memset(&icom_port->statStg->xmit[index], 0, sizeof(struct xmit_status_area));
483 icom_port->statStg->xmit[index].leLengthASD =
484 cpu_to_le16(XMIT_BUFF_SZ);
485 trace(icom_port, "FOD_ADDR", stgAddr);
486 trace(icom_port, "FOD_XBUFF",
487 (unsigned long) icom_port->xmit_buf);
488 icom_port->statStg->xmit[index].leBuffer =
489 cpu_to_le32(icom_port->xmit_buf_pci);
490 } else if (index == (NUM_XBUFFS - 1)) {
491 memset(&icom_port->statStg->xmit[index], 0, sizeof(struct xmit_status_area));
492 icom_port->statStg->xmit[index].leLengthASD =
493 cpu_to_le16(XMIT_BUFF_SZ);
494 trace(icom_port, "FOD_XBUFF",
495 (unsigned long) icom_port->xmit_buf);
496 icom_port->statStg->xmit[index].leBuffer =
497 cpu_to_le32(icom_port->xmit_buf_pci);
498 } else {
499 memset(&icom_port->statStg->xmit[index], 0, sizeof(struct xmit_status_area));
500 }
501 }
502 /* FIDs */
503 startStgAddr = stgAddr;
504
505 /* fill in every entry, even if no buffer */
506 for (index = 0; index < NUM_RBUFFS; index++) {
507 trace(icom_port, "FID_ADDR", stgAddr);
508 stgAddr = stgAddr + sizeof(icom_port->statStg->rcv[0]);
509 icom_port->statStg->rcv[index].leLength = 0;
510 icom_port->statStg->rcv[index].WorkingLength =
511 cpu_to_le16(RCV_BUFF_SZ);
512 if (index < (NUM_RBUFFS - 1) ) {
513 offset = stgAddr - (unsigned long) icom_port->statStg;
514 icom_port->statStg->rcv[index].leNext =
515 cpu_to_le32(icom_port-> statStg_pci + offset);
516 trace(icom_port, "FID_RBUFF",
517 (unsigned long) icom_port->recv_buf);
518 icom_port->statStg->rcv[index].leBuffer =
519 cpu_to_le32(icom_port->recv_buf_pci);
520 } else if (index == (NUM_RBUFFS -1) ) {
521 offset = startStgAddr - (unsigned long) icom_port->statStg;
522 icom_port->statStg->rcv[index].leNext =
523 cpu_to_le32(icom_port-> statStg_pci + offset);
524 trace(icom_port, "FID_RBUFF",
525 (unsigned long) icom_port->recv_buf + 2048);
526 icom_port->statStg->rcv[index].leBuffer =
527 cpu_to_le32(icom_port->recv_buf_pci + 2048);
528 } else {
529 icom_port->statStg->rcv[index].leNext = 0;
530 icom_port->statStg->rcv[index].leBuffer = 0;
531 }
532 }
533
534 return 0;
535}
536
537static void stop_processor(struct icom_port *icom_port)
538{
539 unsigned long temp;
540 unsigned long flags;
541 int port;
542
543 spin_lock_irqsave(&icom_lock, flags);
544
545 port = icom_port->port;
546 if (port >= ARRAY_SIZE(stop_proc)) {
547 dev_err(&icom_port->adapter->pci_dev->dev,
548 "Invalid port assignment\n");
549 goto unlock;
550 }
551
552 if (port == 0 || port == 1)
553 stop_proc[port].global_control_reg = &icom_port->global_reg->control;
554 else
555 stop_proc[port].global_control_reg = &icom_port->global_reg->control_2;
556
557 temp = readl(stop_proc[port].global_control_reg);
558 temp = (temp & ~start_proc[port].processor_id) | stop_proc[port].processor_id;
559 writel(temp, stop_proc[port].global_control_reg);
560
561 /* write flush */
562 readl(stop_proc[port].global_control_reg);
563
564unlock:
565 spin_unlock_irqrestore(&icom_lock, flags);
566}
567
568static void start_processor(struct icom_port *icom_port)
569{
570 unsigned long temp;
571 unsigned long flags;
572 int port;
573
574 spin_lock_irqsave(&icom_lock, flags);
575
576 port = icom_port->port;
577 if (port >= ARRAY_SIZE(start_proc)) {
578 dev_err(&icom_port->adapter->pci_dev->dev,
579 "Invalid port assignment\n");
580 goto unlock;
581 }
582
583 if (port == 0 || port == 1)
584 start_proc[port].global_control_reg = &icom_port->global_reg->control;
585 else
586 start_proc[port].global_control_reg = &icom_port->global_reg->control_2;
587
588 temp = readl(start_proc[port].global_control_reg);
589 temp = (temp & ~stop_proc[port].processor_id) | start_proc[port].processor_id;
590 writel(temp, start_proc[port].global_control_reg);
591
592 /* write flush */
593 readl(start_proc[port].global_control_reg);
594
595unlock:
596 spin_unlock_irqrestore(&icom_lock, flags);
597}
598
599static void load_code(struct icom_port *icom_port)
600{
601 const struct firmware *fw;
602 char __iomem *iram_ptr;
603 int index;
604 int status = 0;
605 void __iomem *dram_ptr = icom_port->dram;
606 dma_addr_t temp_pci;
607 unsigned char *new_page = NULL;
608 unsigned char cable_id = NO_CABLE;
609 struct pci_dev *dev = icom_port->adapter->pci_dev;
610
611 /* Clear out any pending interrupts */
612 writew(0x3FFF, icom_port->int_reg);
613
614 trace(icom_port, "CLEAR_INTERRUPTS", 0);
615
616 /* Stop processor */
617 stop_processor(icom_port);
618
619 /* Zero out DRAM */
620 memset_io(dram_ptr, 0, 512);
621
622 /* Load Call Setup into Adapter */
623 if (request_firmware(&fw, "icom_call_setup.bin", &dev->dev) < 0) {
624 dev_err(&dev->dev,"Unable to load icom_call_setup.bin firmware image\n");
625 status = -1;
626 goto load_code_exit;
627 }
628
629 if (fw->size > ICOM_DCE_IRAM_OFFSET) {
630 dev_err(&dev->dev, "Invalid firmware image for icom_call_setup.bin found.\n");
631 release_firmware(fw);
632 status = -1;
633 goto load_code_exit;
634 }
635
636 iram_ptr = (char __iomem *)icom_port->dram + ICOM_IRAM_OFFSET;
637 for (index = 0; index < fw->size; index++)
638 writeb(fw->data[index], &iram_ptr[index]);
639
640 release_firmware(fw);
641
642 /* Load Resident DCE portion of Adapter */
643 if (request_firmware(&fw, "icom_res_dce.bin", &dev->dev) < 0) {
644 dev_err(&dev->dev,"Unable to load icom_res_dce.bin firmware image\n");
645 status = -1;
646 goto load_code_exit;
647 }
648
649 if (fw->size > ICOM_IRAM_SIZE) {
650 dev_err(&dev->dev, "Invalid firmware image for icom_res_dce.bin found.\n");
651 release_firmware(fw);
652 status = -1;
653 goto load_code_exit;
654 }
655
656 iram_ptr = (char __iomem *) icom_port->dram + ICOM_IRAM_OFFSET;
657 for (index = ICOM_DCE_IRAM_OFFSET; index < fw->size; index++)
658 writeb(fw->data[index], &iram_ptr[index]);
659
660 release_firmware(fw);
661
662 /* Set Hardware level */
663 if (icom_port->adapter->version == ADAPTER_V2)
664 writeb(V2_HARDWARE, &(icom_port->dram->misc_flags));
665
666 /* Start the processor in Adapter */
667 start_processor(icom_port);
668
669 writeb((HDLC_PPP_PURE_ASYNC | HDLC_FF_FILL),
670 &(icom_port->dram->HDLCConfigReg));
671 writeb(0x04, &(icom_port->dram->FlagFillIdleTimer)); /* 0.5 seconds */
672 writeb(0x00, &(icom_port->dram->CmdReg));
673 writeb(0x10, &(icom_port->dram->async_config3));
674 writeb((ICOM_ACFG_DRIVE1 | ICOM_ACFG_NO_PARITY | ICOM_ACFG_8BPC |
675 ICOM_ACFG_1STOP_BIT), &(icom_port->dram->async_config2));
676
677 /*Set up data in icom DRAM to indicate where personality
678 *code is located and its length.
679 */
680 new_page = dma_alloc_coherent(&dev->dev, 4096, &temp_pci, GFP_KERNEL);
681
682 if (!new_page) {
683 dev_err(&dev->dev, "Can not allocate DMA buffer\n");
684 status = -1;
685 goto load_code_exit;
686 }
687
688 if (request_firmware(&fw, "icom_asc.bin", &dev->dev) < 0) {
689 dev_err(&dev->dev,"Unable to load icom_asc.bin firmware image\n");
690 status = -1;
691 goto load_code_exit;
692 }
693
694 if (fw->size > ICOM_DCE_IRAM_OFFSET) {
695 dev_err(&dev->dev, "Invalid firmware image for icom_asc.bin found.\n");
696 release_firmware(fw);
697 status = -1;
698 goto load_code_exit;
699 }
700
701 for (index = 0; index < fw->size; index++)
702 new_page[index] = fw->data[index];
703
704 writeb((char) ((fw->size + 16)/16), &icom_port->dram->mac_length);
705 writel(temp_pci, &icom_port->dram->mac_load_addr);
706
707 release_firmware(fw);
708
709 /*Setting the syncReg to 0x80 causes adapter to start downloading
710 the personality code into adapter instruction RAM.
711 Once code is loaded, it will begin executing and, based on
712 information provided above, will start DMAing data from
713 shared memory to adapter DRAM.
714 */
715 /* the wait loop below verifies this write operation has been done
716 and processed
717 */
718 writeb(START_DOWNLOAD, &icom_port->dram->sync);
719
720 /* Wait max 1 Sec for data download and processor to start */
721 for (index = 0; index < 10; index++) {
722 msleep(100);
723 if (readb(&icom_port->dram->misc_flags) & ICOM_HDW_ACTIVE)
724 break;
725 }
726
727 if (index == 10)
728 status = -1;
729
730 /*
731 * check Cable ID
732 */
733 cable_id = readb(&icom_port->dram->cable_id);
734
735 if (cable_id & ICOM_CABLE_ID_VALID) {
736 /* Get cable ID into the lower 4 bits (standard form) */
737 cable_id = (cable_id & ICOM_CABLE_ID_MASK) >> 4;
738 icom_port->cable_id = cable_id;
739 } else {
740 dev_err(&dev->dev,"Invalid or no cable attached\n");
741 icom_port->cable_id = NO_CABLE;
742 }
743
744 load_code_exit:
745
746 if (status != 0) {
747 /* Clear out any pending interrupts */
748 writew(0x3FFF, icom_port->int_reg);
749
750 /* Turn off port */
751 writeb(ICOM_DISABLE, &(icom_port->dram->disable));
752
753 /* Stop processor */
754 stop_processor(icom_port);
755
756 dev_err(&icom_port->adapter->pci_dev->dev,"Port not operational\n");
757 }
758
759 if (new_page != NULL)
760 dma_free_coherent(&dev->dev, 4096, new_page, temp_pci);
761}
762
763static int startup(struct icom_port *icom_port)
764{
765 unsigned long temp;
766 unsigned char cable_id, raw_cable_id;
767 unsigned long flags;
768 int port;
769
770 trace(icom_port, "STARTUP", 0);
771
772 if (!icom_port->dram) {
773 /* should NEVER be NULL */
774 dev_err(&icom_port->adapter->pci_dev->dev,
775 "Unusable Port, port configuration missing\n");
776 return -ENODEV;
777 }
778
779 /*
780 * check Cable ID
781 */
782 raw_cable_id = readb(&icom_port->dram->cable_id);
783 trace(icom_port, "CABLE_ID", raw_cable_id);
784
785 /* Get cable ID into the lower 4 bits (standard form) */
786 cable_id = (raw_cable_id & ICOM_CABLE_ID_MASK) >> 4;
787
788 /* Check for valid Cable ID */
789 if (!(raw_cable_id & ICOM_CABLE_ID_VALID) ||
790 (cable_id != icom_port->cable_id)) {
791
792 /* reload adapter code, pick up any potential changes in cable id */
793 load_code(icom_port);
794
795 /* still no sign of cable, error out */
796 raw_cable_id = readb(&icom_port->dram->cable_id);
797 cable_id = (raw_cable_id & ICOM_CABLE_ID_MASK) >> 4;
798 if (!(raw_cable_id & ICOM_CABLE_ID_VALID) ||
799 (icom_port->cable_id == NO_CABLE))
800 return -EIO;
801 }
802
803 /*
804 * Finally, clear and enable interrupts
805 */
806 spin_lock_irqsave(&icom_lock, flags);
807 port = icom_port->port;
808 if (port >= ARRAY_SIZE(int_mask_tbl)) {
809 dev_err(&icom_port->adapter->pci_dev->dev,
810 "Invalid port assignment\n");
811 goto unlock;
812 }
813
814 if (port == 0 || port == 1)
815 int_mask_tbl[port].global_int_mask = &icom_port->global_reg->int_mask;
816 else
817 int_mask_tbl[port].global_int_mask = &icom_port->global_reg->int_mask_2;
818
819 if (port == 0 || port == 2)
820 writew(0x00FF, icom_port->int_reg);
821 else
822 writew(0x3F00, icom_port->int_reg);
823
824 temp = readl(int_mask_tbl[port].global_int_mask);
825 writel(temp & ~int_mask_tbl[port].processor_id, int_mask_tbl[port].global_int_mask);
826
827 /* write flush */
828 readl(int_mask_tbl[port].global_int_mask);
829
830unlock:
831 spin_unlock_irqrestore(&icom_lock, flags);
832 return 0;
833}
834
835static void shutdown(struct icom_port *icom_port)
836{
837 unsigned long temp;
838 unsigned char cmdReg;
839 unsigned long flags;
840 int port;
841
842 spin_lock_irqsave(&icom_lock, flags);
843 trace(icom_port, "SHUTDOWN", 0);
844
845 /*
846 * disable all interrupts
847 */
848 port = icom_port->port;
849 if (port >= ARRAY_SIZE(int_mask_tbl)) {
850 dev_err(&icom_port->adapter->pci_dev->dev,
851 "Invalid port assignment\n");
852 goto unlock;
853 }
854 if (port == 0 || port == 1)
855 int_mask_tbl[port].global_int_mask = &icom_port->global_reg->int_mask;
856 else
857 int_mask_tbl[port].global_int_mask = &icom_port->global_reg->int_mask_2;
858
859 temp = readl(int_mask_tbl[port].global_int_mask);
860 writel(temp | int_mask_tbl[port].processor_id, int_mask_tbl[port].global_int_mask);
861
862 /* write flush */
863 readl(int_mask_tbl[port].global_int_mask);
864
865unlock:
866 spin_unlock_irqrestore(&icom_lock, flags);
867
868 /*
869 * disable break condition
870 */
871 cmdReg = readb(&icom_port->dram->CmdReg);
872 if (cmdReg & CMD_SND_BREAK) {
873 writeb(cmdReg & ~CMD_SND_BREAK, &icom_port->dram->CmdReg);
874 }
875}
876
877static int icom_write(struct uart_port *port)
878{
879 struct icom_port *icom_port = to_icom_port(port);
880 unsigned long data_count;
881 unsigned char cmdReg;
882 unsigned long offset;
883 int temp_tail = port->state->xmit.tail;
884
885 trace(icom_port, "WRITE", 0);
886
887 if (le16_to_cpu(icom_port->statStg->xmit[0].flags) &
888 SA_FLAGS_READY_TO_XMIT) {
889 trace(icom_port, "WRITE_FULL", 0);
890 return 0;
891 }
892
893 data_count = 0;
894 while ((port->state->xmit.head != temp_tail) &&
895 (data_count <= XMIT_BUFF_SZ)) {
896
897 icom_port->xmit_buf[data_count++] =
898 port->state->xmit.buf[temp_tail];
899
900 temp_tail++;
901 temp_tail &= (UART_XMIT_SIZE - 1);
902 }
903
904 if (data_count) {
905 icom_port->statStg->xmit[0].flags =
906 cpu_to_le16(SA_FLAGS_READY_TO_XMIT);
907 icom_port->statStg->xmit[0].leLength =
908 cpu_to_le16(data_count);
909 offset =
910 (unsigned long) &icom_port->statStg->xmit[0] -
911 (unsigned long) icom_port->statStg;
912 *icom_port->xmitRestart =
913 cpu_to_le32(icom_port->statStg_pci + offset);
914 cmdReg = readb(&icom_port->dram->CmdReg);
915 writeb(cmdReg | CMD_XMIT_RCV_ENABLE,
916 &icom_port->dram->CmdReg);
917 writeb(START_XMIT, &icom_port->dram->StartXmitCmd);
918 trace(icom_port, "WRITE_START", data_count);
919 /* write flush */
920 readb(&icom_port->dram->StartXmitCmd);
921 }
922
923 return data_count;
924}
925
926static inline void check_modem_status(struct icom_port *icom_port)
927{
928 static char old_status = 0;
929 char delta_status;
930 unsigned char status;
931
932 spin_lock(&icom_port->uart_port.lock);
933
934 /*modem input register */
935 status = readb(&icom_port->dram->isr);
936 trace(icom_port, "CHECK_MODEM", status);
937 delta_status = status ^ old_status;
938 if (delta_status) {
939 if (delta_status & ICOM_RI)
940 icom_port->uart_port.icount.rng++;
941 if (delta_status & ICOM_DSR)
942 icom_port->uart_port.icount.dsr++;
943 if (delta_status & ICOM_DCD)
944 uart_handle_dcd_change(&icom_port->uart_port,
945 delta_status & ICOM_DCD);
946 if (delta_status & ICOM_CTS)
947 uart_handle_cts_change(&icom_port->uart_port,
948 delta_status & ICOM_CTS);
949
950 wake_up_interruptible(&icom_port->uart_port.state->
951 port.delta_msr_wait);
952 old_status = status;
953 }
954 spin_unlock(&icom_port->uart_port.lock);
955}
956
957static void xmit_interrupt(u16 port_int_reg, struct icom_port *icom_port)
958{
959 u16 count, i;
960
961 if (port_int_reg & (INT_XMIT_COMPLETED)) {
962 trace(icom_port, "XMIT_COMPLETE", 0);
963
964 /* clear buffer in use bit */
965 icom_port->statStg->xmit[0].flags &=
966 cpu_to_le16(~SA_FLAGS_READY_TO_XMIT);
967
968 count = le16_to_cpu(icom_port->statStg->xmit[0].leLength);
969 icom_port->uart_port.icount.tx += count;
970
971 for (i=0; i<count &&
972 !uart_circ_empty(&icom_port->uart_port.state->xmit); i++) {
973
974 icom_port->uart_port.state->xmit.tail++;
975 icom_port->uart_port.state->xmit.tail &=
976 (UART_XMIT_SIZE - 1);
977 }
978
979 if (!icom_write(&icom_port->uart_port))
980 /* activate write queue */
981 uart_write_wakeup(&icom_port->uart_port);
982 } else
983 trace(icom_port, "XMIT_DISABLED", 0);
984}
985
986static void recv_interrupt(u16 port_int_reg, struct icom_port *icom_port)
987{
988 short int count, rcv_buff;
989 struct tty_port *port = &icom_port->uart_port.state->port;
990 u16 status;
991 struct uart_icount *icount;
992 unsigned long offset;
993 unsigned char flag;
994
995 trace(icom_port, "RCV_COMPLETE", 0);
996 rcv_buff = icom_port->next_rcv;
997
998 status = le16_to_cpu(icom_port->statStg->rcv[rcv_buff].flags);
999 while (status & SA_FL_RCV_DONE) {
1000 int first = -1;
1001
1002 trace(icom_port, "FID_STATUS", status);
1003 count = le16_to_cpu(icom_port->statStg->rcv[rcv_buff].leLength);
1004
1005 trace(icom_port, "RCV_COUNT", count);
1006
1007 trace(icom_port, "REAL_COUNT", count);
1008
1009 offset = le32_to_cpu(icom_port->statStg->rcv[rcv_buff].leBuffer) -
1010 icom_port->recv_buf_pci;
1011
1012 /* Block copy all but the last byte as this may have status */
1013 if (count > 0) {
1014 first = icom_port->recv_buf[offset];
1015 tty_insert_flip_string(port, icom_port->recv_buf + offset, count - 1);
1016 }
1017
1018 icount = &icom_port->uart_port.icount;
1019 icount->rx += count;
1020
1021 /* Break detect logic */
1022 if ((status & SA_FLAGS_FRAME_ERROR)
1023 && first == 0) {
1024 status &= ~SA_FLAGS_FRAME_ERROR;
1025 status |= SA_FLAGS_BREAK_DET;
1026 trace(icom_port, "BREAK_DET", 0);
1027 }
1028
1029 flag = TTY_NORMAL;
1030
1031 if (status &
1032 (SA_FLAGS_BREAK_DET | SA_FLAGS_PARITY_ERROR |
1033 SA_FLAGS_FRAME_ERROR | SA_FLAGS_OVERRUN)) {
1034
1035 if (status & SA_FLAGS_BREAK_DET)
1036 icount->brk++;
1037 if (status & SA_FLAGS_PARITY_ERROR)
1038 icount->parity++;
1039 if (status & SA_FLAGS_FRAME_ERROR)
1040 icount->frame++;
1041 if (status & SA_FLAGS_OVERRUN)
1042 icount->overrun++;
1043
1044 /*
1045 * Now check to see if character should be
1046 * ignored, and mask off conditions which
1047 * should be ignored.
1048 */
1049 if (status & icom_port->ignore_status_mask) {
1050 trace(icom_port, "IGNORE_CHAR", 0);
1051 goto ignore_char;
1052 }
1053
1054 status &= icom_port->read_status_mask;
1055
1056 if (status & SA_FLAGS_BREAK_DET) {
1057 flag = TTY_BREAK;
1058 } else if (status & SA_FLAGS_PARITY_ERROR) {
1059 trace(icom_port, "PARITY_ERROR", 0);
1060 flag = TTY_PARITY;
1061 } else if (status & SA_FLAGS_FRAME_ERROR)
1062 flag = TTY_FRAME;
1063
1064 }
1065
1066 tty_insert_flip_char(port, *(icom_port->recv_buf + offset + count - 1), flag);
1067
1068 if (status & SA_FLAGS_OVERRUN)
1069 /*
1070 * Overrun is special, since it's
1071 * reported immediately, and doesn't
1072 * affect the current character
1073 */
1074 tty_insert_flip_char(port, 0, TTY_OVERRUN);
1075ignore_char:
1076 icom_port->statStg->rcv[rcv_buff].flags = 0;
1077 icom_port->statStg->rcv[rcv_buff].leLength = 0;
1078 icom_port->statStg->rcv[rcv_buff].WorkingLength =
1079 cpu_to_le16(RCV_BUFF_SZ);
1080
1081 rcv_buff++;
1082 if (rcv_buff == NUM_RBUFFS)
1083 rcv_buff = 0;
1084
1085 status = le16_to_cpu(icom_port->statStg->rcv[rcv_buff].flags);
1086 }
1087 icom_port->next_rcv = rcv_buff;
1088
1089 tty_flip_buffer_push(port);
1090}
1091
1092static void process_interrupt(u16 port_int_reg,
1093 struct icom_port *icom_port)
1094{
1095
1096 spin_lock(&icom_port->uart_port.lock);
1097 trace(icom_port, "INTERRUPT", port_int_reg);
1098
1099 if (port_int_reg & (INT_XMIT_COMPLETED | INT_XMIT_DISABLED))
1100 xmit_interrupt(port_int_reg, icom_port);
1101
1102 if (port_int_reg & INT_RCV_COMPLETED)
1103 recv_interrupt(port_int_reg, icom_port);
1104
1105 spin_unlock(&icom_port->uart_port.lock);
1106}
1107
1108static irqreturn_t icom_interrupt(int irq, void *dev_id)
1109{
1110 void __iomem * int_reg;
1111 u32 adapter_interrupts;
1112 u16 port_int_reg;
1113 struct icom_adapter *icom_adapter;
1114 struct icom_port *icom_port;
1115
1116 /* find icom_port for this interrupt */
1117 icom_adapter = (struct icom_adapter *) dev_id;
1118
1119 if (icom_adapter->version == ADAPTER_V2) {
1120 int_reg = icom_adapter->base_addr + 0x8024;
1121
1122 adapter_interrupts = readl(int_reg);
1123
1124 if (adapter_interrupts & 0x00003FFF) {
1125 /* port 2 interrupt, NOTE: for all ADAPTER_V2, port 2 will be active */
1126 icom_port = &icom_adapter->port_info[2];
1127 port_int_reg = (u16) adapter_interrupts;
1128 process_interrupt(port_int_reg, icom_port);
1129 check_modem_status(icom_port);
1130 }
1131 if (adapter_interrupts & 0x3FFF0000) {
1132 /* port 3 interrupt */
1133 icom_port = &icom_adapter->port_info[3];
1134 if (icom_port->status == ICOM_PORT_ACTIVE) {
1135 port_int_reg =
1136 (u16) (adapter_interrupts >> 16);
1137 process_interrupt(port_int_reg, icom_port);
1138 check_modem_status(icom_port);
1139 }
1140 }
1141
1142 /* Clear out any pending interrupts */
1143 writel(adapter_interrupts, int_reg);
1144
1145 int_reg = icom_adapter->base_addr + 0x8004;
1146 } else {
1147 int_reg = icom_adapter->base_addr + 0x4004;
1148 }
1149
1150 adapter_interrupts = readl(int_reg);
1151
1152 if (adapter_interrupts & 0x00003FFF) {
1153 /* port 0 interrupt, NOTE: for all adapters, port 0 will be active */
1154 icom_port = &icom_adapter->port_info[0];
1155 port_int_reg = (u16) adapter_interrupts;
1156 process_interrupt(port_int_reg, icom_port);
1157 check_modem_status(icom_port);
1158 }
1159 if (adapter_interrupts & 0x3FFF0000) {
1160 /* port 1 interrupt */
1161 icom_port = &icom_adapter->port_info[1];
1162 if (icom_port->status == ICOM_PORT_ACTIVE) {
1163 port_int_reg = (u16) (adapter_interrupts >> 16);
1164 process_interrupt(port_int_reg, icom_port);
1165 check_modem_status(icom_port);
1166 }
1167 }
1168
1169 /* Clear out any pending interrupts */
1170 writel(adapter_interrupts, int_reg);
1171
1172 /* flush the write */
1173 adapter_interrupts = readl(int_reg);
1174
1175 return IRQ_HANDLED;
1176}
1177
1178/*
1179 * ------------------------------------------------------------------
1180 * Begin serial-core API
1181 * ------------------------------------------------------------------
1182 */
1183static unsigned int icom_tx_empty(struct uart_port *port)
1184{
1185 struct icom_port *icom_port = to_icom_port(port);
1186 int ret;
1187 unsigned long flags;
1188
1189 spin_lock_irqsave(&port->lock, flags);
1190 if (le16_to_cpu(icom_port->statStg->xmit[0].flags) &
1191 SA_FLAGS_READY_TO_XMIT)
1192 ret = TIOCSER_TEMT;
1193 else
1194 ret = 0;
1195
1196 spin_unlock_irqrestore(&port->lock, flags);
1197 return ret;
1198}
1199
1200static void icom_set_mctrl(struct uart_port *port, unsigned int mctrl)
1201{
1202 struct icom_port *icom_port = to_icom_port(port);
1203 unsigned char local_osr;
1204
1205 trace(icom_port, "SET_MODEM", 0);
1206 local_osr = readb(&icom_port->dram->osr);
1207
1208 if (mctrl & TIOCM_RTS) {
1209 trace(icom_port, "RAISE_RTS", 0);
1210 local_osr |= ICOM_RTS;
1211 } else {
1212 trace(icom_port, "LOWER_RTS", 0);
1213 local_osr &= ~ICOM_RTS;
1214 }
1215
1216 if (mctrl & TIOCM_DTR) {
1217 trace(icom_port, "RAISE_DTR", 0);
1218 local_osr |= ICOM_DTR;
1219 } else {
1220 trace(icom_port, "LOWER_DTR", 0);
1221 local_osr &= ~ICOM_DTR;
1222 }
1223
1224 writeb(local_osr, &icom_port->dram->osr);
1225}
1226
1227static unsigned int icom_get_mctrl(struct uart_port *port)
1228{
1229 struct icom_port *icom_port = to_icom_port(port);
1230 unsigned char status;
1231 unsigned int result;
1232
1233 trace(icom_port, "GET_MODEM", 0);
1234
1235 status = readb(&icom_port->dram->isr);
1236
1237 result = ((status & ICOM_DCD) ? TIOCM_CAR : 0)
1238 | ((status & ICOM_RI) ? TIOCM_RNG : 0)
1239 | ((status & ICOM_DSR) ? TIOCM_DSR : 0)
1240 | ((status & ICOM_CTS) ? TIOCM_CTS : 0);
1241 return result;
1242}
1243
1244static void icom_stop_tx(struct uart_port *port)
1245{
1246 struct icom_port *icom_port = to_icom_port(port);
1247 unsigned char cmdReg;
1248
1249 trace(icom_port, "STOP", 0);
1250 cmdReg = readb(&icom_port->dram->CmdReg);
1251 writeb(cmdReg | CMD_HOLD_XMIT, &icom_port->dram->CmdReg);
1252}
1253
1254static void icom_start_tx(struct uart_port *port)
1255{
1256 struct icom_port *icom_port = to_icom_port(port);
1257 unsigned char cmdReg;
1258
1259 trace(icom_port, "START", 0);
1260 cmdReg = readb(&icom_port->dram->CmdReg);
1261 if ((cmdReg & CMD_HOLD_XMIT) == CMD_HOLD_XMIT)
1262 writeb(cmdReg & ~CMD_HOLD_XMIT,
1263 &icom_port->dram->CmdReg);
1264
1265 icom_write(port);
1266}
1267
1268static void icom_send_xchar(struct uart_port *port, char ch)
1269{
1270 struct icom_port *icom_port = to_icom_port(port);
1271 unsigned char xdata;
1272 int index;
1273 unsigned long flags;
1274
1275 trace(icom_port, "SEND_XCHAR", ch);
1276
1277 /* wait .1 sec to send char */
1278 for (index = 0; index < 10; index++) {
1279 spin_lock_irqsave(&port->lock, flags);
1280 xdata = readb(&icom_port->dram->xchar);
1281 if (xdata == 0x00) {
1282 trace(icom_port, "QUICK_WRITE", 0);
1283 writeb(ch, &icom_port->dram->xchar);
1284
1285 /* flush write operation */
1286 xdata = readb(&icom_port->dram->xchar);
1287 spin_unlock_irqrestore(&port->lock, flags);
1288 break;
1289 }
1290 spin_unlock_irqrestore(&port->lock, flags);
1291 msleep(10);
1292 }
1293}
1294
1295static void icom_stop_rx(struct uart_port *port)
1296{
1297 struct icom_port *icom_port = to_icom_port(port);
1298 unsigned char cmdReg;
1299
1300 cmdReg = readb(&icom_port->dram->CmdReg);
1301 writeb(cmdReg & ~CMD_RCV_ENABLE, &icom_port->dram->CmdReg);
1302}
1303
1304static void icom_break(struct uart_port *port, int break_state)
1305{
1306 struct icom_port *icom_port = to_icom_port(port);
1307 unsigned char cmdReg;
1308 unsigned long flags;
1309
1310 spin_lock_irqsave(&port->lock, flags);
1311 trace(icom_port, "BREAK", 0);
1312 cmdReg = readb(&icom_port->dram->CmdReg);
1313 if (break_state == -1) {
1314 writeb(cmdReg | CMD_SND_BREAK, &icom_port->dram->CmdReg);
1315 } else {
1316 writeb(cmdReg & ~CMD_SND_BREAK, &icom_port->dram->CmdReg);
1317 }
1318 spin_unlock_irqrestore(&port->lock, flags);
1319}
1320
1321static int icom_open(struct uart_port *port)
1322{
1323 struct icom_port *icom_port = to_icom_port(port);
1324 int retval;
1325
1326 kref_get(&icom_port->adapter->kref);
1327 retval = startup(icom_port);
1328
1329 if (retval) {
1330 kref_put(&icom_port->adapter->kref, icom_kref_release);
1331 trace(icom_port, "STARTUP_ERROR", 0);
1332 return retval;
1333 }
1334
1335 return 0;
1336}
1337
1338static void icom_close(struct uart_port *port)
1339{
1340 struct icom_port *icom_port = to_icom_port(port);
1341 unsigned char cmdReg;
1342
1343 trace(icom_port, "CLOSE", 0);
1344
1345 /* stop receiver */
1346 cmdReg = readb(&icom_port->dram->CmdReg);
1347 writeb(cmdReg & ~CMD_RCV_ENABLE, &icom_port->dram->CmdReg);
1348
1349 shutdown(icom_port);
1350
1351 kref_put(&icom_port->adapter->kref, icom_kref_release);
1352}
1353
1354static void icom_set_termios(struct uart_port *port, struct ktermios *termios,
1355 const struct ktermios *old_termios)
1356{
1357 struct icom_port *icom_port = to_icom_port(port);
1358 int baud;
1359 unsigned cflag, iflag;
1360 char new_config2;
1361 char new_config3 = 0;
1362 char tmp_byte;
1363 int index;
1364 int rcv_buff, xmit_buff;
1365 unsigned long offset;
1366 unsigned long flags;
1367
1368 spin_lock_irqsave(&port->lock, flags);
1369 trace(icom_port, "CHANGE_SPEED", 0);
1370
1371 cflag = termios->c_cflag;
1372 iflag = termios->c_iflag;
1373
1374 new_config2 = ICOM_ACFG_DRIVE1;
1375
1376 /* byte size and parity */
1377 switch (cflag & CSIZE) {
1378 case CS5: /* 5 bits/char */
1379 new_config2 |= ICOM_ACFG_5BPC;
1380 break;
1381 case CS6: /* 6 bits/char */
1382 new_config2 |= ICOM_ACFG_6BPC;
1383 break;
1384 case CS7: /* 7 bits/char */
1385 new_config2 |= ICOM_ACFG_7BPC;
1386 break;
1387 case CS8: /* 8 bits/char */
1388 new_config2 |= ICOM_ACFG_8BPC;
1389 break;
1390 default:
1391 break;
1392 }
1393 if (cflag & CSTOPB) {
1394 /* 2 stop bits */
1395 new_config2 |= ICOM_ACFG_2STOP_BIT;
1396 }
1397 if (cflag & PARENB) {
1398 /* parity bit enabled */
1399 new_config2 |= ICOM_ACFG_PARITY_ENAB;
1400 trace(icom_port, "PARENB", 0);
1401 }
1402 if (cflag & PARODD) {
1403 /* odd parity */
1404 new_config2 |= ICOM_ACFG_PARITY_ODD;
1405 trace(icom_port, "PARODD", 0);
1406 }
1407
1408 /* Determine divisor based on baud rate */
1409 baud = uart_get_baud_rate(port, termios, old_termios,
1410 icom_acfg_baud[0],
1411 icom_acfg_baud[BAUD_TABLE_LIMIT]);
1412 if (!baud)
1413 baud = 9600; /* B0 transition handled in rs_set_termios */
1414
1415 for (index = 0; index < BAUD_TABLE_LIMIT; index++) {
1416 if (icom_acfg_baud[index] == baud) {
1417 new_config3 = index;
1418 break;
1419 }
1420 }
1421
1422 uart_update_timeout(port, cflag, baud);
1423
1424 /* CTS flow control flag and modem status interrupts */
1425 tmp_byte = readb(&(icom_port->dram->HDLCConfigReg));
1426 if (cflag & CRTSCTS)
1427 tmp_byte |= HDLC_HDW_FLOW;
1428 else
1429 tmp_byte &= ~HDLC_HDW_FLOW;
1430 writeb(tmp_byte, &(icom_port->dram->HDLCConfigReg));
1431
1432 /*
1433 * Set up parity check flag
1434 */
1435 icom_port->read_status_mask = SA_FLAGS_OVERRUN | SA_FL_RCV_DONE;
1436 if (iflag & INPCK)
1437 icom_port->read_status_mask |=
1438 SA_FLAGS_FRAME_ERROR | SA_FLAGS_PARITY_ERROR;
1439
1440 if ((iflag & BRKINT) || (iflag & PARMRK))
1441 icom_port->read_status_mask |= SA_FLAGS_BREAK_DET;
1442
1443 /*
1444 * Characters to ignore
1445 */
1446 icom_port->ignore_status_mask = 0;
1447 if (iflag & IGNPAR)
1448 icom_port->ignore_status_mask |=
1449 SA_FLAGS_PARITY_ERROR | SA_FLAGS_FRAME_ERROR;
1450 if (iflag & IGNBRK) {
1451 icom_port->ignore_status_mask |= SA_FLAGS_BREAK_DET;
1452 /*
1453 * If we're ignore parity and break indicators, ignore
1454 * overruns too. (For real raw support).
1455 */
1456 if (iflag & IGNPAR)
1457 icom_port->ignore_status_mask |= SA_FLAGS_OVERRUN;
1458 }
1459
1460 /*
1461 * !!! ignore all characters if CREAD is not set
1462 */
1463 if ((cflag & CREAD) == 0)
1464 icom_port->ignore_status_mask |= SA_FL_RCV_DONE;
1465
1466 /* Turn off Receiver to prepare for reset */
1467 writeb(CMD_RCV_DISABLE, &icom_port->dram->CmdReg);
1468
1469 for (index = 0; index < 10; index++) {
1470 if (readb(&icom_port->dram->PrevCmdReg) == 0x00) {
1471 break;
1472 }
1473 }
1474
1475 /* clear all current buffers of data */
1476 for (rcv_buff = 0; rcv_buff < NUM_RBUFFS; rcv_buff++) {
1477 icom_port->statStg->rcv[rcv_buff].flags = 0;
1478 icom_port->statStg->rcv[rcv_buff].leLength = 0;
1479 icom_port->statStg->rcv[rcv_buff].WorkingLength =
1480 cpu_to_le16(RCV_BUFF_SZ);
1481 }
1482
1483 for (xmit_buff = 0; xmit_buff < NUM_XBUFFS; xmit_buff++) {
1484 icom_port->statStg->xmit[xmit_buff].flags = 0;
1485 }
1486
1487 /* activate changes and start xmit and receiver here */
1488 /* Enable the receiver */
1489 writeb(new_config3, &(icom_port->dram->async_config3));
1490 writeb(new_config2, &(icom_port->dram->async_config2));
1491 tmp_byte = readb(&(icom_port->dram->HDLCConfigReg));
1492 tmp_byte |= HDLC_PPP_PURE_ASYNC | HDLC_FF_FILL;
1493 writeb(tmp_byte, &(icom_port->dram->HDLCConfigReg));
1494 writeb(0x04, &(icom_port->dram->FlagFillIdleTimer)); /* 0.5 seconds */
1495 writeb(0xFF, &(icom_port->dram->ier)); /* enable modem signal interrupts */
1496
1497 /* reset processor */
1498 writeb(CMD_RESTART, &icom_port->dram->CmdReg);
1499
1500 for (index = 0; index < 10; index++) {
1501 if (readb(&icom_port->dram->CmdReg) == 0x00) {
1502 break;
1503 }
1504 }
1505
1506 /* Enable Transmitter and Receiver */
1507 offset =
1508 (unsigned long) &icom_port->statStg->rcv[0] -
1509 (unsigned long) icom_port->statStg;
1510 writel(icom_port->statStg_pci + offset,
1511 &icom_port->dram->RcvStatusAddr);
1512 icom_port->next_rcv = 0;
1513 *icom_port->xmitRestart = 0;
1514 writel(icom_port->xmitRestart_pci,
1515 &icom_port->dram->XmitStatusAddr);
1516 trace(icom_port, "XR_ENAB", 0);
1517 writeb(CMD_XMIT_RCV_ENABLE, &icom_port->dram->CmdReg);
1518
1519 spin_unlock_irqrestore(&port->lock, flags);
1520}
1521
1522static const char *icom_type(struct uart_port *port)
1523{
1524 return "icom";
1525}
1526
1527static void icom_config_port(struct uart_port *port, int flags)
1528{
1529 port->type = PORT_ICOM;
1530}
1531
1532static const struct uart_ops icom_ops = {
1533 .tx_empty = icom_tx_empty,
1534 .set_mctrl = icom_set_mctrl,
1535 .get_mctrl = icom_get_mctrl,
1536 .stop_tx = icom_stop_tx,
1537 .start_tx = icom_start_tx,
1538 .send_xchar = icom_send_xchar,
1539 .stop_rx = icom_stop_rx,
1540 .break_ctl = icom_break,
1541 .startup = icom_open,
1542 .shutdown = icom_close,
1543 .set_termios = icom_set_termios,
1544 .type = icom_type,
1545 .config_port = icom_config_port,
1546};
1547
1548#define ICOM_CONSOLE NULL
1549
1550static struct uart_driver icom_uart_driver = {
1551 .owner = THIS_MODULE,
1552 .driver_name = ICOM_DRIVER_NAME,
1553 .dev_name = "ttyA",
1554 .major = ICOM_MAJOR,
1555 .minor = ICOM_MINOR_START,
1556 .nr = NR_PORTS,
1557 .cons = ICOM_CONSOLE,
1558};
1559
1560static int icom_init_ports(struct icom_adapter *icom_adapter)
1561{
1562 u32 subsystem_id = icom_adapter->subsystem_id;
1563 int i;
1564 struct icom_port *icom_port;
1565
1566 if (icom_adapter->version == ADAPTER_V1) {
1567 icom_adapter->numb_ports = 2;
1568
1569 for (i = 0; i < 2; i++) {
1570 icom_port = &icom_adapter->port_info[i];
1571 icom_port->port = i;
1572 icom_port->status = ICOM_PORT_ACTIVE;
1573 }
1574 } else {
1575 if (subsystem_id == PCI_DEVICE_ID_IBM_ICOM_FOUR_PORT_MODEL) {
1576 icom_adapter->numb_ports = 4;
1577
1578 for (i = 0; i < 4; i++) {
1579 icom_port = &icom_adapter->port_info[i];
1580
1581 icom_port->port = i;
1582 icom_port->status = ICOM_PORT_ACTIVE;
1583 }
1584 } else {
1585 icom_adapter->numb_ports = 4;
1586
1587 icom_adapter->port_info[0].port = 0;
1588 icom_adapter->port_info[0].status = ICOM_PORT_ACTIVE;
1589 icom_adapter->port_info[1].status = ICOM_PORT_OFF;
1590 icom_adapter->port_info[2].port = 2;
1591 icom_adapter->port_info[2].status = ICOM_PORT_ACTIVE;
1592 icom_adapter->port_info[3].status = ICOM_PORT_OFF;
1593 }
1594 }
1595
1596 return 0;
1597}
1598
1599static void icom_port_active(struct icom_port *icom_port, struct icom_adapter *icom_adapter, int port_num)
1600{
1601 if (icom_adapter->version == ADAPTER_V1) {
1602 icom_port->global_reg = icom_adapter->base_addr + 0x4000;
1603 icom_port->int_reg = icom_adapter->base_addr +
1604 0x4004 + 2 - 2 * port_num;
1605 } else {
1606 icom_port->global_reg = icom_adapter->base_addr + 0x8000;
1607 if (icom_port->port < 2)
1608 icom_port->int_reg = icom_adapter->base_addr +
1609 0x8004 + 2 - 2 * icom_port->port;
1610 else
1611 icom_port->int_reg = icom_adapter->base_addr +
1612 0x8024 + 2 - 2 * (icom_port->port - 2);
1613 }
1614}
1615static int icom_load_ports(struct icom_adapter *icom_adapter)
1616{
1617 struct icom_port *icom_port;
1618 int port_num;
1619
1620 for (port_num = 0; port_num < icom_adapter->numb_ports; port_num++) {
1621
1622 icom_port = &icom_adapter->port_info[port_num];
1623
1624 if (icom_port->status == ICOM_PORT_ACTIVE) {
1625 icom_port_active(icom_port, icom_adapter, port_num);
1626 icom_port->dram = icom_adapter->base_addr +
1627 0x2000 * icom_port->port;
1628
1629 icom_port->adapter = icom_adapter;
1630
1631 /* get port memory */
1632 if (get_port_memory(icom_port) != 0) {
1633 dev_err(&icom_port->adapter->pci_dev->dev,
1634 "Memory allocation for port FAILED\n");
1635 }
1636 }
1637 }
1638 return 0;
1639}
1640
1641static int icom_alloc_adapter(struct icom_adapter
1642 **icom_adapter_ref)
1643{
1644 int adapter_count = 0;
1645 struct icom_adapter *icom_adapter;
1646 struct icom_adapter *cur_adapter_entry;
1647
1648 icom_adapter = kzalloc(sizeof(struct icom_adapter), GFP_KERNEL);
1649
1650 if (!icom_adapter) {
1651 return -ENOMEM;
1652 }
1653
1654 list_for_each_entry(cur_adapter_entry, &icom_adapter_head,
1655 icom_adapter_entry) {
1656 if (cur_adapter_entry->index != adapter_count) {
1657 break;
1658 }
1659 adapter_count++;
1660 }
1661
1662 icom_adapter->index = adapter_count;
1663 list_add_tail(&icom_adapter->icom_adapter_entry,
1664 &cur_adapter_entry->icom_adapter_entry);
1665
1666 *icom_adapter_ref = icom_adapter;
1667 return 0;
1668}
1669
1670static void icom_free_adapter(struct icom_adapter *icom_adapter)
1671{
1672 list_del(&icom_adapter->icom_adapter_entry);
1673 kfree(icom_adapter);
1674}
1675
1676static void icom_kref_release(struct kref *kref)
1677{
1678 struct icom_adapter *icom_adapter = container_of(kref,
1679 struct icom_adapter, kref);
1680 struct icom_port *icom_port;
1681 int index;
1682
1683 for (index = 0; index < icom_adapter->numb_ports; index++) {
1684 icom_port = &icom_adapter->port_info[index];
1685
1686 if (icom_port->status == ICOM_PORT_ACTIVE) {
1687 dev_info(&icom_adapter->pci_dev->dev,
1688 "Device removed\n");
1689
1690 uart_remove_one_port(&icom_uart_driver,
1691 &icom_port->uart_port);
1692
1693 /* be sure that DTR and RTS are dropped */
1694 writeb(0x00, &icom_port->dram->osr);
1695
1696 /* Wait 0.1 Sec for simple Init to complete */
1697 msleep(100);
1698
1699 /* Stop proccessor */
1700 stop_processor(icom_port);
1701
1702 free_port_memory(icom_port);
1703 }
1704 }
1705
1706 free_irq(icom_adapter->pci_dev->irq, (void *) icom_adapter);
1707 iounmap(icom_adapter->base_addr);
1708 pci_release_regions(icom_adapter->pci_dev);
1709 icom_free_adapter(icom_adapter);
1710}
1711
1712static int icom_probe(struct pci_dev *dev,
1713 const struct pci_device_id *ent)
1714{
1715 int index;
1716 unsigned int command_reg;
1717 int retval;
1718 struct icom_adapter *icom_adapter;
1719 struct icom_port *icom_port;
1720
1721 retval = pci_enable_device(dev);
1722 if (retval) {
1723 dev_err(&dev->dev, "Device enable FAILED\n");
1724 return retval;
1725 }
1726
1727 retval = pci_request_regions(dev, "icom");
1728 if (retval) {
1729 dev_err(&dev->dev, "pci_request_regions FAILED\n");
1730 pci_disable_device(dev);
1731 return retval;
1732 }
1733
1734 pci_set_master(dev);
1735
1736 retval = pci_read_config_dword(dev, PCI_COMMAND, &command_reg);
1737 if (retval) {
1738 dev_err(&dev->dev, "PCI Config read FAILED\n");
1739 goto probe_exit0;
1740 }
1741
1742 pci_write_config_dword(dev, PCI_COMMAND,
1743 command_reg | PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER
1744 | PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
1745
1746 if (ent->driver_data == ADAPTER_V1) {
1747 pci_write_config_dword(dev, 0x44, 0x8300830A);
1748 } else {
1749 pci_write_config_dword(dev, 0x44, 0x42004200);
1750 pci_write_config_dword(dev, 0x48, 0x42004200);
1751 }
1752
1753
1754 retval = icom_alloc_adapter(&icom_adapter);
1755 if (retval) {
1756 dev_err(&dev->dev, "icom_alloc_adapter FAILED\n");
1757 retval = -EIO;
1758 goto probe_exit0;
1759 }
1760
1761 icom_adapter->base_addr_pci = pci_resource_start(dev, 0);
1762 icom_adapter->pci_dev = dev;
1763 icom_adapter->version = ent->driver_data;
1764 icom_adapter->subsystem_id = ent->subdevice;
1765
1766
1767 retval = icom_init_ports(icom_adapter);
1768 if (retval) {
1769 dev_err(&dev->dev, "Port configuration failed\n");
1770 goto probe_exit1;
1771 }
1772
1773 icom_adapter->base_addr = pci_ioremap_bar(dev, 0);
1774
1775 if (!icom_adapter->base_addr) {
1776 retval = -ENOMEM;
1777 goto probe_exit1;
1778 }
1779
1780 /* save off irq and request irq line */
1781 retval = request_irq(dev->irq, icom_interrupt, IRQF_SHARED, ICOM_DRIVER_NAME, (void *)icom_adapter);
1782 if (retval) {
1783 goto probe_exit2;
1784 }
1785
1786 retval = icom_load_ports(icom_adapter);
1787
1788 for (index = 0; index < icom_adapter->numb_ports; index++) {
1789 icom_port = &icom_adapter->port_info[index];
1790
1791 if (icom_port->status == ICOM_PORT_ACTIVE) {
1792 icom_port->uart_port.irq = icom_port->adapter->pci_dev->irq;
1793 icom_port->uart_port.type = PORT_ICOM;
1794 icom_port->uart_port.iotype = UPIO_MEM;
1795 icom_port->uart_port.membase =
1796 (unsigned char __iomem *)icom_adapter->base_addr_pci;
1797 icom_port->uart_port.fifosize = 16;
1798 icom_port->uart_port.ops = &icom_ops;
1799 icom_port->uart_port.line =
1800 icom_port->port + icom_adapter->index * 4;
1801 if (uart_add_one_port (&icom_uart_driver, &icom_port->uart_port)) {
1802 icom_port->status = ICOM_PORT_OFF;
1803 dev_err(&dev->dev, "Device add failed\n");
1804 } else
1805 dev_info(&dev->dev, "Device added\n");
1806 }
1807 }
1808
1809 kref_init(&icom_adapter->kref);
1810 return 0;
1811
1812probe_exit2:
1813 iounmap(icom_adapter->base_addr);
1814probe_exit1:
1815 icom_free_adapter(icom_adapter);
1816
1817probe_exit0:
1818 pci_release_regions(dev);
1819 pci_disable_device(dev);
1820
1821 return retval;
1822}
1823
1824static void icom_remove(struct pci_dev *dev)
1825{
1826 struct icom_adapter *icom_adapter;
1827
1828 list_for_each_entry(icom_adapter, &icom_adapter_head,
1829 icom_adapter_entry) {
1830 if (icom_adapter->pci_dev == dev) {
1831 kref_put(&icom_adapter->kref, icom_kref_release);
1832 return;
1833 }
1834 }
1835
1836 dev_err(&dev->dev, "Unable to find device to remove\n");
1837}
1838
1839static struct pci_driver icom_pci_driver = {
1840 .name = ICOM_DRIVER_NAME,
1841 .id_table = icom_pci_table,
1842 .probe = icom_probe,
1843 .remove = icom_remove,
1844};
1845
1846static int __init icom_init(void)
1847{
1848 int ret;
1849
1850 ret = uart_register_driver(&icom_uart_driver);
1851 if (ret)
1852 return ret;
1853
1854 ret = pci_register_driver(&icom_pci_driver);
1855
1856 if (ret < 0)
1857 uart_unregister_driver(&icom_uart_driver);
1858
1859 return ret;
1860}
1861
1862static void __exit icom_exit(void)
1863{
1864 pci_unregister_driver(&icom_pci_driver);
1865 uart_unregister_driver(&icom_uart_driver);
1866}
1867
1868module_init(icom_init);
1869module_exit(icom_exit);
1870
1871MODULE_AUTHOR("Michael Anderson <mjanders@us.ibm.com>");
1872MODULE_DESCRIPTION("IBM iSeries Serial IOA driver");
1873MODULE_LICENSE("GPL");
1874MODULE_FIRMWARE("icom_call_setup.bin");
1875MODULE_FIRMWARE("icom_res_dce.bin");
1876MODULE_FIRMWARE("icom_asc.bin");
1/*
2 * icom.c
3 *
4 * Copyright (C) 2001 IBM Corporation. All rights reserved.
5 *
6 * Serial device driver.
7 *
8 * Based on code from serial.c
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
14 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
23 *
24 */
25#define SERIAL_DO_RESTART
26#include <linux/module.h>
27#include <linux/kernel.h>
28#include <linux/errno.h>
29#include <linux/signal.h>
30#include <linux/timer.h>
31#include <linux/interrupt.h>
32#include <linux/tty.h>
33#include <linux/termios.h>
34#include <linux/fs.h>
35#include <linux/tty_flip.h>
36#include <linux/serial.h>
37#include <linux/serial_reg.h>
38#include <linux/major.h>
39#include <linux/string.h>
40#include <linux/fcntl.h>
41#include <linux/ptrace.h>
42#include <linux/ioport.h>
43#include <linux/mm.h>
44#include <linux/slab.h>
45#include <linux/init.h>
46#include <linux/delay.h>
47#include <linux/pci.h>
48#include <linux/vmalloc.h>
49#include <linux/smp.h>
50#include <linux/spinlock.h>
51#include <linux/kref.h>
52#include <linux/firmware.h>
53#include <linux/bitops.h>
54
55#include <asm/io.h>
56#include <asm/irq.h>
57#include <asm/uaccess.h>
58
59#include "icom.h"
60
61/*#define ICOM_TRACE enable port trace capabilities */
62
63#define ICOM_DRIVER_NAME "icom"
64#define ICOM_VERSION_STR "1.3.1"
65#define NR_PORTS 128
66#define ICOM_PORT ((struct icom_port *)port)
67#define to_icom_adapter(d) container_of(d, struct icom_adapter, kref)
68
69static const struct pci_device_id icom_pci_table[] = {
70 {
71 .vendor = PCI_VENDOR_ID_IBM,
72 .device = PCI_DEVICE_ID_IBM_ICOM_DEV_ID_1,
73 .subvendor = PCI_ANY_ID,
74 .subdevice = PCI_ANY_ID,
75 .driver_data = ADAPTER_V1,
76 },
77 {
78 .vendor = PCI_VENDOR_ID_IBM,
79 .device = PCI_DEVICE_ID_IBM_ICOM_DEV_ID_2,
80 .subvendor = PCI_VENDOR_ID_IBM,
81 .subdevice = PCI_DEVICE_ID_IBM_ICOM_V2_TWO_PORTS_RVX,
82 .driver_data = ADAPTER_V2,
83 },
84 {
85 .vendor = PCI_VENDOR_ID_IBM,
86 .device = PCI_DEVICE_ID_IBM_ICOM_DEV_ID_2,
87 .subvendor = PCI_VENDOR_ID_IBM,
88 .subdevice = PCI_DEVICE_ID_IBM_ICOM_V2_ONE_PORT_RVX_ONE_PORT_MDM,
89 .driver_data = ADAPTER_V2,
90 },
91 {
92 .vendor = PCI_VENDOR_ID_IBM,
93 .device = PCI_DEVICE_ID_IBM_ICOM_DEV_ID_2,
94 .subvendor = PCI_VENDOR_ID_IBM,
95 .subdevice = PCI_DEVICE_ID_IBM_ICOM_FOUR_PORT_MODEL,
96 .driver_data = ADAPTER_V2,
97 },
98 {
99 .vendor = PCI_VENDOR_ID_IBM,
100 .device = PCI_DEVICE_ID_IBM_ICOM_DEV_ID_2,
101 .subvendor = PCI_VENDOR_ID_IBM,
102 .subdevice = PCI_DEVICE_ID_IBM_ICOM_V2_ONE_PORT_RVX_ONE_PORT_MDM_PCIE,
103 .driver_data = ADAPTER_V2,
104 },
105 {}
106};
107
108struct lookup_proc_table start_proc[4] = {
109 {NULL, ICOM_CONTROL_START_A},
110 {NULL, ICOM_CONTROL_START_B},
111 {NULL, ICOM_CONTROL_START_C},
112 {NULL, ICOM_CONTROL_START_D}
113};
114
115
116struct lookup_proc_table stop_proc[4] = {
117 {NULL, ICOM_CONTROL_STOP_A},
118 {NULL, ICOM_CONTROL_STOP_B},
119 {NULL, ICOM_CONTROL_STOP_C},
120 {NULL, ICOM_CONTROL_STOP_D}
121};
122
123struct lookup_int_table int_mask_tbl[4] = {
124 {NULL, ICOM_INT_MASK_PRC_A},
125 {NULL, ICOM_INT_MASK_PRC_B},
126 {NULL, ICOM_INT_MASK_PRC_C},
127 {NULL, ICOM_INT_MASK_PRC_D},
128};
129
130
131MODULE_DEVICE_TABLE(pci, icom_pci_table);
132
133static LIST_HEAD(icom_adapter_head);
134
135/* spinlock for adapter initialization and changing adapter operations */
136static spinlock_t icom_lock;
137
138#ifdef ICOM_TRACE
139static inline void trace(struct icom_port *icom_port, char *trace_pt,
140 unsigned long trace_data)
141{
142 dev_info(&icom_port->adapter->pci_dev->dev, ":%d:%s - %lx\n",
143 icom_port->port, trace_pt, trace_data);
144}
145#else
146static inline void trace(struct icom_port *icom_port, char *trace_pt, unsigned long trace_data) {};
147#endif
148static void icom_kref_release(struct kref *kref);
149
150static void free_port_memory(struct icom_port *icom_port)
151{
152 struct pci_dev *dev = icom_port->adapter->pci_dev;
153
154 trace(icom_port, "RET_PORT_MEM", 0);
155 if (icom_port->recv_buf) {
156 pci_free_consistent(dev, 4096, icom_port->recv_buf,
157 icom_port->recv_buf_pci);
158 icom_port->recv_buf = NULL;
159 }
160 if (icom_port->xmit_buf) {
161 pci_free_consistent(dev, 4096, icom_port->xmit_buf,
162 icom_port->xmit_buf_pci);
163 icom_port->xmit_buf = NULL;
164 }
165 if (icom_port->statStg) {
166 pci_free_consistent(dev, 4096, icom_port->statStg,
167 icom_port->statStg_pci);
168 icom_port->statStg = NULL;
169 }
170
171 if (icom_port->xmitRestart) {
172 pci_free_consistent(dev, 4096, icom_port->xmitRestart,
173 icom_port->xmitRestart_pci);
174 icom_port->xmitRestart = NULL;
175 }
176}
177
178static int __devinit get_port_memory(struct icom_port *icom_port)
179{
180 int index;
181 unsigned long stgAddr;
182 unsigned long startStgAddr;
183 unsigned long offset;
184 struct pci_dev *dev = icom_port->adapter->pci_dev;
185
186 icom_port->xmit_buf =
187 pci_alloc_consistent(dev, 4096, &icom_port->xmit_buf_pci);
188 if (!icom_port->xmit_buf) {
189 dev_err(&dev->dev, "Can not allocate Transmit buffer\n");
190 return -ENOMEM;
191 }
192
193 trace(icom_port, "GET_PORT_MEM",
194 (unsigned long) icom_port->xmit_buf);
195
196 icom_port->recv_buf =
197 pci_alloc_consistent(dev, 4096, &icom_port->recv_buf_pci);
198 if (!icom_port->recv_buf) {
199 dev_err(&dev->dev, "Can not allocate Receive buffer\n");
200 free_port_memory(icom_port);
201 return -ENOMEM;
202 }
203 trace(icom_port, "GET_PORT_MEM",
204 (unsigned long) icom_port->recv_buf);
205
206 icom_port->statStg =
207 pci_alloc_consistent(dev, 4096, &icom_port->statStg_pci);
208 if (!icom_port->statStg) {
209 dev_err(&dev->dev, "Can not allocate Status buffer\n");
210 free_port_memory(icom_port);
211 return -ENOMEM;
212 }
213 trace(icom_port, "GET_PORT_MEM",
214 (unsigned long) icom_port->statStg);
215
216 icom_port->xmitRestart =
217 pci_alloc_consistent(dev, 4096, &icom_port->xmitRestart_pci);
218 if (!icom_port->xmitRestart) {
219 dev_err(&dev->dev,
220 "Can not allocate xmit Restart buffer\n");
221 free_port_memory(icom_port);
222 return -ENOMEM;
223 }
224
225 memset(icom_port->statStg, 0, 4096);
226
227 /* FODs: Frame Out Descriptor Queue, this is a FIFO queue that
228 indicates that frames are to be transmitted
229 */
230
231 stgAddr = (unsigned long) icom_port->statStg;
232 for (index = 0; index < NUM_XBUFFS; index++) {
233 trace(icom_port, "FOD_ADDR", stgAddr);
234 stgAddr = stgAddr + sizeof(icom_port->statStg->xmit[0]);
235 if (index < (NUM_XBUFFS - 1)) {
236 memset(&icom_port->statStg->xmit[index], 0, sizeof(struct xmit_status_area));
237 icom_port->statStg->xmit[index].leLengthASD =
238 (unsigned short int) cpu_to_le16(XMIT_BUFF_SZ);
239 trace(icom_port, "FOD_ADDR", stgAddr);
240 trace(icom_port, "FOD_XBUFF",
241 (unsigned long) icom_port->xmit_buf);
242 icom_port->statStg->xmit[index].leBuffer =
243 cpu_to_le32(icom_port->xmit_buf_pci);
244 } else if (index == (NUM_XBUFFS - 1)) {
245 memset(&icom_port->statStg->xmit[index], 0, sizeof(struct xmit_status_area));
246 icom_port->statStg->xmit[index].leLengthASD =
247 (unsigned short int) cpu_to_le16(XMIT_BUFF_SZ);
248 trace(icom_port, "FOD_XBUFF",
249 (unsigned long) icom_port->xmit_buf);
250 icom_port->statStg->xmit[index].leBuffer =
251 cpu_to_le32(icom_port->xmit_buf_pci);
252 } else {
253 memset(&icom_port->statStg->xmit[index], 0, sizeof(struct xmit_status_area));
254 }
255 }
256 /* FIDs */
257 startStgAddr = stgAddr;
258
259 /* fill in every entry, even if no buffer */
260 for (index = 0; index < NUM_RBUFFS; index++) {
261 trace(icom_port, "FID_ADDR", stgAddr);
262 stgAddr = stgAddr + sizeof(icom_port->statStg->rcv[0]);
263 icom_port->statStg->rcv[index].leLength = 0;
264 icom_port->statStg->rcv[index].WorkingLength =
265 (unsigned short int) cpu_to_le16(RCV_BUFF_SZ);
266 if (index < (NUM_RBUFFS - 1) ) {
267 offset = stgAddr - (unsigned long) icom_port->statStg;
268 icom_port->statStg->rcv[index].leNext =
269 cpu_to_le32(icom_port-> statStg_pci + offset);
270 trace(icom_port, "FID_RBUFF",
271 (unsigned long) icom_port->recv_buf);
272 icom_port->statStg->rcv[index].leBuffer =
273 cpu_to_le32(icom_port->recv_buf_pci);
274 } else if (index == (NUM_RBUFFS -1) ) {
275 offset = startStgAddr - (unsigned long) icom_port->statStg;
276 icom_port->statStg->rcv[index].leNext =
277 cpu_to_le32(icom_port-> statStg_pci + offset);
278 trace(icom_port, "FID_RBUFF",
279 (unsigned long) icom_port->recv_buf + 2048);
280 icom_port->statStg->rcv[index].leBuffer =
281 cpu_to_le32(icom_port->recv_buf_pci + 2048);
282 } else {
283 icom_port->statStg->rcv[index].leNext = 0;
284 icom_port->statStg->rcv[index].leBuffer = 0;
285 }
286 }
287
288 return 0;
289}
290
291static void stop_processor(struct icom_port *icom_port)
292{
293 unsigned long temp;
294 unsigned long flags;
295 int port;
296
297 spin_lock_irqsave(&icom_lock, flags);
298
299 port = icom_port->port;
300 if (port == 0 || port == 1)
301 stop_proc[port].global_control_reg = &icom_port->global_reg->control;
302 else
303 stop_proc[port].global_control_reg = &icom_port->global_reg->control_2;
304
305
306 if (port < 4) {
307 temp = readl(stop_proc[port].global_control_reg);
308 temp =
309 (temp & ~start_proc[port].processor_id) | stop_proc[port].processor_id;
310 writel(temp, stop_proc[port].global_control_reg);
311
312 /* write flush */
313 readl(stop_proc[port].global_control_reg);
314 } else {
315 dev_err(&icom_port->adapter->pci_dev->dev,
316 "Invalid port assignment\n");
317 }
318
319 spin_unlock_irqrestore(&icom_lock, flags);
320}
321
322static void start_processor(struct icom_port *icom_port)
323{
324 unsigned long temp;
325 unsigned long flags;
326 int port;
327
328 spin_lock_irqsave(&icom_lock, flags);
329
330 port = icom_port->port;
331 if (port == 0 || port == 1)
332 start_proc[port].global_control_reg = &icom_port->global_reg->control;
333 else
334 start_proc[port].global_control_reg = &icom_port->global_reg->control_2;
335 if (port < 4) {
336 temp = readl(start_proc[port].global_control_reg);
337 temp =
338 (temp & ~stop_proc[port].processor_id) | start_proc[port].processor_id;
339 writel(temp, start_proc[port].global_control_reg);
340
341 /* write flush */
342 readl(start_proc[port].global_control_reg);
343 } else {
344 dev_err(&icom_port->adapter->pci_dev->dev,
345 "Invalid port assignment\n");
346 }
347
348 spin_unlock_irqrestore(&icom_lock, flags);
349}
350
351static void load_code(struct icom_port *icom_port)
352{
353 const struct firmware *fw;
354 char __iomem *iram_ptr;
355 int index;
356 int status = 0;
357 void __iomem *dram_ptr = icom_port->dram;
358 dma_addr_t temp_pci;
359 unsigned char *new_page = NULL;
360 unsigned char cable_id = NO_CABLE;
361 struct pci_dev *dev = icom_port->adapter->pci_dev;
362
363 /* Clear out any pending interrupts */
364 writew(0x3FFF, icom_port->int_reg);
365
366 trace(icom_port, "CLEAR_INTERRUPTS", 0);
367
368 /* Stop processor */
369 stop_processor(icom_port);
370
371 /* Zero out DRAM */
372 memset_io(dram_ptr, 0, 512);
373
374 /* Load Call Setup into Adapter */
375 if (request_firmware(&fw, "icom_call_setup.bin", &dev->dev) < 0) {
376 dev_err(&dev->dev,"Unable to load icom_call_setup.bin firmware image\n");
377 status = -1;
378 goto load_code_exit;
379 }
380
381 if (fw->size > ICOM_DCE_IRAM_OFFSET) {
382 dev_err(&dev->dev, "Invalid firmware image for icom_call_setup.bin found.\n");
383 release_firmware(fw);
384 status = -1;
385 goto load_code_exit;
386 }
387
388 iram_ptr = (char __iomem *)icom_port->dram + ICOM_IRAM_OFFSET;
389 for (index = 0; index < fw->size; index++)
390 writeb(fw->data[index], &iram_ptr[index]);
391
392 release_firmware(fw);
393
394 /* Load Resident DCE portion of Adapter */
395 if (request_firmware(&fw, "icom_res_dce.bin", &dev->dev) < 0) {
396 dev_err(&dev->dev,"Unable to load icom_res_dce.bin firmware image\n");
397 status = -1;
398 goto load_code_exit;
399 }
400
401 if (fw->size > ICOM_IRAM_SIZE) {
402 dev_err(&dev->dev, "Invalid firmware image for icom_res_dce.bin found.\n");
403 release_firmware(fw);
404 status = -1;
405 goto load_code_exit;
406 }
407
408 iram_ptr = (char __iomem *) icom_port->dram + ICOM_IRAM_OFFSET;
409 for (index = ICOM_DCE_IRAM_OFFSET; index < fw->size; index++)
410 writeb(fw->data[index], &iram_ptr[index]);
411
412 release_firmware(fw);
413
414 /* Set Hardware level */
415 if (icom_port->adapter->version == ADAPTER_V2)
416 writeb(V2_HARDWARE, &(icom_port->dram->misc_flags));
417
418 /* Start the processor in Adapter */
419 start_processor(icom_port);
420
421 writeb((HDLC_PPP_PURE_ASYNC | HDLC_FF_FILL),
422 &(icom_port->dram->HDLCConfigReg));
423 writeb(0x04, &(icom_port->dram->FlagFillIdleTimer)); /* 0.5 seconds */
424 writeb(0x00, &(icom_port->dram->CmdReg));
425 writeb(0x10, &(icom_port->dram->async_config3));
426 writeb((ICOM_ACFG_DRIVE1 | ICOM_ACFG_NO_PARITY | ICOM_ACFG_8BPC |
427 ICOM_ACFG_1STOP_BIT), &(icom_port->dram->async_config2));
428
429 /*Set up data in icom DRAM to indicate where personality
430 *code is located and its length.
431 */
432 new_page = pci_alloc_consistent(dev, 4096, &temp_pci);
433
434 if (!new_page) {
435 dev_err(&dev->dev, "Can not allocate DMA buffer\n");
436 status = -1;
437 goto load_code_exit;
438 }
439
440 if (request_firmware(&fw, "icom_asc.bin", &dev->dev) < 0) {
441 dev_err(&dev->dev,"Unable to load icom_asc.bin firmware image\n");
442 status = -1;
443 goto load_code_exit;
444 }
445
446 if (fw->size > ICOM_DCE_IRAM_OFFSET) {
447 dev_err(&dev->dev, "Invalid firmware image for icom_asc.bin found.\n");
448 release_firmware(fw);
449 status = -1;
450 goto load_code_exit;
451 }
452
453 for (index = 0; index < fw->size; index++)
454 new_page[index] = fw->data[index];
455
456 release_firmware(fw);
457
458 writeb((char) ((fw->size + 16)/16), &icom_port->dram->mac_length);
459 writel(temp_pci, &icom_port->dram->mac_load_addr);
460
461 /*Setting the syncReg to 0x80 causes adapter to start downloading
462 the personality code into adapter instruction RAM.
463 Once code is loaded, it will begin executing and, based on
464 information provided above, will start DMAing data from
465 shared memory to adapter DRAM.
466 */
467 /* the wait loop below verifies this write operation has been done
468 and processed
469 */
470 writeb(START_DOWNLOAD, &icom_port->dram->sync);
471
472 /* Wait max 1 Sec for data download and processor to start */
473 for (index = 0; index < 10; index++) {
474 msleep(100);
475 if (readb(&icom_port->dram->misc_flags) & ICOM_HDW_ACTIVE)
476 break;
477 }
478
479 if (index == 10)
480 status = -1;
481
482 /*
483 * check Cable ID
484 */
485 cable_id = readb(&icom_port->dram->cable_id);
486
487 if (cable_id & ICOM_CABLE_ID_VALID) {
488 /* Get cable ID into the lower 4 bits (standard form) */
489 cable_id = (cable_id & ICOM_CABLE_ID_MASK) >> 4;
490 icom_port->cable_id = cable_id;
491 } else {
492 dev_err(&dev->dev,"Invalid or no cable attached\n");
493 icom_port->cable_id = NO_CABLE;
494 }
495
496 load_code_exit:
497
498 if (status != 0) {
499 /* Clear out any pending interrupts */
500 writew(0x3FFF, icom_port->int_reg);
501
502 /* Turn off port */
503 writeb(ICOM_DISABLE, &(icom_port->dram->disable));
504
505 /* Stop processor */
506 stop_processor(icom_port);
507
508 dev_err(&icom_port->adapter->pci_dev->dev,"Port not opertional\n");
509 }
510
511 if (new_page != NULL)
512 pci_free_consistent(dev, 4096, new_page, temp_pci);
513}
514
515static int startup(struct icom_port *icom_port)
516{
517 unsigned long temp;
518 unsigned char cable_id, raw_cable_id;
519 unsigned long flags;
520 int port;
521
522 trace(icom_port, "STARTUP", 0);
523
524 if (!icom_port->dram) {
525 /* should NEVER be NULL */
526 dev_err(&icom_port->adapter->pci_dev->dev,
527 "Unusable Port, port configuration missing\n");
528 return -ENODEV;
529 }
530
531 /*
532 * check Cable ID
533 */
534 raw_cable_id = readb(&icom_port->dram->cable_id);
535 trace(icom_port, "CABLE_ID", raw_cable_id);
536
537 /* Get cable ID into the lower 4 bits (standard form) */
538 cable_id = (raw_cable_id & ICOM_CABLE_ID_MASK) >> 4;
539
540 /* Check for valid Cable ID */
541 if (!(raw_cable_id & ICOM_CABLE_ID_VALID) ||
542 (cable_id != icom_port->cable_id)) {
543
544 /* reload adapter code, pick up any potential changes in cable id */
545 load_code(icom_port);
546
547 /* still no sign of cable, error out */
548 raw_cable_id = readb(&icom_port->dram->cable_id);
549 cable_id = (raw_cable_id & ICOM_CABLE_ID_MASK) >> 4;
550 if (!(raw_cable_id & ICOM_CABLE_ID_VALID) ||
551 (icom_port->cable_id == NO_CABLE))
552 return -EIO;
553 }
554
555 /*
556 * Finally, clear and enable interrupts
557 */
558 spin_lock_irqsave(&icom_lock, flags);
559 port = icom_port->port;
560 if (port == 0 || port == 1)
561 int_mask_tbl[port].global_int_mask = &icom_port->global_reg->int_mask;
562 else
563 int_mask_tbl[port].global_int_mask = &icom_port->global_reg->int_mask_2;
564
565 if (port == 0 || port == 2)
566 writew(0x00FF, icom_port->int_reg);
567 else
568 writew(0x3F00, icom_port->int_reg);
569 if (port < 4) {
570 temp = readl(int_mask_tbl[port].global_int_mask);
571 writel(temp & ~int_mask_tbl[port].processor_id, int_mask_tbl[port].global_int_mask);
572
573 /* write flush */
574 readl(int_mask_tbl[port].global_int_mask);
575 } else {
576 dev_err(&icom_port->adapter->pci_dev->dev,
577 "Invalid port assignment\n");
578 }
579
580 spin_unlock_irqrestore(&icom_lock, flags);
581 return 0;
582}
583
584static void shutdown(struct icom_port *icom_port)
585{
586 unsigned long temp;
587 unsigned char cmdReg;
588 unsigned long flags;
589 int port;
590
591 spin_lock_irqsave(&icom_lock, flags);
592 trace(icom_port, "SHUTDOWN", 0);
593
594 /*
595 * disable all interrupts
596 */
597 port = icom_port->port;
598 if (port == 0 || port == 1)
599 int_mask_tbl[port].global_int_mask = &icom_port->global_reg->int_mask;
600 else
601 int_mask_tbl[port].global_int_mask = &icom_port->global_reg->int_mask_2;
602
603 if (port < 4) {
604 temp = readl(int_mask_tbl[port].global_int_mask);
605 writel(temp | int_mask_tbl[port].processor_id, int_mask_tbl[port].global_int_mask);
606
607 /* write flush */
608 readl(int_mask_tbl[port].global_int_mask);
609 } else {
610 dev_err(&icom_port->adapter->pci_dev->dev,
611 "Invalid port assignment\n");
612 }
613 spin_unlock_irqrestore(&icom_lock, flags);
614
615 /*
616 * disable break condition
617 */
618 cmdReg = readb(&icom_port->dram->CmdReg);
619 if (cmdReg & CMD_SND_BREAK) {
620 writeb(cmdReg & ~CMD_SND_BREAK, &icom_port->dram->CmdReg);
621 }
622}
623
624static int icom_write(struct uart_port *port)
625{
626 unsigned long data_count;
627 unsigned char cmdReg;
628 unsigned long offset;
629 int temp_tail = port->state->xmit.tail;
630
631 trace(ICOM_PORT, "WRITE", 0);
632
633 if (cpu_to_le16(ICOM_PORT->statStg->xmit[0].flags) &
634 SA_FLAGS_READY_TO_XMIT) {
635 trace(ICOM_PORT, "WRITE_FULL", 0);
636 return 0;
637 }
638
639 data_count = 0;
640 while ((port->state->xmit.head != temp_tail) &&
641 (data_count <= XMIT_BUFF_SZ)) {
642
643 ICOM_PORT->xmit_buf[data_count++] =
644 port->state->xmit.buf[temp_tail];
645
646 temp_tail++;
647 temp_tail &= (UART_XMIT_SIZE - 1);
648 }
649
650 if (data_count) {
651 ICOM_PORT->statStg->xmit[0].flags =
652 cpu_to_le16(SA_FLAGS_READY_TO_XMIT);
653 ICOM_PORT->statStg->xmit[0].leLength =
654 cpu_to_le16(data_count);
655 offset =
656 (unsigned long) &ICOM_PORT->statStg->xmit[0] -
657 (unsigned long) ICOM_PORT->statStg;
658 *ICOM_PORT->xmitRestart =
659 cpu_to_le32(ICOM_PORT->statStg_pci + offset);
660 cmdReg = readb(&ICOM_PORT->dram->CmdReg);
661 writeb(cmdReg | CMD_XMIT_RCV_ENABLE,
662 &ICOM_PORT->dram->CmdReg);
663 writeb(START_XMIT, &ICOM_PORT->dram->StartXmitCmd);
664 trace(ICOM_PORT, "WRITE_START", data_count);
665 /* write flush */
666 readb(&ICOM_PORT->dram->StartXmitCmd);
667 }
668
669 return data_count;
670}
671
672static inline void check_modem_status(struct icom_port *icom_port)
673{
674 static char old_status = 0;
675 char delta_status;
676 unsigned char status;
677
678 spin_lock(&icom_port->uart_port.lock);
679
680 /*modem input register */
681 status = readb(&icom_port->dram->isr);
682 trace(icom_port, "CHECK_MODEM", status);
683 delta_status = status ^ old_status;
684 if (delta_status) {
685 if (delta_status & ICOM_RI)
686 icom_port->uart_port.icount.rng++;
687 if (delta_status & ICOM_DSR)
688 icom_port->uart_port.icount.dsr++;
689 if (delta_status & ICOM_DCD)
690 uart_handle_dcd_change(&icom_port->uart_port,
691 delta_status & ICOM_DCD);
692 if (delta_status & ICOM_CTS)
693 uart_handle_cts_change(&icom_port->uart_port,
694 delta_status & ICOM_CTS);
695
696 wake_up_interruptible(&icom_port->uart_port.state->
697 port.delta_msr_wait);
698 old_status = status;
699 }
700 spin_unlock(&icom_port->uart_port.lock);
701}
702
703static void xmit_interrupt(u16 port_int_reg, struct icom_port *icom_port)
704{
705 unsigned short int count;
706 int i;
707
708 if (port_int_reg & (INT_XMIT_COMPLETED)) {
709 trace(icom_port, "XMIT_COMPLETE", 0);
710
711 /* clear buffer in use bit */
712 icom_port->statStg->xmit[0].flags &=
713 cpu_to_le16(~SA_FLAGS_READY_TO_XMIT);
714
715 count = (unsigned short int)
716 cpu_to_le16(icom_port->statStg->xmit[0].leLength);
717 icom_port->uart_port.icount.tx += count;
718
719 for (i=0; i<count &&
720 !uart_circ_empty(&icom_port->uart_port.state->xmit); i++) {
721
722 icom_port->uart_port.state->xmit.tail++;
723 icom_port->uart_port.state->xmit.tail &=
724 (UART_XMIT_SIZE - 1);
725 }
726
727 if (!icom_write(&icom_port->uart_port))
728 /* activate write queue */
729 uart_write_wakeup(&icom_port->uart_port);
730 } else
731 trace(icom_port, "XMIT_DISABLED", 0);
732}
733
734static void recv_interrupt(u16 port_int_reg, struct icom_port *icom_port)
735{
736 short int count, rcv_buff;
737 struct tty_struct *tty = icom_port->uart_port.state->port.tty;
738 unsigned short int status;
739 struct uart_icount *icount;
740 unsigned long offset;
741 unsigned char flag;
742
743 trace(icom_port, "RCV_COMPLETE", 0);
744 rcv_buff = icom_port->next_rcv;
745
746 status = cpu_to_le16(icom_port->statStg->rcv[rcv_buff].flags);
747 while (status & SA_FL_RCV_DONE) {
748 int first = -1;
749
750 trace(icom_port, "FID_STATUS", status);
751 count = cpu_to_le16(icom_port->statStg->rcv[rcv_buff].leLength);
752
753 trace(icom_port, "RCV_COUNT", count);
754
755 trace(icom_port, "REAL_COUNT", count);
756
757 offset =
758 cpu_to_le32(icom_port->statStg->rcv[rcv_buff].leBuffer) -
759 icom_port->recv_buf_pci;
760
761 /* Block copy all but the last byte as this may have status */
762 if (count > 0) {
763 first = icom_port->recv_buf[offset];
764 tty_insert_flip_string(tty, icom_port->recv_buf + offset, count - 1);
765 }
766
767 icount = &icom_port->uart_port.icount;
768 icount->rx += count;
769
770 /* Break detect logic */
771 if ((status & SA_FLAGS_FRAME_ERROR)
772 && first == 0) {
773 status &= ~SA_FLAGS_FRAME_ERROR;
774 status |= SA_FLAGS_BREAK_DET;
775 trace(icom_port, "BREAK_DET", 0);
776 }
777
778 flag = TTY_NORMAL;
779
780 if (status &
781 (SA_FLAGS_BREAK_DET | SA_FLAGS_PARITY_ERROR |
782 SA_FLAGS_FRAME_ERROR | SA_FLAGS_OVERRUN)) {
783
784 if (status & SA_FLAGS_BREAK_DET)
785 icount->brk++;
786 if (status & SA_FLAGS_PARITY_ERROR)
787 icount->parity++;
788 if (status & SA_FLAGS_FRAME_ERROR)
789 icount->frame++;
790 if (status & SA_FLAGS_OVERRUN)
791 icount->overrun++;
792
793 /*
794 * Now check to see if character should be
795 * ignored, and mask off conditions which
796 * should be ignored.
797 */
798 if (status & icom_port->ignore_status_mask) {
799 trace(icom_port, "IGNORE_CHAR", 0);
800 goto ignore_char;
801 }
802
803 status &= icom_port->read_status_mask;
804
805 if (status & SA_FLAGS_BREAK_DET) {
806 flag = TTY_BREAK;
807 } else if (status & SA_FLAGS_PARITY_ERROR) {
808 trace(icom_port, "PARITY_ERROR", 0);
809 flag = TTY_PARITY;
810 } else if (status & SA_FLAGS_FRAME_ERROR)
811 flag = TTY_FRAME;
812
813 }
814
815 tty_insert_flip_char(tty, *(icom_port->recv_buf + offset + count - 1), flag);
816
817 if (status & SA_FLAGS_OVERRUN)
818 /*
819 * Overrun is special, since it's
820 * reported immediately, and doesn't
821 * affect the current character
822 */
823 tty_insert_flip_char(tty, 0, TTY_OVERRUN);
824ignore_char:
825 icom_port->statStg->rcv[rcv_buff].flags = 0;
826 icom_port->statStg->rcv[rcv_buff].leLength = 0;
827 icom_port->statStg->rcv[rcv_buff].WorkingLength =
828 (unsigned short int) cpu_to_le16(RCV_BUFF_SZ);
829
830 rcv_buff++;
831 if (rcv_buff == NUM_RBUFFS)
832 rcv_buff = 0;
833
834 status = cpu_to_le16(icom_port->statStg->rcv[rcv_buff].flags);
835 }
836 icom_port->next_rcv = rcv_buff;
837 tty_flip_buffer_push(tty);
838}
839
840static void process_interrupt(u16 port_int_reg,
841 struct icom_port *icom_port)
842{
843
844 spin_lock(&icom_port->uart_port.lock);
845 trace(icom_port, "INTERRUPT", port_int_reg);
846
847 if (port_int_reg & (INT_XMIT_COMPLETED | INT_XMIT_DISABLED))
848 xmit_interrupt(port_int_reg, icom_port);
849
850 if (port_int_reg & INT_RCV_COMPLETED)
851 recv_interrupt(port_int_reg, icom_port);
852
853 spin_unlock(&icom_port->uart_port.lock);
854}
855
856static irqreturn_t icom_interrupt(int irq, void *dev_id)
857{
858 void __iomem * int_reg;
859 u32 adapter_interrupts;
860 u16 port_int_reg;
861 struct icom_adapter *icom_adapter;
862 struct icom_port *icom_port;
863
864 /* find icom_port for this interrupt */
865 icom_adapter = (struct icom_adapter *) dev_id;
866
867 if (icom_adapter->version == ADAPTER_V2) {
868 int_reg = icom_adapter->base_addr + 0x8024;
869
870 adapter_interrupts = readl(int_reg);
871
872 if (adapter_interrupts & 0x00003FFF) {
873 /* port 2 interrupt, NOTE: for all ADAPTER_V2, port 2 will be active */
874 icom_port = &icom_adapter->port_info[2];
875 port_int_reg = (u16) adapter_interrupts;
876 process_interrupt(port_int_reg, icom_port);
877 check_modem_status(icom_port);
878 }
879 if (adapter_interrupts & 0x3FFF0000) {
880 /* port 3 interrupt */
881 icom_port = &icom_adapter->port_info[3];
882 if (icom_port->status == ICOM_PORT_ACTIVE) {
883 port_int_reg =
884 (u16) (adapter_interrupts >> 16);
885 process_interrupt(port_int_reg, icom_port);
886 check_modem_status(icom_port);
887 }
888 }
889
890 /* Clear out any pending interrupts */
891 writel(adapter_interrupts, int_reg);
892
893 int_reg = icom_adapter->base_addr + 0x8004;
894 } else {
895 int_reg = icom_adapter->base_addr + 0x4004;
896 }
897
898 adapter_interrupts = readl(int_reg);
899
900 if (adapter_interrupts & 0x00003FFF) {
901 /* port 0 interrupt, NOTE: for all adapters, port 0 will be active */
902 icom_port = &icom_adapter->port_info[0];
903 port_int_reg = (u16) adapter_interrupts;
904 process_interrupt(port_int_reg, icom_port);
905 check_modem_status(icom_port);
906 }
907 if (adapter_interrupts & 0x3FFF0000) {
908 /* port 1 interrupt */
909 icom_port = &icom_adapter->port_info[1];
910 if (icom_port->status == ICOM_PORT_ACTIVE) {
911 port_int_reg = (u16) (adapter_interrupts >> 16);
912 process_interrupt(port_int_reg, icom_port);
913 check_modem_status(icom_port);
914 }
915 }
916
917 /* Clear out any pending interrupts */
918 writel(adapter_interrupts, int_reg);
919
920 /* flush the write */
921 adapter_interrupts = readl(int_reg);
922
923 return IRQ_HANDLED;
924}
925
926/*
927 * ------------------------------------------------------------------
928 * Begin serial-core API
929 * ------------------------------------------------------------------
930 */
931static unsigned int icom_tx_empty(struct uart_port *port)
932{
933 int ret;
934 unsigned long flags;
935
936 spin_lock_irqsave(&port->lock, flags);
937 if (cpu_to_le16(ICOM_PORT->statStg->xmit[0].flags) &
938 SA_FLAGS_READY_TO_XMIT)
939 ret = TIOCSER_TEMT;
940 else
941 ret = 0;
942
943 spin_unlock_irqrestore(&port->lock, flags);
944 return ret;
945}
946
947static void icom_set_mctrl(struct uart_port *port, unsigned int mctrl)
948{
949 unsigned char local_osr;
950
951 trace(ICOM_PORT, "SET_MODEM", 0);
952 local_osr = readb(&ICOM_PORT->dram->osr);
953
954 if (mctrl & TIOCM_RTS) {
955 trace(ICOM_PORT, "RAISE_RTS", 0);
956 local_osr |= ICOM_RTS;
957 } else {
958 trace(ICOM_PORT, "LOWER_RTS", 0);
959 local_osr &= ~ICOM_RTS;
960 }
961
962 if (mctrl & TIOCM_DTR) {
963 trace(ICOM_PORT, "RAISE_DTR", 0);
964 local_osr |= ICOM_DTR;
965 } else {
966 trace(ICOM_PORT, "LOWER_DTR", 0);
967 local_osr &= ~ICOM_DTR;
968 }
969
970 writeb(local_osr, &ICOM_PORT->dram->osr);
971}
972
973static unsigned int icom_get_mctrl(struct uart_port *port)
974{
975 unsigned char status;
976 unsigned int result;
977
978 trace(ICOM_PORT, "GET_MODEM", 0);
979
980 status = readb(&ICOM_PORT->dram->isr);
981
982 result = ((status & ICOM_DCD) ? TIOCM_CAR : 0)
983 | ((status & ICOM_RI) ? TIOCM_RNG : 0)
984 | ((status & ICOM_DSR) ? TIOCM_DSR : 0)
985 | ((status & ICOM_CTS) ? TIOCM_CTS : 0);
986 return result;
987}
988
989static void icom_stop_tx(struct uart_port *port)
990{
991 unsigned char cmdReg;
992
993 trace(ICOM_PORT, "STOP", 0);
994 cmdReg = readb(&ICOM_PORT->dram->CmdReg);
995 writeb(cmdReg | CMD_HOLD_XMIT, &ICOM_PORT->dram->CmdReg);
996}
997
998static void icom_start_tx(struct uart_port *port)
999{
1000 unsigned char cmdReg;
1001
1002 trace(ICOM_PORT, "START", 0);
1003 cmdReg = readb(&ICOM_PORT->dram->CmdReg);
1004 if ((cmdReg & CMD_HOLD_XMIT) == CMD_HOLD_XMIT)
1005 writeb(cmdReg & ~CMD_HOLD_XMIT,
1006 &ICOM_PORT->dram->CmdReg);
1007
1008 icom_write(port);
1009}
1010
1011static void icom_send_xchar(struct uart_port *port, char ch)
1012{
1013 unsigned char xdata;
1014 int index;
1015 unsigned long flags;
1016
1017 trace(ICOM_PORT, "SEND_XCHAR", ch);
1018
1019 /* wait .1 sec to send char */
1020 for (index = 0; index < 10; index++) {
1021 spin_lock_irqsave(&port->lock, flags);
1022 xdata = readb(&ICOM_PORT->dram->xchar);
1023 if (xdata == 0x00) {
1024 trace(ICOM_PORT, "QUICK_WRITE", 0);
1025 writeb(ch, &ICOM_PORT->dram->xchar);
1026
1027 /* flush write operation */
1028 xdata = readb(&ICOM_PORT->dram->xchar);
1029 spin_unlock_irqrestore(&port->lock, flags);
1030 break;
1031 }
1032 spin_unlock_irqrestore(&port->lock, flags);
1033 msleep(10);
1034 }
1035}
1036
1037static void icom_stop_rx(struct uart_port *port)
1038{
1039 unsigned char cmdReg;
1040
1041 cmdReg = readb(&ICOM_PORT->dram->CmdReg);
1042 writeb(cmdReg & ~CMD_RCV_ENABLE, &ICOM_PORT->dram->CmdReg);
1043}
1044
1045static void icom_enable_ms(struct uart_port *port)
1046{
1047 /* no-op */
1048}
1049
1050static void icom_break(struct uart_port *port, int break_state)
1051{
1052 unsigned char cmdReg;
1053 unsigned long flags;
1054
1055 spin_lock_irqsave(&port->lock, flags);
1056 trace(ICOM_PORT, "BREAK", 0);
1057 cmdReg = readb(&ICOM_PORT->dram->CmdReg);
1058 if (break_state == -1) {
1059 writeb(cmdReg | CMD_SND_BREAK, &ICOM_PORT->dram->CmdReg);
1060 } else {
1061 writeb(cmdReg & ~CMD_SND_BREAK, &ICOM_PORT->dram->CmdReg);
1062 }
1063 spin_unlock_irqrestore(&port->lock, flags);
1064}
1065
1066static int icom_open(struct uart_port *port)
1067{
1068 int retval;
1069
1070 kref_get(&ICOM_PORT->adapter->kref);
1071 retval = startup(ICOM_PORT);
1072
1073 if (retval) {
1074 kref_put(&ICOM_PORT->adapter->kref, icom_kref_release);
1075 trace(ICOM_PORT, "STARTUP_ERROR", 0);
1076 return retval;
1077 }
1078
1079 return 0;
1080}
1081
1082static void icom_close(struct uart_port *port)
1083{
1084 unsigned char cmdReg;
1085
1086 trace(ICOM_PORT, "CLOSE", 0);
1087
1088 /* stop receiver */
1089 cmdReg = readb(&ICOM_PORT->dram->CmdReg);
1090 writeb(cmdReg & (unsigned char) ~CMD_RCV_ENABLE,
1091 &ICOM_PORT->dram->CmdReg);
1092
1093 shutdown(ICOM_PORT);
1094
1095 kref_put(&ICOM_PORT->adapter->kref, icom_kref_release);
1096}
1097
1098static void icom_set_termios(struct uart_port *port,
1099 struct ktermios *termios,
1100 struct ktermios *old_termios)
1101{
1102 int baud;
1103 unsigned cflag, iflag;
1104 char new_config2;
1105 char new_config3 = 0;
1106 char tmp_byte;
1107 int index;
1108 int rcv_buff, xmit_buff;
1109 unsigned long offset;
1110 unsigned long flags;
1111
1112 spin_lock_irqsave(&port->lock, flags);
1113 trace(ICOM_PORT, "CHANGE_SPEED", 0);
1114
1115 cflag = termios->c_cflag;
1116 iflag = termios->c_iflag;
1117
1118 new_config2 = ICOM_ACFG_DRIVE1;
1119
1120 /* byte size and parity */
1121 switch (cflag & CSIZE) {
1122 case CS5: /* 5 bits/char */
1123 new_config2 |= ICOM_ACFG_5BPC;
1124 break;
1125 case CS6: /* 6 bits/char */
1126 new_config2 |= ICOM_ACFG_6BPC;
1127 break;
1128 case CS7: /* 7 bits/char */
1129 new_config2 |= ICOM_ACFG_7BPC;
1130 break;
1131 case CS8: /* 8 bits/char */
1132 new_config2 |= ICOM_ACFG_8BPC;
1133 break;
1134 default:
1135 break;
1136 }
1137 if (cflag & CSTOPB) {
1138 /* 2 stop bits */
1139 new_config2 |= ICOM_ACFG_2STOP_BIT;
1140 }
1141 if (cflag & PARENB) {
1142 /* parity bit enabled */
1143 new_config2 |= ICOM_ACFG_PARITY_ENAB;
1144 trace(ICOM_PORT, "PARENB", 0);
1145 }
1146 if (cflag & PARODD) {
1147 /* odd parity */
1148 new_config2 |= ICOM_ACFG_PARITY_ODD;
1149 trace(ICOM_PORT, "PARODD", 0);
1150 }
1151
1152 /* Determine divisor based on baud rate */
1153 baud = uart_get_baud_rate(port, termios, old_termios,
1154 icom_acfg_baud[0],
1155 icom_acfg_baud[BAUD_TABLE_LIMIT]);
1156 if (!baud)
1157 baud = 9600; /* B0 transition handled in rs_set_termios */
1158
1159 for (index = 0; index < BAUD_TABLE_LIMIT; index++) {
1160 if (icom_acfg_baud[index] == baud) {
1161 new_config3 = index;
1162 break;
1163 }
1164 }
1165
1166 uart_update_timeout(port, cflag, baud);
1167
1168 /* CTS flow control flag and modem status interrupts */
1169 tmp_byte = readb(&(ICOM_PORT->dram->HDLCConfigReg));
1170 if (cflag & CRTSCTS)
1171 tmp_byte |= HDLC_HDW_FLOW;
1172 else
1173 tmp_byte &= ~HDLC_HDW_FLOW;
1174 writeb(tmp_byte, &(ICOM_PORT->dram->HDLCConfigReg));
1175
1176 /*
1177 * Set up parity check flag
1178 */
1179 ICOM_PORT->read_status_mask = SA_FLAGS_OVERRUN | SA_FL_RCV_DONE;
1180 if (iflag & INPCK)
1181 ICOM_PORT->read_status_mask |=
1182 SA_FLAGS_FRAME_ERROR | SA_FLAGS_PARITY_ERROR;
1183
1184 if ((iflag & BRKINT) || (iflag & PARMRK))
1185 ICOM_PORT->read_status_mask |= SA_FLAGS_BREAK_DET;
1186
1187 /*
1188 * Characters to ignore
1189 */
1190 ICOM_PORT->ignore_status_mask = 0;
1191 if (iflag & IGNPAR)
1192 ICOM_PORT->ignore_status_mask |=
1193 SA_FLAGS_PARITY_ERROR | SA_FLAGS_FRAME_ERROR;
1194 if (iflag & IGNBRK) {
1195 ICOM_PORT->ignore_status_mask |= SA_FLAGS_BREAK_DET;
1196 /*
1197 * If we're ignore parity and break indicators, ignore
1198 * overruns too. (For real raw support).
1199 */
1200 if (iflag & IGNPAR)
1201 ICOM_PORT->ignore_status_mask |= SA_FLAGS_OVERRUN;
1202 }
1203
1204 /*
1205 * !!! ignore all characters if CREAD is not set
1206 */
1207 if ((cflag & CREAD) == 0)
1208 ICOM_PORT->ignore_status_mask |= SA_FL_RCV_DONE;
1209
1210 /* Turn off Receiver to prepare for reset */
1211 writeb(CMD_RCV_DISABLE, &ICOM_PORT->dram->CmdReg);
1212
1213 for (index = 0; index < 10; index++) {
1214 if (readb(&ICOM_PORT->dram->PrevCmdReg) == 0x00) {
1215 break;
1216 }
1217 }
1218
1219 /* clear all current buffers of data */
1220 for (rcv_buff = 0; rcv_buff < NUM_RBUFFS; rcv_buff++) {
1221 ICOM_PORT->statStg->rcv[rcv_buff].flags = 0;
1222 ICOM_PORT->statStg->rcv[rcv_buff].leLength = 0;
1223 ICOM_PORT->statStg->rcv[rcv_buff].WorkingLength =
1224 (unsigned short int) cpu_to_le16(RCV_BUFF_SZ);
1225 }
1226
1227 for (xmit_buff = 0; xmit_buff < NUM_XBUFFS; xmit_buff++) {
1228 ICOM_PORT->statStg->xmit[xmit_buff].flags = 0;
1229 }
1230
1231 /* activate changes and start xmit and receiver here */
1232 /* Enable the receiver */
1233 writeb(new_config3, &(ICOM_PORT->dram->async_config3));
1234 writeb(new_config2, &(ICOM_PORT->dram->async_config2));
1235 tmp_byte = readb(&(ICOM_PORT->dram->HDLCConfigReg));
1236 tmp_byte |= HDLC_PPP_PURE_ASYNC | HDLC_FF_FILL;
1237 writeb(tmp_byte, &(ICOM_PORT->dram->HDLCConfigReg));
1238 writeb(0x04, &(ICOM_PORT->dram->FlagFillIdleTimer)); /* 0.5 seconds */
1239 writeb(0xFF, &(ICOM_PORT->dram->ier)); /* enable modem signal interrupts */
1240
1241 /* reset processor */
1242 writeb(CMD_RESTART, &ICOM_PORT->dram->CmdReg);
1243
1244 for (index = 0; index < 10; index++) {
1245 if (readb(&ICOM_PORT->dram->CmdReg) == 0x00) {
1246 break;
1247 }
1248 }
1249
1250 /* Enable Transmitter and Receiver */
1251 offset =
1252 (unsigned long) &ICOM_PORT->statStg->rcv[0] -
1253 (unsigned long) ICOM_PORT->statStg;
1254 writel(ICOM_PORT->statStg_pci + offset,
1255 &ICOM_PORT->dram->RcvStatusAddr);
1256 ICOM_PORT->next_rcv = 0;
1257 ICOM_PORT->put_length = 0;
1258 *ICOM_PORT->xmitRestart = 0;
1259 writel(ICOM_PORT->xmitRestart_pci,
1260 &ICOM_PORT->dram->XmitStatusAddr);
1261 trace(ICOM_PORT, "XR_ENAB", 0);
1262 writeb(CMD_XMIT_RCV_ENABLE, &ICOM_PORT->dram->CmdReg);
1263
1264 spin_unlock_irqrestore(&port->lock, flags);
1265}
1266
1267static const char *icom_type(struct uart_port *port)
1268{
1269 return "icom";
1270}
1271
1272static void icom_release_port(struct uart_port *port)
1273{
1274}
1275
1276static int icom_request_port(struct uart_port *port)
1277{
1278 return 0;
1279}
1280
1281static void icom_config_port(struct uart_port *port, int flags)
1282{
1283 port->type = PORT_ICOM;
1284}
1285
1286static struct uart_ops icom_ops = {
1287 .tx_empty = icom_tx_empty,
1288 .set_mctrl = icom_set_mctrl,
1289 .get_mctrl = icom_get_mctrl,
1290 .stop_tx = icom_stop_tx,
1291 .start_tx = icom_start_tx,
1292 .send_xchar = icom_send_xchar,
1293 .stop_rx = icom_stop_rx,
1294 .enable_ms = icom_enable_ms,
1295 .break_ctl = icom_break,
1296 .startup = icom_open,
1297 .shutdown = icom_close,
1298 .set_termios = icom_set_termios,
1299 .type = icom_type,
1300 .release_port = icom_release_port,
1301 .request_port = icom_request_port,
1302 .config_port = icom_config_port,
1303};
1304
1305#define ICOM_CONSOLE NULL
1306
1307static struct uart_driver icom_uart_driver = {
1308 .owner = THIS_MODULE,
1309 .driver_name = ICOM_DRIVER_NAME,
1310 .dev_name = "ttyA",
1311 .major = ICOM_MAJOR,
1312 .minor = ICOM_MINOR_START,
1313 .nr = NR_PORTS,
1314 .cons = ICOM_CONSOLE,
1315};
1316
1317static int __devinit icom_init_ports(struct icom_adapter *icom_adapter)
1318{
1319 u32 subsystem_id = icom_adapter->subsystem_id;
1320 int i;
1321 struct icom_port *icom_port;
1322
1323 if (icom_adapter->version == ADAPTER_V1) {
1324 icom_adapter->numb_ports = 2;
1325
1326 for (i = 0; i < 2; i++) {
1327 icom_port = &icom_adapter->port_info[i];
1328 icom_port->port = i;
1329 icom_port->status = ICOM_PORT_ACTIVE;
1330 icom_port->imbed_modem = ICOM_UNKNOWN;
1331 }
1332 } else {
1333 if (subsystem_id == PCI_DEVICE_ID_IBM_ICOM_FOUR_PORT_MODEL) {
1334 icom_adapter->numb_ports = 4;
1335
1336 for (i = 0; i < 4; i++) {
1337 icom_port = &icom_adapter->port_info[i];
1338
1339 icom_port->port = i;
1340 icom_port->status = ICOM_PORT_ACTIVE;
1341 icom_port->imbed_modem = ICOM_IMBED_MODEM;
1342 }
1343 } else {
1344 icom_adapter->numb_ports = 4;
1345
1346 icom_adapter->port_info[0].port = 0;
1347 icom_adapter->port_info[0].status = ICOM_PORT_ACTIVE;
1348
1349 if (subsystem_id ==
1350 PCI_DEVICE_ID_IBM_ICOM_V2_ONE_PORT_RVX_ONE_PORT_MDM) {
1351 icom_adapter->port_info[0].imbed_modem = ICOM_IMBED_MODEM;
1352 } else {
1353 icom_adapter->port_info[0].imbed_modem = ICOM_RVX;
1354 }
1355
1356 icom_adapter->port_info[1].status = ICOM_PORT_OFF;
1357
1358 icom_adapter->port_info[2].port = 2;
1359 icom_adapter->port_info[2].status = ICOM_PORT_ACTIVE;
1360 icom_adapter->port_info[2].imbed_modem = ICOM_RVX;
1361 icom_adapter->port_info[3].status = ICOM_PORT_OFF;
1362 }
1363 }
1364
1365 return 0;
1366}
1367
1368static void icom_port_active(struct icom_port *icom_port, struct icom_adapter *icom_adapter, int port_num)
1369{
1370 if (icom_adapter->version == ADAPTER_V1) {
1371 icom_port->global_reg = icom_adapter->base_addr + 0x4000;
1372 icom_port->int_reg = icom_adapter->base_addr +
1373 0x4004 + 2 - 2 * port_num;
1374 } else {
1375 icom_port->global_reg = icom_adapter->base_addr + 0x8000;
1376 if (icom_port->port < 2)
1377 icom_port->int_reg = icom_adapter->base_addr +
1378 0x8004 + 2 - 2 * icom_port->port;
1379 else
1380 icom_port->int_reg = icom_adapter->base_addr +
1381 0x8024 + 2 - 2 * (icom_port->port - 2);
1382 }
1383}
1384static int __devinit icom_load_ports(struct icom_adapter *icom_adapter)
1385{
1386 struct icom_port *icom_port;
1387 int port_num;
1388
1389 for (port_num = 0; port_num < icom_adapter->numb_ports; port_num++) {
1390
1391 icom_port = &icom_adapter->port_info[port_num];
1392
1393 if (icom_port->status == ICOM_PORT_ACTIVE) {
1394 icom_port_active(icom_port, icom_adapter, port_num);
1395 icom_port->dram = icom_adapter->base_addr +
1396 0x2000 * icom_port->port;
1397
1398 icom_port->adapter = icom_adapter;
1399
1400 /* get port memory */
1401 if (get_port_memory(icom_port) != 0) {
1402 dev_err(&icom_port->adapter->pci_dev->dev,
1403 "Memory allocation for port FAILED\n");
1404 }
1405 }
1406 }
1407 return 0;
1408}
1409
1410static int __devinit icom_alloc_adapter(struct icom_adapter
1411 **icom_adapter_ref)
1412{
1413 int adapter_count = 0;
1414 struct icom_adapter *icom_adapter;
1415 struct icom_adapter *cur_adapter_entry;
1416 struct list_head *tmp;
1417
1418 icom_adapter = (struct icom_adapter *)
1419 kzalloc(sizeof(struct icom_adapter), GFP_KERNEL);
1420
1421 if (!icom_adapter) {
1422 return -ENOMEM;
1423 }
1424
1425 list_for_each(tmp, &icom_adapter_head) {
1426 cur_adapter_entry =
1427 list_entry(tmp, struct icom_adapter,
1428 icom_adapter_entry);
1429 if (cur_adapter_entry->index != adapter_count) {
1430 break;
1431 }
1432 adapter_count++;
1433 }
1434
1435 icom_adapter->index = adapter_count;
1436 list_add_tail(&icom_adapter->icom_adapter_entry, tmp);
1437
1438 *icom_adapter_ref = icom_adapter;
1439 return 0;
1440}
1441
1442static void icom_free_adapter(struct icom_adapter *icom_adapter)
1443{
1444 list_del(&icom_adapter->icom_adapter_entry);
1445 kfree(icom_adapter);
1446}
1447
1448static void icom_remove_adapter(struct icom_adapter *icom_adapter)
1449{
1450 struct icom_port *icom_port;
1451 int index;
1452
1453 for (index = 0; index < icom_adapter->numb_ports; index++) {
1454 icom_port = &icom_adapter->port_info[index];
1455
1456 if (icom_port->status == ICOM_PORT_ACTIVE) {
1457 dev_info(&icom_adapter->pci_dev->dev,
1458 "Device removed\n");
1459
1460 uart_remove_one_port(&icom_uart_driver,
1461 &icom_port->uart_port);
1462
1463 /* be sure that DTR and RTS are dropped */
1464 writeb(0x00, &icom_port->dram->osr);
1465
1466 /* Wait 0.1 Sec for simple Init to complete */
1467 msleep(100);
1468
1469 /* Stop proccessor */
1470 stop_processor(icom_port);
1471
1472 free_port_memory(icom_port);
1473 }
1474 }
1475
1476 free_irq(icom_adapter->pci_dev->irq, (void *) icom_adapter);
1477 iounmap(icom_adapter->base_addr);
1478 pci_release_regions(icom_adapter->pci_dev);
1479 icom_free_adapter(icom_adapter);
1480}
1481
1482static void icom_kref_release(struct kref *kref)
1483{
1484 struct icom_adapter *icom_adapter;
1485
1486 icom_adapter = to_icom_adapter(kref);
1487 icom_remove_adapter(icom_adapter);
1488}
1489
1490static int __devinit icom_probe(struct pci_dev *dev,
1491 const struct pci_device_id *ent)
1492{
1493 int index;
1494 unsigned int command_reg;
1495 int retval;
1496 struct icom_adapter *icom_adapter;
1497 struct icom_port *icom_port;
1498
1499 retval = pci_enable_device(dev);
1500 if (retval) {
1501 dev_err(&dev->dev, "Device enable FAILED\n");
1502 return retval;
1503 }
1504
1505 if ( (retval = pci_request_regions(dev, "icom"))) {
1506 dev_err(&dev->dev, "pci_request_regions FAILED\n");
1507 pci_disable_device(dev);
1508 return retval;
1509 }
1510
1511 pci_set_master(dev);
1512
1513 if ( (retval = pci_read_config_dword(dev, PCI_COMMAND, &command_reg))) {
1514 dev_err(&dev->dev, "PCI Config read FAILED\n");
1515 return retval;
1516 }
1517
1518 pci_write_config_dword(dev, PCI_COMMAND,
1519 command_reg | PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER
1520 | PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
1521
1522 if (ent->driver_data == ADAPTER_V1) {
1523 pci_write_config_dword(dev, 0x44, 0x8300830A);
1524 } else {
1525 pci_write_config_dword(dev, 0x44, 0x42004200);
1526 pci_write_config_dword(dev, 0x48, 0x42004200);
1527 }
1528
1529
1530 retval = icom_alloc_adapter(&icom_adapter);
1531 if (retval) {
1532 dev_err(&dev->dev, "icom_alloc_adapter FAILED\n");
1533 retval = -EIO;
1534 goto probe_exit0;
1535 }
1536
1537 icom_adapter->base_addr_pci = pci_resource_start(dev, 0);
1538 icom_adapter->pci_dev = dev;
1539 icom_adapter->version = ent->driver_data;
1540 icom_adapter->subsystem_id = ent->subdevice;
1541
1542
1543 retval = icom_init_ports(icom_adapter);
1544 if (retval) {
1545 dev_err(&dev->dev, "Port configuration failed\n");
1546 goto probe_exit1;
1547 }
1548
1549 icom_adapter->base_addr = pci_ioremap_bar(dev, 0);
1550
1551 if (!icom_adapter->base_addr)
1552 goto probe_exit1;
1553
1554 /* save off irq and request irq line */
1555 if ( (retval = request_irq(dev->irq, icom_interrupt,
1556 IRQF_SHARED, ICOM_DRIVER_NAME,
1557 (void *) icom_adapter))) {
1558 goto probe_exit2;
1559 }
1560
1561 retval = icom_load_ports(icom_adapter);
1562
1563 for (index = 0; index < icom_adapter->numb_ports; index++) {
1564 icom_port = &icom_adapter->port_info[index];
1565
1566 if (icom_port->status == ICOM_PORT_ACTIVE) {
1567 icom_port->uart_port.irq = icom_port->adapter->pci_dev->irq;
1568 icom_port->uart_port.type = PORT_ICOM;
1569 icom_port->uart_port.iotype = UPIO_MEM;
1570 icom_port->uart_port.membase =
1571 (char *) icom_adapter->base_addr_pci;
1572 icom_port->uart_port.fifosize = 16;
1573 icom_port->uart_port.ops = &icom_ops;
1574 icom_port->uart_port.line =
1575 icom_port->port + icom_adapter->index * 4;
1576 if (uart_add_one_port (&icom_uart_driver, &icom_port->uart_port)) {
1577 icom_port->status = ICOM_PORT_OFF;
1578 dev_err(&dev->dev, "Device add failed\n");
1579 } else
1580 dev_info(&dev->dev, "Device added\n");
1581 }
1582 }
1583
1584 kref_init(&icom_adapter->kref);
1585 return 0;
1586
1587probe_exit2:
1588 iounmap(icom_adapter->base_addr);
1589probe_exit1:
1590 icom_free_adapter(icom_adapter);
1591
1592probe_exit0:
1593 pci_release_regions(dev);
1594 pci_disable_device(dev);
1595
1596 return retval;
1597}
1598
1599static void __devexit icom_remove(struct pci_dev *dev)
1600{
1601 struct icom_adapter *icom_adapter;
1602 struct list_head *tmp;
1603
1604 list_for_each(tmp, &icom_adapter_head) {
1605 icom_adapter = list_entry(tmp, struct icom_adapter,
1606 icom_adapter_entry);
1607 if (icom_adapter->pci_dev == dev) {
1608 kref_put(&icom_adapter->kref, icom_kref_release);
1609 return;
1610 }
1611 }
1612
1613 dev_err(&dev->dev, "Unable to find device to remove\n");
1614}
1615
1616static struct pci_driver icom_pci_driver = {
1617 .name = ICOM_DRIVER_NAME,
1618 .id_table = icom_pci_table,
1619 .probe = icom_probe,
1620 .remove = __devexit_p(icom_remove),
1621};
1622
1623static int __init icom_init(void)
1624{
1625 int ret;
1626
1627 spin_lock_init(&icom_lock);
1628
1629 ret = uart_register_driver(&icom_uart_driver);
1630 if (ret)
1631 return ret;
1632
1633 ret = pci_register_driver(&icom_pci_driver);
1634
1635 if (ret < 0)
1636 uart_unregister_driver(&icom_uart_driver);
1637
1638 return ret;
1639}
1640
1641static void __exit icom_exit(void)
1642{
1643 pci_unregister_driver(&icom_pci_driver);
1644 uart_unregister_driver(&icom_uart_driver);
1645}
1646
1647module_init(icom_init);
1648module_exit(icom_exit);
1649
1650MODULE_AUTHOR("Michael Anderson <mjanders@us.ibm.com>");
1651MODULE_DESCRIPTION("IBM iSeries Serial IOA driver");
1652MODULE_SUPPORTED_DEVICE
1653 ("IBM iSeries 2745, 2771, 2772, 2742, 2793 and 2805 Communications adapters");
1654MODULE_LICENSE("GPL");
1655MODULE_FIRMWARE("icom_call_setup.bin");
1656MODULE_FIRMWARE("icom_res_dce.bin");
1657MODULE_FIRMWARE("icom_asc.bin");