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1// SPDX-License-Identifier: GPL-2.0
2/*
3 * LiteX LiteSDCard driver
4 *
5 * Copyright (C) 2019-2020 Antmicro <contact@antmicro.com>
6 * Copyright (C) 2019-2020 Kamil Rakoczy <krakoczy@antmicro.com>
7 * Copyright (C) 2019-2020 Maciej Dudek <mdudek@internships.antmicro.com>
8 * Copyright (C) 2020 Paul Mackerras <paulus@ozlabs.org>
9 * Copyright (C) 2020-2022 Gabriel Somlo <gsomlo@gmail.com>
10 */
11
12#include <linux/bits.h>
13#include <linux/clk.h>
14#include <linux/delay.h>
15#include <linux/dma-mapping.h>
16#include <linux/interrupt.h>
17#include <linux/iopoll.h>
18#include <linux/litex.h>
19#include <linux/mod_devicetable.h>
20#include <linux/module.h>
21#include <linux/platform_device.h>
22
23#include <linux/mmc/host.h>
24#include <linux/mmc/mmc.h>
25#include <linux/mmc/sd.h>
26
27#define LITEX_PHY_CARDDETECT 0x00
28#define LITEX_PHY_CLOCKERDIV 0x04
29#define LITEX_PHY_INITIALIZE 0x08
30#define LITEX_PHY_WRITESTATUS 0x0C
31#define LITEX_CORE_CMDARG 0x00
32#define LITEX_CORE_CMDCMD 0x04
33#define LITEX_CORE_CMDSND 0x08
34#define LITEX_CORE_CMDRSP 0x0C
35#define LITEX_CORE_CMDEVT 0x1C
36#define LITEX_CORE_DATEVT 0x20
37#define LITEX_CORE_BLKLEN 0x24
38#define LITEX_CORE_BLKCNT 0x28
39#define LITEX_BLK2MEM_BASE 0x00
40#define LITEX_BLK2MEM_LEN 0x08
41#define LITEX_BLK2MEM_ENA 0x0C
42#define LITEX_BLK2MEM_DONE 0x10
43#define LITEX_BLK2MEM_LOOP 0x14
44#define LITEX_MEM2BLK_BASE 0x00
45#define LITEX_MEM2BLK_LEN 0x08
46#define LITEX_MEM2BLK_ENA 0x0C
47#define LITEX_MEM2BLK_DONE 0x10
48#define LITEX_MEM2BLK_LOOP 0x14
49#define LITEX_MEM2BLK 0x18
50#define LITEX_IRQ_STATUS 0x00
51#define LITEX_IRQ_PENDING 0x04
52#define LITEX_IRQ_ENABLE 0x08
53
54#define SD_CTL_DATA_XFER_NONE 0
55#define SD_CTL_DATA_XFER_READ 1
56#define SD_CTL_DATA_XFER_WRITE 2
57
58#define SD_CTL_RESP_NONE 0
59#define SD_CTL_RESP_SHORT 1
60#define SD_CTL_RESP_LONG 2
61#define SD_CTL_RESP_SHORT_BUSY 3
62
63#define SD_BIT_DONE BIT(0)
64#define SD_BIT_WR_ERR BIT(1)
65#define SD_BIT_TIMEOUT BIT(2)
66#define SD_BIT_CRC_ERR BIT(3)
67
68#define SD_SLEEP_US 5
69#define SD_TIMEOUT_US 20000
70
71#define SDIRQ_CARD_DETECT 1
72#define SDIRQ_SD_TO_MEM_DONE 2
73#define SDIRQ_MEM_TO_SD_DONE 4
74#define SDIRQ_CMD_DONE 8
75
76struct litex_mmc_host {
77 struct mmc_host *mmc;
78
79 void __iomem *sdphy;
80 void __iomem *sdcore;
81 void __iomem *sdreader;
82 void __iomem *sdwriter;
83 void __iomem *sdirq;
84
85 void *buffer;
86 size_t buf_size;
87 dma_addr_t dma;
88
89 struct completion cmd_done;
90 int irq;
91
92 unsigned int ref_clk;
93 unsigned int sd_clk;
94
95 u32 resp[4];
96 u16 rca;
97
98 bool is_bus_width_set;
99 bool app_cmd;
100};
101
102static int litex_mmc_sdcard_wait_done(void __iomem *reg, struct device *dev)
103{
104 u8 evt;
105 int ret;
106
107 ret = readx_poll_timeout(litex_read8, reg, evt, evt & SD_BIT_DONE,
108 SD_SLEEP_US, SD_TIMEOUT_US);
109 if (ret)
110 return ret;
111 if (evt == SD_BIT_DONE)
112 return 0;
113 if (evt & SD_BIT_WR_ERR)
114 return -EIO;
115 if (evt & SD_BIT_TIMEOUT)
116 return -ETIMEDOUT;
117 if (evt & SD_BIT_CRC_ERR)
118 return -EILSEQ;
119 dev_err(dev, "%s: unknown error (evt=%x)\n", __func__, evt);
120 return -EINVAL;
121}
122
123static int litex_mmc_send_cmd(struct litex_mmc_host *host,
124 u8 cmd, u32 arg, u8 response_len, u8 transfer)
125{
126 struct device *dev = mmc_dev(host->mmc);
127 void __iomem *reg;
128 int ret;
129 u8 evt;
130
131 litex_write32(host->sdcore + LITEX_CORE_CMDARG, arg);
132 litex_write32(host->sdcore + LITEX_CORE_CMDCMD,
133 cmd << 8 | transfer << 5 | response_len);
134 litex_write8(host->sdcore + LITEX_CORE_CMDSND, 1);
135
136 /*
137 * Wait for an interrupt if we have an interrupt and either there is
138 * data to be transferred, or if the card can report busy via DAT0.
139 */
140 if (host->irq > 0 &&
141 (transfer != SD_CTL_DATA_XFER_NONE ||
142 response_len == SD_CTL_RESP_SHORT_BUSY)) {
143 reinit_completion(&host->cmd_done);
144 litex_write32(host->sdirq + LITEX_IRQ_ENABLE,
145 SDIRQ_CMD_DONE | SDIRQ_CARD_DETECT);
146 wait_for_completion(&host->cmd_done);
147 }
148
149 ret = litex_mmc_sdcard_wait_done(host->sdcore + LITEX_CORE_CMDEVT, dev);
150 if (ret) {
151 dev_err(dev, "Command (cmd %d) error, status %d\n", cmd, ret);
152 return ret;
153 }
154
155 if (response_len != SD_CTL_RESP_NONE) {
156 /*
157 * NOTE: this matches the semantics of litex_read32()
158 * regardless of underlying arch endianness!
159 */
160 memcpy_fromio(host->resp,
161 host->sdcore + LITEX_CORE_CMDRSP, 0x10);
162 }
163
164 if (!host->app_cmd && cmd == SD_SEND_RELATIVE_ADDR)
165 host->rca = (host->resp[3] >> 16);
166
167 host->app_cmd = (cmd == MMC_APP_CMD);
168
169 if (transfer == SD_CTL_DATA_XFER_NONE)
170 return ret; /* OK from prior litex_mmc_sdcard_wait_done() */
171
172 ret = litex_mmc_sdcard_wait_done(host->sdcore + LITEX_CORE_DATEVT, dev);
173 if (ret) {
174 dev_err(dev, "Data xfer (cmd %d) error, status %d\n", cmd, ret);
175 return ret;
176 }
177
178 /* Wait for completion of (read or write) DMA transfer */
179 reg = (transfer == SD_CTL_DATA_XFER_READ) ?
180 host->sdreader + LITEX_BLK2MEM_DONE :
181 host->sdwriter + LITEX_MEM2BLK_DONE;
182 ret = readx_poll_timeout(litex_read8, reg, evt, evt & SD_BIT_DONE,
183 SD_SLEEP_US, SD_TIMEOUT_US);
184 if (ret)
185 dev_err(dev, "DMA timeout (cmd %d)\n", cmd);
186
187 return ret;
188}
189
190static int litex_mmc_send_app_cmd(struct litex_mmc_host *host)
191{
192 return litex_mmc_send_cmd(host, MMC_APP_CMD, host->rca << 16,
193 SD_CTL_RESP_SHORT, SD_CTL_DATA_XFER_NONE);
194}
195
196static int litex_mmc_send_set_bus_w_cmd(struct litex_mmc_host *host, u32 width)
197{
198 return litex_mmc_send_cmd(host, SD_APP_SET_BUS_WIDTH, width,
199 SD_CTL_RESP_SHORT, SD_CTL_DATA_XFER_NONE);
200}
201
202static int litex_mmc_set_bus_width(struct litex_mmc_host *host)
203{
204 bool app_cmd_sent;
205 int ret;
206
207 if (host->is_bus_width_set)
208 return 0;
209
210 /* Ensure 'app_cmd' precedes 'app_set_bus_width_cmd' */
211 app_cmd_sent = host->app_cmd; /* was preceding command app_cmd? */
212 if (!app_cmd_sent) {
213 ret = litex_mmc_send_app_cmd(host);
214 if (ret)
215 return ret;
216 }
217
218 /* LiteSDCard only supports 4-bit bus width */
219 ret = litex_mmc_send_set_bus_w_cmd(host, MMC_BUS_WIDTH_4);
220 if (ret)
221 return ret;
222
223 /* Re-send 'app_cmd' if necessary */
224 if (app_cmd_sent) {
225 ret = litex_mmc_send_app_cmd(host);
226 if (ret)
227 return ret;
228 }
229
230 host->is_bus_width_set = true;
231
232 return 0;
233}
234
235static int litex_mmc_get_cd(struct mmc_host *mmc)
236{
237 struct litex_mmc_host *host = mmc_priv(mmc);
238 int ret;
239
240 if (!mmc_card_is_removable(mmc))
241 return 1;
242
243 ret = !litex_read8(host->sdphy + LITEX_PHY_CARDDETECT);
244 if (ret)
245 return ret;
246
247 /* Ensure bus width will be set (again) upon card (re)insertion */
248 host->is_bus_width_set = false;
249
250 return 0;
251}
252
253static irqreturn_t litex_mmc_interrupt(int irq, void *arg)
254{
255 struct mmc_host *mmc = arg;
256 struct litex_mmc_host *host = mmc_priv(mmc);
257 u32 pending = litex_read32(host->sdirq + LITEX_IRQ_PENDING);
258 irqreturn_t ret = IRQ_NONE;
259
260 /* Check for card change interrupt */
261 if (pending & SDIRQ_CARD_DETECT) {
262 litex_write32(host->sdirq + LITEX_IRQ_PENDING,
263 SDIRQ_CARD_DETECT);
264 mmc_detect_change(mmc, msecs_to_jiffies(10));
265 ret = IRQ_HANDLED;
266 }
267
268 /* Check for command completed */
269 if (pending & SDIRQ_CMD_DONE) {
270 /* Disable it so it doesn't keep interrupting */
271 litex_write32(host->sdirq + LITEX_IRQ_ENABLE,
272 SDIRQ_CARD_DETECT);
273 complete(&host->cmd_done);
274 ret = IRQ_HANDLED;
275 }
276
277 return ret;
278}
279
280static u32 litex_mmc_response_len(struct mmc_command *cmd)
281{
282 if (cmd->flags & MMC_RSP_136)
283 return SD_CTL_RESP_LONG;
284 if (!(cmd->flags & MMC_RSP_PRESENT))
285 return SD_CTL_RESP_NONE;
286 if (cmd->flags & MMC_RSP_BUSY)
287 return SD_CTL_RESP_SHORT_BUSY;
288 return SD_CTL_RESP_SHORT;
289}
290
291static void litex_mmc_do_dma(struct litex_mmc_host *host, struct mmc_data *data,
292 unsigned int *len, bool *direct, u8 *transfer)
293{
294 struct device *dev = mmc_dev(host->mmc);
295 dma_addr_t dma;
296 int sg_count;
297
298 /*
299 * Try to DMA directly to/from the data buffer.
300 * We can do that if the buffer can be mapped for DMA
301 * in one contiguous chunk.
302 */
303 dma = host->dma;
304 *len = data->blksz * data->blocks;
305 sg_count = dma_map_sg(dev, data->sg, data->sg_len,
306 mmc_get_dma_dir(data));
307 if (sg_count == 1) {
308 dma = sg_dma_address(data->sg);
309 *len = sg_dma_len(data->sg);
310 *direct = true;
311 } else if (*len > host->buf_size)
312 *len = host->buf_size;
313
314 if (data->flags & MMC_DATA_READ) {
315 litex_write8(host->sdreader + LITEX_BLK2MEM_ENA, 0);
316 litex_write64(host->sdreader + LITEX_BLK2MEM_BASE, dma);
317 litex_write32(host->sdreader + LITEX_BLK2MEM_LEN, *len);
318 litex_write8(host->sdreader + LITEX_BLK2MEM_ENA, 1);
319 *transfer = SD_CTL_DATA_XFER_READ;
320 } else if (data->flags & MMC_DATA_WRITE) {
321 if (!*direct)
322 sg_copy_to_buffer(data->sg, data->sg_len,
323 host->buffer, *len);
324 litex_write8(host->sdwriter + LITEX_MEM2BLK_ENA, 0);
325 litex_write64(host->sdwriter + LITEX_MEM2BLK_BASE, dma);
326 litex_write32(host->sdwriter + LITEX_MEM2BLK_LEN, *len);
327 litex_write8(host->sdwriter + LITEX_MEM2BLK_ENA, 1);
328 *transfer = SD_CTL_DATA_XFER_WRITE;
329 } else {
330 dev_warn(dev, "Data present w/o read or write flag.\n");
331 /* Continue: set cmd status, mark req done */
332 }
333
334 litex_write16(host->sdcore + LITEX_CORE_BLKLEN, data->blksz);
335 litex_write32(host->sdcore + LITEX_CORE_BLKCNT, data->blocks);
336}
337
338static void litex_mmc_request(struct mmc_host *mmc, struct mmc_request *mrq)
339{
340 struct litex_mmc_host *host = mmc_priv(mmc);
341 struct device *dev = mmc_dev(mmc);
342 struct mmc_command *cmd = mrq->cmd;
343 struct mmc_command *sbc = mrq->sbc;
344 struct mmc_data *data = mrq->data;
345 struct mmc_command *stop = mrq->stop;
346 unsigned int retries = cmd->retries;
347 unsigned int len = 0;
348 bool direct = false;
349 u32 response_len = litex_mmc_response_len(cmd);
350 u8 transfer = SD_CTL_DATA_XFER_NONE;
351
352 /* First check that the card is still there */
353 if (!litex_mmc_get_cd(mmc)) {
354 cmd->error = -ENOMEDIUM;
355 mmc_request_done(mmc, mrq);
356 return;
357 }
358
359 /* Send set-block-count command if needed */
360 if (sbc) {
361 sbc->error = litex_mmc_send_cmd(host, sbc->opcode, sbc->arg,
362 litex_mmc_response_len(sbc),
363 SD_CTL_DATA_XFER_NONE);
364 if (sbc->error) {
365 host->is_bus_width_set = false;
366 mmc_request_done(mmc, mrq);
367 return;
368 }
369 }
370
371 if (data) {
372 /*
373 * LiteSDCard only supports 4-bit bus width; therefore, we MUST
374 * inject a SET_BUS_WIDTH (acmd6) before the very first data
375 * transfer, earlier than when the mmc subsystem would normally
376 * get around to it!
377 */
378 cmd->error = litex_mmc_set_bus_width(host);
379 if (cmd->error) {
380 dev_err(dev, "Can't set bus width!\n");
381 mmc_request_done(mmc, mrq);
382 return;
383 }
384
385 litex_mmc_do_dma(host, data, &len, &direct, &transfer);
386 }
387
388 do {
389 cmd->error = litex_mmc_send_cmd(host, cmd->opcode, cmd->arg,
390 response_len, transfer);
391 } while (cmd->error && retries-- > 0);
392
393 if (cmd->error) {
394 /* Card may be gone; don't assume bus width is still set */
395 host->is_bus_width_set = false;
396 }
397
398 if (response_len == SD_CTL_RESP_SHORT) {
399 /* Pull short response fields from appropriate host registers */
400 cmd->resp[0] = host->resp[3];
401 cmd->resp[1] = host->resp[2] & 0xFF;
402 } else if (response_len == SD_CTL_RESP_LONG) {
403 cmd->resp[0] = host->resp[0];
404 cmd->resp[1] = host->resp[1];
405 cmd->resp[2] = host->resp[2];
406 cmd->resp[3] = host->resp[3];
407 }
408
409 /* Send stop-transmission command if required */
410 if (stop && (cmd->error || !sbc)) {
411 stop->error = litex_mmc_send_cmd(host, stop->opcode, stop->arg,
412 litex_mmc_response_len(stop),
413 SD_CTL_DATA_XFER_NONE);
414 if (stop->error)
415 host->is_bus_width_set = false;
416 }
417
418 if (data) {
419 dma_unmap_sg(dev, data->sg, data->sg_len,
420 mmc_get_dma_dir(data));
421 }
422
423 if (!cmd->error && transfer != SD_CTL_DATA_XFER_NONE) {
424 data->bytes_xfered = min(len, mmc->max_req_size);
425 if (transfer == SD_CTL_DATA_XFER_READ && !direct) {
426 sg_copy_from_buffer(data->sg, sg_nents(data->sg),
427 host->buffer, data->bytes_xfered);
428 }
429 }
430
431 mmc_request_done(mmc, mrq);
432}
433
434static void litex_mmc_setclk(struct litex_mmc_host *host, unsigned int freq)
435{
436 struct device *dev = mmc_dev(host->mmc);
437 u32 div;
438
439 div = freq ? host->ref_clk / freq : 256U;
440 div = roundup_pow_of_two(div);
441 div = clamp(div, 2U, 256U);
442 dev_dbg(dev, "sd_clk_freq=%d: set to %d via div=%d\n",
443 freq, host->ref_clk / div, div);
444 litex_write16(host->sdphy + LITEX_PHY_CLOCKERDIV, div);
445 host->sd_clk = freq;
446}
447
448static void litex_mmc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
449{
450 struct litex_mmc_host *host = mmc_priv(mmc);
451
452 /*
453 * NOTE: Ignore any ios->bus_width updates; they occur right after
454 * the mmc core sends its own acmd6 bus-width change notification,
455 * which is redundant since we snoop on the command flow and inject
456 * an early acmd6 before the first data transfer command is sent!
457 */
458
459 /* Update sd_clk */
460 if (ios->clock != host->sd_clk)
461 litex_mmc_setclk(host, ios->clock);
462}
463
464static const struct mmc_host_ops litex_mmc_ops = {
465 .get_cd = litex_mmc_get_cd,
466 .request = litex_mmc_request,
467 .set_ios = litex_mmc_set_ios,
468};
469
470static int litex_mmc_irq_init(struct platform_device *pdev,
471 struct litex_mmc_host *host)
472{
473 struct device *dev = mmc_dev(host->mmc);
474 int ret;
475
476 ret = platform_get_irq_optional(pdev, 0);
477 if (ret < 0 && ret != -ENXIO)
478 return ret;
479 if (ret > 0)
480 host->irq = ret;
481 else {
482 dev_warn(dev, "Failed to get IRQ, using polling\n");
483 goto use_polling;
484 }
485
486 host->sdirq = devm_platform_ioremap_resource_byname(pdev, "irq");
487 if (IS_ERR(host->sdirq))
488 return PTR_ERR(host->sdirq);
489
490 ret = devm_request_irq(dev, host->irq, litex_mmc_interrupt, 0,
491 "litex-mmc", host->mmc);
492 if (ret < 0) {
493 dev_warn(dev, "IRQ request error %d, using polling\n", ret);
494 goto use_polling;
495 }
496
497 /* Clear & enable card-change interrupts */
498 litex_write32(host->sdirq + LITEX_IRQ_PENDING, SDIRQ_CARD_DETECT);
499 litex_write32(host->sdirq + LITEX_IRQ_ENABLE, SDIRQ_CARD_DETECT);
500
501 return 0;
502
503use_polling:
504 host->mmc->caps |= MMC_CAP_NEEDS_POLL;
505 host->irq = 0;
506 return 0;
507}
508
509static void litex_mmc_free_host_wrapper(void *mmc)
510{
511 mmc_free_host(mmc);
512}
513
514static int litex_mmc_probe(struct platform_device *pdev)
515{
516 struct device *dev = &pdev->dev;
517 struct litex_mmc_host *host;
518 struct mmc_host *mmc;
519 struct clk *clk;
520 int ret;
521
522 /*
523 * NOTE: defaults to max_[req,seg]_size=PAGE_SIZE, max_blk_size=512,
524 * and max_blk_count accordingly set to 8;
525 * If for some reason we need to modify max_blk_count, we must also
526 * re-calculate `max_[req,seg]_size = max_blk_size * max_blk_count;`
527 */
528 mmc = mmc_alloc_host(sizeof(struct litex_mmc_host), dev);
529 if (!mmc)
530 return -ENOMEM;
531
532 ret = devm_add_action_or_reset(dev, litex_mmc_free_host_wrapper, mmc);
533 if (ret)
534 return dev_err_probe(dev, ret,
535 "Can't register mmc_free_host action\n");
536
537 host = mmc_priv(mmc);
538 host->mmc = mmc;
539
540 /* Initialize clock source */
541 clk = devm_clk_get(dev, NULL);
542 if (IS_ERR(clk))
543 return dev_err_probe(dev, PTR_ERR(clk), "can't get clock\n");
544 host->ref_clk = clk_get_rate(clk);
545 host->sd_clk = 0;
546
547 /*
548 * LiteSDCard only supports 4-bit bus width; therefore, we MUST inject
549 * a SET_BUS_WIDTH (acmd6) before the very first data transfer, earlier
550 * than when the mmc subsystem would normally get around to it!
551 */
552 host->is_bus_width_set = false;
553 host->app_cmd = false;
554
555 /* LiteSDCard can support 64-bit DMA addressing */
556 ret = dma_set_mask_and_coherent(dev, DMA_BIT_MASK(64));
557 if (ret)
558 return ret;
559
560 host->buf_size = mmc->max_req_size * 2;
561 host->buffer = dmam_alloc_coherent(dev, host->buf_size,
562 &host->dma, GFP_KERNEL);
563 if (host->buffer == NULL)
564 return -ENOMEM;
565
566 host->sdphy = devm_platform_ioremap_resource_byname(pdev, "phy");
567 if (IS_ERR(host->sdphy))
568 return PTR_ERR(host->sdphy);
569
570 host->sdcore = devm_platform_ioremap_resource_byname(pdev, "core");
571 if (IS_ERR(host->sdcore))
572 return PTR_ERR(host->sdcore);
573
574 host->sdreader = devm_platform_ioremap_resource_byname(pdev, "reader");
575 if (IS_ERR(host->sdreader))
576 return PTR_ERR(host->sdreader);
577
578 host->sdwriter = devm_platform_ioremap_resource_byname(pdev, "writer");
579 if (IS_ERR(host->sdwriter))
580 return PTR_ERR(host->sdwriter);
581
582 /* Ensure DMA bus masters are disabled */
583 litex_write8(host->sdreader + LITEX_BLK2MEM_ENA, 0);
584 litex_write8(host->sdwriter + LITEX_MEM2BLK_ENA, 0);
585
586 init_completion(&host->cmd_done);
587 ret = litex_mmc_irq_init(pdev, host);
588 if (ret)
589 return ret;
590
591 mmc->ops = &litex_mmc_ops;
592
593 ret = mmc_regulator_get_supply(mmc);
594 if (ret || mmc->ocr_avail == 0) {
595 dev_warn(dev, "can't get voltage, defaulting to 3.3V\n");
596 mmc->ocr_avail = MMC_VDD_32_33 | MMC_VDD_33_34;
597 }
598
599 /*
600 * Set default sd_clk frequency range based on empirical observations
601 * of LiteSDCard gateware behavior on typical SDCard media
602 */
603 mmc->f_min = 12.5e6;
604 mmc->f_max = 50e6;
605
606 ret = mmc_of_parse(mmc);
607 if (ret)
608 return ret;
609
610 /* Force 4-bit bus_width (only width supported by hardware) */
611 mmc->caps &= ~MMC_CAP_8_BIT_DATA;
612 mmc->caps |= MMC_CAP_4_BIT_DATA;
613
614 /* Set default capabilities */
615 mmc->caps |= MMC_CAP_WAIT_WHILE_BUSY |
616 MMC_CAP_DRIVER_TYPE_D |
617 MMC_CAP_CMD23;
618 mmc->caps2 |= MMC_CAP2_NO_WRITE_PROTECT |
619 MMC_CAP2_NO_SDIO |
620 MMC_CAP2_NO_MMC;
621
622 platform_set_drvdata(pdev, host);
623
624 ret = mmc_add_host(mmc);
625 if (ret)
626 return ret;
627
628 dev_info(dev, "LiteX MMC controller initialized.\n");
629 return 0;
630}
631
632static int litex_mmc_remove(struct platform_device *pdev)
633{
634 struct litex_mmc_host *host = platform_get_drvdata(pdev);
635
636 mmc_remove_host(host->mmc);
637 return 0;
638}
639
640static const struct of_device_id litex_match[] = {
641 { .compatible = "litex,mmc" },
642 { }
643};
644MODULE_DEVICE_TABLE(of, litex_match);
645
646static struct platform_driver litex_mmc_driver = {
647 .probe = litex_mmc_probe,
648 .remove = litex_mmc_remove,
649 .driver = {
650 .name = "litex-mmc",
651 .of_match_table = litex_match,
652 },
653};
654module_platform_driver(litex_mmc_driver);
655
656MODULE_DESCRIPTION("LiteX SDCard driver");
657MODULE_AUTHOR("Antmicro <contact@antmicro.com>");
658MODULE_AUTHOR("Kamil Rakoczy <krakoczy@antmicro.com>");
659MODULE_AUTHOR("Maciej Dudek <mdudek@internships.antmicro.com>");
660MODULE_AUTHOR("Paul Mackerras <paulus@ozlabs.org>");
661MODULE_AUTHOR("Gabriel Somlo <gsomlo@gmail.com>");
662MODULE_LICENSE("GPL v2");