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1// SPDX-License-Identifier: GPL-2.0-or-later
2/*
3 * Synopsys DesignWare I2C adapter driver (master only).
4 *
5 * Based on the TI DAVINCI I2C adapter driver.
6 *
7 * Copyright (C) 2006 Texas Instruments.
8 * Copyright (C) 2007 MontaVista Software Inc.
9 * Copyright (C) 2009 Provigent Ltd.
10 * Copyright (C) 2011, 2015, 2016 Intel Corporation.
11 */
12#include <linux/acpi.h>
13#include <linux/delay.h>
14#include <linux/err.h>
15#include <linux/errno.h>
16#include <linux/i2c.h>
17#include <linux/interrupt.h>
18#include <linux/io.h>
19#include <linux/kernel.h>
20#include <linux/module.h>
21#include <linux/pci.h>
22#include <linux/pm_runtime.h>
23#include <linux/sched.h>
24#include <linux/slab.h>
25
26#include "i2c-designware-core.h"
27#include "i2c-ccgx-ucsi.h"
28
29#define DRIVER_NAME "i2c-designware-pci"
30
31enum dw_pci_ctl_id_t {
32 medfield,
33 merrifield,
34 baytrail,
35 cherrytrail,
36 haswell,
37 elkhartlake,
38 navi_amd,
39};
40
41/*
42 * This is a legacy structure to describe the hardware counters
43 * to configure signal timings on the bus. For Device Tree platforms
44 * one should use the respective properties and for ACPI there is
45 * a set of ACPI methods that provide these counters. No new
46 * platform should use this structure.
47 */
48struct dw_scl_sda_cfg {
49 u16 ss_hcnt;
50 u16 fs_hcnt;
51 u16 ss_lcnt;
52 u16 fs_lcnt;
53 u32 sda_hold;
54};
55
56struct dw_pci_controller {
57 u32 bus_num;
58 u32 flags;
59 struct dw_scl_sda_cfg *scl_sda_cfg;
60 int (*setup)(struct pci_dev *pdev, struct dw_pci_controller *c);
61 u32 (*get_clk_rate_khz)(struct dw_i2c_dev *dev);
62};
63
64/* Merrifield HCNT/LCNT/SDA hold time */
65static struct dw_scl_sda_cfg mrfld_config = {
66 .ss_hcnt = 0x2f8,
67 .fs_hcnt = 0x87,
68 .ss_lcnt = 0x37b,
69 .fs_lcnt = 0x10a,
70};
71
72/* BayTrail HCNT/LCNT/SDA hold time */
73static struct dw_scl_sda_cfg byt_config = {
74 .ss_hcnt = 0x200,
75 .fs_hcnt = 0x55,
76 .ss_lcnt = 0x200,
77 .fs_lcnt = 0x99,
78 .sda_hold = 0x6,
79};
80
81/* Haswell HCNT/LCNT/SDA hold time */
82static struct dw_scl_sda_cfg hsw_config = {
83 .ss_hcnt = 0x01b0,
84 .fs_hcnt = 0x48,
85 .ss_lcnt = 0x01fb,
86 .fs_lcnt = 0xa0,
87 .sda_hold = 0x9,
88};
89
90/* NAVI-AMD HCNT/LCNT/SDA hold time */
91static struct dw_scl_sda_cfg navi_amd_config = {
92 .ss_hcnt = 0x1ae,
93 .ss_lcnt = 0x23a,
94 .sda_hold = 0x9,
95};
96
97static u32 mfld_get_clk_rate_khz(struct dw_i2c_dev *dev)
98{
99 return 25000;
100}
101
102static int mfld_setup(struct pci_dev *pdev, struct dw_pci_controller *c)
103{
104 struct dw_i2c_dev *dev = dev_get_drvdata(&pdev->dev);
105
106 switch (pdev->device) {
107 case 0x0817:
108 dev->timings.bus_freq_hz = I2C_MAX_STANDARD_MODE_FREQ;
109 fallthrough;
110 case 0x0818:
111 case 0x0819:
112 c->bus_num = pdev->device - 0x817 + 3;
113 return 0;
114 case 0x082C:
115 case 0x082D:
116 case 0x082E:
117 c->bus_num = pdev->device - 0x82C + 0;
118 return 0;
119 }
120 return -ENODEV;
121}
122
123static int mrfld_setup(struct pci_dev *pdev, struct dw_pci_controller *c)
124{
125 /*
126 * On Intel Merrifield the user visible i2c buses are enumerated
127 * [1..7]. So, we add 1 to shift the default range. Besides that the
128 * first PCI slot provides 4 functions, that's why we have to add 0 to
129 * the first slot and 4 to the next one.
130 */
131 switch (PCI_SLOT(pdev->devfn)) {
132 case 8:
133 c->bus_num = PCI_FUNC(pdev->devfn) + 0 + 1;
134 return 0;
135 case 9:
136 c->bus_num = PCI_FUNC(pdev->devfn) + 4 + 1;
137 return 0;
138 }
139 return -ENODEV;
140}
141
142static u32 ehl_get_clk_rate_khz(struct dw_i2c_dev *dev)
143{
144 return 100000;
145}
146
147static u32 navi_amd_get_clk_rate_khz(struct dw_i2c_dev *dev)
148{
149 return 100000;
150}
151
152static int navi_amd_setup(struct pci_dev *pdev, struct dw_pci_controller *c)
153{
154 struct dw_i2c_dev *dev = dev_get_drvdata(&pdev->dev);
155
156 dev->flags |= MODEL_AMD_NAVI_GPU;
157 dev->timings.bus_freq_hz = I2C_MAX_STANDARD_MODE_FREQ;
158 return 0;
159}
160
161static struct dw_pci_controller dw_pci_controllers[] = {
162 [medfield] = {
163 .bus_num = -1,
164 .setup = mfld_setup,
165 .get_clk_rate_khz = mfld_get_clk_rate_khz,
166 },
167 [merrifield] = {
168 .bus_num = -1,
169 .scl_sda_cfg = &mrfld_config,
170 .setup = mrfld_setup,
171 },
172 [baytrail] = {
173 .bus_num = -1,
174 .scl_sda_cfg = &byt_config,
175 },
176 [haswell] = {
177 .bus_num = -1,
178 .scl_sda_cfg = &hsw_config,
179 },
180 [cherrytrail] = {
181 .bus_num = -1,
182 .scl_sda_cfg = &byt_config,
183 },
184 [elkhartlake] = {
185 .bus_num = -1,
186 .get_clk_rate_khz = ehl_get_clk_rate_khz,
187 },
188 [navi_amd] = {
189 .bus_num = -1,
190 .scl_sda_cfg = &navi_amd_config,
191 .setup = navi_amd_setup,
192 .get_clk_rate_khz = navi_amd_get_clk_rate_khz,
193 },
194};
195
196static int __maybe_unused i2c_dw_pci_runtime_suspend(struct device *dev)
197{
198 struct dw_i2c_dev *i_dev = dev_get_drvdata(dev);
199
200 i_dev->disable(i_dev);
201 return 0;
202}
203
204static int __maybe_unused i2c_dw_pci_suspend(struct device *dev)
205{
206 struct dw_i2c_dev *i_dev = dev_get_drvdata(dev);
207
208 i2c_mark_adapter_suspended(&i_dev->adapter);
209
210 return i2c_dw_pci_runtime_suspend(dev);
211}
212
213static int __maybe_unused i2c_dw_pci_runtime_resume(struct device *dev)
214{
215 struct dw_i2c_dev *i_dev = dev_get_drvdata(dev);
216
217 return i_dev->init(i_dev);
218}
219
220static int __maybe_unused i2c_dw_pci_resume(struct device *dev)
221{
222 struct dw_i2c_dev *i_dev = dev_get_drvdata(dev);
223 int ret;
224
225 ret = i2c_dw_pci_runtime_resume(dev);
226
227 i2c_mark_adapter_resumed(&i_dev->adapter);
228
229 return ret;
230}
231
232static const struct dev_pm_ops i2c_dw_pm_ops = {
233 SET_SYSTEM_SLEEP_PM_OPS(i2c_dw_pci_suspend, i2c_dw_pci_resume)
234 SET_RUNTIME_PM_OPS(i2c_dw_pci_runtime_suspend, i2c_dw_pci_runtime_resume, NULL)
235};
236
237static int i2c_dw_pci_probe(struct pci_dev *pdev,
238 const struct pci_device_id *id)
239{
240 struct dw_i2c_dev *dev;
241 struct i2c_adapter *adap;
242 int r;
243 struct dw_pci_controller *controller;
244 struct dw_scl_sda_cfg *cfg;
245 struct i2c_timings *t;
246
247 if (id->driver_data >= ARRAY_SIZE(dw_pci_controllers))
248 return dev_err_probe(&pdev->dev, -EINVAL,
249 "Invalid driver data %ld\n",
250 id->driver_data);
251
252 controller = &dw_pci_controllers[id->driver_data];
253
254 r = pcim_enable_device(pdev);
255 if (r)
256 return dev_err_probe(&pdev->dev, r,
257 "Failed to enable I2C PCI device\n");
258
259 pci_set_master(pdev);
260
261 r = pcim_iomap_regions(pdev, 1 << 0, pci_name(pdev));
262 if (r)
263 return dev_err_probe(&pdev->dev, r,
264 "I/O memory remapping failed\n");
265
266 dev = devm_kzalloc(&pdev->dev, sizeof(*dev), GFP_KERNEL);
267 if (!dev)
268 return -ENOMEM;
269
270 r = pci_alloc_irq_vectors(pdev, 1, 1, PCI_IRQ_ALL_TYPES);
271 if (r < 0)
272 return r;
273
274 dev->get_clk_rate_khz = controller->get_clk_rate_khz;
275 dev->base = pcim_iomap_table(pdev)[0];
276 dev->dev = &pdev->dev;
277 dev->irq = pci_irq_vector(pdev, 0);
278 dev->flags |= controller->flags;
279
280 t = &dev->timings;
281 i2c_parse_fw_timings(&pdev->dev, t, false);
282
283 pci_set_drvdata(pdev, dev);
284
285 if (controller->setup) {
286 r = controller->setup(pdev, controller);
287 if (r) {
288 pci_free_irq_vectors(pdev);
289 return r;
290 }
291 }
292
293 i2c_dw_adjust_bus_speed(dev);
294
295 if (has_acpi_companion(&pdev->dev))
296 i2c_dw_acpi_configure(&pdev->dev);
297
298 r = i2c_dw_validate_speed(dev);
299 if (r) {
300 pci_free_irq_vectors(pdev);
301 return r;
302 }
303
304 i2c_dw_configure(dev);
305
306 if (controller->scl_sda_cfg) {
307 cfg = controller->scl_sda_cfg;
308 dev->ss_hcnt = cfg->ss_hcnt;
309 dev->fs_hcnt = cfg->fs_hcnt;
310 dev->ss_lcnt = cfg->ss_lcnt;
311 dev->fs_lcnt = cfg->fs_lcnt;
312 dev->sda_hold_time = cfg->sda_hold;
313 }
314
315 adap = &dev->adapter;
316 adap->owner = THIS_MODULE;
317 adap->class = 0;
318 ACPI_COMPANION_SET(&adap->dev, ACPI_COMPANION(&pdev->dev));
319 adap->nr = controller->bus_num;
320
321 r = i2c_dw_probe(dev);
322 if (r) {
323 pci_free_irq_vectors(pdev);
324 return r;
325 }
326
327 if ((dev->flags & MODEL_MASK) == MODEL_AMD_NAVI_GPU) {
328 dev->slave = i2c_new_ccgx_ucsi(&dev->adapter, dev->irq, NULL);
329 if (IS_ERR(dev->slave))
330 return dev_err_probe(dev->dev, PTR_ERR(dev->slave),
331 "register UCSI failed\n");
332 }
333
334 pm_runtime_set_autosuspend_delay(&pdev->dev, 1000);
335 pm_runtime_use_autosuspend(&pdev->dev);
336 pm_runtime_put_autosuspend(&pdev->dev);
337 pm_runtime_allow(&pdev->dev);
338
339 return 0;
340}
341
342static void i2c_dw_pci_remove(struct pci_dev *pdev)
343{
344 struct dw_i2c_dev *dev = pci_get_drvdata(pdev);
345
346 dev->disable(dev);
347 pm_runtime_forbid(&pdev->dev);
348 pm_runtime_get_noresume(&pdev->dev);
349
350 i2c_del_adapter(&dev->adapter);
351 devm_free_irq(&pdev->dev, dev->irq, dev);
352 pci_free_irq_vectors(pdev);
353}
354
355static const struct pci_device_id i2_designware_pci_ids[] = {
356 /* Medfield */
357 { PCI_VDEVICE(INTEL, 0x0817), medfield },
358 { PCI_VDEVICE(INTEL, 0x0818), medfield },
359 { PCI_VDEVICE(INTEL, 0x0819), medfield },
360 { PCI_VDEVICE(INTEL, 0x082C), medfield },
361 { PCI_VDEVICE(INTEL, 0x082D), medfield },
362 { PCI_VDEVICE(INTEL, 0x082E), medfield },
363 /* Merrifield */
364 { PCI_VDEVICE(INTEL, 0x1195), merrifield },
365 { PCI_VDEVICE(INTEL, 0x1196), merrifield },
366 /* Baytrail */
367 { PCI_VDEVICE(INTEL, 0x0F41), baytrail },
368 { PCI_VDEVICE(INTEL, 0x0F42), baytrail },
369 { PCI_VDEVICE(INTEL, 0x0F43), baytrail },
370 { PCI_VDEVICE(INTEL, 0x0F44), baytrail },
371 { PCI_VDEVICE(INTEL, 0x0F45), baytrail },
372 { PCI_VDEVICE(INTEL, 0x0F46), baytrail },
373 { PCI_VDEVICE(INTEL, 0x0F47), baytrail },
374 /* Haswell */
375 { PCI_VDEVICE(INTEL, 0x9c61), haswell },
376 { PCI_VDEVICE(INTEL, 0x9c62), haswell },
377 /* Braswell / Cherrytrail */
378 { PCI_VDEVICE(INTEL, 0x22C1), cherrytrail },
379 { PCI_VDEVICE(INTEL, 0x22C2), cherrytrail },
380 { PCI_VDEVICE(INTEL, 0x22C3), cherrytrail },
381 { PCI_VDEVICE(INTEL, 0x22C4), cherrytrail },
382 { PCI_VDEVICE(INTEL, 0x22C5), cherrytrail },
383 { PCI_VDEVICE(INTEL, 0x22C6), cherrytrail },
384 { PCI_VDEVICE(INTEL, 0x22C7), cherrytrail },
385 /* Elkhart Lake (PSE I2C) */
386 { PCI_VDEVICE(INTEL, 0x4bb9), elkhartlake },
387 { PCI_VDEVICE(INTEL, 0x4bba), elkhartlake },
388 { PCI_VDEVICE(INTEL, 0x4bbb), elkhartlake },
389 { PCI_VDEVICE(INTEL, 0x4bbc), elkhartlake },
390 { PCI_VDEVICE(INTEL, 0x4bbd), elkhartlake },
391 { PCI_VDEVICE(INTEL, 0x4bbe), elkhartlake },
392 { PCI_VDEVICE(INTEL, 0x4bbf), elkhartlake },
393 { PCI_VDEVICE(INTEL, 0x4bc0), elkhartlake },
394 /* AMD NAVI */
395 { PCI_VDEVICE(ATI, 0x7314), navi_amd },
396 { PCI_VDEVICE(ATI, 0x73a4), navi_amd },
397 { PCI_VDEVICE(ATI, 0x73e4), navi_amd },
398 { PCI_VDEVICE(ATI, 0x73c4), navi_amd },
399 { PCI_VDEVICE(ATI, 0x7444), navi_amd },
400 { PCI_VDEVICE(ATI, 0x7464), navi_amd },
401 { 0,}
402};
403MODULE_DEVICE_TABLE(pci, i2_designware_pci_ids);
404
405static struct pci_driver dw_i2c_driver = {
406 .name = DRIVER_NAME,
407 .id_table = i2_designware_pci_ids,
408 .probe = i2c_dw_pci_probe,
409 .remove = i2c_dw_pci_remove,
410 .driver = {
411 .pm = &i2c_dw_pm_ops,
412 },
413};
414module_pci_driver(dw_i2c_driver);
415
416/* Work with hotplug and coldplug */
417MODULE_ALIAS("i2c_designware-pci");
418MODULE_AUTHOR("Baruch Siach <baruch@tkos.co.il>");
419MODULE_DESCRIPTION("Synopsys DesignWare PCI I2C bus adapter");
420MODULE_LICENSE("GPL");
1/*
2 * Synopsys DesignWare I2C adapter driver (master only).
3 *
4 * Based on the TI DAVINCI I2C adapter driver.
5 *
6 * Copyright (C) 2006 Texas Instruments.
7 * Copyright (C) 2007 MontaVista Software Inc.
8 * Copyright (C) 2009 Provigent Ltd.
9 * Copyright (C) 2011 Intel corporation.
10 *
11 * ----------------------------------------------------------------------------
12 *
13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License as published by
15 * the Free Software Foundation; either version 2 of the License, or
16 * (at your option) any later version.
17 *
18 * This program is distributed in the hope that it will be useful,
19 * but WITHOUT ANY WARRANTY; without even the implied warranty of
20 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21 * GNU General Public License for more details.
22 *
23 * You should have received a copy of the GNU General Public License
24 * along with this program; if not, write to the Free Software
25 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
26 * ----------------------------------------------------------------------------
27 *
28 */
29
30#include <linux/kernel.h>
31#include <linux/module.h>
32#include <linux/delay.h>
33#include <linux/i2c.h>
34#include <linux/errno.h>
35#include <linux/sched.h>
36#include <linux/err.h>
37#include <linux/interrupt.h>
38#include <linux/io.h>
39#include <linux/slab.h>
40#include <linux/pci.h>
41#include <linux/pm_runtime.h>
42#include "i2c-designware-core.h"
43
44#define DRIVER_NAME "i2c-designware-pci"
45
46enum dw_pci_ctl_id_t {
47 moorestown_0,
48 moorestown_1,
49 moorestown_2,
50
51 medfield_0,
52 medfield_1,
53 medfield_2,
54 medfield_3,
55 medfield_4,
56 medfield_5,
57};
58
59struct dw_pci_controller {
60 u32 bus_num;
61 u32 bus_cfg;
62 u32 tx_fifo_depth;
63 u32 rx_fifo_depth;
64 u32 clk_khz;
65};
66
67#define INTEL_MID_STD_CFG (DW_IC_CON_MASTER | \
68 DW_IC_CON_SLAVE_DISABLE | \
69 DW_IC_CON_RESTART_EN)
70
71static struct dw_pci_controller dw_pci_controllers[] = {
72 [moorestown_0] = {
73 .bus_num = 0,
74 .bus_cfg = INTEL_MID_STD_CFG | DW_IC_CON_SPEED_FAST,
75 .tx_fifo_depth = 32,
76 .rx_fifo_depth = 32,
77 .clk_khz = 25000,
78 },
79 [moorestown_1] = {
80 .bus_num = 1,
81 .bus_cfg = INTEL_MID_STD_CFG | DW_IC_CON_SPEED_FAST,
82 .tx_fifo_depth = 32,
83 .rx_fifo_depth = 32,
84 .clk_khz = 25000,
85 },
86 [moorestown_2] = {
87 .bus_num = 2,
88 .bus_cfg = INTEL_MID_STD_CFG | DW_IC_CON_SPEED_FAST,
89 .tx_fifo_depth = 32,
90 .rx_fifo_depth = 32,
91 .clk_khz = 25000,
92 },
93 [medfield_0] = {
94 .bus_num = 0,
95 .bus_cfg = INTEL_MID_STD_CFG | DW_IC_CON_SPEED_FAST,
96 .tx_fifo_depth = 32,
97 .rx_fifo_depth = 32,
98 .clk_khz = 25000,
99 },
100 [medfield_1] = {
101 .bus_num = 1,
102 .bus_cfg = INTEL_MID_STD_CFG | DW_IC_CON_SPEED_FAST,
103 .tx_fifo_depth = 32,
104 .rx_fifo_depth = 32,
105 .clk_khz = 25000,
106 },
107 [medfield_2] = {
108 .bus_num = 2,
109 .bus_cfg = INTEL_MID_STD_CFG | DW_IC_CON_SPEED_FAST,
110 .tx_fifo_depth = 32,
111 .rx_fifo_depth = 32,
112 .clk_khz = 25000,
113 },
114 [medfield_3] = {
115 .bus_num = 3,
116 .bus_cfg = INTEL_MID_STD_CFG | DW_IC_CON_SPEED_STD,
117 .tx_fifo_depth = 32,
118 .rx_fifo_depth = 32,
119 .clk_khz = 25000,
120 },
121 [medfield_4] = {
122 .bus_num = 4,
123 .bus_cfg = INTEL_MID_STD_CFG | DW_IC_CON_SPEED_FAST,
124 .tx_fifo_depth = 32,
125 .rx_fifo_depth = 32,
126 .clk_khz = 25000,
127 },
128 [medfield_5] = {
129 .bus_num = 5,
130 .bus_cfg = INTEL_MID_STD_CFG | DW_IC_CON_SPEED_FAST,
131 .tx_fifo_depth = 32,
132 .rx_fifo_depth = 32,
133 .clk_khz = 25000,
134 },
135};
136static struct i2c_algorithm i2c_dw_algo = {
137 .master_xfer = i2c_dw_xfer,
138 .functionality = i2c_dw_func,
139};
140
141static int i2c_dw_pci_suspend(struct device *dev)
142{
143 struct pci_dev *pdev = container_of(dev, struct pci_dev, dev);
144 struct dw_i2c_dev *i2c = pci_get_drvdata(pdev);
145 int err;
146
147
148 i2c_dw_disable(i2c);
149
150 err = pci_save_state(pdev);
151 if (err) {
152 dev_err(&pdev->dev, "pci_save_state failed\n");
153 return err;
154 }
155
156 err = pci_set_power_state(pdev, PCI_D3hot);
157 if (err) {
158 dev_err(&pdev->dev, "pci_set_power_state failed\n");
159 return err;
160 }
161
162 return 0;
163}
164
165static int i2c_dw_pci_resume(struct device *dev)
166{
167 struct pci_dev *pdev = container_of(dev, struct pci_dev, dev);
168 struct dw_i2c_dev *i2c = pci_get_drvdata(pdev);
169 int err;
170 u32 enabled;
171
172 enabled = i2c_dw_is_enabled(i2c);
173 if (enabled)
174 return 0;
175
176 err = pci_set_power_state(pdev, PCI_D0);
177 if (err) {
178 dev_err(&pdev->dev, "pci_set_power_state() failed\n");
179 return err;
180 }
181
182 pci_restore_state(pdev);
183
184 i2c_dw_init(i2c);
185 return 0;
186}
187
188static int i2c_dw_pci_runtime_idle(struct device *dev)
189{
190 int err = pm_schedule_suspend(dev, 500);
191 dev_dbg(dev, "runtime_idle called\n");
192
193 if (err != 0)
194 return 0;
195 return -EBUSY;
196}
197
198static const struct dev_pm_ops i2c_dw_pm_ops = {
199 .resume = i2c_dw_pci_resume,
200 .suspend = i2c_dw_pci_suspend,
201 SET_RUNTIME_PM_OPS(i2c_dw_pci_suspend, i2c_dw_pci_resume,
202 i2c_dw_pci_runtime_idle)
203};
204
205static u32 i2c_dw_get_clk_rate_khz(struct dw_i2c_dev *dev)
206{
207 return dev->controller->clk_khz;
208}
209
210static int __devinit i2c_dw_pci_probe(struct pci_dev *pdev,
211const struct pci_device_id *id)
212{
213 struct dw_i2c_dev *dev;
214 struct i2c_adapter *adap;
215 unsigned long start, len;
216 void __iomem *base;
217 int r;
218 struct dw_pci_controller *controller;
219
220 if (id->driver_data >= ARRAY_SIZE(dw_pci_controllers)) {
221 printk(KERN_ERR "dw_i2c_pci_probe: invalid driver data %ld\n",
222 id->driver_data);
223 return -EINVAL;
224 }
225
226 controller = &dw_pci_controllers[id->driver_data];
227
228 r = pci_enable_device(pdev);
229 if (r) {
230 dev_err(&pdev->dev, "Failed to enable I2C PCI device (%d)\n",
231 r);
232 goto exit;
233 }
234
235 /* Determine the address of the I2C area */
236 start = pci_resource_start(pdev, 0);
237 len = pci_resource_len(pdev, 0);
238 if (!start || len == 0) {
239 dev_err(&pdev->dev, "base address not set\n");
240 r = -ENODEV;
241 goto exit;
242 }
243
244 r = pci_request_region(pdev, 0, DRIVER_NAME);
245 if (r) {
246 dev_err(&pdev->dev, "failed to request I2C region "
247 "0x%lx-0x%lx\n", start,
248 (unsigned long)pci_resource_end(pdev, 0));
249 goto exit;
250 }
251
252 base = ioremap_nocache(start, len);
253 if (!base) {
254 dev_err(&pdev->dev, "I/O memory remapping failed\n");
255 r = -ENOMEM;
256 goto err_release_region;
257 }
258
259
260 dev = kzalloc(sizeof(struct dw_i2c_dev), GFP_KERNEL);
261 if (!dev) {
262 r = -ENOMEM;
263 goto err_release_region;
264 }
265
266 init_completion(&dev->cmd_complete);
267 mutex_init(&dev->lock);
268 dev->clk = NULL;
269 dev->controller = controller;
270 dev->get_clk_rate_khz = i2c_dw_get_clk_rate_khz;
271 dev->base = base;
272 dev->dev = get_device(&pdev->dev);
273 dev->functionality =
274 I2C_FUNC_I2C |
275 I2C_FUNC_SMBUS_BYTE |
276 I2C_FUNC_SMBUS_BYTE_DATA |
277 I2C_FUNC_SMBUS_WORD_DATA |
278 I2C_FUNC_SMBUS_I2C_BLOCK;
279 dev->master_cfg = controller->bus_cfg;
280
281 pci_set_drvdata(pdev, dev);
282
283 dev->tx_fifo_depth = controller->tx_fifo_depth;
284 dev->rx_fifo_depth = controller->rx_fifo_depth;
285 r = i2c_dw_init(dev);
286 if (r)
287 goto err_iounmap;
288
289 adap = &dev->adapter;
290 i2c_set_adapdata(adap, dev);
291 adap->owner = THIS_MODULE;
292 adap->class = 0;
293 adap->algo = &i2c_dw_algo;
294 adap->dev.parent = &pdev->dev;
295 adap->nr = controller->bus_num;
296 snprintf(adap->name, sizeof(adap->name), "i2c-designware-pci-%d",
297 adap->nr);
298
299 r = request_irq(pdev->irq, i2c_dw_isr, IRQF_SHARED, adap->name, dev);
300 if (r) {
301 dev_err(&pdev->dev, "failure requesting irq %i\n", dev->irq);
302 goto err_iounmap;
303 }
304
305 i2c_dw_disable_int(dev);
306 i2c_dw_clear_int(dev);
307 r = i2c_add_numbered_adapter(adap);
308 if (r) {
309 dev_err(&pdev->dev, "failure adding adapter\n");
310 goto err_free_irq;
311 }
312
313 pm_runtime_put_noidle(&pdev->dev);
314 pm_runtime_allow(&pdev->dev);
315
316 return 0;
317
318err_free_irq:
319 free_irq(pdev->irq, dev);
320err_iounmap:
321 iounmap(dev->base);
322 pci_set_drvdata(pdev, NULL);
323 put_device(&pdev->dev);
324 kfree(dev);
325err_release_region:
326 pci_release_region(pdev, 0);
327exit:
328 return r;
329}
330
331static void __devexit i2c_dw_pci_remove(struct pci_dev *pdev)
332{
333 struct dw_i2c_dev *dev = pci_get_drvdata(pdev);
334
335 i2c_dw_disable(dev);
336 pm_runtime_forbid(&pdev->dev);
337 pm_runtime_get_noresume(&pdev->dev);
338
339 pci_set_drvdata(pdev, NULL);
340 i2c_del_adapter(&dev->adapter);
341 put_device(&pdev->dev);
342
343 free_irq(dev->irq, dev);
344 kfree(dev);
345 pci_release_region(pdev, 0);
346}
347
348/* work with hotplug and coldplug */
349MODULE_ALIAS("i2c_designware-pci");
350
351static DEFINE_PCI_DEVICE_TABLE(i2_designware_pci_ids) = {
352 /* Moorestown */
353 { PCI_VDEVICE(INTEL, 0x0802), moorestown_0 },
354 { PCI_VDEVICE(INTEL, 0x0803), moorestown_1 },
355 { PCI_VDEVICE(INTEL, 0x0804), moorestown_2 },
356 /* Medfield */
357 { PCI_VDEVICE(INTEL, 0x0817), medfield_3,},
358 { PCI_VDEVICE(INTEL, 0x0818), medfield_4 },
359 { PCI_VDEVICE(INTEL, 0x0819), medfield_5 },
360 { PCI_VDEVICE(INTEL, 0x082C), medfield_0 },
361 { PCI_VDEVICE(INTEL, 0x082D), medfield_1 },
362 { PCI_VDEVICE(INTEL, 0x082E), medfield_2 },
363 { 0,}
364};
365MODULE_DEVICE_TABLE(pci, i2_designware_pci_ids);
366
367static struct pci_driver dw_i2c_driver = {
368 .name = DRIVER_NAME,
369 .id_table = i2_designware_pci_ids,
370 .probe = i2c_dw_pci_probe,
371 .remove = __devexit_p(i2c_dw_pci_remove),
372 .driver = {
373 .pm = &i2c_dw_pm_ops,
374 },
375};
376
377static int __init dw_i2c_init_driver(void)
378{
379 return pci_register_driver(&dw_i2c_driver);
380}
381module_init(dw_i2c_init_driver);
382
383static void __exit dw_i2c_exit_driver(void)
384{
385 pci_unregister_driver(&dw_i2c_driver);
386}
387module_exit(dw_i2c_exit_driver);
388
389MODULE_AUTHOR("Baruch Siach <baruch@tkos.co.il>");
390MODULE_DESCRIPTION("Synopsys DesignWare PCI I2C bus adapter");
391MODULE_LICENSE("GPL");