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1/*
2 * P4080/P4040 Silicon/SoC Device Tree Source (post include)
3 *
4 * Copyright 2011 - 2015 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35&bman_fbpr {
36 compatible = "fsl,bman-fbpr";
37 alloc-ranges = <0 0 0x10 0>;
38};
39
40&qman_fqd {
41 compatible = "fsl,qman-fqd";
42 alloc-ranges = <0 0 0x10 0>;
43};
44
45&qman_pfdr {
46 compatible = "fsl,qman-pfdr";
47 alloc-ranges = <0 0 0x10 0>;
48};
49
50&lbc {
51 compatible = "fsl,p4080-elbc", "fsl,elbc", "simple-bus";
52 interrupts = <25 2 0 0>;
53 #address-cells = <2>;
54 #size-cells = <1>;
55};
56
57/* controller at 0x200000 */
58&pci0 {
59 compatible = "fsl,p4080-pcie", "fsl,qoriq-pcie-v2.1";
60 device_type = "pci";
61 #size-cells = <2>;
62 #address-cells = <3>;
63 bus-range = <0x0 0xff>;
64 clock-frequency = <33333333>;
65 interrupts = <16 2 1 15>;
66 fsl,iommu-parent = <&pamu0>;
67 fsl,liodn-reg = <&guts 0x500>; /* PEX1LIODNR */
68 pcie@0 {
69 reg = <0 0 0 0 0>;
70 #interrupt-cells = <1>;
71 #size-cells = <2>;
72 #address-cells = <3>;
73 device_type = "pci";
74 interrupts = <16 2 1 15>;
75 interrupt-map-mask = <0xf800 0 0 7>;
76 interrupt-map = <
77 /* IDSEL 0x0 */
78 0000 0 0 1 &mpic 40 1 0 0
79 0000 0 0 2 &mpic 1 1 0 0
80 0000 0 0 3 &mpic 2 1 0 0
81 0000 0 0 4 &mpic 3 1 0 0
82 >;
83 };
84};
85
86/* controller at 0x201000 */
87&pci1 {
88 compatible = "fsl,p4080-pcie", "fsl,qoriq-pcie-v2.1";
89 device_type = "pci";
90 #size-cells = <2>;
91 #address-cells = <3>;
92 bus-range = <0 0xff>;
93 clock-frequency = <33333333>;
94 interrupts = <16 2 1 14>;
95 fsl,iommu-parent = <&pamu0>;
96 fsl,liodn-reg = <&guts 0x504>; /* PEX2LIODNR */
97 pcie@0 {
98 reg = <0 0 0 0 0>;
99 #interrupt-cells = <1>;
100 #size-cells = <2>;
101 #address-cells = <3>;
102 device_type = "pci";
103 interrupts = <16 2 1 14>;
104 interrupt-map-mask = <0xf800 0 0 7>;
105 interrupt-map = <
106 /* IDSEL 0x0 */
107 0000 0 0 1 &mpic 41 1 0 0
108 0000 0 0 2 &mpic 5 1 0 0
109 0000 0 0 3 &mpic 6 1 0 0
110 0000 0 0 4 &mpic 7 1 0 0
111 >;
112 };
113};
114
115/* controller at 0x202000 */
116&pci2 {
117 compatible = "fsl,p4080-pcie", "fsl,qoriq-pcie-v2.1";
118 device_type = "pci";
119 #size-cells = <2>;
120 #address-cells = <3>;
121 bus-range = <0x0 0xff>;
122 clock-frequency = <33333333>;
123 interrupts = <16 2 1 13>;
124 fsl,iommu-parent = <&pamu0>;
125 fsl,liodn-reg = <&guts 0x508>; /* PEX3LIODNR */
126 pcie@0 {
127 reg = <0 0 0 0 0>;
128 #interrupt-cells = <1>;
129 #size-cells = <2>;
130 #address-cells = <3>;
131 device_type = "pci";
132 interrupts = <16 2 1 13>;
133 interrupt-map-mask = <0xf800 0 0 7>;
134 interrupt-map = <
135 /* IDSEL 0x0 */
136 0000 0 0 1 &mpic 42 1 0 0
137 0000 0 0 2 &mpic 9 1 0 0
138 0000 0 0 3 &mpic 10 1 0 0
139 0000 0 0 4 &mpic 11 1 0 0
140 >;
141 };
142};
143
144&rio {
145 compatible = "fsl,srio";
146 interrupts = <16 2 1 11>;
147 #address-cells = <2>;
148 #size-cells = <2>;
149 fsl,srio-rmu-handle = <&rmu>;
150 fsl,iommu-parent = <&pamu0>;
151 ranges;
152
153 port1 {
154 #address-cells = <2>;
155 #size-cells = <2>;
156 cell-index = <1>;
157 fsl,liodn-reg = <&guts 0x510>; /* RIO1LIODNR */
158 };
159
160 port2 {
161 #address-cells = <2>;
162 #size-cells = <2>;
163 cell-index = <2>;
164 fsl,liodn-reg = <&guts 0x514>; /* RIO2LIODNR */
165 };
166};
167
168&dcsr {
169 #address-cells = <1>;
170 #size-cells = <1>;
171 compatible = "fsl,dcsr", "simple-bus";
172
173 dcsr-epu@0 {
174 compatible = "fsl,p4080-dcsr-epu", "fsl,dcsr-epu";
175 interrupts = <52 2 0 0
176 84 2 0 0
177 85 2 0 0>;
178 reg = <0x0 0x1000>;
179 };
180 dcsr-npc {
181 compatible = "fsl,dcsr-npc";
182 reg = <0x1000 0x1000 0x1000000 0x8000>;
183 };
184 dcsr-nxc@2000 {
185 compatible = "fsl,dcsr-nxc";
186 reg = <0x2000 0x1000>;
187 };
188 dcsr-corenet {
189 compatible = "fsl,dcsr-corenet";
190 reg = <0x8000 0x1000 0xB0000 0x1000>;
191 };
192 dcsr-dpaa@9000 {
193 compatible = "fsl,p4080-dcsr-dpaa", "fsl,dcsr-dpaa";
194 reg = <0x9000 0x1000>;
195 };
196 dcsr-ocn@11000 {
197 compatible = "fsl,p4080-dcsr-ocn", "fsl,dcsr-ocn";
198 reg = <0x11000 0x1000>;
199 };
200 dcsr-ddr@12000 {
201 compatible = "fsl,dcsr-ddr";
202 dev-handle = <&ddr1>;
203 reg = <0x12000 0x1000>;
204 };
205 dcsr-ddr@13000 {
206 compatible = "fsl,dcsr-ddr";
207 dev-handle = <&ddr2>;
208 reg = <0x13000 0x1000>;
209 };
210 dcsr-nal@18000 {
211 compatible = "fsl,p4080-dcsr-nal", "fsl,dcsr-nal";
212 reg = <0x18000 0x1000>;
213 };
214 dcsr-rcpm@22000 {
215 compatible = "fsl,p4080-dcsr-rcpm", "fsl,dcsr-rcpm";
216 reg = <0x22000 0x1000>;
217 };
218 dcsr-cpu-sb-proxy@40000 {
219 compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
220 cpu-handle = <&cpu0>;
221 reg = <0x40000 0x1000>;
222 };
223 dcsr-cpu-sb-proxy@41000 {
224 compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
225 cpu-handle = <&cpu1>;
226 reg = <0x41000 0x1000>;
227 };
228 dcsr-cpu-sb-proxy@42000 {
229 compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
230 cpu-handle = <&cpu2>;
231 reg = <0x42000 0x1000>;
232 };
233 dcsr-cpu-sb-proxy@43000 {
234 compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
235 cpu-handle = <&cpu3>;
236 reg = <0x43000 0x1000>;
237 };
238 dcsr-cpu-sb-proxy@44000 {
239 compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
240 cpu-handle = <&cpu4>;
241 reg = <0x44000 0x1000>;
242 };
243 dcsr-cpu-sb-proxy@45000 {
244 compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
245 cpu-handle = <&cpu5>;
246 reg = <0x45000 0x1000>;
247 };
248 dcsr-cpu-sb-proxy@46000 {
249 compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
250 cpu-handle = <&cpu6>;
251 reg = <0x46000 0x1000>;
252 };
253 dcsr-cpu-sb-proxy@47000 {
254 compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
255 cpu-handle = <&cpu7>;
256 reg = <0x47000 0x1000>;
257 };
258
259};
260
261/include/ "qoriq-bman1-portals.dtsi"
262
263/include/ "qoriq-qman1-portals.dtsi"
264
265&soc {
266 #address-cells = <1>;
267 #size-cells = <1>;
268 device_type = "soc";
269 compatible = "simple-bus";
270
271 soc-sram-error {
272 compatible = "fsl,soc-sram-error";
273 interrupts = <16 2 1 29>;
274 };
275
276 corenet-law@0 {
277 compatible = "fsl,corenet-law";
278 reg = <0x0 0x1000>;
279 fsl,num-laws = <32>;
280 };
281
282 ddr1: memory-controller@8000 {
283 compatible = "fsl,qoriq-memory-controller-v4.4", "fsl,qoriq-memory-controller";
284 reg = <0x8000 0x1000>;
285 interrupts = <16 2 1 23>;
286 };
287
288 ddr2: memory-controller@9000 {
289 compatible = "fsl,qoriq-memory-controller-v4.4","fsl,qoriq-memory-controller";
290 reg = <0x9000 0x1000>;
291 interrupts = <16 2 1 22>;
292 };
293
294 cpc: l3-cache-controller@10000 {
295 compatible = "fsl,p4080-l3-cache-controller", "cache";
296 reg = <0x10000 0x1000
297 0x11000 0x1000>;
298 interrupts = <16 2 1 27
299 16 2 1 26>;
300 };
301
302 corenet-cf@18000 {
303 compatible = "fsl,corenet1-cf", "fsl,corenet-cf";
304 reg = <0x18000 0x1000>;
305 interrupts = <16 2 1 31>;
306 fsl,ccf-num-csdids = <32>;
307 fsl,ccf-num-snoopids = <32>;
308 };
309
310 iommu@20000 {
311 compatible = "fsl,pamu-v1.0", "fsl,pamu";
312 reg = <0x20000 0x5000>; /* for compatibility with older PAMU drivers */
313 ranges = <0 0x20000 0x5000>;
314 #address-cells = <1>;
315 #size-cells = <1>;
316 interrupts = <
317 24 2 0 0
318 16 2 1 30>;
319 fsl,portid-mapping = <0x00f80000>;
320
321 pamu0: pamu@0 {
322 reg = <0 0x1000>;
323 fsl,primary-cache-geometry = <32 1>;
324 fsl,secondary-cache-geometry = <128 2>;
325 };
326
327 pamu1: pamu@1000 {
328 reg = <0x1000 0x1000>;
329 fsl,primary-cache-geometry = <32 1>;
330 fsl,secondary-cache-geometry = <128 2>;
331 };
332
333 pamu2: pamu@2000 {
334 reg = <0x2000 0x1000>;
335 fsl,primary-cache-geometry = <32 1>;
336 fsl,secondary-cache-geometry = <128 2>;
337 };
338
339 pamu3: pamu@3000 {
340 reg = <0x3000 0x1000>;
341 fsl,primary-cache-geometry = <32 1>;
342 fsl,secondary-cache-geometry = <128 2>;
343 };
344
345 pamu4: pamu@4000 {
346 reg = <0x4000 0x1000>;
347 fsl,primary-cache-geometry = <32 1>;
348 fsl,secondary-cache-geometry = <128 2>;
349 };
350 };
351
352/include/ "qoriq-rmu-0.dtsi"
353 rmu@d3000 {
354 fsl,iommu-parent = <&pamu0>;
355 fsl,liodn-reg = <&guts 0x540>; /* RMULIODNR */
356 };
357
358/include/ "qoriq-mpic.dtsi"
359
360 guts: global-utilities@e0000 {
361 compatible = "fsl,qoriq-device-config-1.0";
362 reg = <0xe0000 0xe00>;
363 fsl,has-rstcr;
364 #sleep-cells = <1>;
365 fsl,liodn-bits = <12>;
366 };
367
368 pins: global-utilities@e0e00 {
369 compatible = "fsl,qoriq-pin-control-1.0";
370 reg = <0xe0e00 0x200>;
371 #sleep-cells = <2>;
372 };
373
374/include/ "qoriq-clockgen1.dtsi"
375 global-utilities@e1000 {
376 compatible = "fsl,p4080-clockgen", "fsl,qoriq-clockgen-1.0";
377 };
378
379 rcpm: global-utilities@e2000 {
380 compatible = "fsl,qoriq-rcpm-1.0";
381 reg = <0xe2000 0x1000>;
382 #sleep-cells = <1>;
383 };
384
385 sfp: sfp@e8000 {
386 compatible = "fsl,p4080-sfp", "fsl,qoriq-sfp-1.0";
387 reg = <0xe8000 0x1000>;
388 };
389
390 serdes: serdes@ea000 {
391 compatible = "fsl,p4080-serdes";
392 reg = <0xea000 0x1000>;
393 };
394
395/include/ "qoriq-dma-0.dtsi"
396 dma@100300 {
397 fsl,iommu-parent = <&pamu0>;
398 fsl,liodn-reg = <&guts 0x580>; /* DMA1LIODNR */
399 };
400
401/include/ "qoriq-dma-1.dtsi"
402 dma@101300 {
403 fsl,iommu-parent = <&pamu0>;
404 fsl,liodn-reg = <&guts 0x584>; /* DMA2LIODNR */
405 };
406
407/include/ "qoriq-espi-0.dtsi"
408 spi@110000 {
409 fsl,espi-num-chipselects = <4>;
410 };
411
412/include/ "qoriq-esdhc-0.dtsi"
413 sdhc@114000 {
414 compatible = "fsl,p4080-esdhc", "fsl,esdhc";
415 fsl,iommu-parent = <&pamu1>;
416 fsl,liodn-reg = <&guts 0x530>; /* eSDHCLIODNR */
417 voltage-ranges = <3300 3300>;
418 sdhci,auto-cmd12;
419 };
420
421/include/ "qoriq-i2c-0.dtsi"
422/include/ "qoriq-i2c-1.dtsi"
423/include/ "qoriq-duart-0.dtsi"
424/include/ "qoriq-duart-1.dtsi"
425/include/ "qoriq-gpio-0.dtsi"
426/include/ "qoriq-usb2-mph-0.dtsi"
427 usb@210000 {
428 compatible = "fsl-usb2-mph-v1.6", "fsl,mpc85xx-usb2-mph", "fsl-usb2-mph";
429 fsl,iommu-parent = <&pamu1>;
430 fsl,liodn-reg = <&guts 0x520>; /* USB1LIODNR */
431 port0;
432 };
433/include/ "qoriq-usb2-dr-0.dtsi"
434 usb@211000 {
435 compatible = "fsl-usb2-dr-v1.6", "fsl,mpc85xx-usb2-dr", "fsl-usb2-dr";
436 fsl,iommu-parent = <&pamu1>;
437 fsl,liodn-reg = <&guts 0x524>; /* USB2LIODNR */
438 };
439/include/ "qoriq-sec4.0-0.dtsi"
440crypto: crypto@300000 {
441 fsl,iommu-parent = <&pamu1>;
442 };
443
444/include/ "qoriq-qman1.dtsi"
445/include/ "qoriq-bman1.dtsi"
446
447/include/ "qoriq-fman-0.dtsi"
448/include/ "qoriq-fman-0-1g-0.dtsi"
449/include/ "qoriq-fman-0-1g-1.dtsi"
450/include/ "qoriq-fman-0-1g-2.dtsi"
451/include/ "qoriq-fman-0-1g-3.dtsi"
452/include/ "qoriq-fman-0-10g-0.dtsi"
453 fman@400000 {
454 enet0: ethernet@e0000 {
455 };
456
457 enet1: ethernet@e2000 {
458 };
459
460 enet2: ethernet@e4000 {
461 };
462
463 enet3: ethernet@e6000 {
464 };
465
466 enet4: ethernet@f0000 {
467 };
468 };
469
470/include/ "qoriq-fman-1.dtsi"
471/include/ "qoriq-fman-1-1g-0.dtsi"
472/include/ "qoriq-fman-1-1g-1.dtsi"
473/include/ "qoriq-fman-1-1g-2.dtsi"
474/include/ "qoriq-fman-1-1g-3.dtsi"
475/include/ "qoriq-fman-1-10g-0.dtsi"
476 fman@500000 {
477 enet5: ethernet@e0000 {
478 };
479
480 enet6: ethernet@e2000 {
481 };
482
483 enet7: ethernet@e4000 {
484 };
485
486 enet8: ethernet@e6000 {
487 };
488
489 enet9: ethernet@f0000 {
490 };
491 };
492};
1/*
2 * P4080/P4040 Silicon/SoC Device Tree Source (post include)
3 *
4 * Copyright 2011 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35&lbc {
36 compatible = "fsl,p4080-elbc", "fsl,elbc", "simple-bus";
37 interrupts = <25 2 0 0>;
38 #address-cells = <2>;
39 #size-cells = <1>;
40};
41
42/* controller at 0x200000 */
43&pci0 {
44 compatible = "fsl,p4080-pcie";
45 device_type = "pci";
46 #size-cells = <2>;
47 #address-cells = <3>;
48 bus-range = <0x0 0xff>;
49 clock-frequency = <33333333>;
50 interrupts = <16 2 1 15>;
51 pcie@0 {
52 reg = <0 0 0 0 0>;
53 #interrupt-cells = <1>;
54 #size-cells = <2>;
55 #address-cells = <3>;
56 device_type = "pci";
57 interrupts = <16 2 1 15>;
58 interrupt-map-mask = <0xf800 0 0 7>;
59 interrupt-map = <
60 /* IDSEL 0x0 */
61 0000 0 0 1 &mpic 40 1 0 0
62 0000 0 0 2 &mpic 1 1 0 0
63 0000 0 0 3 &mpic 2 1 0 0
64 0000 0 0 4 &mpic 3 1 0 0
65 >;
66 };
67};
68
69/* controller at 0x201000 */
70&pci1 {
71 compatible = "fsl,p4080-pcie";
72 device_type = "pci";
73 #size-cells = <2>;
74 #address-cells = <3>;
75 bus-range = <0 0xff>;
76 clock-frequency = <33333333>;
77 interrupts = <16 2 1 14>;
78 pcie@0 {
79 reg = <0 0 0 0 0>;
80 #interrupt-cells = <1>;
81 #size-cells = <2>;
82 #address-cells = <3>;
83 device_type = "pci";
84 interrupts = <16 2 1 14>;
85 interrupt-map-mask = <0xf800 0 0 7>;
86 interrupt-map = <
87 /* IDSEL 0x0 */
88 0000 0 0 1 &mpic 41 1 0 0
89 0000 0 0 2 &mpic 5 1 0 0
90 0000 0 0 3 &mpic 6 1 0 0
91 0000 0 0 4 &mpic 7 1 0 0
92 >;
93 };
94};
95
96/* controller at 0x202000 */
97&pci2 {
98 compatible = "fsl,p4080-pcie";
99 device_type = "pci";
100 #size-cells = <2>;
101 #address-cells = <3>;
102 bus-range = <0x0 0xff>;
103 clock-frequency = <33333333>;
104 interrupts = <16 2 1 13>;
105 pcie@0 {
106 reg = <0 0 0 0 0>;
107 #interrupt-cells = <1>;
108 #size-cells = <2>;
109 #address-cells = <3>;
110 device_type = "pci";
111 interrupts = <16 2 1 13>;
112 interrupt-map-mask = <0xf800 0 0 7>;
113 interrupt-map = <
114 /* IDSEL 0x0 */
115 0000 0 0 1 &mpic 42 1 0 0
116 0000 0 0 2 &mpic 9 1 0 0
117 0000 0 0 3 &mpic 10 1 0 0
118 0000 0 0 4 &mpic 11 1 0 0
119 >;
120 };
121};
122
123&rio {
124 compatible = "fsl,srio";
125 interrupts = <16 2 1 11>;
126 #address-cells = <2>;
127 #size-cells = <2>;
128 fsl,srio-rmu-handle = <&rmu>;
129 ranges;
130
131 port1 {
132 #address-cells = <2>;
133 #size-cells = <2>;
134 cell-index = <1>;
135 };
136
137 port2 {
138 #address-cells = <2>;
139 #size-cells = <2>;
140 cell-index = <2>;
141 };
142};
143
144&dcsr {
145 #address-cells = <1>;
146 #size-cells = <1>;
147 compatible = "fsl,dcsr", "simple-bus";
148
149 dcsr-epu@0 {
150 compatible = "fsl,dcsr-epu";
151 interrupts = <52 2 0 0
152 84 2 0 0
153 85 2 0 0>;
154 reg = <0x0 0x1000>;
155 };
156 dcsr-npc {
157 compatible = "fsl,dcsr-npc";
158 reg = <0x1000 0x1000 0x1000000 0x8000>;
159 };
160 dcsr-nxc@2000 {
161 compatible = "fsl,dcsr-nxc";
162 reg = <0x2000 0x1000>;
163 };
164 dcsr-corenet {
165 compatible = "fsl,dcsr-corenet";
166 reg = <0x8000 0x1000 0xB0000 0x1000>;
167 };
168 dcsr-dpaa@9000 {
169 compatible = "fsl,p4080-dcsr-dpaa", "fsl,dcsr-dpaa";
170 reg = <0x9000 0x1000>;
171 };
172 dcsr-ocn@11000 {
173 compatible = "fsl,p4080-dcsr-ocn", "fsl,dcsr-ocn";
174 reg = <0x11000 0x1000>;
175 };
176 dcsr-ddr@12000 {
177 compatible = "fsl,dcsr-ddr";
178 dev-handle = <&ddr1>;
179 reg = <0x12000 0x1000>;
180 };
181 dcsr-ddr@13000 {
182 compatible = "fsl,dcsr-ddr";
183 dev-handle = <&ddr2>;
184 reg = <0x13000 0x1000>;
185 };
186 dcsr-nal@18000 {
187 compatible = "fsl,p4080-dcsr-nal", "fsl,dcsr-nal";
188 reg = <0x18000 0x1000>;
189 };
190 dcsr-rcpm@22000 {
191 compatible = "fsl,p4080-dcsr-rcpm", "fsl,dcsr-rcpm";
192 reg = <0x22000 0x1000>;
193 };
194 dcsr-cpu-sb-proxy@40000 {
195 compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
196 cpu-handle = <&cpu0>;
197 reg = <0x40000 0x1000>;
198 };
199 dcsr-cpu-sb-proxy@41000 {
200 compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
201 cpu-handle = <&cpu1>;
202 reg = <0x41000 0x1000>;
203 };
204 dcsr-cpu-sb-proxy@42000 {
205 compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
206 cpu-handle = <&cpu2>;
207 reg = <0x42000 0x1000>;
208 };
209 dcsr-cpu-sb-proxy@43000 {
210 compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
211 cpu-handle = <&cpu3>;
212 reg = <0x43000 0x1000>;
213 };
214 dcsr-cpu-sb-proxy@44000 {
215 compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
216 cpu-handle = <&cpu4>;
217 reg = <0x44000 0x1000>;
218 };
219 dcsr-cpu-sb-proxy@45000 {
220 compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
221 cpu-handle = <&cpu5>;
222 reg = <0x45000 0x1000>;
223 };
224 dcsr-cpu-sb-proxy@46000 {
225 compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
226 cpu-handle = <&cpu6>;
227 reg = <0x46000 0x1000>;
228 };
229 dcsr-cpu-sb-proxy@47000 {
230 compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
231 cpu-handle = <&cpu7>;
232 reg = <0x47000 0x1000>;
233 };
234
235};
236
237&soc {
238 #address-cells = <1>;
239 #size-cells = <1>;
240 device_type = "soc";
241 compatible = "simple-bus";
242
243 soc-sram-error {
244 compatible = "fsl,soc-sram-error";
245 interrupts = <16 2 1 29>;
246 };
247
248 corenet-law@0 {
249 compatible = "fsl,corenet-law";
250 reg = <0x0 0x1000>;
251 fsl,num-laws = <32>;
252 };
253
254 ddr1: memory-controller@8000 {
255 compatible = "fsl,qoriq-memory-controller-v4.4", "fsl,qoriq-memory-controller";
256 reg = <0x8000 0x1000>;
257 interrupts = <16 2 1 23>;
258 };
259
260 ddr2: memory-controller@9000 {
261 compatible = "fsl,qoriq-memory-controller-v4.4","fsl,qoriq-memory-controller";
262 reg = <0x9000 0x1000>;
263 interrupts = <16 2 1 22>;
264 };
265
266 cpc: l3-cache-controller@10000 {
267 compatible = "fsl,p4080-l3-cache-controller", "cache";
268 reg = <0x10000 0x1000
269 0x11000 0x1000>;
270 interrupts = <16 2 1 27
271 16 2 1 26>;
272 };
273
274 corenet-cf@18000 {
275 compatible = "fsl,corenet-cf";
276 reg = <0x18000 0x1000>;
277 interrupts = <16 2 1 31>;
278 fsl,ccf-num-csdids = <32>;
279 fsl,ccf-num-snoopids = <32>;
280 };
281
282 iommu@20000 {
283 compatible = "fsl,pamu-v1.0", "fsl,pamu";
284 reg = <0x20000 0x5000>;
285 interrupts = <
286 24 2 0 0
287 16 2 1 30>;
288 };
289
290/include/ "qoriq-rmu-0.dtsi"
291/include/ "qoriq-mpic.dtsi"
292
293 guts: global-utilities@e0000 {
294 compatible = "fsl,qoriq-device-config-1.0";
295 reg = <0xe0000 0xe00>;
296 fsl,has-rstcr;
297 #sleep-cells = <1>;
298 fsl,liodn-bits = <12>;
299 };
300
301 pins: global-utilities@e0e00 {
302 compatible = "fsl,qoriq-pin-control-1.0";
303 reg = <0xe0e00 0x200>;
304 #sleep-cells = <2>;
305 };
306
307 clockgen: global-utilities@e1000 {
308 compatible = "fsl,p4080-clockgen", "fsl,qoriq-clockgen-1.0";
309 reg = <0xe1000 0x1000>;
310 clock-frequency = <0>;
311 };
312
313 rcpm: global-utilities@e2000 {
314 compatible = "fsl,qoriq-rcpm-1.0";
315 reg = <0xe2000 0x1000>;
316 #sleep-cells = <1>;
317 };
318
319 sfp: sfp@e8000 {
320 compatible = "fsl,p4080-sfp", "fsl,qoriq-sfp-1.0";
321 reg = <0xe8000 0x1000>;
322 };
323
324 serdes: serdes@ea000 {
325 compatible = "fsl,p4080-serdes";
326 reg = <0xea000 0x1000>;
327 };
328
329/include/ "qoriq-dma-0.dtsi"
330/include/ "qoriq-dma-1.dtsi"
331/include/ "qoriq-espi-0.dtsi"
332 spi@110000 {
333 fsl,espi-num-chipselects = <4>;
334 };
335
336/include/ "qoriq-esdhc-0.dtsi"
337 sdhc@114000 {
338 voltage-ranges = <3300 3300>;
339 sdhci,auto-cmd12;
340 };
341
342/include/ "qoriq-i2c-0.dtsi"
343/include/ "qoriq-i2c-1.dtsi"
344/include/ "qoriq-duart-0.dtsi"
345/include/ "qoriq-duart-1.dtsi"
346/include/ "qoriq-gpio-0.dtsi"
347/include/ "qoriq-usb2-mph-0.dtsi"
348/include/ "qoriq-usb2-dr-0.dtsi"
349/include/ "qoriq-sec4.0-0.dtsi"
350};