1// SPDX-License-Identifier: GPL-2.0+ OR MIT
  2//
  3// Device Tree Source for UniPhier SoCs default pinctrl settings
  4//
  5// Copyright (C) 2015-2017 Socionext Inc.
  6//   Author: Masahiro Yamada <yamada.masahiro@socionext.com>
  7
  8&pinctrl {
  9	pinctrl_aout: aout {
 10		groups = "aout";
 11		function = "aout";
 12	};
 13
 14	pinctrl_ain1: ain1 {
 15		groups = "ain1";
 16		function = "ain1";
 17	};
 18
 19	pinctrl_ain2: ain2 {
 20		groups = "ain2";
 21		function = "ain2";
 22	};
 23
 24	pinctrl_ainiec1: ainiec1 {
 25		groups = "ainiec1";
 26		function = "ainiec1";
 27	};
 28
 29	pinctrl_aout1: aout1 {
 30		groups = "aout1";
 31		function = "aout1";
 32	};
 33
 34	pinctrl_aout2: aout2 {
 35		groups = "aout2";
 36		function = "aout2";
 37	};
 38
 39	pinctrl_aout3: aout3 {
 40		groups = "aout3";
 41		function = "aout3";
 42	};
 43
 44	pinctrl_aoutiec1: aoutiec1 {
 45		groups = "aoutiec1";
 46		function = "aoutiec1";
 47	};
 48
 49	pinctrl_aoutiec2: aoutiec2 {
 50		groups = "aoutiec2";
 51		function = "aoutiec2";
 52	};
 53
 54	pinctrl_emmc: emmc {
 55		groups = "emmc", "emmc_dat8";
 56		function = "emmc";
 57	};
 58
 59	pinctrl_ether_mii: ether-mii {
 60		groups = "ether_mii";
 61		function = "ether_mii";
 62	};
 63
 64	pinctrl_ether_rgmii: ether-rgmii {
 65		groups = "ether_rgmii";
 66		function = "ether_rgmii";
 67	};
 68
 69	pinctrl_ether_rmii: ether-rmii {
 70		groups = "ether_rmii";
 71		function = "ether_rmii";
 72	};
 73
 74	pinctrl_ether1_rgmii: ether1-rgmii {
 75		groups = "ether1_rgmii";
 76		function = "ether1_rgmii";
 77	};
 78
 79	pinctrl_ether1_rmii: ether1-rmii {
 80		groups = "ether1_rmii";
 81		function = "ether1_rmii";
 82	};
 83
 84	pinctrl_i2c0: i2c0 {
 85		groups = "i2c0";
 86		function = "i2c0";
 87	};
 88
 89	pinctrl_i2c1: i2c1 {
 90		groups = "i2c1";
 91		function = "i2c1";
 92	};
 93
 94	pinctrl_i2c2: i2c2 {
 95		groups = "i2c2";
 96		function = "i2c2";
 97	};
 98
 99	pinctrl_i2c3: i2c3 {
100		groups = "i2c3";
101		function = "i2c3";
102	};
103
104	pinctrl_i2c4: i2c4 {
105		groups = "i2c4";
106		function = "i2c4";
107	};
108
109	pinctrl_i2c5: i2c5 {
110		groups = "i2c5";
111		function = "i2c5";
112	};
113
114	pinctrl_i2c6: i2c6 {
115		groups = "i2c6";
116		function = "i2c6";
117	};
118
119	pinctrl_nand: nand {
120		groups = "nand";
121		function = "nand";
122	};
123
124	pinctrl_nand2cs: nand2cs {
125		groups = "nand", "nand_cs1";
126		function = "nand";
127	};
128
129	pinctrl_pcie: pcie {
130		groups = "pcie";
131		function = "pcie";
132	};
133
134	pinctrl_sd: sd {
135		groups = "sd";
136		function = "sd";
137	};
138
139	pinctrl_sd_uhs: sd-uhs {
140		groups = "sd";
141		function = "sd";
142	};
143
144	pinctrl_sd1: sd1 {
145		groups = "sd1";
146		function = "sd1";
147	};
148
149	pinctrl_spi0: spi0 {
150		groups = "spi0";
151		function = "spi0";
152	};
153
154	pinctrl_spi1: spi1 {
155		groups = "spi1";
156		function = "spi1";
157	};
158
159	pinctrl_spi2: spi2 {
160		groups = "spi2";
161		function = "spi2";
162	};
163
164	pinctrl_spi3: spi3 {
165		groups = "spi3";
166		function = "spi3";
167	};
168
169	pinctrl_system_bus: system-bus {
170		groups = "system_bus", "system_bus_cs1";
171		function = "system_bus";
172	};
173
174	pinctrl_uart0: uart0 {
175		groups = "uart0";
176		function = "uart0";
177	};
178
179	pinctrl_uart1: uart1 {
180		groups = "uart1";
181		function = "uart1";
182	};
183
184	pinctrl_uart2: uart2 {
185		groups = "uart2";
186		function = "uart2";
187	};
188
189	pinctrl_uart3: uart3 {
190		groups = "uart3";
191		function = "uart3";
192	};
193
194	pinctrl_usb0: usb0 {
195		groups = "usb0";
196		function = "usb0";
197	};
198
199	pinctrl_usb0_device: usb0-device {
200		groups = "usb0_device";
201		function = "usb0";
202	};
203
204	pinctrl_usb1: usb1 {
205		groups = "usb1";
206		function = "usb1";
207	};
208
209	pinctrl_usb1_device: usb1-device {
210		groups = "usb1_device";
211		function = "usb1";
212	};
213
214	pinctrl_usb2: usb2 {
215		groups = "usb2";
216		function = "usb2";
217	};
218
219	pinctrl_usb3: usb3 {
220		groups = "usb3";
221		function = "usb3";
222	};
223};