1// SPDX-License-Identifier: GPL-2.0+
  2/*
  3 * at91-natte.dts - Device Tree include file for the Natte board
  4 *
  5 * Copyright (C) 2017 Axentia Technologies AB
  6 *
  7 * Author: Peter Rosin <peda@axentia.se>
  8 */
  9
 10/ {
 11	mux: mux-controller {
 12		compatible = "gpio-mux";
 13		#mux-control-cells = <0>;
 14
 15		mux-gpios = <&ioexp 0 GPIO_ACTIVE_HIGH>,
 16			    <&ioexp 1 GPIO_ACTIVE_HIGH>,
 17			    <&ioexp 2 GPIO_ACTIVE_HIGH>;
 18	};
 19
 20	batntc-mux {
 21		compatible = "io-channel-mux";
 22		io-channels = <&adc 5>;
 23		io-channel-names = "parent";
 24		mux-controls = <&mux>;
 25
 26		channels =
 27			"batntc0", "batntc1", "batntc2", "batntc3",
 28			"batntc4", "batntc5", "batntc6", "batntc7";
 29	};
 30
 31	batv-mux {
 32		compatible = "io-channel-mux";
 33		io-channels = <&adc 6>;
 34		io-channel-names = "parent";
 35		mux-controls = <&mux>;
 36
 37		channels =
 38			"batv0", "batv1", "batv2", "batv3",
 39			"batv4", "batv5", "batv6", "batv7";
 40	};
 41
 42	iout-mux {
 43		compatible = "io-channel-mux";
 44		io-channels = <&adc 7>;
 45		io-channel-names = "parent";
 46		mux-controls = <&mux>;
 47
 48		channels =
 49			"iout0", "iout1", "iout2", "iout3",
 50			"iout4", "iout5", "iout6", "iout7";
 51	};
 52
 53	i2c-mux {
 54		compatible = "i2c-mux";
 55		mux-locked;
 56		i2c-parent = <&i2c0>;
 57		mux-controls = <&mux>;
 58
 59		#address-cells = <1>;
 60		#size-cells = <0>;
 61
 62		i2c@0 {
 63			reg = <0>;
 64			#address-cells = <1>;
 65			#size-cells = <0>;
 66
 67			charger@9 {
 68				compatible = "ti,bq24735";
 69				reg = <0x9>;
 70
 71				ti,charge-current = <2000>;
 72				ti,charge-voltage = <16800>;
 73
 74				poll-interval = <20000>;
 75			};
 76		};
 77
 78		i2c@1 {
 79			reg = <1>;
 80			#address-cells = <1>;
 81			#size-cells = <0>;
 82
 83			charger@9 {
 84				compatible = "ti,bq24735";
 85				reg = <0x9>;
 86
 87				ti,charge-current = <2000>;
 88				ti,charge-voltage = <16800>;
 89
 90				poll-interval = <20000>;
 91			};
 92		};
 93
 94		i2c@2 {
 95			reg = <2>;
 96			#address-cells = <1>;
 97			#size-cells = <0>;
 98
 99			charger@9 {
100				compatible = "ti,bq24735";
101				reg = <0x9>;
102
103				ti,charge-current = <2000>;
104				ti,charge-voltage = <16800>;
105
106				poll-interval = <20000>;
107			};
108		};
109
110		i2c@3 {
111			reg = <3>;
112			#address-cells = <1>;
113			#size-cells = <0>;
114
115			charger@9 {
116				compatible = "ti,bq24735";
117				reg = <0x9>;
118
119				ti,charge-current = <2000>;
120				ti,charge-voltage = <16800>;
121
122				poll-interval = <20000>;
123			};
124		};
125
126		i2c@4 {
127			reg = <4>;
128			#address-cells = <1>;
129			#size-cells = <0>;
130
131			charger@9 {
132				compatible = "ti,bq24735";
133				reg = <0x9>;
134
135				ti,charge-current = <2000>;
136				ti,charge-voltage = <16800>;
137
138				poll-interval = <20000>;
139			};
140		};
141
142		i2c@5 {
143			reg = <5>;
144			#address-cells = <1>;
145			#size-cells = <0>;
146
147			charger@9 {
148				compatible = "ti,bq24735";
149				reg = <0x9>;
150
151				ti,charge-current = <2000>;
152				ti,charge-voltage = <16800>;
153
154				poll-interval = <20000>;
155			};
156		};
157
158		i2c@6 {
159			reg = <6>;
160			#address-cells = <1>;
161			#size-cells = <0>;
162
163			charger@9 {
164				compatible = "ti,bq24735";
165				reg = <0x9>;
166
167				ti,charge-current = <2000>;
168				ti,charge-voltage = <16800>;
169
170				poll-interval = <20000>;
171			};
172		};
173
174		i2c@7 {
175			reg = <7>;
176			#address-cells = <1>;
177			#size-cells = <0>;
178
179			charger@9 {
180				compatible = "ti,bq24735";
181				reg = <0x9>;
182
183				ti,charge-current = <2000>;
184				ti,charge-voltage = <16800>;
185
186				poll-interval = <20000>;
187			};
188		};
189	};
190};
191
192&i2c0 {
193	status = "okay";
194
195	ioexp: ioexp@20 {
196		#gpio-cells = <2>;
197		compatible = "semtech,sx1502q";
198		reg = <0x20>;
199
200		gpio-controller;
201		ngpios = <8>;
202
203		pinctrl-names = "default";
204		pinctrl-0 = <&gpio3_cfg_pins>;
205
206		gpio3_cfg_pins: gpio3_cfg {
207			pins = "gpio3";
208			bias-pull-up;
209		};
210	};
211
212	adc: adc@48 {
213		compatible = "ti,ads1015";
214		reg = <0x48>;
215		#io-channel-cells = <1>;
216
217		#address-cells = <1>;
218		#size-cells = <0>;
219
220		channel@4 {
221			reg = <4>;
222			ti,gain = <2>;
223			ti,datarate = <4>;
224		};
225
226		channel@5 {
227			reg = <5>;
228			ti,gain = <2>;
229			ti,datarate = <4>;
230		};
231
232		channel@6 {
233			reg = <6>;
234			ti,gain = <1>;
235			ti,datarate = <4>;
236		};
237
238		channel@7 {
239			reg = <7>;
240			ti,gain = <3>;
241			ti,datarate = <4>;
242		};
243	};
244};