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1// SPDX-License-Identifier: GPL-2.0+
2/*
3 * Driver for SA11x0 serial ports
4 *
5 * Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
6 *
7 * Copyright (C) 2000 Deep Blue Solutions Ltd.
8 */
9
10#include <linux/module.h>
11#include <linux/ioport.h>
12#include <linux/init.h>
13#include <linux/console.h>
14#include <linux/sysrq.h>
15#include <linux/platform_data/sa11x0-serial.h>
16#include <linux/platform_device.h>
17#include <linux/tty.h>
18#include <linux/tty_flip.h>
19#include <linux/serial_core.h>
20#include <linux/serial.h>
21#include <linux/io.h>
22
23#include <asm/irq.h>
24#include <mach/hardware.h>
25#include <mach/irqs.h>
26
27#include "serial_mctrl_gpio.h"
28
29/* We've been assigned a range on the "Low-density serial ports" major */
30#define SERIAL_SA1100_MAJOR 204
31#define MINOR_START 5
32
33#define NR_PORTS 3
34
35#define SA1100_ISR_PASS_LIMIT 256
36
37/*
38 * Convert from ignore_status_mask or read_status_mask to UTSR[01]
39 */
40#define SM_TO_UTSR0(x) ((x) & 0xff)
41#define SM_TO_UTSR1(x) ((x) >> 8)
42#define UTSR0_TO_SM(x) ((x))
43#define UTSR1_TO_SM(x) ((x) << 8)
44
45#define UART_GET_UTCR0(sport) __raw_readl((sport)->port.membase + UTCR0)
46#define UART_GET_UTCR1(sport) __raw_readl((sport)->port.membase + UTCR1)
47#define UART_GET_UTCR2(sport) __raw_readl((sport)->port.membase + UTCR2)
48#define UART_GET_UTCR3(sport) __raw_readl((sport)->port.membase + UTCR3)
49#define UART_GET_UTSR0(sport) __raw_readl((sport)->port.membase + UTSR0)
50#define UART_GET_UTSR1(sport) __raw_readl((sport)->port.membase + UTSR1)
51#define UART_GET_CHAR(sport) __raw_readl((sport)->port.membase + UTDR)
52
53#define UART_PUT_UTCR0(sport,v) __raw_writel((v),(sport)->port.membase + UTCR0)
54#define UART_PUT_UTCR1(sport,v) __raw_writel((v),(sport)->port.membase + UTCR1)
55#define UART_PUT_UTCR2(sport,v) __raw_writel((v),(sport)->port.membase + UTCR2)
56#define UART_PUT_UTCR3(sport,v) __raw_writel((v),(sport)->port.membase + UTCR3)
57#define UART_PUT_UTSR0(sport,v) __raw_writel((v),(sport)->port.membase + UTSR0)
58#define UART_PUT_UTSR1(sport,v) __raw_writel((v),(sport)->port.membase + UTSR1)
59#define UART_PUT_CHAR(sport,v) __raw_writel((v),(sport)->port.membase + UTDR)
60
61/*
62 * This is the size of our serial port register set.
63 */
64#define UART_PORT_SIZE 0x24
65
66/*
67 * This determines how often we check the modem status signals
68 * for any change. They generally aren't connected to an IRQ
69 * so we have to poll them. We also check immediately before
70 * filling the TX fifo incase CTS has been dropped.
71 */
72#define MCTRL_TIMEOUT (250*HZ/1000)
73
74struct sa1100_port {
75 struct uart_port port;
76 struct timer_list timer;
77 unsigned int old_status;
78 struct mctrl_gpios *gpios;
79};
80
81/*
82 * Handle any change of modem status signal since we were last called.
83 */
84static void sa1100_mctrl_check(struct sa1100_port *sport)
85{
86 unsigned int status, changed;
87
88 status = sport->port.ops->get_mctrl(&sport->port);
89 changed = status ^ sport->old_status;
90
91 if (changed == 0)
92 return;
93
94 sport->old_status = status;
95
96 if (changed & TIOCM_RI)
97 sport->port.icount.rng++;
98 if (changed & TIOCM_DSR)
99 sport->port.icount.dsr++;
100 if (changed & TIOCM_CAR)
101 uart_handle_dcd_change(&sport->port, status & TIOCM_CAR);
102 if (changed & TIOCM_CTS)
103 uart_handle_cts_change(&sport->port, status & TIOCM_CTS);
104
105 wake_up_interruptible(&sport->port.state->port.delta_msr_wait);
106}
107
108/*
109 * This is our per-port timeout handler, for checking the
110 * modem status signals.
111 */
112static void sa1100_timeout(struct timer_list *t)
113{
114 struct sa1100_port *sport = from_timer(sport, t, timer);
115 unsigned long flags;
116
117 if (sport->port.state) {
118 spin_lock_irqsave(&sport->port.lock, flags);
119 sa1100_mctrl_check(sport);
120 spin_unlock_irqrestore(&sport->port.lock, flags);
121
122 mod_timer(&sport->timer, jiffies + MCTRL_TIMEOUT);
123 }
124}
125
126/*
127 * interrupts disabled on entry
128 */
129static void sa1100_stop_tx(struct uart_port *port)
130{
131 struct sa1100_port *sport =
132 container_of(port, struct sa1100_port, port);
133 u32 utcr3;
134
135 utcr3 = UART_GET_UTCR3(sport);
136 UART_PUT_UTCR3(sport, utcr3 & ~UTCR3_TIE);
137 sport->port.read_status_mask &= ~UTSR0_TO_SM(UTSR0_TFS);
138}
139
140/*
141 * port locked and interrupts disabled
142 */
143static void sa1100_start_tx(struct uart_port *port)
144{
145 struct sa1100_port *sport =
146 container_of(port, struct sa1100_port, port);
147 u32 utcr3;
148
149 utcr3 = UART_GET_UTCR3(sport);
150 sport->port.read_status_mask |= UTSR0_TO_SM(UTSR0_TFS);
151 UART_PUT_UTCR3(sport, utcr3 | UTCR3_TIE);
152}
153
154/*
155 * Interrupts enabled
156 */
157static void sa1100_stop_rx(struct uart_port *port)
158{
159 struct sa1100_port *sport =
160 container_of(port, struct sa1100_port, port);
161 u32 utcr3;
162
163 utcr3 = UART_GET_UTCR3(sport);
164 UART_PUT_UTCR3(sport, utcr3 & ~UTCR3_RIE);
165}
166
167/*
168 * Set the modem control timer to fire immediately.
169 */
170static void sa1100_enable_ms(struct uart_port *port)
171{
172 struct sa1100_port *sport =
173 container_of(port, struct sa1100_port, port);
174
175 mod_timer(&sport->timer, jiffies);
176
177 mctrl_gpio_enable_ms(sport->gpios);
178}
179
180static void
181sa1100_rx_chars(struct sa1100_port *sport)
182{
183 unsigned int status, ch, flg;
184
185 status = UTSR1_TO_SM(UART_GET_UTSR1(sport)) |
186 UTSR0_TO_SM(UART_GET_UTSR0(sport));
187 while (status & UTSR1_TO_SM(UTSR1_RNE)) {
188 ch = UART_GET_CHAR(sport);
189
190 sport->port.icount.rx++;
191
192 flg = TTY_NORMAL;
193
194 /*
195 * note that the error handling code is
196 * out of the main execution path
197 */
198 if (status & UTSR1_TO_SM(UTSR1_PRE | UTSR1_FRE | UTSR1_ROR)) {
199 if (status & UTSR1_TO_SM(UTSR1_PRE))
200 sport->port.icount.parity++;
201 else if (status & UTSR1_TO_SM(UTSR1_FRE))
202 sport->port.icount.frame++;
203 if (status & UTSR1_TO_SM(UTSR1_ROR))
204 sport->port.icount.overrun++;
205
206 status &= sport->port.read_status_mask;
207
208 if (status & UTSR1_TO_SM(UTSR1_PRE))
209 flg = TTY_PARITY;
210 else if (status & UTSR1_TO_SM(UTSR1_FRE))
211 flg = TTY_FRAME;
212
213 sport->port.sysrq = 0;
214 }
215
216 if (uart_handle_sysrq_char(&sport->port, ch))
217 goto ignore_char;
218
219 uart_insert_char(&sport->port, status, UTSR1_TO_SM(UTSR1_ROR), ch, flg);
220
221 ignore_char:
222 status = UTSR1_TO_SM(UART_GET_UTSR1(sport)) |
223 UTSR0_TO_SM(UART_GET_UTSR0(sport));
224 }
225
226 tty_flip_buffer_push(&sport->port.state->port);
227}
228
229static void sa1100_tx_chars(struct sa1100_port *sport)
230{
231 u8 ch;
232
233 /*
234 * Check the modem control lines before
235 * transmitting anything.
236 */
237 sa1100_mctrl_check(sport);
238
239 uart_port_tx(&sport->port, ch,
240 UART_GET_UTSR1(sport) & UTSR1_TNF,
241 UART_PUT_CHAR(sport, ch));
242}
243
244static irqreturn_t sa1100_int(int irq, void *dev_id)
245{
246 struct sa1100_port *sport = dev_id;
247 unsigned int status, pass_counter = 0;
248
249 spin_lock(&sport->port.lock);
250 status = UART_GET_UTSR0(sport);
251 status &= SM_TO_UTSR0(sport->port.read_status_mask) | ~UTSR0_TFS;
252 do {
253 if (status & (UTSR0_RFS | UTSR0_RID)) {
254 /* Clear the receiver idle bit, if set */
255 if (status & UTSR0_RID)
256 UART_PUT_UTSR0(sport, UTSR0_RID);
257 sa1100_rx_chars(sport);
258 }
259
260 /* Clear the relevant break bits */
261 if (status & (UTSR0_RBB | UTSR0_REB))
262 UART_PUT_UTSR0(sport, status & (UTSR0_RBB | UTSR0_REB));
263
264 if (status & UTSR0_RBB)
265 sport->port.icount.brk++;
266
267 if (status & UTSR0_REB)
268 uart_handle_break(&sport->port);
269
270 if (status & UTSR0_TFS)
271 sa1100_tx_chars(sport);
272 if (pass_counter++ > SA1100_ISR_PASS_LIMIT)
273 break;
274 status = UART_GET_UTSR0(sport);
275 status &= SM_TO_UTSR0(sport->port.read_status_mask) |
276 ~UTSR0_TFS;
277 } while (status & (UTSR0_TFS | UTSR0_RFS | UTSR0_RID));
278 spin_unlock(&sport->port.lock);
279
280 return IRQ_HANDLED;
281}
282
283/*
284 * Return TIOCSER_TEMT when transmitter is not busy.
285 */
286static unsigned int sa1100_tx_empty(struct uart_port *port)
287{
288 struct sa1100_port *sport =
289 container_of(port, struct sa1100_port, port);
290
291 return UART_GET_UTSR1(sport) & UTSR1_TBY ? 0 : TIOCSER_TEMT;
292}
293
294static unsigned int sa1100_get_mctrl(struct uart_port *port)
295{
296 struct sa1100_port *sport =
297 container_of(port, struct sa1100_port, port);
298 int ret = TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
299
300 mctrl_gpio_get(sport->gpios, &ret);
301
302 return ret;
303}
304
305static void sa1100_set_mctrl(struct uart_port *port, unsigned int mctrl)
306{
307 struct sa1100_port *sport =
308 container_of(port, struct sa1100_port, port);
309
310 mctrl_gpio_set(sport->gpios, mctrl);
311}
312
313/*
314 * Interrupts always disabled.
315 */
316static void sa1100_break_ctl(struct uart_port *port, int break_state)
317{
318 struct sa1100_port *sport =
319 container_of(port, struct sa1100_port, port);
320 unsigned long flags;
321 unsigned int utcr3;
322
323 spin_lock_irqsave(&sport->port.lock, flags);
324 utcr3 = UART_GET_UTCR3(sport);
325 if (break_state == -1)
326 utcr3 |= UTCR3_BRK;
327 else
328 utcr3 &= ~UTCR3_BRK;
329 UART_PUT_UTCR3(sport, utcr3);
330 spin_unlock_irqrestore(&sport->port.lock, flags);
331}
332
333static int sa1100_startup(struct uart_port *port)
334{
335 struct sa1100_port *sport =
336 container_of(port, struct sa1100_port, port);
337 int retval;
338
339 /*
340 * Allocate the IRQ
341 */
342 retval = request_irq(sport->port.irq, sa1100_int, 0,
343 "sa11x0-uart", sport);
344 if (retval)
345 return retval;
346
347 /*
348 * Finally, clear and enable interrupts
349 */
350 UART_PUT_UTSR0(sport, -1);
351 UART_PUT_UTCR3(sport, UTCR3_RXE | UTCR3_TXE | UTCR3_RIE);
352
353 /*
354 * Enable modem status interrupts
355 */
356 spin_lock_irq(&sport->port.lock);
357 sa1100_enable_ms(&sport->port);
358 spin_unlock_irq(&sport->port.lock);
359
360 return 0;
361}
362
363static void sa1100_shutdown(struct uart_port *port)
364{
365 struct sa1100_port *sport =
366 container_of(port, struct sa1100_port, port);
367
368 /*
369 * Stop our timer.
370 */
371 del_timer_sync(&sport->timer);
372
373 /*
374 * Free the interrupt
375 */
376 free_irq(sport->port.irq, sport);
377
378 /*
379 * Disable all interrupts, port and break condition.
380 */
381 UART_PUT_UTCR3(sport, 0);
382}
383
384static void
385sa1100_set_termios(struct uart_port *port, struct ktermios *termios,
386 const struct ktermios *old)
387{
388 struct sa1100_port *sport =
389 container_of(port, struct sa1100_port, port);
390 unsigned long flags;
391 unsigned int utcr0, old_utcr3, baud, quot;
392 unsigned int old_csize = old ? old->c_cflag & CSIZE : CS8;
393
394 /*
395 * We only support CS7 and CS8.
396 */
397 while ((termios->c_cflag & CSIZE) != CS7 &&
398 (termios->c_cflag & CSIZE) != CS8) {
399 termios->c_cflag &= ~CSIZE;
400 termios->c_cflag |= old_csize;
401 old_csize = CS8;
402 }
403
404 if ((termios->c_cflag & CSIZE) == CS8)
405 utcr0 = UTCR0_DSS;
406 else
407 utcr0 = 0;
408
409 if (termios->c_cflag & CSTOPB)
410 utcr0 |= UTCR0_SBS;
411 if (termios->c_cflag & PARENB) {
412 utcr0 |= UTCR0_PE;
413 if (!(termios->c_cflag & PARODD))
414 utcr0 |= UTCR0_OES;
415 }
416
417 /*
418 * Ask the core to calculate the divisor for us.
419 */
420 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
421 quot = uart_get_divisor(port, baud);
422
423 del_timer_sync(&sport->timer);
424
425 spin_lock_irqsave(&sport->port.lock, flags);
426
427 sport->port.read_status_mask &= UTSR0_TO_SM(UTSR0_TFS);
428 sport->port.read_status_mask |= UTSR1_TO_SM(UTSR1_ROR);
429 if (termios->c_iflag & INPCK)
430 sport->port.read_status_mask |=
431 UTSR1_TO_SM(UTSR1_FRE | UTSR1_PRE);
432 if (termios->c_iflag & (BRKINT | PARMRK))
433 sport->port.read_status_mask |=
434 UTSR0_TO_SM(UTSR0_RBB | UTSR0_REB);
435
436 /*
437 * Characters to ignore
438 */
439 sport->port.ignore_status_mask = 0;
440 if (termios->c_iflag & IGNPAR)
441 sport->port.ignore_status_mask |=
442 UTSR1_TO_SM(UTSR1_FRE | UTSR1_PRE);
443 if (termios->c_iflag & IGNBRK) {
444 sport->port.ignore_status_mask |=
445 UTSR0_TO_SM(UTSR0_RBB | UTSR0_REB);
446 /*
447 * If we're ignoring parity and break indicators,
448 * ignore overruns too (for real raw support).
449 */
450 if (termios->c_iflag & IGNPAR)
451 sport->port.ignore_status_mask |=
452 UTSR1_TO_SM(UTSR1_ROR);
453 }
454
455 /*
456 * Update the per-port timeout.
457 */
458 uart_update_timeout(port, termios->c_cflag, baud);
459
460 /*
461 * disable interrupts and drain transmitter
462 */
463 old_utcr3 = UART_GET_UTCR3(sport);
464 UART_PUT_UTCR3(sport, old_utcr3 & ~(UTCR3_RIE | UTCR3_TIE));
465
466 while (UART_GET_UTSR1(sport) & UTSR1_TBY)
467 barrier();
468
469 /* then, disable everything */
470 UART_PUT_UTCR3(sport, 0);
471
472 /* set the parity, stop bits and data size */
473 UART_PUT_UTCR0(sport, utcr0);
474
475 /* set the baud rate */
476 quot -= 1;
477 UART_PUT_UTCR1(sport, ((quot & 0xf00) >> 8));
478 UART_PUT_UTCR2(sport, (quot & 0xff));
479
480 UART_PUT_UTSR0(sport, -1);
481
482 UART_PUT_UTCR3(sport, old_utcr3);
483
484 if (UART_ENABLE_MS(&sport->port, termios->c_cflag))
485 sa1100_enable_ms(&sport->port);
486
487 spin_unlock_irqrestore(&sport->port.lock, flags);
488}
489
490static const char *sa1100_type(struct uart_port *port)
491{
492 struct sa1100_port *sport =
493 container_of(port, struct sa1100_port, port);
494
495 return sport->port.type == PORT_SA1100 ? "SA1100" : NULL;
496}
497
498/*
499 * Release the memory region(s) being used by 'port'.
500 */
501static void sa1100_release_port(struct uart_port *port)
502{
503 struct sa1100_port *sport =
504 container_of(port, struct sa1100_port, port);
505
506 release_mem_region(sport->port.mapbase, UART_PORT_SIZE);
507}
508
509/*
510 * Request the memory region(s) being used by 'port'.
511 */
512static int sa1100_request_port(struct uart_port *port)
513{
514 struct sa1100_port *sport =
515 container_of(port, struct sa1100_port, port);
516
517 return request_mem_region(sport->port.mapbase, UART_PORT_SIZE,
518 "sa11x0-uart") != NULL ? 0 : -EBUSY;
519}
520
521/*
522 * Configure/autoconfigure the port.
523 */
524static void sa1100_config_port(struct uart_port *port, int flags)
525{
526 struct sa1100_port *sport =
527 container_of(port, struct sa1100_port, port);
528
529 if (flags & UART_CONFIG_TYPE &&
530 sa1100_request_port(&sport->port) == 0)
531 sport->port.type = PORT_SA1100;
532}
533
534/*
535 * Verify the new serial_struct (for TIOCSSERIAL).
536 * The only change we allow are to the flags and type, and
537 * even then only between PORT_SA1100 and PORT_UNKNOWN
538 */
539static int
540sa1100_verify_port(struct uart_port *port, struct serial_struct *ser)
541{
542 struct sa1100_port *sport =
543 container_of(port, struct sa1100_port, port);
544 int ret = 0;
545
546 if (ser->type != PORT_UNKNOWN && ser->type != PORT_SA1100)
547 ret = -EINVAL;
548 if (sport->port.irq != ser->irq)
549 ret = -EINVAL;
550 if (ser->io_type != SERIAL_IO_MEM)
551 ret = -EINVAL;
552 if (sport->port.uartclk / 16 != ser->baud_base)
553 ret = -EINVAL;
554 if ((void *)sport->port.mapbase != ser->iomem_base)
555 ret = -EINVAL;
556 if (sport->port.iobase != ser->port)
557 ret = -EINVAL;
558 if (ser->hub6 != 0)
559 ret = -EINVAL;
560 return ret;
561}
562
563static struct uart_ops sa1100_pops = {
564 .tx_empty = sa1100_tx_empty,
565 .set_mctrl = sa1100_set_mctrl,
566 .get_mctrl = sa1100_get_mctrl,
567 .stop_tx = sa1100_stop_tx,
568 .start_tx = sa1100_start_tx,
569 .stop_rx = sa1100_stop_rx,
570 .enable_ms = sa1100_enable_ms,
571 .break_ctl = sa1100_break_ctl,
572 .startup = sa1100_startup,
573 .shutdown = sa1100_shutdown,
574 .set_termios = sa1100_set_termios,
575 .type = sa1100_type,
576 .release_port = sa1100_release_port,
577 .request_port = sa1100_request_port,
578 .config_port = sa1100_config_port,
579 .verify_port = sa1100_verify_port,
580};
581
582static struct sa1100_port sa1100_ports[NR_PORTS];
583
584/*
585 * Setup the SA1100 serial ports. Note that we don't include the IrDA
586 * port here since we have our own SIR/FIR driver (see drivers/net/irda)
587 *
588 * Note also that we support "console=ttySAx" where "x" is either 0 or 1.
589 * Which serial port this ends up being depends on the machine you're
590 * running this kernel on. I'm not convinced that this is a good idea,
591 * but that's the way it traditionally works.
592 *
593 * Note that NanoEngine UART3 becomes UART2, and UART2 is no longer
594 * used here.
595 */
596static void __init sa1100_init_ports(void)
597{
598 static int first = 1;
599 int i;
600
601 if (!first)
602 return;
603 first = 0;
604
605 for (i = 0; i < NR_PORTS; i++) {
606 sa1100_ports[i].port.uartclk = 3686400;
607 sa1100_ports[i].port.ops = &sa1100_pops;
608 sa1100_ports[i].port.fifosize = 8;
609 sa1100_ports[i].port.line = i;
610 sa1100_ports[i].port.iotype = UPIO_MEM;
611 timer_setup(&sa1100_ports[i].timer, sa1100_timeout, 0);
612 }
613
614 /*
615 * make transmit lines outputs, so that when the port
616 * is closed, the output is in the MARK state.
617 */
618 PPDR |= PPC_TXD1 | PPC_TXD3;
619 PPSR |= PPC_TXD1 | PPC_TXD3;
620}
621
622void sa1100_register_uart_fns(struct sa1100_port_fns *fns)
623{
624 if (fns->get_mctrl)
625 sa1100_pops.get_mctrl = fns->get_mctrl;
626 if (fns->set_mctrl)
627 sa1100_pops.set_mctrl = fns->set_mctrl;
628
629 sa1100_pops.pm = fns->pm;
630 /*
631 * FIXME: fns->set_wake is unused - this should be called from
632 * the suspend() callback if device_may_wakeup(dev)) is set.
633 */
634}
635
636void __init sa1100_register_uart(int idx, int port)
637{
638 if (idx >= NR_PORTS) {
639 printk(KERN_ERR "%s: bad index number %d\n", __func__, idx);
640 return;
641 }
642
643 switch (port) {
644 case 1:
645 sa1100_ports[idx].port.membase = (void __iomem *)&Ser1UTCR0;
646 sa1100_ports[idx].port.mapbase = _Ser1UTCR0;
647 sa1100_ports[idx].port.irq = IRQ_Ser1UART;
648 sa1100_ports[idx].port.flags = UPF_BOOT_AUTOCONF;
649 break;
650
651 case 2:
652 sa1100_ports[idx].port.membase = (void __iomem *)&Ser2UTCR0;
653 sa1100_ports[idx].port.mapbase = _Ser2UTCR0;
654 sa1100_ports[idx].port.irq = IRQ_Ser2ICP;
655 sa1100_ports[idx].port.flags = UPF_BOOT_AUTOCONF;
656 break;
657
658 case 3:
659 sa1100_ports[idx].port.membase = (void __iomem *)&Ser3UTCR0;
660 sa1100_ports[idx].port.mapbase = _Ser3UTCR0;
661 sa1100_ports[idx].port.irq = IRQ_Ser3UART;
662 sa1100_ports[idx].port.flags = UPF_BOOT_AUTOCONF;
663 break;
664
665 default:
666 printk(KERN_ERR "%s: bad port number %d\n", __func__, port);
667 }
668}
669
670
671#ifdef CONFIG_SERIAL_SA1100_CONSOLE
672static void sa1100_console_putchar(struct uart_port *port, unsigned char ch)
673{
674 struct sa1100_port *sport =
675 container_of(port, struct sa1100_port, port);
676
677 while (!(UART_GET_UTSR1(sport) & UTSR1_TNF))
678 barrier();
679 UART_PUT_CHAR(sport, ch);
680}
681
682/*
683 * Interrupts are disabled on entering
684 */
685static void
686sa1100_console_write(struct console *co, const char *s, unsigned int count)
687{
688 struct sa1100_port *sport = &sa1100_ports[co->index];
689 unsigned int old_utcr3, status;
690
691 /*
692 * First, save UTCR3 and then disable interrupts
693 */
694 old_utcr3 = UART_GET_UTCR3(sport);
695 UART_PUT_UTCR3(sport, (old_utcr3 & ~(UTCR3_RIE | UTCR3_TIE)) |
696 UTCR3_TXE);
697
698 uart_console_write(&sport->port, s, count, sa1100_console_putchar);
699
700 /*
701 * Finally, wait for transmitter to become empty
702 * and restore UTCR3
703 */
704 do {
705 status = UART_GET_UTSR1(sport);
706 } while (status & UTSR1_TBY);
707 UART_PUT_UTCR3(sport, old_utcr3);
708}
709
710/*
711 * If the port was already initialised (eg, by a boot loader),
712 * try to determine the current setup.
713 */
714static void __init
715sa1100_console_get_options(struct sa1100_port *sport, int *baud,
716 int *parity, int *bits)
717{
718 unsigned int utcr3;
719
720 utcr3 = UART_GET_UTCR3(sport) & (UTCR3_RXE | UTCR3_TXE);
721 if (utcr3 == (UTCR3_RXE | UTCR3_TXE)) {
722 /* ok, the port was enabled */
723 unsigned int utcr0, quot;
724
725 utcr0 = UART_GET_UTCR0(sport);
726
727 *parity = 'n';
728 if (utcr0 & UTCR0_PE) {
729 if (utcr0 & UTCR0_OES)
730 *parity = 'e';
731 else
732 *parity = 'o';
733 }
734
735 if (utcr0 & UTCR0_DSS)
736 *bits = 8;
737 else
738 *bits = 7;
739
740 quot = UART_GET_UTCR2(sport) | UART_GET_UTCR1(sport) << 8;
741 quot &= 0xfff;
742 *baud = sport->port.uartclk / (16 * (quot + 1));
743 }
744}
745
746static int __init
747sa1100_console_setup(struct console *co, char *options)
748{
749 struct sa1100_port *sport;
750 int baud = 9600;
751 int bits = 8;
752 int parity = 'n';
753 int flow = 'n';
754
755 /*
756 * Check whether an invalid uart number has been specified, and
757 * if so, search for the first available port that does have
758 * console support.
759 */
760 if (co->index == -1 || co->index >= NR_PORTS)
761 co->index = 0;
762 sport = &sa1100_ports[co->index];
763
764 if (options)
765 uart_parse_options(options, &baud, &parity, &bits, &flow);
766 else
767 sa1100_console_get_options(sport, &baud, &parity, &bits);
768
769 return uart_set_options(&sport->port, co, baud, parity, bits, flow);
770}
771
772static struct uart_driver sa1100_reg;
773static struct console sa1100_console = {
774 .name = "ttySA",
775 .write = sa1100_console_write,
776 .device = uart_console_device,
777 .setup = sa1100_console_setup,
778 .flags = CON_PRINTBUFFER,
779 .index = -1,
780 .data = &sa1100_reg,
781};
782
783static int __init sa1100_rs_console_init(void)
784{
785 sa1100_init_ports();
786 register_console(&sa1100_console);
787 return 0;
788}
789console_initcall(sa1100_rs_console_init);
790
791#define SA1100_CONSOLE &sa1100_console
792#else
793#define SA1100_CONSOLE NULL
794#endif
795
796static struct uart_driver sa1100_reg = {
797 .owner = THIS_MODULE,
798 .driver_name = "ttySA",
799 .dev_name = "ttySA",
800 .major = SERIAL_SA1100_MAJOR,
801 .minor = MINOR_START,
802 .nr = NR_PORTS,
803 .cons = SA1100_CONSOLE,
804};
805
806static int sa1100_serial_suspend(struct platform_device *dev, pm_message_t state)
807{
808 struct sa1100_port *sport = platform_get_drvdata(dev);
809
810 if (sport)
811 uart_suspend_port(&sa1100_reg, &sport->port);
812
813 return 0;
814}
815
816static int sa1100_serial_resume(struct platform_device *dev)
817{
818 struct sa1100_port *sport = platform_get_drvdata(dev);
819
820 if (sport)
821 uart_resume_port(&sa1100_reg, &sport->port);
822
823 return 0;
824}
825
826static int sa1100_serial_add_one_port(struct sa1100_port *sport, struct platform_device *dev)
827{
828 sport->port.dev = &dev->dev;
829 sport->port.has_sysrq = IS_ENABLED(CONFIG_SERIAL_SA1100_CONSOLE);
830
831 // mctrl_gpio_init() requires that the GPIO driver supports interrupts,
832 // but we need to support GPIO drivers for hardware that has no such
833 // interrupts. Use mctrl_gpio_init_noauto() instead.
834 sport->gpios = mctrl_gpio_init_noauto(sport->port.dev, 0);
835 if (IS_ERR(sport->gpios)) {
836 int err = PTR_ERR(sport->gpios);
837
838 dev_err(sport->port.dev, "failed to get mctrl gpios: %d\n",
839 err);
840
841 if (err == -EPROBE_DEFER)
842 return err;
843
844 sport->gpios = NULL;
845 }
846
847 platform_set_drvdata(dev, sport);
848
849 return uart_add_one_port(&sa1100_reg, &sport->port);
850}
851
852static int sa1100_serial_probe(struct platform_device *dev)
853{
854 struct resource *res;
855 int i;
856
857 res = platform_get_resource(dev, IORESOURCE_MEM, 0);
858 if (!res)
859 return -EINVAL;
860
861 for (i = 0; i < NR_PORTS; i++)
862 if (sa1100_ports[i].port.mapbase == res->start)
863 break;
864 if (i == NR_PORTS)
865 return -ENODEV;
866
867 sa1100_serial_add_one_port(&sa1100_ports[i], dev);
868
869 return 0;
870}
871
872static int sa1100_serial_remove(struct platform_device *pdev)
873{
874 struct sa1100_port *sport = platform_get_drvdata(pdev);
875
876 if (sport)
877 uart_remove_one_port(&sa1100_reg, &sport->port);
878
879 return 0;
880}
881
882static struct platform_driver sa11x0_serial_driver = {
883 .probe = sa1100_serial_probe,
884 .remove = sa1100_serial_remove,
885 .suspend = sa1100_serial_suspend,
886 .resume = sa1100_serial_resume,
887 .driver = {
888 .name = "sa11x0-uart",
889 },
890};
891
892static int __init sa1100_serial_init(void)
893{
894 int ret;
895
896 printk(KERN_INFO "Serial: SA11x0 driver\n");
897
898 sa1100_init_ports();
899
900 ret = uart_register_driver(&sa1100_reg);
901 if (ret == 0) {
902 ret = platform_driver_register(&sa11x0_serial_driver);
903 if (ret)
904 uart_unregister_driver(&sa1100_reg);
905 }
906 return ret;
907}
908
909static void __exit sa1100_serial_exit(void)
910{
911 platform_driver_unregister(&sa11x0_serial_driver);
912 uart_unregister_driver(&sa1100_reg);
913}
914
915module_init(sa1100_serial_init);
916module_exit(sa1100_serial_exit);
917
918MODULE_AUTHOR("Deep Blue Solutions Ltd");
919MODULE_DESCRIPTION("SA1100 generic serial port driver");
920MODULE_LICENSE("GPL");
921MODULE_ALIAS_CHARDEV_MAJOR(SERIAL_SA1100_MAJOR);
922MODULE_ALIAS("platform:sa11x0-uart");
1/*
2 * Driver for SA11x0 serial ports
3 *
4 * Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
5 *
6 * Copyright (C) 2000 Deep Blue Solutions Ltd.
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21 */
22
23#if defined(CONFIG_SERIAL_SA1100_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
24#define SUPPORT_SYSRQ
25#endif
26
27#include <linux/module.h>
28#include <linux/ioport.h>
29#include <linux/init.h>
30#include <linux/console.h>
31#include <linux/sysrq.h>
32#include <linux/platform_device.h>
33#include <linux/tty.h>
34#include <linux/tty_flip.h>
35#include <linux/serial_core.h>
36#include <linux/serial.h>
37#include <linux/io.h>
38
39#include <asm/irq.h>
40#include <mach/hardware.h>
41#include <mach/irqs.h>
42#include <asm/mach/serial_sa1100.h>
43
44/* We've been assigned a range on the "Low-density serial ports" major */
45#define SERIAL_SA1100_MAJOR 204
46#define MINOR_START 5
47
48#define NR_PORTS 3
49
50#define SA1100_ISR_PASS_LIMIT 256
51
52/*
53 * Convert from ignore_status_mask or read_status_mask to UTSR[01]
54 */
55#define SM_TO_UTSR0(x) ((x) & 0xff)
56#define SM_TO_UTSR1(x) ((x) >> 8)
57#define UTSR0_TO_SM(x) ((x))
58#define UTSR1_TO_SM(x) ((x) << 8)
59
60#define UART_GET_UTCR0(sport) __raw_readl((sport)->port.membase + UTCR0)
61#define UART_GET_UTCR1(sport) __raw_readl((sport)->port.membase + UTCR1)
62#define UART_GET_UTCR2(sport) __raw_readl((sport)->port.membase + UTCR2)
63#define UART_GET_UTCR3(sport) __raw_readl((sport)->port.membase + UTCR3)
64#define UART_GET_UTSR0(sport) __raw_readl((sport)->port.membase + UTSR0)
65#define UART_GET_UTSR1(sport) __raw_readl((sport)->port.membase + UTSR1)
66#define UART_GET_CHAR(sport) __raw_readl((sport)->port.membase + UTDR)
67
68#define UART_PUT_UTCR0(sport,v) __raw_writel((v),(sport)->port.membase + UTCR0)
69#define UART_PUT_UTCR1(sport,v) __raw_writel((v),(sport)->port.membase + UTCR1)
70#define UART_PUT_UTCR2(sport,v) __raw_writel((v),(sport)->port.membase + UTCR2)
71#define UART_PUT_UTCR3(sport,v) __raw_writel((v),(sport)->port.membase + UTCR3)
72#define UART_PUT_UTSR0(sport,v) __raw_writel((v),(sport)->port.membase + UTSR0)
73#define UART_PUT_UTSR1(sport,v) __raw_writel((v),(sport)->port.membase + UTSR1)
74#define UART_PUT_CHAR(sport,v) __raw_writel((v),(sport)->port.membase + UTDR)
75
76/*
77 * This is the size of our serial port register set.
78 */
79#define UART_PORT_SIZE 0x24
80
81/*
82 * This determines how often we check the modem status signals
83 * for any change. They generally aren't connected to an IRQ
84 * so we have to poll them. We also check immediately before
85 * filling the TX fifo incase CTS has been dropped.
86 */
87#define MCTRL_TIMEOUT (250*HZ/1000)
88
89struct sa1100_port {
90 struct uart_port port;
91 struct timer_list timer;
92 unsigned int old_status;
93};
94
95/*
96 * Handle any change of modem status signal since we were last called.
97 */
98static void sa1100_mctrl_check(struct sa1100_port *sport)
99{
100 unsigned int status, changed;
101
102 status = sport->port.ops->get_mctrl(&sport->port);
103 changed = status ^ sport->old_status;
104
105 if (changed == 0)
106 return;
107
108 sport->old_status = status;
109
110 if (changed & TIOCM_RI)
111 sport->port.icount.rng++;
112 if (changed & TIOCM_DSR)
113 sport->port.icount.dsr++;
114 if (changed & TIOCM_CAR)
115 uart_handle_dcd_change(&sport->port, status & TIOCM_CAR);
116 if (changed & TIOCM_CTS)
117 uart_handle_cts_change(&sport->port, status & TIOCM_CTS);
118
119 wake_up_interruptible(&sport->port.state->port.delta_msr_wait);
120}
121
122/*
123 * This is our per-port timeout handler, for checking the
124 * modem status signals.
125 */
126static void sa1100_timeout(unsigned long data)
127{
128 struct sa1100_port *sport = (struct sa1100_port *)data;
129 unsigned long flags;
130
131 if (sport->port.state) {
132 spin_lock_irqsave(&sport->port.lock, flags);
133 sa1100_mctrl_check(sport);
134 spin_unlock_irqrestore(&sport->port.lock, flags);
135
136 mod_timer(&sport->timer, jiffies + MCTRL_TIMEOUT);
137 }
138}
139
140/*
141 * interrupts disabled on entry
142 */
143static void sa1100_stop_tx(struct uart_port *port)
144{
145 struct sa1100_port *sport = (struct sa1100_port *)port;
146 u32 utcr3;
147
148 utcr3 = UART_GET_UTCR3(sport);
149 UART_PUT_UTCR3(sport, utcr3 & ~UTCR3_TIE);
150 sport->port.read_status_mask &= ~UTSR0_TO_SM(UTSR0_TFS);
151}
152
153/*
154 * port locked and interrupts disabled
155 */
156static void sa1100_start_tx(struct uart_port *port)
157{
158 struct sa1100_port *sport = (struct sa1100_port *)port;
159 u32 utcr3;
160
161 utcr3 = UART_GET_UTCR3(sport);
162 sport->port.read_status_mask |= UTSR0_TO_SM(UTSR0_TFS);
163 UART_PUT_UTCR3(sport, utcr3 | UTCR3_TIE);
164}
165
166/*
167 * Interrupts enabled
168 */
169static void sa1100_stop_rx(struct uart_port *port)
170{
171 struct sa1100_port *sport = (struct sa1100_port *)port;
172 u32 utcr3;
173
174 utcr3 = UART_GET_UTCR3(sport);
175 UART_PUT_UTCR3(sport, utcr3 & ~UTCR3_RIE);
176}
177
178/*
179 * Set the modem control timer to fire immediately.
180 */
181static void sa1100_enable_ms(struct uart_port *port)
182{
183 struct sa1100_port *sport = (struct sa1100_port *)port;
184
185 mod_timer(&sport->timer, jiffies);
186}
187
188static void
189sa1100_rx_chars(struct sa1100_port *sport)
190{
191 struct tty_struct *tty = sport->port.state->port.tty;
192 unsigned int status, ch, flg;
193
194 status = UTSR1_TO_SM(UART_GET_UTSR1(sport)) |
195 UTSR0_TO_SM(UART_GET_UTSR0(sport));
196 while (status & UTSR1_TO_SM(UTSR1_RNE)) {
197 ch = UART_GET_CHAR(sport);
198
199 sport->port.icount.rx++;
200
201 flg = TTY_NORMAL;
202
203 /*
204 * note that the error handling code is
205 * out of the main execution path
206 */
207 if (status & UTSR1_TO_SM(UTSR1_PRE | UTSR1_FRE | UTSR1_ROR)) {
208 if (status & UTSR1_TO_SM(UTSR1_PRE))
209 sport->port.icount.parity++;
210 else if (status & UTSR1_TO_SM(UTSR1_FRE))
211 sport->port.icount.frame++;
212 if (status & UTSR1_TO_SM(UTSR1_ROR))
213 sport->port.icount.overrun++;
214
215 status &= sport->port.read_status_mask;
216
217 if (status & UTSR1_TO_SM(UTSR1_PRE))
218 flg = TTY_PARITY;
219 else if (status & UTSR1_TO_SM(UTSR1_FRE))
220 flg = TTY_FRAME;
221
222#ifdef SUPPORT_SYSRQ
223 sport->port.sysrq = 0;
224#endif
225 }
226
227 if (uart_handle_sysrq_char(&sport->port, ch))
228 goto ignore_char;
229
230 uart_insert_char(&sport->port, status, UTSR1_TO_SM(UTSR1_ROR), ch, flg);
231
232 ignore_char:
233 status = UTSR1_TO_SM(UART_GET_UTSR1(sport)) |
234 UTSR0_TO_SM(UART_GET_UTSR0(sport));
235 }
236 tty_flip_buffer_push(tty);
237}
238
239static void sa1100_tx_chars(struct sa1100_port *sport)
240{
241 struct circ_buf *xmit = &sport->port.state->xmit;
242
243 if (sport->port.x_char) {
244 UART_PUT_CHAR(sport, sport->port.x_char);
245 sport->port.icount.tx++;
246 sport->port.x_char = 0;
247 return;
248 }
249
250 /*
251 * Check the modem control lines before
252 * transmitting anything.
253 */
254 sa1100_mctrl_check(sport);
255
256 if (uart_circ_empty(xmit) || uart_tx_stopped(&sport->port)) {
257 sa1100_stop_tx(&sport->port);
258 return;
259 }
260
261 /*
262 * Tried using FIFO (not checking TNF) for fifo fill:
263 * still had the '4 bytes repeated' problem.
264 */
265 while (UART_GET_UTSR1(sport) & UTSR1_TNF) {
266 UART_PUT_CHAR(sport, xmit->buf[xmit->tail]);
267 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
268 sport->port.icount.tx++;
269 if (uart_circ_empty(xmit))
270 break;
271 }
272
273 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
274 uart_write_wakeup(&sport->port);
275
276 if (uart_circ_empty(xmit))
277 sa1100_stop_tx(&sport->port);
278}
279
280static irqreturn_t sa1100_int(int irq, void *dev_id)
281{
282 struct sa1100_port *sport = dev_id;
283 unsigned int status, pass_counter = 0;
284
285 spin_lock(&sport->port.lock);
286 status = UART_GET_UTSR0(sport);
287 status &= SM_TO_UTSR0(sport->port.read_status_mask) | ~UTSR0_TFS;
288 do {
289 if (status & (UTSR0_RFS | UTSR0_RID)) {
290 /* Clear the receiver idle bit, if set */
291 if (status & UTSR0_RID)
292 UART_PUT_UTSR0(sport, UTSR0_RID);
293 sa1100_rx_chars(sport);
294 }
295
296 /* Clear the relevant break bits */
297 if (status & (UTSR0_RBB | UTSR0_REB))
298 UART_PUT_UTSR0(sport, status & (UTSR0_RBB | UTSR0_REB));
299
300 if (status & UTSR0_RBB)
301 sport->port.icount.brk++;
302
303 if (status & UTSR0_REB)
304 uart_handle_break(&sport->port);
305
306 if (status & UTSR0_TFS)
307 sa1100_tx_chars(sport);
308 if (pass_counter++ > SA1100_ISR_PASS_LIMIT)
309 break;
310 status = UART_GET_UTSR0(sport);
311 status &= SM_TO_UTSR0(sport->port.read_status_mask) |
312 ~UTSR0_TFS;
313 } while (status & (UTSR0_TFS | UTSR0_RFS | UTSR0_RID));
314 spin_unlock(&sport->port.lock);
315
316 return IRQ_HANDLED;
317}
318
319/*
320 * Return TIOCSER_TEMT when transmitter is not busy.
321 */
322static unsigned int sa1100_tx_empty(struct uart_port *port)
323{
324 struct sa1100_port *sport = (struct sa1100_port *)port;
325
326 return UART_GET_UTSR1(sport) & UTSR1_TBY ? 0 : TIOCSER_TEMT;
327}
328
329static unsigned int sa1100_get_mctrl(struct uart_port *port)
330{
331 return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
332}
333
334static void sa1100_set_mctrl(struct uart_port *port, unsigned int mctrl)
335{
336}
337
338/*
339 * Interrupts always disabled.
340 */
341static void sa1100_break_ctl(struct uart_port *port, int break_state)
342{
343 struct sa1100_port *sport = (struct sa1100_port *)port;
344 unsigned long flags;
345 unsigned int utcr3;
346
347 spin_lock_irqsave(&sport->port.lock, flags);
348 utcr3 = UART_GET_UTCR3(sport);
349 if (break_state == -1)
350 utcr3 |= UTCR3_BRK;
351 else
352 utcr3 &= ~UTCR3_BRK;
353 UART_PUT_UTCR3(sport, utcr3);
354 spin_unlock_irqrestore(&sport->port.lock, flags);
355}
356
357static int sa1100_startup(struct uart_port *port)
358{
359 struct sa1100_port *sport = (struct sa1100_port *)port;
360 int retval;
361
362 /*
363 * Allocate the IRQ
364 */
365 retval = request_irq(sport->port.irq, sa1100_int, 0,
366 "sa11x0-uart", sport);
367 if (retval)
368 return retval;
369
370 /*
371 * Finally, clear and enable interrupts
372 */
373 UART_PUT_UTSR0(sport, -1);
374 UART_PUT_UTCR3(sport, UTCR3_RXE | UTCR3_TXE | UTCR3_RIE);
375
376 /*
377 * Enable modem status interrupts
378 */
379 spin_lock_irq(&sport->port.lock);
380 sa1100_enable_ms(&sport->port);
381 spin_unlock_irq(&sport->port.lock);
382
383 return 0;
384}
385
386static void sa1100_shutdown(struct uart_port *port)
387{
388 struct sa1100_port *sport = (struct sa1100_port *)port;
389
390 /*
391 * Stop our timer.
392 */
393 del_timer_sync(&sport->timer);
394
395 /*
396 * Free the interrupt
397 */
398 free_irq(sport->port.irq, sport);
399
400 /*
401 * Disable all interrupts, port and break condition.
402 */
403 UART_PUT_UTCR3(sport, 0);
404}
405
406static void
407sa1100_set_termios(struct uart_port *port, struct ktermios *termios,
408 struct ktermios *old)
409{
410 struct sa1100_port *sport = (struct sa1100_port *)port;
411 unsigned long flags;
412 unsigned int utcr0, old_utcr3, baud, quot;
413 unsigned int old_csize = old ? old->c_cflag & CSIZE : CS8;
414
415 /*
416 * We only support CS7 and CS8.
417 */
418 while ((termios->c_cflag & CSIZE) != CS7 &&
419 (termios->c_cflag & CSIZE) != CS8) {
420 termios->c_cflag &= ~CSIZE;
421 termios->c_cflag |= old_csize;
422 old_csize = CS8;
423 }
424
425 if ((termios->c_cflag & CSIZE) == CS8)
426 utcr0 = UTCR0_DSS;
427 else
428 utcr0 = 0;
429
430 if (termios->c_cflag & CSTOPB)
431 utcr0 |= UTCR0_SBS;
432 if (termios->c_cflag & PARENB) {
433 utcr0 |= UTCR0_PE;
434 if (!(termios->c_cflag & PARODD))
435 utcr0 |= UTCR0_OES;
436 }
437
438 /*
439 * Ask the core to calculate the divisor for us.
440 */
441 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
442 quot = uart_get_divisor(port, baud);
443
444 spin_lock_irqsave(&sport->port.lock, flags);
445
446 sport->port.read_status_mask &= UTSR0_TO_SM(UTSR0_TFS);
447 sport->port.read_status_mask |= UTSR1_TO_SM(UTSR1_ROR);
448 if (termios->c_iflag & INPCK)
449 sport->port.read_status_mask |=
450 UTSR1_TO_SM(UTSR1_FRE | UTSR1_PRE);
451 if (termios->c_iflag & (BRKINT | PARMRK))
452 sport->port.read_status_mask |=
453 UTSR0_TO_SM(UTSR0_RBB | UTSR0_REB);
454
455 /*
456 * Characters to ignore
457 */
458 sport->port.ignore_status_mask = 0;
459 if (termios->c_iflag & IGNPAR)
460 sport->port.ignore_status_mask |=
461 UTSR1_TO_SM(UTSR1_FRE | UTSR1_PRE);
462 if (termios->c_iflag & IGNBRK) {
463 sport->port.ignore_status_mask |=
464 UTSR0_TO_SM(UTSR0_RBB | UTSR0_REB);
465 /*
466 * If we're ignoring parity and break indicators,
467 * ignore overruns too (for real raw support).
468 */
469 if (termios->c_iflag & IGNPAR)
470 sport->port.ignore_status_mask |=
471 UTSR1_TO_SM(UTSR1_ROR);
472 }
473
474 del_timer_sync(&sport->timer);
475
476 /*
477 * Update the per-port timeout.
478 */
479 uart_update_timeout(port, termios->c_cflag, baud);
480
481 /*
482 * disable interrupts and drain transmitter
483 */
484 old_utcr3 = UART_GET_UTCR3(sport);
485 UART_PUT_UTCR3(sport, old_utcr3 & ~(UTCR3_RIE | UTCR3_TIE));
486
487 while (UART_GET_UTSR1(sport) & UTSR1_TBY)
488 barrier();
489
490 /* then, disable everything */
491 UART_PUT_UTCR3(sport, 0);
492
493 /* set the parity, stop bits and data size */
494 UART_PUT_UTCR0(sport, utcr0);
495
496 /* set the baud rate */
497 quot -= 1;
498 UART_PUT_UTCR1(sport, ((quot & 0xf00) >> 8));
499 UART_PUT_UTCR2(sport, (quot & 0xff));
500
501 UART_PUT_UTSR0(sport, -1);
502
503 UART_PUT_UTCR3(sport, old_utcr3);
504
505 if (UART_ENABLE_MS(&sport->port, termios->c_cflag))
506 sa1100_enable_ms(&sport->port);
507
508 spin_unlock_irqrestore(&sport->port.lock, flags);
509}
510
511static const char *sa1100_type(struct uart_port *port)
512{
513 struct sa1100_port *sport = (struct sa1100_port *)port;
514
515 return sport->port.type == PORT_SA1100 ? "SA1100" : NULL;
516}
517
518/*
519 * Release the memory region(s) being used by 'port'.
520 */
521static void sa1100_release_port(struct uart_port *port)
522{
523 struct sa1100_port *sport = (struct sa1100_port *)port;
524
525 release_mem_region(sport->port.mapbase, UART_PORT_SIZE);
526}
527
528/*
529 * Request the memory region(s) being used by 'port'.
530 */
531static int sa1100_request_port(struct uart_port *port)
532{
533 struct sa1100_port *sport = (struct sa1100_port *)port;
534
535 return request_mem_region(sport->port.mapbase, UART_PORT_SIZE,
536 "sa11x0-uart") != NULL ? 0 : -EBUSY;
537}
538
539/*
540 * Configure/autoconfigure the port.
541 */
542static void sa1100_config_port(struct uart_port *port, int flags)
543{
544 struct sa1100_port *sport = (struct sa1100_port *)port;
545
546 if (flags & UART_CONFIG_TYPE &&
547 sa1100_request_port(&sport->port) == 0)
548 sport->port.type = PORT_SA1100;
549}
550
551/*
552 * Verify the new serial_struct (for TIOCSSERIAL).
553 * The only change we allow are to the flags and type, and
554 * even then only between PORT_SA1100 and PORT_UNKNOWN
555 */
556static int
557sa1100_verify_port(struct uart_port *port, struct serial_struct *ser)
558{
559 struct sa1100_port *sport = (struct sa1100_port *)port;
560 int ret = 0;
561
562 if (ser->type != PORT_UNKNOWN && ser->type != PORT_SA1100)
563 ret = -EINVAL;
564 if (sport->port.irq != ser->irq)
565 ret = -EINVAL;
566 if (ser->io_type != SERIAL_IO_MEM)
567 ret = -EINVAL;
568 if (sport->port.uartclk / 16 != ser->baud_base)
569 ret = -EINVAL;
570 if ((void *)sport->port.mapbase != ser->iomem_base)
571 ret = -EINVAL;
572 if (sport->port.iobase != ser->port)
573 ret = -EINVAL;
574 if (ser->hub6 != 0)
575 ret = -EINVAL;
576 return ret;
577}
578
579static struct uart_ops sa1100_pops = {
580 .tx_empty = sa1100_tx_empty,
581 .set_mctrl = sa1100_set_mctrl,
582 .get_mctrl = sa1100_get_mctrl,
583 .stop_tx = sa1100_stop_tx,
584 .start_tx = sa1100_start_tx,
585 .stop_rx = sa1100_stop_rx,
586 .enable_ms = sa1100_enable_ms,
587 .break_ctl = sa1100_break_ctl,
588 .startup = sa1100_startup,
589 .shutdown = sa1100_shutdown,
590 .set_termios = sa1100_set_termios,
591 .type = sa1100_type,
592 .release_port = sa1100_release_port,
593 .request_port = sa1100_request_port,
594 .config_port = sa1100_config_port,
595 .verify_port = sa1100_verify_port,
596};
597
598static struct sa1100_port sa1100_ports[NR_PORTS];
599
600/*
601 * Setup the SA1100 serial ports. Note that we don't include the IrDA
602 * port here since we have our own SIR/FIR driver (see drivers/net/irda)
603 *
604 * Note also that we support "console=ttySAx" where "x" is either 0 or 1.
605 * Which serial port this ends up being depends on the machine you're
606 * running this kernel on. I'm not convinced that this is a good idea,
607 * but that's the way it traditionally works.
608 *
609 * Note that NanoEngine UART3 becomes UART2, and UART2 is no longer
610 * used here.
611 */
612static void __init sa1100_init_ports(void)
613{
614 static int first = 1;
615 int i;
616
617 if (!first)
618 return;
619 first = 0;
620
621 for (i = 0; i < NR_PORTS; i++) {
622 sa1100_ports[i].port.uartclk = 3686400;
623 sa1100_ports[i].port.ops = &sa1100_pops;
624 sa1100_ports[i].port.fifosize = 8;
625 sa1100_ports[i].port.line = i;
626 sa1100_ports[i].port.iotype = UPIO_MEM;
627 init_timer(&sa1100_ports[i].timer);
628 sa1100_ports[i].timer.function = sa1100_timeout;
629 sa1100_ports[i].timer.data = (unsigned long)&sa1100_ports[i];
630 }
631
632 /*
633 * make transmit lines outputs, so that when the port
634 * is closed, the output is in the MARK state.
635 */
636 PPDR |= PPC_TXD1 | PPC_TXD3;
637 PPSR |= PPC_TXD1 | PPC_TXD3;
638}
639
640void __devinit sa1100_register_uart_fns(struct sa1100_port_fns *fns)
641{
642 if (fns->get_mctrl)
643 sa1100_pops.get_mctrl = fns->get_mctrl;
644 if (fns->set_mctrl)
645 sa1100_pops.set_mctrl = fns->set_mctrl;
646
647 sa1100_pops.pm = fns->pm;
648 sa1100_pops.set_wake = fns->set_wake;
649}
650
651void __init sa1100_register_uart(int idx, int port)
652{
653 if (idx >= NR_PORTS) {
654 printk(KERN_ERR "%s: bad index number %d\n", __func__, idx);
655 return;
656 }
657
658 switch (port) {
659 case 1:
660 sa1100_ports[idx].port.membase = (void __iomem *)&Ser1UTCR0;
661 sa1100_ports[idx].port.mapbase = _Ser1UTCR0;
662 sa1100_ports[idx].port.irq = IRQ_Ser1UART;
663 sa1100_ports[idx].port.flags = UPF_BOOT_AUTOCONF;
664 break;
665
666 case 2:
667 sa1100_ports[idx].port.membase = (void __iomem *)&Ser2UTCR0;
668 sa1100_ports[idx].port.mapbase = _Ser2UTCR0;
669 sa1100_ports[idx].port.irq = IRQ_Ser2ICP;
670 sa1100_ports[idx].port.flags = UPF_BOOT_AUTOCONF;
671 break;
672
673 case 3:
674 sa1100_ports[idx].port.membase = (void __iomem *)&Ser3UTCR0;
675 sa1100_ports[idx].port.mapbase = _Ser3UTCR0;
676 sa1100_ports[idx].port.irq = IRQ_Ser3UART;
677 sa1100_ports[idx].port.flags = UPF_BOOT_AUTOCONF;
678 break;
679
680 default:
681 printk(KERN_ERR "%s: bad port number %d\n", __func__, port);
682 }
683}
684
685
686#ifdef CONFIG_SERIAL_SA1100_CONSOLE
687static void sa1100_console_putchar(struct uart_port *port, int ch)
688{
689 struct sa1100_port *sport = (struct sa1100_port *)port;
690
691 while (!(UART_GET_UTSR1(sport) & UTSR1_TNF))
692 barrier();
693 UART_PUT_CHAR(sport, ch);
694}
695
696/*
697 * Interrupts are disabled on entering
698 */
699static void
700sa1100_console_write(struct console *co, const char *s, unsigned int count)
701{
702 struct sa1100_port *sport = &sa1100_ports[co->index];
703 unsigned int old_utcr3, status;
704
705 /*
706 * First, save UTCR3 and then disable interrupts
707 */
708 old_utcr3 = UART_GET_UTCR3(sport);
709 UART_PUT_UTCR3(sport, (old_utcr3 & ~(UTCR3_RIE | UTCR3_TIE)) |
710 UTCR3_TXE);
711
712 uart_console_write(&sport->port, s, count, sa1100_console_putchar);
713
714 /*
715 * Finally, wait for transmitter to become empty
716 * and restore UTCR3
717 */
718 do {
719 status = UART_GET_UTSR1(sport);
720 } while (status & UTSR1_TBY);
721 UART_PUT_UTCR3(sport, old_utcr3);
722}
723
724/*
725 * If the port was already initialised (eg, by a boot loader),
726 * try to determine the current setup.
727 */
728static void __init
729sa1100_console_get_options(struct sa1100_port *sport, int *baud,
730 int *parity, int *bits)
731{
732 unsigned int utcr3;
733
734 utcr3 = UART_GET_UTCR3(sport) & (UTCR3_RXE | UTCR3_TXE);
735 if (utcr3 == (UTCR3_RXE | UTCR3_TXE)) {
736 /* ok, the port was enabled */
737 unsigned int utcr0, quot;
738
739 utcr0 = UART_GET_UTCR0(sport);
740
741 *parity = 'n';
742 if (utcr0 & UTCR0_PE) {
743 if (utcr0 & UTCR0_OES)
744 *parity = 'e';
745 else
746 *parity = 'o';
747 }
748
749 if (utcr0 & UTCR0_DSS)
750 *bits = 8;
751 else
752 *bits = 7;
753
754 quot = UART_GET_UTCR2(sport) | UART_GET_UTCR1(sport) << 8;
755 quot &= 0xfff;
756 *baud = sport->port.uartclk / (16 * (quot + 1));
757 }
758}
759
760static int __init
761sa1100_console_setup(struct console *co, char *options)
762{
763 struct sa1100_port *sport;
764 int baud = 9600;
765 int bits = 8;
766 int parity = 'n';
767 int flow = 'n';
768
769 /*
770 * Check whether an invalid uart number has been specified, and
771 * if so, search for the first available port that does have
772 * console support.
773 */
774 if (co->index == -1 || co->index >= NR_PORTS)
775 co->index = 0;
776 sport = &sa1100_ports[co->index];
777
778 if (options)
779 uart_parse_options(options, &baud, &parity, &bits, &flow);
780 else
781 sa1100_console_get_options(sport, &baud, &parity, &bits);
782
783 return uart_set_options(&sport->port, co, baud, parity, bits, flow);
784}
785
786static struct uart_driver sa1100_reg;
787static struct console sa1100_console = {
788 .name = "ttySA",
789 .write = sa1100_console_write,
790 .device = uart_console_device,
791 .setup = sa1100_console_setup,
792 .flags = CON_PRINTBUFFER,
793 .index = -1,
794 .data = &sa1100_reg,
795};
796
797static int __init sa1100_rs_console_init(void)
798{
799 sa1100_init_ports();
800 register_console(&sa1100_console);
801 return 0;
802}
803console_initcall(sa1100_rs_console_init);
804
805#define SA1100_CONSOLE &sa1100_console
806#else
807#define SA1100_CONSOLE NULL
808#endif
809
810static struct uart_driver sa1100_reg = {
811 .owner = THIS_MODULE,
812 .driver_name = "ttySA",
813 .dev_name = "ttySA",
814 .major = SERIAL_SA1100_MAJOR,
815 .minor = MINOR_START,
816 .nr = NR_PORTS,
817 .cons = SA1100_CONSOLE,
818};
819
820static int sa1100_serial_suspend(struct platform_device *dev, pm_message_t state)
821{
822 struct sa1100_port *sport = platform_get_drvdata(dev);
823
824 if (sport)
825 uart_suspend_port(&sa1100_reg, &sport->port);
826
827 return 0;
828}
829
830static int sa1100_serial_resume(struct platform_device *dev)
831{
832 struct sa1100_port *sport = platform_get_drvdata(dev);
833
834 if (sport)
835 uart_resume_port(&sa1100_reg, &sport->port);
836
837 return 0;
838}
839
840static int sa1100_serial_probe(struct platform_device *dev)
841{
842 struct resource *res = dev->resource;
843 int i;
844
845 for (i = 0; i < dev->num_resources; i++, res++)
846 if (res->flags & IORESOURCE_MEM)
847 break;
848
849 if (i < dev->num_resources) {
850 for (i = 0; i < NR_PORTS; i++) {
851 if (sa1100_ports[i].port.mapbase != res->start)
852 continue;
853
854 sa1100_ports[i].port.dev = &dev->dev;
855 uart_add_one_port(&sa1100_reg, &sa1100_ports[i].port);
856 platform_set_drvdata(dev, &sa1100_ports[i]);
857 break;
858 }
859 }
860
861 return 0;
862}
863
864static int sa1100_serial_remove(struct platform_device *pdev)
865{
866 struct sa1100_port *sport = platform_get_drvdata(pdev);
867
868 platform_set_drvdata(pdev, NULL);
869
870 if (sport)
871 uart_remove_one_port(&sa1100_reg, &sport->port);
872
873 return 0;
874}
875
876static struct platform_driver sa11x0_serial_driver = {
877 .probe = sa1100_serial_probe,
878 .remove = sa1100_serial_remove,
879 .suspend = sa1100_serial_suspend,
880 .resume = sa1100_serial_resume,
881 .driver = {
882 .name = "sa11x0-uart",
883 .owner = THIS_MODULE,
884 },
885};
886
887static int __init sa1100_serial_init(void)
888{
889 int ret;
890
891 printk(KERN_INFO "Serial: SA11x0 driver\n");
892
893 sa1100_init_ports();
894
895 ret = uart_register_driver(&sa1100_reg);
896 if (ret == 0) {
897 ret = platform_driver_register(&sa11x0_serial_driver);
898 if (ret)
899 uart_unregister_driver(&sa1100_reg);
900 }
901 return ret;
902}
903
904static void __exit sa1100_serial_exit(void)
905{
906 platform_driver_unregister(&sa11x0_serial_driver);
907 uart_unregister_driver(&sa1100_reg);
908}
909
910module_init(sa1100_serial_init);
911module_exit(sa1100_serial_exit);
912
913MODULE_AUTHOR("Deep Blue Solutions Ltd");
914MODULE_DESCRIPTION("SA1100 generic serial port driver");
915MODULE_LICENSE("GPL");
916MODULE_ALIAS_CHARDEV_MAJOR(SERIAL_SA1100_MAJOR);
917MODULE_ALIAS("platform:sa11x0-uart");