Loading...
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 1994 - 2003, 06, 07 by Ralf Baechle (ralf@linux-mips.org)
7 * Copyright (C) 2007 MIPS Technologies, Inc.
8 */
9#include <linux/fs.h>
10#include <linux/fcntl.h>
11#include <linux/kernel.h>
12#include <linux/linkage.h>
13#include <linux/export.h>
14#include <linux/sched.h>
15#include <linux/syscalls.h>
16#include <linux/mm.h>
17#include <linux/highmem.h>
18#include <linux/pagemap.h>
19
20#include <asm/cacheflush.h>
21#include <asm/processor.h>
22#include <asm/cpu.h>
23#include <asm/cpu-features.h>
24#include <asm/setup.h>
25#include <asm/pgtable.h>
26
27/* Cache operations. */
28void (*flush_cache_all)(void);
29void (*__flush_cache_all)(void);
30EXPORT_SYMBOL_GPL(__flush_cache_all);
31void (*flush_cache_mm)(struct mm_struct *mm);
32void (*flush_cache_range)(struct vm_area_struct *vma, unsigned long start,
33 unsigned long end);
34void (*flush_cache_page)(struct vm_area_struct *vma, unsigned long page,
35 unsigned long pfn);
36void (*flush_icache_range)(unsigned long start, unsigned long end);
37EXPORT_SYMBOL_GPL(flush_icache_range);
38void (*local_flush_icache_range)(unsigned long start, unsigned long end);
39EXPORT_SYMBOL_GPL(local_flush_icache_range);
40void (*__flush_icache_user_range)(unsigned long start, unsigned long end);
41void (*__local_flush_icache_user_range)(unsigned long start, unsigned long end);
42EXPORT_SYMBOL_GPL(__local_flush_icache_user_range);
43
44void (*__flush_cache_vmap)(void);
45void (*__flush_cache_vunmap)(void);
46
47void (*__flush_kernel_vmap_range)(unsigned long vaddr, int size);
48EXPORT_SYMBOL_GPL(__flush_kernel_vmap_range);
49
50/* MIPS specific cache operations */
51void (*local_flush_data_cache_page)(void * addr);
52void (*flush_data_cache_page)(unsigned long addr);
53void (*flush_icache_all)(void);
54
55EXPORT_SYMBOL_GPL(local_flush_data_cache_page);
56EXPORT_SYMBOL(flush_data_cache_page);
57EXPORT_SYMBOL(flush_icache_all);
58
59#ifdef CONFIG_DMA_NONCOHERENT
60
61/* DMA cache operations. */
62void (*_dma_cache_wback_inv)(unsigned long start, unsigned long size);
63void (*_dma_cache_wback)(unsigned long start, unsigned long size);
64void (*_dma_cache_inv)(unsigned long start, unsigned long size);
65
66#endif /* CONFIG_DMA_NONCOHERENT */
67
68/*
69 * We could optimize the case where the cache argument is not BCACHE but
70 * that seems very atypical use ...
71 */
72SYSCALL_DEFINE3(cacheflush, unsigned long, addr, unsigned long, bytes,
73 unsigned int, cache)
74{
75 if (bytes == 0)
76 return 0;
77 if (!access_ok((void __user *) addr, bytes))
78 return -EFAULT;
79
80 __flush_icache_user_range(addr, addr + bytes);
81
82 return 0;
83}
84
85void __flush_dcache_page(struct page *page)
86{
87 struct address_space *mapping = page_mapping_file(page);
88 unsigned long addr;
89
90 if (mapping && !mapping_mapped(mapping)) {
91 SetPageDcacheDirty(page);
92 return;
93 }
94
95 /*
96 * We could delay the flush for the !page_mapping case too. But that
97 * case is for exec env/arg pages and those are %99 certainly going to
98 * get faulted into the tlb (and thus flushed) anyways.
99 */
100 if (PageHighMem(page))
101 addr = (unsigned long)kmap_atomic(page);
102 else
103 addr = (unsigned long)page_address(page);
104
105 flush_data_cache_page(addr);
106
107 if (PageHighMem(page))
108 kunmap_atomic((void *)addr);
109}
110
111EXPORT_SYMBOL(__flush_dcache_page);
112
113void __flush_anon_page(struct page *page, unsigned long vmaddr)
114{
115 unsigned long addr = (unsigned long) page_address(page);
116
117 if (pages_do_alias(addr, vmaddr)) {
118 if (page_mapcount(page) && !Page_dcache_dirty(page)) {
119 void *kaddr;
120
121 kaddr = kmap_coherent(page, vmaddr);
122 flush_data_cache_page((unsigned long)kaddr);
123 kunmap_coherent();
124 } else
125 flush_data_cache_page(addr);
126 }
127}
128
129EXPORT_SYMBOL(__flush_anon_page);
130
131void __update_cache(unsigned long address, pte_t pte)
132{
133 struct page *page;
134 unsigned long pfn, addr;
135 int exec = !pte_no_exec(pte) && !cpu_has_ic_fills_f_dc;
136
137 pfn = pte_pfn(pte);
138 if (unlikely(!pfn_valid(pfn)))
139 return;
140 page = pfn_to_page(pfn);
141 if (Page_dcache_dirty(page)) {
142 if (PageHighMem(page))
143 addr = (unsigned long)kmap_atomic(page);
144 else
145 addr = (unsigned long)page_address(page);
146
147 if (exec || pages_do_alias(addr, address & PAGE_MASK))
148 flush_data_cache_page(addr);
149
150 if (PageHighMem(page))
151 kunmap_atomic((void *)addr);
152
153 ClearPageDcacheDirty(page);
154 }
155}
156
157unsigned long _page_cachable_default;
158EXPORT_SYMBOL(_page_cachable_default);
159
160#define PM(p) __pgprot(_page_cachable_default | (p))
161
162static pgprot_t protection_map[16] __ro_after_init;
163DECLARE_VM_GET_PAGE_PROT
164
165static inline void setup_protection_map(void)
166{
167 protection_map[0] = PM(_PAGE_PRESENT | _PAGE_NO_EXEC | _PAGE_NO_READ);
168 protection_map[1] = PM(_PAGE_PRESENT | _PAGE_NO_EXEC);
169 protection_map[2] = PM(_PAGE_PRESENT | _PAGE_NO_EXEC | _PAGE_NO_READ);
170 protection_map[3] = PM(_PAGE_PRESENT | _PAGE_NO_EXEC);
171 protection_map[4] = PM(_PAGE_PRESENT);
172 protection_map[5] = PM(_PAGE_PRESENT);
173 protection_map[6] = PM(_PAGE_PRESENT);
174 protection_map[7] = PM(_PAGE_PRESENT);
175
176 protection_map[8] = PM(_PAGE_PRESENT | _PAGE_NO_EXEC | _PAGE_NO_READ);
177 protection_map[9] = PM(_PAGE_PRESENT | _PAGE_NO_EXEC);
178 protection_map[10] = PM(_PAGE_PRESENT | _PAGE_NO_EXEC | _PAGE_WRITE |
179 _PAGE_NO_READ);
180 protection_map[11] = PM(_PAGE_PRESENT | _PAGE_NO_EXEC | _PAGE_WRITE);
181 protection_map[12] = PM(_PAGE_PRESENT);
182 protection_map[13] = PM(_PAGE_PRESENT);
183 protection_map[14] = PM(_PAGE_PRESENT | _PAGE_WRITE);
184 protection_map[15] = PM(_PAGE_PRESENT | _PAGE_WRITE);
185}
186
187#undef PM
188
189void cpu_cache_init(void)
190{
191 if (cpu_has_3k_cache) {
192 extern void __weak r3k_cache_init(void);
193
194 r3k_cache_init();
195 }
196 if (cpu_has_4k_cache) {
197 extern void __weak r4k_cache_init(void);
198
199 r4k_cache_init();
200 }
201
202 if (cpu_has_octeon_cache) {
203 extern void __weak octeon_cache_init(void);
204
205 octeon_cache_init();
206 }
207
208 setup_protection_map();
209}
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 1994 - 2003, 06, 07 by Ralf Baechle (ralf@linux-mips.org)
7 * Copyright (C) 2007 MIPS Technologies, Inc.
8 */
9#include <linux/fs.h>
10#include <linux/fcntl.h>
11#include <linux/init.h>
12#include <linux/kernel.h>
13#include <linux/linkage.h>
14#include <linux/module.h>
15#include <linux/sched.h>
16#include <linux/syscalls.h>
17#include <linux/mm.h>
18
19#include <asm/cacheflush.h>
20#include <asm/processor.h>
21#include <asm/cpu.h>
22#include <asm/cpu-features.h>
23
24/* Cache operations. */
25void (*flush_cache_all)(void);
26void (*__flush_cache_all)(void);
27void (*flush_cache_mm)(struct mm_struct *mm);
28void (*flush_cache_range)(struct vm_area_struct *vma, unsigned long start,
29 unsigned long end);
30void (*flush_cache_page)(struct vm_area_struct *vma, unsigned long page,
31 unsigned long pfn);
32void (*flush_icache_range)(unsigned long start, unsigned long end);
33void (*local_flush_icache_range)(unsigned long start, unsigned long end);
34
35void (*__flush_cache_vmap)(void);
36void (*__flush_cache_vunmap)(void);
37
38void (*__flush_kernel_vmap_range)(unsigned long vaddr, int size);
39void (*__invalidate_kernel_vmap_range)(unsigned long vaddr, int size);
40
41EXPORT_SYMBOL_GPL(__flush_kernel_vmap_range);
42
43/* MIPS specific cache operations */
44void (*flush_cache_sigtramp)(unsigned long addr);
45void (*local_flush_data_cache_page)(void * addr);
46void (*flush_data_cache_page)(unsigned long addr);
47void (*flush_icache_all)(void);
48
49EXPORT_SYMBOL_GPL(local_flush_data_cache_page);
50EXPORT_SYMBOL(flush_data_cache_page);
51
52#ifdef CONFIG_DMA_NONCOHERENT
53
54/* DMA cache operations. */
55void (*_dma_cache_wback_inv)(unsigned long start, unsigned long size);
56void (*_dma_cache_wback)(unsigned long start, unsigned long size);
57void (*_dma_cache_inv)(unsigned long start, unsigned long size);
58
59EXPORT_SYMBOL(_dma_cache_wback_inv);
60
61#endif /* CONFIG_DMA_NONCOHERENT */
62
63/*
64 * We could optimize the case where the cache argument is not BCACHE but
65 * that seems very atypical use ...
66 */
67SYSCALL_DEFINE3(cacheflush, unsigned long, addr, unsigned long, bytes,
68 unsigned int, cache)
69{
70 if (bytes == 0)
71 return 0;
72 if (!access_ok(VERIFY_WRITE, (void __user *) addr, bytes))
73 return -EFAULT;
74
75 flush_icache_range(addr, addr + bytes);
76
77 return 0;
78}
79
80void __flush_dcache_page(struct page *page)
81{
82 struct address_space *mapping = page_mapping(page);
83 unsigned long addr;
84
85 if (PageHighMem(page))
86 return;
87 if (mapping && !mapping_mapped(mapping)) {
88 SetPageDcacheDirty(page);
89 return;
90 }
91
92 /*
93 * We could delay the flush for the !page_mapping case too. But that
94 * case is for exec env/arg pages and those are %99 certainly going to
95 * get faulted into the tlb (and thus flushed) anyways.
96 */
97 addr = (unsigned long) page_address(page);
98 flush_data_cache_page(addr);
99}
100
101EXPORT_SYMBOL(__flush_dcache_page);
102
103void __flush_anon_page(struct page *page, unsigned long vmaddr)
104{
105 unsigned long addr = (unsigned long) page_address(page);
106
107 if (pages_do_alias(addr, vmaddr)) {
108 if (page_mapped(page) && !Page_dcache_dirty(page)) {
109 void *kaddr;
110
111 kaddr = kmap_coherent(page, vmaddr);
112 flush_data_cache_page((unsigned long)kaddr);
113 kunmap_coherent();
114 } else
115 flush_data_cache_page(addr);
116 }
117}
118
119EXPORT_SYMBOL(__flush_anon_page);
120
121void __update_cache(struct vm_area_struct *vma, unsigned long address,
122 pte_t pte)
123{
124 struct page *page;
125 unsigned long pfn, addr;
126 int exec = (vma->vm_flags & VM_EXEC) && !cpu_has_ic_fills_f_dc;
127
128 pfn = pte_pfn(pte);
129 if (unlikely(!pfn_valid(pfn)))
130 return;
131 page = pfn_to_page(pfn);
132 if (page_mapping(page) && Page_dcache_dirty(page)) {
133 addr = (unsigned long) page_address(page);
134 if (exec || pages_do_alias(addr, address & PAGE_MASK))
135 flush_data_cache_page(addr);
136 ClearPageDcacheDirty(page);
137 }
138}
139
140unsigned long _page_cachable_default;
141EXPORT_SYMBOL(_page_cachable_default);
142
143static inline void setup_protection_map(void)
144{
145 if (kernel_uses_smartmips_rixi) {
146 protection_map[0] = __pgprot(_page_cachable_default | _PAGE_PRESENT | _PAGE_NO_EXEC | _PAGE_NO_READ);
147 protection_map[1] = __pgprot(_page_cachable_default | _PAGE_PRESENT | _PAGE_NO_EXEC);
148 protection_map[2] = __pgprot(_page_cachable_default | _PAGE_PRESENT | _PAGE_NO_EXEC | _PAGE_NO_READ);
149 protection_map[3] = __pgprot(_page_cachable_default | _PAGE_PRESENT | _PAGE_NO_EXEC);
150 protection_map[4] = __pgprot(_page_cachable_default | _PAGE_PRESENT | _PAGE_NO_READ);
151 protection_map[5] = __pgprot(_page_cachable_default | _PAGE_PRESENT);
152 protection_map[6] = __pgprot(_page_cachable_default | _PAGE_PRESENT | _PAGE_NO_READ);
153 protection_map[7] = __pgprot(_page_cachable_default | _PAGE_PRESENT);
154
155 protection_map[8] = __pgprot(_page_cachable_default | _PAGE_PRESENT | _PAGE_NO_EXEC | _PAGE_NO_READ);
156 protection_map[9] = __pgprot(_page_cachable_default | _PAGE_PRESENT | _PAGE_NO_EXEC);
157 protection_map[10] = __pgprot(_page_cachable_default | _PAGE_PRESENT | _PAGE_NO_EXEC | _PAGE_WRITE | _PAGE_NO_READ);
158 protection_map[11] = __pgprot(_page_cachable_default | _PAGE_PRESENT | _PAGE_NO_EXEC | _PAGE_WRITE);
159 protection_map[12] = __pgprot(_page_cachable_default | _PAGE_PRESENT | _PAGE_NO_READ);
160 protection_map[13] = __pgprot(_page_cachable_default | _PAGE_PRESENT);
161 protection_map[14] = __pgprot(_page_cachable_default | _PAGE_PRESENT | _PAGE_WRITE | _PAGE_NO_READ);
162 protection_map[15] = __pgprot(_page_cachable_default | _PAGE_PRESENT | _PAGE_WRITE);
163
164 } else {
165 protection_map[0] = PAGE_NONE;
166 protection_map[1] = PAGE_READONLY;
167 protection_map[2] = PAGE_COPY;
168 protection_map[3] = PAGE_COPY;
169 protection_map[4] = PAGE_READONLY;
170 protection_map[5] = PAGE_READONLY;
171 protection_map[6] = PAGE_COPY;
172 protection_map[7] = PAGE_COPY;
173 protection_map[8] = PAGE_NONE;
174 protection_map[9] = PAGE_READONLY;
175 protection_map[10] = PAGE_SHARED;
176 protection_map[11] = PAGE_SHARED;
177 protection_map[12] = PAGE_READONLY;
178 protection_map[13] = PAGE_READONLY;
179 protection_map[14] = PAGE_SHARED;
180 protection_map[15] = PAGE_SHARED;
181 }
182}
183
184void __cpuinit cpu_cache_init(void)
185{
186 if (cpu_has_3k_cache) {
187 extern void __weak r3k_cache_init(void);
188
189 r3k_cache_init();
190 }
191 if (cpu_has_6k_cache) {
192 extern void __weak r6k_cache_init(void);
193
194 r6k_cache_init();
195 }
196 if (cpu_has_4k_cache) {
197 extern void __weak r4k_cache_init(void);
198
199 r4k_cache_init();
200 }
201 if (cpu_has_8k_cache) {
202 extern void __weak r8k_cache_init(void);
203
204 r8k_cache_init();
205 }
206 if (cpu_has_tx39_cache) {
207 extern void __weak tx39_cache_init(void);
208
209 tx39_cache_init();
210 }
211
212 if (cpu_has_octeon_cache) {
213 extern void __weak octeon_cache_init(void);
214
215 octeon_cache_init();
216 }
217
218 setup_protection_map();
219}
220
221int __weak __uncached_access(struct file *file, unsigned long addr)
222{
223 if (file->f_flags & O_DSYNC)
224 return 1;
225
226 return addr >= __pa(high_memory);
227}