1perf-intel-pt(1)
   2================
   3
   4NAME
   5----
   6perf-intel-pt - Support for Intel Processor Trace within perf tools
   7
   8SYNOPSIS
   9--------
  10[verse]
  11'perf record' -e intel_pt//
  12
  13DESCRIPTION
  14-----------
  15
  16Intel Processor Trace (Intel PT) is an extension of Intel Architecture that
  17collects information about software execution such as control flow, execution
  18modes and timings and formats it into highly compressed binary packets.
  19Technical details are documented in the Intel 64 and IA-32 Architectures
  20Software Developer Manuals, Chapter 36 Intel Processor Trace.
  21
  22Intel PT is first supported in Intel Core M and 5th generation Intel Core
  23processors that are based on the Intel micro-architecture code name Broadwell.
  24
  25Trace data is collected by 'perf record' and stored within the perf.data file.
  26See below for options to 'perf record'.
  27
  28Trace data must be 'decoded' which involves walking the object code and matching
  29the trace data packets. For example a TNT packet only tells whether a
  30conditional branch was taken or not taken, so to make use of that packet the
  31decoder must know precisely which instruction was being executed.
  32
  33Decoding is done on-the-fly.  The decoder outputs samples in the same format as
  34samples output by perf hardware events, for example as though the "instructions"
  35or "branches" events had been recorded.  Presently 3 tools support this:
  36'perf script', 'perf report' and 'perf inject'.  See below for more information
  37on using those tools.
  38
  39The main distinguishing feature of Intel PT is that the decoder can determine
  40the exact flow of software execution.  Intel PT can be used to understand why
  41and how did software get to a certain point, or behave a certain way.  The
  42software does not have to be recompiled, so Intel PT works with debug or release
  43builds, however the executed images are needed - which makes use in JIT-compiled
  44environments, or with self-modified code, a challenge.  Also symbols need to be
  45provided to make sense of addresses.
  46
  47A limitation of Intel PT is that it produces huge amounts of trace data
  48(hundreds of megabytes per second per core) which takes a long time to decode,
  49for example two or three orders of magnitude longer than it took to collect.
  50Another limitation is the performance impact of tracing, something that will
  51vary depending on the use-case and architecture.
  52
  53
  54Quickstart
  55----------
  56
  57It is important to start small.  That is because it is easy to capture vastly
  58more data than can possibly be processed.
  59
  60The simplest thing to do with Intel PT is userspace profiling of small programs.
  61Data is captured with 'perf record' e.g. to trace 'ls' userspace-only:
  62
  63	perf record -e intel_pt//u ls
  64
  65And profiled with 'perf report' e.g.
  66
  67	perf report
  68
  69To also trace kernel space presents a problem, namely kernel self-modifying
  70code.  A fairly good kernel image is available in /proc/kcore but to get an
  71accurate image a copy of /proc/kcore needs to be made under the same conditions
  72as the data capture. 'perf record' can make a copy of /proc/kcore if the option
  73--kcore is used, but access to /proc/kcore is restricted e.g.
  74
  75	sudo perf record -o pt_ls --kcore -e intel_pt// -- ls
  76
  77which will create a directory named 'pt_ls' and put the perf.data file (named
  78simply 'data') and copies of /proc/kcore, /proc/kallsyms and /proc/modules into
  79it.  The other tools understand the directory format, so to use 'perf report'
  80becomes:
  81
  82	sudo perf report -i pt_ls
  83
  84Because samples are synthesized after-the-fact, the sampling period can be
  85selected for reporting. e.g. sample every microsecond
  86
  87	sudo perf report pt_ls --itrace=i1usge
  88
  89See the sections below for more information about the --itrace option.
  90
  91Beware the smaller the period, the more samples that are produced, and the
  92longer it takes to process them.
  93
  94Also note that the coarseness of Intel PT timing information will start to
  95distort the statistical value of the sampling as the sampling period becomes
  96smaller.
  97
  98To represent software control flow, "branches" samples are produced.  By default
  99a branch sample is synthesized for every single branch.  To get an idea what
 100data is available you can use the 'perf script' tool with all itrace sampling
 101options, which will list all the samples.
 102
 103	perf record -e intel_pt//u ls
 104	perf script --itrace=ibxwpe
 105
 106An interesting field that is not printed by default is 'flags' which can be
 107displayed as follows:
 108
 109	perf script --itrace=ibxwpe -F+flags
 110
 111The flags are "bcrosyiABExghDt" which stand for branch, call, return, conditional,
 112system, asynchronous, interrupt, transaction abort, trace begin, trace end,
 113in transaction, VM-entry, VM-exit, interrupt disabled, and interrupt disable
 114toggle respectively.
 115
 116perf script also supports higher level ways to dump instruction traces:
 117
 118	perf script --insn-trace --xed
 119
 120Dump all instructions. This requires installing the xed tool (see XED below)
 121Dumping all instructions in a long trace can be fairly slow. It is usually better
 122to start with higher level decoding, like
 123
 124	perf script --call-trace
 125
 126or
 127
 128	perf script --call-ret-trace
 129
 130and then select a time range of interest. The time range can then be examined
 131in detail with
 132
 133	perf script --time starttime,stoptime --insn-trace --xed
 134
 135While examining the trace it's also useful to filter on specific CPUs using
 136the -C option
 137
 138	perf script --time starttime,stoptime --insn-trace --xed -C 1
 139
 140Dump all instructions in time range on CPU 1.
 141
 142Another interesting field that is not printed by default is 'ipc' which can be
 143displayed as follows:
 144
 145	perf script --itrace=be -F+ipc
 146
 147There are two ways that instructions-per-cycle (IPC) can be calculated depending
 148on the recording.
 149
 150If the 'cyc' config term (see config terms section below) was used, then IPC is
 151calculated using the cycle count from CYC packets, otherwise MTC packets are
 152used - refer to the 'mtc' config term.  When MTC is used, however, the values
 153are less accurate because the timing is less accurate.
 154
 155Because Intel PT does not update the cycle count on every branch or instruction,
 156the values will often be zero.  When there are values, they will be the number
 157of instructions and number of cycles since the last update, and thus represent
 158the average IPC since the last IPC for that event type.  Note IPC for "branches"
 159events is calculated separately from IPC for "instructions" events.
 160
 161Even with the 'cyc' config term, it is possible to produce IPC information for
 162every change of timestamp, but at the expense of accuracy.  That is selected by
 163specifying the itrace 'A' option.  Due to the granularity of timestamps, the
 164actual number of cycles increases even though the cycles reported does not.
 165The number of instructions is known, but if IPC is reported, cycles can be too
 166low and so IPC is too high.  Note that inaccuracy decreases as the period of
 167sampling increases i.e. if the number of cycles is too low by a small amount,
 168that becomes less significant if the number of cycles is large.  It may also be
 169useful to use the 'A' option in conjunction with dlfilter-show-cycles.so to
 170provide higher granularity cycle information.
 171
 172Also note that the IPC instruction count may or may not include the current
 173instruction.  If the cycle count is associated with an asynchronous branch
 174(e.g. page fault or interrupt), then the instruction count does not include the
 175current instruction, otherwise it does.  That is consistent with whether or not
 176that instruction has retired when the cycle count is updated.
 177
 178Another note, in the case of "branches" events, non-taken branches are not
 179presently sampled, so IPC values for them do not appear e.g. a CYC packet with a
 180TNT packet that starts with a non-taken branch.  To see every possible IPC
 181value, "instructions" events can be used e.g. --itrace=i0ns
 182
 183While it is possible to create scripts to analyze the data, an alternative
 184approach is available to export the data to a sqlite or postgresql database.
 185Refer to script export-to-sqlite.py or export-to-postgresql.py for more details,
 186and to script exported-sql-viewer.py for an example of using the database.
 187
 188There is also script intel-pt-events.py which provides an example of how to
 189unpack the raw data for power events and PTWRITE. The script also displays
 190branches, and supports 2 additional modes selected by option:
 191
 192 - --insn-trace - instruction trace
 193 - --src-trace - source trace
 194
 195The intel-pt-events.py script also has options:
 196
 197 - --all-switch-events - display all switch events, not only the last consecutive.
 198 - --interleave [<n>] - interleave sample output for the same timestamp so that
 199 no more than n samples for a CPU are displayed in a row. 'n' defaults to 4.
 200 Note this only affects the order of output, and only when the timestamp is the
 201 same.
 202
 203As mentioned above, it is easy to capture too much data.  One way to limit the
 204data captured is to use 'snapshot' mode which is explained further below.
 205Refer to 'new snapshot option' and 'Intel PT modes of operation' further below.
 206
 207Another problem that will be experienced is decoder errors.  They can be caused
 208by inability to access the executed image, self-modified or JIT-ed code, or the
 209inability to match side-band information (such as context switches and mmaps)
 210which results in the decoder not knowing what code was executed.
 211
 212There is also the problem of perf not being able to copy the data fast enough,
 213resulting in data lost because the buffer was full.  See 'Buffer handling' below
 214for more details.
 215
 216
 217perf record
 218-----------
 219
 220new event
 221~~~~~~~~~
 222
 223The Intel PT kernel driver creates a new PMU for Intel PT.  PMU events are
 224selected by providing the PMU name followed by the "config" separated by slashes.
 225An enhancement has been made to allow default "config" e.g. the option
 226
 227	-e intel_pt//
 228
 229will use a default config value.  Currently that is the same as
 230
 231	-e intel_pt/tsc,noretcomp=0/
 232
 233which is the same as
 234
 235	-e intel_pt/tsc=1,noretcomp=0/
 236
 237Note there are now new config terms - see section 'config terms' further below.
 238
 239The config terms are listed in /sys/devices/intel_pt/format.  They are bit
 240fields within the config member of the struct perf_event_attr which is
 241passed to the kernel by the perf_event_open system call.  They correspond to bit
 242fields in the IA32_RTIT_CTL MSR.  Here is a list of them and their definitions:
 243
 244	$ grep -H . /sys/bus/event_source/devices/intel_pt/format/*
 245	/sys/bus/event_source/devices/intel_pt/format/cyc:config:1
 246	/sys/bus/event_source/devices/intel_pt/format/cyc_thresh:config:19-22
 247	/sys/bus/event_source/devices/intel_pt/format/mtc:config:9
 248	/sys/bus/event_source/devices/intel_pt/format/mtc_period:config:14-17
 249	/sys/bus/event_source/devices/intel_pt/format/noretcomp:config:11
 250	/sys/bus/event_source/devices/intel_pt/format/psb_period:config:24-27
 251	/sys/bus/event_source/devices/intel_pt/format/tsc:config:10
 252
 253Note that the default config must be overridden for each term i.e.
 254
 255	-e intel_pt/noretcomp=0/
 256
 257is the same as:
 258
 259	-e intel_pt/tsc=1,noretcomp=0/
 260
 261So, to disable TSC packets use:
 262
 263	-e intel_pt/tsc=0/
 264
 265It is also possible to specify the config value explicitly:
 266
 267	-e intel_pt/config=0x400/
 268
 269Note that, as with all events, the event is suffixed with event modifiers:
 270
 271	u	userspace
 272	k	kernel
 273	h	hypervisor
 274	G	guest
 275	H	host
 276	p	precise ip
 277
 278'h', 'G' and 'H' are for virtualization which are not used by Intel PT.
 279'p' is also not relevant to Intel PT.  So only options 'u' and 'k' are
 280meaningful for Intel PT.
 281
 282perf_event_attr is displayed if the -vv option is used e.g.
 283
 284	------------------------------------------------------------
 285	perf_event_attr:
 286	type                             6
 287	size                             112
 288	config                           0x400
 289	{ sample_period, sample_freq }   1
 290	sample_type                      IP|TID|TIME|CPU|IDENTIFIER
 291	read_format                      ID
 292	disabled                         1
 293	inherit                          1
 294	exclude_kernel                   1
 295	exclude_hv                       1
 296	enable_on_exec                   1
 297	sample_id_all                    1
 298	------------------------------------------------------------
 299	sys_perf_event_open: pid 31104  cpu 0  group_fd -1  flags 0x8
 300	sys_perf_event_open: pid 31104  cpu 1  group_fd -1  flags 0x8
 301	sys_perf_event_open: pid 31104  cpu 2  group_fd -1  flags 0x8
 302	sys_perf_event_open: pid 31104  cpu 3  group_fd -1  flags 0x8
 303	------------------------------------------------------------
 304
 305
 306config terms
 307~~~~~~~~~~~~
 308
 309The June 2015 version of Intel 64 and IA-32 Architectures Software Developer
 310Manuals, Chapter 36 Intel Processor Trace, defined new Intel PT features.
 311Some of the features are reflect in new config terms.  All the config terms are
 312described below.
 313
 314tsc		Always supported.  Produces TSC timestamp packets to provide
 315		timing information.  In some cases it is possible to decode
 316		without timing information, for example a per-thread context
 317		that does not overlap executable memory maps.
 318
 319		The default config selects tsc (i.e. tsc=1).
 320
 321noretcomp	Always supported.  Disables "return compression" so a TIP packet
 322		is produced when a function returns.  Causes more packets to be
 323		produced but might make decoding more reliable.
 324
 325		The default config does not select noretcomp (i.e. noretcomp=0).
 326
 327psb_period	Allows the frequency of PSB packets to be specified.
 328
 329		The PSB packet is a synchronization packet that provides a
 330		starting point for decoding or recovery from errors.
 331
 332		Support for psb_period is indicated by:
 333
 334			/sys/bus/event_source/devices/intel_pt/caps/psb_cyc
 335
 336		which contains "1" if the feature is supported and "0"
 337		otherwise.
 338
 339		Valid values are given by:
 340
 341			/sys/bus/event_source/devices/intel_pt/caps/psb_periods
 342
 343		which contains a hexadecimal value, the bits of which represent
 344		valid values e.g. bit 2 set means value 2 is valid.
 345
 346		The psb_period value is converted to the approximate number of
 347		trace bytes between PSB packets as:
 348
 349			2 ^ (value + 11)
 350
 351		e.g. value 3 means 16KiB bytes between PSBs
 352
 353		If an invalid value is entered, the error message
 354		will give a list of valid values e.g.
 355
 356			$ perf record -e intel_pt/psb_period=15/u uname
 357			Invalid psb_period for intel_pt. Valid values are: 0-5
 358
 359		If MTC packets are selected, the default config selects a value
 360		of 3 (i.e. psb_period=3) or the nearest lower value that is
 361		supported (0 is always supported).  Otherwise the default is 0.
 362
 363		If decoding is expected to be reliable and the buffer is large
 364		then a large PSB period can be used.
 365
 366		Because a TSC packet is produced with PSB, the PSB period can
 367		also affect the granularity to timing information in the absence
 368		of MTC or CYC.
 369
 370mtc		Produces MTC timing packets.
 371
 372		MTC packets provide finer grain timestamp information than TSC
 373		packets.  MTC packets record time using the hardware crystal
 374		clock (CTC) which is related to TSC packets using a TMA packet.
 375
 376		Support for this feature is indicated by:
 377
 378			/sys/bus/event_source/devices/intel_pt/caps/mtc
 379
 380		which contains "1" if the feature is supported and
 381		"0" otherwise.
 382
 383		The frequency of MTC packets can also be specified - see
 384		mtc_period below.
 385
 386mtc_period	Specifies how frequently MTC packets are produced - see mtc
 387		above for how to determine if MTC packets are supported.
 388
 389		Valid values are given by:
 390
 391			/sys/bus/event_source/devices/intel_pt/caps/mtc_periods
 392
 393		which contains a hexadecimal value, the bits of which represent
 394		valid values e.g. bit 2 set means value 2 is valid.
 395
 396		The mtc_period value is converted to the MTC frequency as:
 397
 398			CTC-frequency / (2 ^ value)
 399
 400		e.g. value 3 means one eighth of CTC-frequency
 401
 402		Where CTC is the hardware crystal clock, the frequency of which
 403		can be related to TSC via values provided in cpuid leaf 0x15.
 404
 405		If an invalid value is entered, the error message
 406		will give a list of valid values e.g.
 407
 408			$ perf record -e intel_pt/mtc_period=15/u uname
 409			Invalid mtc_period for intel_pt. Valid values are: 0,3,6,9
 410
 411		The default value is 3 or the nearest lower value
 412		that is supported (0 is always supported).
 413
 414cyc		Produces CYC timing packets.
 415
 416		CYC packets provide even finer grain timestamp information than
 417		MTC and TSC packets.  A CYC packet contains the number of CPU
 418		cycles since the last CYC packet. Unlike MTC and TSC packets,
 419		CYC packets are only sent when another packet is also sent.
 420
 421		Support for this feature is indicated by:
 422
 423			/sys/bus/event_source/devices/intel_pt/caps/psb_cyc
 424
 425		which contains "1" if the feature is supported and
 426		"0" otherwise.
 427
 428		The number of CYC packets produced can be reduced by specifying
 429		a threshold - see cyc_thresh below.
 430
 431cyc_thresh	Specifies how frequently CYC packets are produced - see cyc
 432		above for how to determine if CYC packets are supported.
 433
 434		Valid cyc_thresh values are given by:
 435
 436			/sys/bus/event_source/devices/intel_pt/caps/cycle_thresholds
 437
 438		which contains a hexadecimal value, the bits of which represent
 439		valid values e.g. bit 2 set means value 2 is valid.
 440
 441		The cyc_thresh value represents the minimum number of CPU cycles
 442		that must have passed before a CYC packet can be sent.  The
 443		number of CPU cycles is:
 444
 445			2 ^ (value - 1)
 446
 447		e.g. value 4 means 8 CPU cycles must pass before a CYC packet
 448		can be sent.  Note a CYC packet is still only sent when another
 449		packet is sent, not at, e.g. every 8 CPU cycles.
 450
 451		If an invalid value is entered, the error message
 452		will give a list of valid values e.g.
 453
 454			$ perf record -e intel_pt/cyc,cyc_thresh=15/u uname
 455			Invalid cyc_thresh for intel_pt. Valid values are: 0-12
 456
 457		CYC packets are not requested by default.
 458
 459pt		Specifies pass-through which enables the 'branch' config term.
 460
 461		The default config selects 'pt' if it is available, so a user will
 462		never need to specify this term.
 463
 464branch		Enable branch tracing.  Branch tracing is enabled by default so to
 465		disable branch tracing use 'branch=0'.
 466
 467		The default config selects 'branch' if it is available.
 468
 469ptw		Enable PTWRITE packets which are produced when a ptwrite instruction
 470		is executed.
 471
 472		Support for this feature is indicated by:
 473
 474			/sys/bus/event_source/devices/intel_pt/caps/ptwrite
 475
 476		which contains "1" if the feature is supported and
 477		"0" otherwise.
 478
 479		As an alternative, refer to "Emulated PTWRITE" further below.
 480
 481fup_on_ptw	Enable a FUP packet to follow the PTWRITE packet.  The FUP packet
 482		provides the address of the ptwrite instruction.  In the absence of
 483		fup_on_ptw, the decoder will use the address of the previous branch
 484		if branch tracing is enabled, otherwise the address will be zero.
 485		Note that fup_on_ptw will work even when branch tracing is disabled.
 486
 487pwr_evt		Enable power events.  The power events provide information about
 488		changes to the CPU C-state.
 489
 490		Support for this feature is indicated by:
 491
 492			/sys/bus/event_source/devices/intel_pt/caps/power_event_trace
 493
 494		which contains "1" if the feature is supported and
 495		"0" otherwise.
 496
 497event		Enable Event Trace.  The events provide information about asynchronous
 498		events.
 499
 500		Support for this feature is indicated by:
 501
 502			/sys/bus/event_source/devices/intel_pt/caps/event_trace
 503
 504		which contains "1" if the feature is supported and
 505		"0" otherwise.
 506
 507notnt		Disable TNT packets.  Without TNT packets, it is not possible to walk
 508		executable code to reconstruct control flow, however FUP, TIP, TIP.PGE
 509		and TIP.PGD packets still indicate asynchronous control flow, and (if
 510		return compression is disabled - see noretcomp) return statements.
 511		The advantage of eliminating TNT packets is reducing the size of the
 512		trace and corresponding tracing overhead.
 513
 514		Support for this feature is indicated by:
 515
 516			/sys/bus/event_source/devices/intel_pt/caps/tnt_disable
 517
 518		which contains "1" if the feature is supported and
 519		"0" otherwise.
 520
 521
 522AUX area sampling option
 523~~~~~~~~~~~~~~~~~~~~~~~~
 524
 525To select Intel PT "sampling" the AUX area sampling option can be used:
 526
 527	--aux-sample
 528
 529Optionally it can be followed by the sample size in bytes e.g.
 530
 531	--aux-sample=8192
 532
 533In addition, the Intel PT event to sample must be defined e.g.
 534
 535	-e intel_pt//u
 536
 537Samples on other events will be created containing Intel PT data e.g. the
 538following will create Intel PT samples on the branch-misses event, note the
 539events must be grouped using {}:
 540
 541	perf record --aux-sample -e '{intel_pt//u,branch-misses:u}'
 542
 543An alternative to '--aux-sample' is to add the config term 'aux-sample-size' to
 544events.  In this case, the grouping is implied e.g.
 545
 546	perf record -e intel_pt//u -e branch-misses/aux-sample-size=8192/u
 547
 548is the same as:
 549
 550	perf record -e '{intel_pt//u,branch-misses/aux-sample-size=8192/u}'
 551
 552but allows for also using an address filter e.g.:
 553
 554	perf record -e intel_pt//u --filter 'filter * @/bin/ls' -e branch-misses/aux-sample-size=8192/u -- ls
 555
 556It is important to select a sample size that is big enough to contain at least
 557one PSB packet.  If not a warning will be displayed:
 558
 559	Intel PT sample size (%zu) may be too small for PSB period (%zu)
 560
 561The calculation used for that is: if sample_size <= psb_period + 256 display the
 562warning.  When sampling is used, psb_period defaults to 0 (2KiB).
 563
 564The default sample size is 4KiB.
 565
 566The sample size is passed in aux_sample_size in struct perf_event_attr.  The
 567sample size is limited by the maximum event size which is 64KiB.  It is
 568difficult to know how big the event might be without the trace sample attached,
 569but the tool validates that the sample size is not greater than 60KiB.
 570
 571
 572new snapshot option
 573~~~~~~~~~~~~~~~~~~~
 574
 575The difference between full trace and snapshot from the kernel's perspective is
 576that in full trace we don't overwrite trace data that the user hasn't collected
 577yet (and indicated that by advancing aux_tail), whereas in snapshot mode we let
 578the trace run and overwrite older data in the buffer so that whenever something
 579interesting happens, we can stop it and grab a snapshot of what was going on
 580around that interesting moment.
 581
 582To select snapshot mode a new option has been added:
 583
 584	-S
 585
 586Optionally it can be followed by the snapshot size e.g.
 587
 588	-S0x100000
 589
 590The default snapshot size is the auxtrace mmap size.  If neither auxtrace mmap size
 591nor snapshot size is specified, then the default is 4MiB for privileged users
 592(or if /proc/sys/kernel/perf_event_paranoid < 0), 128KiB for unprivileged users.
 593If an unprivileged user does not specify mmap pages, the mmap pages will be
 594reduced as described in the 'new auxtrace mmap size option' section below.
 595
 596The snapshot size is displayed if the option -vv is used e.g.
 597
 598	Intel PT snapshot size: %zu
 599
 600
 601new auxtrace mmap size option
 602~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
 603
 604Intel PT buffer size is specified by an addition to the -m option e.g.
 605
 606	-m,16
 607
 608selects a buffer size of 16 pages i.e. 64KiB.
 609
 610Note that the existing functionality of -m is unchanged.  The auxtrace mmap size
 611is specified by the optional addition of a comma and the value.
 612
 613The default auxtrace mmap size for Intel PT is 4MiB/page_size for privileged users
 614(or if /proc/sys/kernel/perf_event_paranoid < 0), 128KiB for unprivileged users.
 615If an unprivileged user does not specify mmap pages, the mmap pages will be
 616reduced from the default 512KiB/page_size to 256KiB/page_size, otherwise the
 617user is likely to get an error as they exceed their mlock limit (Max locked
 618memory as shown in /proc/self/limits).  Note that perf does not count the first
 619512KiB (actually /proc/sys/kernel/perf_event_mlock_kb minus 1 page) per cpu
 620against the mlock limit so an unprivileged user is allowed 512KiB per cpu plus
 621their mlock limit (which defaults to 64KiB but is not multiplied by the number
 622of cpus).
 623
 624In full-trace mode, powers of two are allowed for buffer size, with a minimum
 625size of 2 pages.  In snapshot mode or sampling mode, it is the same but the
 626minimum size is 1 page.
 627
 628The mmap size and auxtrace mmap size are displayed if the -vv option is used e.g.
 629
 630	mmap length 528384
 631	auxtrace mmap length 4198400
 632
 633
 634Intel PT modes of operation
 635~~~~~~~~~~~~~~~~~~~~~~~~~~~
 636
 637Intel PT can be used in 3 modes:
 638	full-trace mode
 639	sample mode
 640	snapshot mode
 641
 642Full-trace mode traces continuously e.g.
 643
 644	perf record -e intel_pt//u uname
 645
 646Sample mode attaches a Intel PT sample to other events e.g.
 647
 648	perf record --aux-sample -e intel_pt//u -e branch-misses:u
 649
 650Snapshot mode captures the available data when a signal is sent or "snapshot"
 651control command is issued. e.g. using a signal
 652
 653	perf record -v -e intel_pt//u -S ./loopy 1000000000 &
 654	[1] 11435
 655	kill -USR2 11435
 656	Recording AUX area tracing snapshot
 657
 658Note that the signal sent is SIGUSR2.
 659Note that "Recording AUX area tracing snapshot" is displayed because the -v
 660option is used.
 661
 662The advantage of using "snapshot" control command is that the access is
 663controlled by access to a FIFO e.g.
 664
 665	$ mkfifo perf.control
 666	$ mkfifo perf.ack
 667	$ cat perf.ack &
 668	[1] 15235
 669	$ sudo ~/bin/perf record --control fifo:perf.control,perf.ack -S -e intel_pt//u -- sleep 60 &
 670	[2] 15243
 671	$ ps -e | grep perf
 672	15244 pts/1    00:00:00 perf
 673	$ kill -USR2 15244
 674	bash: kill: (15244) - Operation not permitted
 675	$ echo snapshot > perf.control
 676	ack
 677
 678The 3 Intel PT modes of operation cannot be used together.
 679
 680
 681Buffer handling
 682~~~~~~~~~~~~~~~
 683
 684There may be buffer limitations (i.e. single ToPa entry) which means that actual
 685buffer sizes are limited to powers of 2 up to 4MiB (MAX_ORDER).  In order to
 686provide other sizes, and in particular an arbitrarily large size, multiple
 687buffers are logically concatenated.  However an interrupt must be used to switch
 688between buffers.  That has two potential problems:
 689	a) the interrupt may not be handled in time so that the current buffer
 690	becomes full and some trace data is lost.
 691	b) the interrupts may slow the system and affect the performance
 692	results.
 693
 694If trace data is lost, the driver sets 'truncated' in the PERF_RECORD_AUX event
 695which the tools report as an error.
 696
 697In full-trace mode, the driver waits for data to be copied out before allowing
 698the (logical) buffer to wrap-around.  If data is not copied out quickly enough,
 699again 'truncated' is set in the PERF_RECORD_AUX event.  If the driver has to
 700wait, the intel_pt event gets disabled.  Because it is difficult to know when
 701that happens, perf tools always re-enable the intel_pt event after copying out
 702data.
 703
 704
 705Intel PT and build ids
 706~~~~~~~~~~~~~~~~~~~~~~
 707
 708By default "perf record" post-processes the event stream to find all build ids
 709for executables for all addresses sampled.  Deliberately, Intel PT is not
 710decoded for that purpose (it would take too long).  Instead the build ids for
 711all executables encountered (due to mmap, comm or task events) are included
 712in the perf.data file.
 713
 714To see buildids included in the perf.data file use the command:
 715
 716	perf buildid-list
 717
 718If the perf.data file contains Intel PT data, that is the same as:
 719
 720	perf buildid-list --with-hits
 721
 722
 723Snapshot mode and event disabling
 724~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
 725
 726In order to make a snapshot, the intel_pt event is disabled using an IOCTL,
 727namely PERF_EVENT_IOC_DISABLE.  However doing that can also disable the
 728collection of side-band information.  In order to prevent that,  a dummy
 729software event has been introduced that permits tracking events (like mmaps) to
 730continue to be recorded while intel_pt is disabled.  That is important to ensure
 731there is complete side-band information to allow the decoding of subsequent
 732snapshots.
 733
 734A test has been created for that.  To find the test:
 735
 736	perf test list
 737	...
 738	23: Test using a dummy software event to keep tracking
 739
 740To run the test:
 741
 742	perf test 23
 743	23: Test using a dummy software event to keep tracking     : Ok
 744
 745
 746perf record modes (nothing new here)
 747~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
 748
 749perf record essentially operates in one of three modes:
 750	per thread
 751	per cpu
 752	workload only
 753
 754"per thread" mode is selected by -t or by --per-thread (with -p or -u or just a
 755workload).
 756"per cpu" is selected by -C or -a.
 757"workload only" mode is selected by not using the other options but providing a
 758command to run (i.e. the workload).
 759
 760In per-thread mode an exact list of threads is traced.  There is no inheritance.
 761Each thread has its own event buffer.
 762
 763In per-cpu mode all processes (or processes from the selected cgroup i.e. -G
 764option, or processes selected with -p or -u) are traced.  Each cpu has its own
 765buffer. Inheritance is allowed.
 766
 767In workload-only mode, the workload is traced but with per-cpu buffers.
 768Inheritance is allowed.  Note that you can now trace a workload in per-thread
 769mode by using the --per-thread option.
 770
 771
 772Privileged vs non-privileged users
 773~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
 774
 775Unless /proc/sys/kernel/perf_event_paranoid is set to -1, unprivileged users
 776have memory limits imposed upon them.  That affects what buffer sizes they can
 777have as outlined above.
 778
 779The v4.2 kernel introduced support for a context switch metadata event,
 780PERF_RECORD_SWITCH, which allows unprivileged users to see when their processes
 781are scheduled out and in, just not by whom, which is left for the
 782PERF_RECORD_SWITCH_CPU_WIDE, that is only accessible in system wide context,
 783which in turn requires CAP_PERFMON or CAP_SYS_ADMIN.
 784
 785Please see the 45ac1403f564 ("perf: Add PERF_RECORD_SWITCH to indicate context
 786switches") commit, that introduces these metadata events for further info.
 787
 788When working with kernels < v4.2, the following considerations must be taken,
 789as the sched:sched_switch tracepoints will be used to receive such information:
 790
 791Unless /proc/sys/kernel/perf_event_paranoid is set to -1, unprivileged users are
 792not permitted to use tracepoints which means there is insufficient side-band
 793information to decode Intel PT in per-cpu mode, and potentially workload-only
 794mode too if the workload creates new processes.
 795
 796Note also, that to use tracepoints, read-access to debugfs is required.  So if
 797debugfs is not mounted or the user does not have read-access, it will again not
 798be possible to decode Intel PT in per-cpu mode.
 799
 800
 801sched_switch tracepoint
 802~~~~~~~~~~~~~~~~~~~~~~~
 803
 804The sched_switch tracepoint is used to provide side-band data for Intel PT
 805decoding in kernels where the PERF_RECORD_SWITCH metadata event isn't
 806available.
 807
 808The sched_switch events are automatically added. e.g. the second event shown
 809below:
 810
 811	$ perf record -vv -e intel_pt//u uname
 812	------------------------------------------------------------
 813	perf_event_attr:
 814	type                             6
 815	size                             112
 816	config                           0x400
 817	{ sample_period, sample_freq }   1
 818	sample_type                      IP|TID|TIME|CPU|IDENTIFIER
 819	read_format                      ID
 820	disabled                         1
 821	inherit                          1
 822	exclude_kernel                   1
 823	exclude_hv                       1
 824	enable_on_exec                   1
 825	sample_id_all                    1
 826	------------------------------------------------------------
 827	sys_perf_event_open: pid 31104  cpu 0  group_fd -1  flags 0x8
 828	sys_perf_event_open: pid 31104  cpu 1  group_fd -1  flags 0x8
 829	sys_perf_event_open: pid 31104  cpu 2  group_fd -1  flags 0x8
 830	sys_perf_event_open: pid 31104  cpu 3  group_fd -1  flags 0x8
 831	------------------------------------------------------------
 832	perf_event_attr:
 833	type                             2
 834	size                             112
 835	config                           0x108
 836	{ sample_period, sample_freq }   1
 837	sample_type                      IP|TID|TIME|CPU|PERIOD|RAW|IDENTIFIER
 838	read_format                      ID
 839	inherit                          1
 840	sample_id_all                    1
 841	exclude_guest                    1
 842	------------------------------------------------------------
 843	sys_perf_event_open: pid -1  cpu 0  group_fd -1  flags 0x8
 844	sys_perf_event_open: pid -1  cpu 1  group_fd -1  flags 0x8
 845	sys_perf_event_open: pid -1  cpu 2  group_fd -1  flags 0x8
 846	sys_perf_event_open: pid -1  cpu 3  group_fd -1  flags 0x8
 847	------------------------------------------------------------
 848	perf_event_attr:
 849	type                             1
 850	size                             112
 851	config                           0x9
 852	{ sample_period, sample_freq }   1
 853	sample_type                      IP|TID|TIME|IDENTIFIER
 854	read_format                      ID
 855	disabled                         1
 856	inherit                          1
 857	exclude_kernel                   1
 858	exclude_hv                       1
 859	mmap                             1
 860	comm                             1
 861	enable_on_exec                   1
 862	task                             1
 863	sample_id_all                    1
 864	mmap2                            1
 865	comm_exec                        1
 866	------------------------------------------------------------
 867	sys_perf_event_open: pid 31104  cpu 0  group_fd -1  flags 0x8
 868	sys_perf_event_open: pid 31104  cpu 1  group_fd -1  flags 0x8
 869	sys_perf_event_open: pid 31104  cpu 2  group_fd -1  flags 0x8
 870	sys_perf_event_open: pid 31104  cpu 3  group_fd -1  flags 0x8
 871	mmap size 528384B
 872	AUX area mmap length 4194304
 873	perf event ring buffer mmapped per cpu
 874	Synthesizing auxtrace information
 875	Linux
 876	[ perf record: Woken up 1 times to write data ]
 877	[ perf record: Captured and wrote 0.042 MB perf.data ]
 878
 879Note, the sched_switch event is only added if the user is permitted to use it
 880and only in per-cpu mode.
 881
 882Note also, the sched_switch event is only added if TSC packets are requested.
 883That is because, in the absence of timing information, the sched_switch events
 884cannot be matched against the Intel PT trace.
 885
 886
 887perf script
 888-----------
 889
 890By default, perf script will decode trace data found in the perf.data file.
 891This can be further controlled by new option --itrace.
 892
 893
 894New --itrace option
 895~~~~~~~~~~~~~~~~~~~
 896
 897Having no option is the same as
 898
 899	--itrace
 900
 901which, in turn, is the same as
 902
 903	--itrace=cepwx
 904
 905The letters are:
 906
 907	i	synthesize "instructions" events
 908	b	synthesize "branches" events
 909	x	synthesize "transactions" events
 910	w	synthesize "ptwrite" events
 911	p	synthesize "power" events (incl. PSB events)
 912	c	synthesize branches events (calls only)
 913	r	synthesize branches events (returns only)
 914	o	synthesize PEBS-via-PT events
 915	I	synthesize Event Trace events
 916	e	synthesize tracing error events
 917	d	create a debug log
 918	g	synthesize a call chain (use with i or x)
 919	G	synthesize a call chain on existing event records
 920	l	synthesize last branch entries (use with i or x)
 921	L	synthesize last branch entries on existing event records
 922	s	skip initial number of events
 923	q	quicker (less detailed) decoding
 924	A	approximate IPC
 925	Z	prefer to ignore timestamps (so-called "timeless" decoding)
 926
 927"Instructions" events look like they were recorded by "perf record -e
 928instructions".
 929
 930"Branches" events look like they were recorded by "perf record -e branches". "c"
 931and "r" can be combined to get calls and returns.
 932
 933"Transactions" events correspond to the start or end of transactions. The
 934'flags' field can be used in perf script to determine whether the event is a
 935transaction start, commit or abort.
 936
 937Note that "instructions", "branches" and "transactions" events depend on code
 938flow packets which can be disabled by using the config term "branch=0".  Refer
 939to the config terms section above.
 940
 941"ptwrite" events record the payload of the ptwrite instruction and whether
 942"fup_on_ptw" was used.  "ptwrite" events depend on PTWRITE packets which are
 943recorded only if the "ptw" config term was used.  Refer to the config terms
 944section above.  perf script "synth" field displays "ptwrite" information like
 945this: "ip: 0 payload: 0x123456789abcdef0"  where "ip" is 1 if "fup_on_ptw" was
 946used.
 947
 948"Power" events correspond to power event packets and CBR (core-to-bus ratio)
 949packets.  While CBR packets are always recorded when tracing is enabled, power
 950event packets are recorded only if the "pwr_evt" config term was used.  Refer to
 951the config terms section above.  The power events record information about
 952C-state changes, whereas CBR is indicative of CPU frequency.  perf script
 953"event,synth" fields display information like this:
 954
 955	cbr:  cbr: 22 freq: 2189 MHz (200%)
 956	mwait:  hints: 0x60 extensions: 0x1
 957	pwre:  hw: 0 cstate: 2 sub-cstate: 0
 958	exstop:  ip: 1
 959	pwrx:  deepest cstate: 2 last cstate: 2 wake reason: 0x4
 960
 961Where:
 962
 963	"cbr" includes the frequency and the percentage of maximum non-turbo
 964	"mwait" shows mwait hints and extensions
 965	"pwre" shows C-state transitions (to a C-state deeper than C0) and
 966	whether	initiated by hardware
 967	"exstop" indicates execution stopped and whether the IP was recorded
 968	exactly,
 969	"pwrx" indicates return to C0
 970
 971For more details refer to the Intel 64 and IA-32 Architectures Software
 972Developer Manuals.
 973
 974PSB events show when a PSB+ occurred and also the byte-offset in the trace.
 975Emitting a PSB+ can cause a CPU a slight delay. When doing timing analysis
 976of code with Intel PT, it is useful to know if a timing bubble was caused
 977by Intel PT or not.
 978
 979Error events show where the decoder lost the trace.  Error events
 980are quite important.  Users must know if what they are seeing is a complete
 981picture or not. The "e" option may be followed by flags which affect what errors
 982will or will not be reported.  Each flag must be preceded by either '+' or '-'.
 983The flags supported by Intel PT are:
 984
 985		-o	Suppress overflow errors
 986		-l	Suppress trace data lost errors
 987
 988For example, for errors but not overflow or data lost errors:
 989
 990	--itrace=e-o-l
 991
 992The "d" option will cause the creation of a file "intel_pt.log" containing all
 993decoded packets and instructions.  Note that this option slows down the decoder
 994and that the resulting file may be very large.  The "d" option may be followed
 995by flags which affect what debug messages will or will not be logged. Each flag
 996must be preceded by either '+' or '-'. The flags support by Intel PT are:
 997
 998		-a	Suppress logging of perf events
 999		+a	Log all perf events
1000		+e	Output only on decoding errors (size configurable)
1001		+o	Output to stdout instead of "intel_pt.log"
1002
1003By default, logged perf events are filtered by any specified time ranges, but
1004flag +a overrides that.  The +e flag can be useful for analyzing errors.  By
1005default, the log size in that case is 16384 bytes, but can be altered by
1006linkperf:perf-config[1] e.g. perf config itrace.debug-log-buffer-size=30000
1007
1008In addition, the period of the "instructions" event can be specified. e.g.
1009
1010	--itrace=i10us
1011
1012sets the period to 10us i.e. one  instruction sample is synthesized for each 10
1013microseconds of trace.  Alternatives to "us" are "ms" (milliseconds),
1014"ns" (nanoseconds), "t" (TSC ticks) or "i" (instructions).
1015
1016"ms", "us" and "ns" are converted to TSC ticks.
1017
1018The timing information included with Intel PT does not give the time of every
1019instruction.  Consequently, for the purpose of sampling, the decoder estimates
1020the time since the last timing packet based on 1 tick per instruction.  The time
1021on the sample is *not* adjusted and reflects the last known value of TSC.
1022
1023For Intel PT, the default period is 100us.
1024
1025Setting it to a zero period means "as often as possible".
1026
1027In the case of Intel PT that is the same as a period of 1 and a unit of
1028'instructions' (i.e. --itrace=i1i).
1029
1030Also the call chain size (default 16, max. 1024) for instructions or
1031transactions events can be specified. e.g.
1032
1033	--itrace=ig32
1034	--itrace=xg32
1035
1036Also the number of last branch entries (default 64, max. 1024) for instructions or
1037transactions events can be specified. e.g.
1038
1039       --itrace=il10
1040       --itrace=xl10
1041
1042Note that last branch entries are cleared for each sample, so there is no overlap
1043from one sample to the next.
1044
1045The G and L options are designed in particular for sample mode, and work much
1046like g and l but add call chain and branch stack to the other selected events
1047instead of synthesized events. For example, to record branch-misses events for
1048'ls' and then add a call chain derived from the Intel PT trace:
1049
1050	perf record --aux-sample -e '{intel_pt//u,branch-misses:u}' -- ls
1051	perf report --itrace=Ge
1052
1053Although in fact G is a default for perf report, so that is the same as just:
1054
1055	perf report
1056
1057One caveat with the G and L options is that they work poorly with "Large PEBS".
1058Large PEBS means PEBS records will be accumulated by hardware and the written
1059into the event buffer in one go.  That reduces interrupts, but can give very
1060late timestamps.  Because the Intel PT trace is synchronized by timestamps,
1061the PEBS events do not match the trace.  Currently, Large PEBS is used only in
1062certain circumstances:
1063	- hardware supports it
1064	- PEBS is used
1065	- event period is specified, instead of frequency
1066	- the sample type is limited to the following flags:
1067		PERF_SAMPLE_IP | PERF_SAMPLE_TID | PERF_SAMPLE_ADDR |
1068		PERF_SAMPLE_ID | PERF_SAMPLE_CPU | PERF_SAMPLE_STREAM_ID |
1069		PERF_SAMPLE_DATA_SRC | PERF_SAMPLE_IDENTIFIER |
1070		PERF_SAMPLE_TRANSACTION | PERF_SAMPLE_PHYS_ADDR |
1071		PERF_SAMPLE_REGS_INTR | PERF_SAMPLE_REGS_USER |
1072		PERF_SAMPLE_PERIOD (and sometimes) | PERF_SAMPLE_TIME
1073Because Intel PT sample mode uses a different sample type to the list above,
1074Large PEBS is not used with Intel PT sample mode. To avoid Large PEBS in other
1075cases, avoid specifying the event period i.e. avoid the 'perf record' -c option,
1076--count option, or 'period' config term.
1077
1078To disable trace decoding entirely, use the option --no-itrace.
1079
1080It is also possible to skip events generated (instructions, branches, transactions)
1081at the beginning. This is useful to ignore initialization code.
1082
1083	--itrace=i0nss1000000
1084
1085skips the first million instructions.
1086
1087The q option changes the way the trace is decoded.  The decoding is much faster
1088but much less detailed.  Specifically, with the q option, the decoder does not
1089decode TNT packets, and does not walk object code, but gets the ip from FUP and
1090TIP packets.  The q option can be used with the b and i options but the period
1091is not used.  The q option decodes more quickly, but is useful only if the
1092control flow of interest is represented or indicated by FUP, TIP, TIP.PGE, or
1093TIP.PGD packets (refer below).  However the q option could be used to find time
1094ranges that could then be decoded fully using the --time option.
1095
1096What will *not* be decoded with the (single) q option:
1097
1098	- direct calls and jmps
1099	- conditional branches
1100	- non-branch instructions
1101
1102What *will* be decoded with the (single) q option:
1103
1104	- asynchronous branches such as interrupts
1105	- indirect branches
1106	- function return target address *if* the noretcomp config term (refer
1107	config terms section) was used
1108	- start of (control-flow) tracing
1109	- end of (control-flow) tracing, if it is not out of context
1110	- power events, ptwrite, transaction start and abort
1111	- instruction pointer associated with PSB packets
1112
1113Note the q option does not specify what events will be synthesized e.g. the p
1114option must be used also to show power events.
1115
1116Repeating the q option (double-q i.e. qq) results in even faster decoding and even
1117less detail.  The decoder decodes only extended PSB (PSB+) packets, getting the
1118instruction pointer if there is a FUP packet within PSB+ (i.e. between PSB and
1119PSBEND).  Note PSB packets occur regularly in the trace based on the psb_period
1120config term (refer config terms section).  There will be a FUP packet if the
1121PSB+ occurs while control flow is being traced.
1122
1123What will *not* be decoded with the qq option:
1124
1125	- everything except instruction pointer associated with PSB packets
1126
1127What *will* be decoded with the qq option:
1128
1129	- instruction pointer associated with PSB packets
1130
1131The Z option is equivalent to having recorded a trace without TSC
1132(i.e. config term tsc=0). It can be useful to avoid timestamp issues when
1133decoding a trace of a virtual machine.
1134
1135
1136dlfilter-show-cycles.so
1137~~~~~~~~~~~~~~~~~~~~~~~
1138
1139Cycles can be displayed using dlfilter-show-cycles.so in which case the itrace A
1140option can be useful to provide higher granularity cycle information:
1141
1142	perf script --itrace=A --call-trace --dlfilter dlfilter-show-cycles.so
1143
1144To see a list of dlfilters:
1145
1146	perf script -v --list-dlfilters
1147
1148See also linkperf:perf-dlfilters[1]
1149
1150
1151dump option
1152~~~~~~~~~~~
1153
1154perf script has an option (-D) to "dump" the events i.e. display the binary
1155data.
1156
1157When -D is used, Intel PT packets are displayed.  The packet decoder does not
1158pay attention to PSB packets, but just decodes the bytes - so the packets seen
1159by the actual decoder may not be identical in places where the data is corrupt.
1160One example of that would be when the buffer-switching interrupt has been too
1161slow, and the buffer has been filled completely.  In that case, the last packet
1162in the buffer might be truncated and immediately followed by a PSB as the trace
1163continues in the next buffer.
1164
1165To disable the display of Intel PT packets, combine the -D option with
1166--no-itrace.
1167
1168
1169perf report
1170-----------
1171
1172By default, perf report will decode trace data found in the perf.data file.
1173This can be further controlled by new option --itrace exactly the same as
1174perf script, with the exception that the default is --itrace=igxe.
1175
1176
1177perf inject
1178-----------
1179
1180perf inject also accepts the --itrace option in which case tracing data is
1181removed and replaced with the synthesized events. e.g.
1182
1183	perf inject --itrace -i perf.data -o perf.data.new
1184
1185Below is an example of using Intel PT with autofdo.  It requires autofdo
1186(https://github.com/google/autofdo) and gcc version 5.  The bubble
1187sort example is from the AutoFDO tutorial (https://gcc.gnu.org/wiki/AutoFDO/Tutorial)
1188amended to take the number of elements as a parameter.
1189
1190	$ gcc-5 -O3 sort.c -o sort_optimized
1191	$ ./sort_optimized 30000
1192	Bubble sorting array of 30000 elements
1193	2254 ms
1194
1195	$ cat ~/.perfconfig
1196	[intel-pt]
1197		mispred-all = on
1198
1199	$ perf record -e intel_pt//u ./sort 3000
1200	Bubble sorting array of 3000 elements
1201	58 ms
1202	[ perf record: Woken up 2 times to write data ]
1203	[ perf record: Captured and wrote 3.939 MB perf.data ]
1204	$ perf inject -i perf.data -o inj --itrace=i100usle --strip
1205	$ ./create_gcov --binary=./sort --profile=inj --gcov=sort.gcov -gcov_version=1
1206	$ gcc-5 -O3 -fauto-profile=sort.gcov sort.c -o sort_autofdo
1207	$ ./sort_autofdo 30000
1208	Bubble sorting array of 30000 elements
1209	2155 ms
1210
1211Note there is currently no advantage to using Intel PT instead of LBR, but
1212that may change in the future if greater use is made of the data.
1213
1214
1215PEBS via Intel PT
1216-----------------
1217
1218Some hardware has the feature to redirect PEBS records to the Intel PT trace.
1219Recording is selected by using the aux-output config term e.g.
1220
1221	perf record -c 10000 -e '{intel_pt/branch=0/,cycles/aux-output/ppp}' uname
1222
1223Originally, software only supported redirecting at most one PEBS event because it
1224was not able to differentiate one event from another. To overcome that, more recent
1225kernels and perf tools add support for the PERF_RECORD_AUX_OUTPUT_HW_ID side-band event.
1226To check for the presence of that event in a PEBS-via-PT trace:
1227
1228	perf script -D --no-itrace | grep PERF_RECORD_AUX_OUTPUT_HW_ID
1229
1230To display PEBS events from the Intel PT trace, use the itrace 'o' option e.g.
1231
1232	perf script --itrace=oe
1233
1234XED
1235---
1236
1237include::build-xed.txt[]
1238
1239
1240Tracing Virtual Machines (kernel only)
1241--------------------------------------
1242
1243Currently, kernel tracing is supported with either "timeless" decoding
1244(i.e. no TSC timestamps) or VM Time Correlation. VM Time Correlation is an extra step
1245using 'perf inject' and requires unchanging VMX TSC Offset and no VMX TSC Scaling.
1246
1247Other limitations and caveats
1248
1249 VMX controls may suppress packets needed for decoding resulting in decoding errors
1250 VMX controls may block the perf NMI to the host potentially resulting in lost trace data
1251 Guest kernel self-modifying code (e.g. jump labels or JIT-compiled eBPF) will result in decoding errors
1252 Guest thread information is unknown
1253 Guest VCPU is unknown but may be able to be inferred from the host thread
1254 Callchains are not supported
1255
1256Example using "timeless" decoding
1257
1258Start VM
1259
1260 $ sudo virsh start kubuntu20.04
1261 Domain kubuntu20.04 started
1262
1263Mount the guest file system.  Note sshfs needs -o direct_io to enable reading of proc files.  root access is needed to read /proc/kcore.
1264
1265 $ mkdir vm0
1266 $ sshfs -o direct_io root@vm0:/ vm0
1267
1268Copy the guest /proc/kallsyms, /proc/modules and /proc/kcore
1269
1270 $ perf buildid-cache -v --kcore vm0/proc/kcore
1271 kcore added to build-id cache directory /home/user/.debug/[kernel.kcore]/9600f316a53a0f54278885e8d9710538ec5f6a08/2021021807494306
1272 $ KALLSYMS=/home/user/.debug/[kernel.kcore]/9600f316a53a0f54278885e8d9710538ec5f6a08/2021021807494306/kallsyms
1273
1274Find the VM process
1275
1276 $ ps -eLl | grep 'KVM\|PID'
1277 F S   UID     PID    PPID     LWP  C PRI  NI ADDR SZ WCHAN  TTY          TIME CMD
1278 3 S 64055    1430       1    1440  1  80   0 - 1921718 -    ?        00:02:47 CPU 0/KVM
1279 3 S 64055    1430       1    1441  1  80   0 - 1921718 -    ?        00:02:41 CPU 1/KVM
1280 3 S 64055    1430       1    1442  1  80   0 - 1921718 -    ?        00:02:38 CPU 2/KVM
1281 3 S 64055    1430       1    1443  2  80   0 - 1921718 -    ?        00:03:18 CPU 3/KVM
1282
1283Start an open-ended perf record, tracing the VM process, do something on the VM, and then ctrl-C to stop.
1284TSC is not supported and tsc=0 must be specified.  That means mtc is useless, so add mtc=0.
1285However, IPC can still be determined, hence cyc=1 can be added.
1286Only kernel decoding is supported, so 'k' must be specified.
1287Intel PT traces both the host and the guest so --guest and --host need to be specified.
1288Without timestamps, --per-thread must be specified to distinguish threads.
1289
1290 $ sudo perf kvm --guest --host --guestkallsyms $KALLSYMS record --kcore -e intel_pt/tsc=0,mtc=0,cyc=1/k -p 1430 --per-thread
1291 ^C
1292 [ perf record: Woken up 1 times to write data ]
1293 [ perf record: Captured and wrote 5.829 MB ]
1294
1295perf script can be used to provide an instruction trace
1296
1297 $ perf script --guestkallsyms $KALLSYMS --insn-trace --xed -F+ipc | grep -C10 vmresume | head -21
1298       CPU 0/KVM  1440  ffffffff82133cdd __vmx_vcpu_run+0x3d ([kernel.kallsyms])                movq  0x48(%rax), %r9
1299       CPU 0/KVM  1440  ffffffff82133ce1 __vmx_vcpu_run+0x41 ([kernel.kallsyms])                movq  0x50(%rax), %r10
1300       CPU 0/KVM  1440  ffffffff82133ce5 __vmx_vcpu_run+0x45 ([kernel.kallsyms])                movq  0x58(%rax), %r11
1301       CPU 0/KVM  1440  ffffffff82133ce9 __vmx_vcpu_run+0x49 ([kernel.kallsyms])                movq  0x60(%rax), %r12
1302       CPU 0/KVM  1440  ffffffff82133ced __vmx_vcpu_run+0x4d ([kernel.kallsyms])                movq  0x68(%rax), %r13
1303       CPU 0/KVM  1440  ffffffff82133cf1 __vmx_vcpu_run+0x51 ([kernel.kallsyms])                movq  0x70(%rax), %r14
1304       CPU 0/KVM  1440  ffffffff82133cf5 __vmx_vcpu_run+0x55 ([kernel.kallsyms])                movq  0x78(%rax), %r15
1305       CPU 0/KVM  1440  ffffffff82133cf9 __vmx_vcpu_run+0x59 ([kernel.kallsyms])                movq  (%rax), %rax
1306       CPU 0/KVM  1440  ffffffff82133cfc __vmx_vcpu_run+0x5c ([kernel.kallsyms])                callq  0xffffffff82133c40
1307       CPU 0/KVM  1440  ffffffff82133c40 vmx_vmenter+0x0 ([kernel.kallsyms])            jz 0xffffffff82133c46
1308       CPU 0/KVM  1440  ffffffff82133c42 vmx_vmenter+0x2 ([kernel.kallsyms])            vmresume         IPC: 0.11 (50/445)
1309           :1440  1440  ffffffffbb678b06 native_write_msr+0x6 ([guest.kernel.kallsyms])                 nopl  %eax, (%rax,%rax,1)
1310           :1440  1440  ffffffffbb678b0b native_write_msr+0xb ([guest.kernel.kallsyms])                 retq     IPC: 0.04 (2/41)
1311           :1440  1440  ffffffffbb666646 lapic_next_deadline+0x26 ([guest.kernel.kallsyms])             data16 nop
1312           :1440  1440  ffffffffbb666648 lapic_next_deadline+0x28 ([guest.kernel.kallsyms])             xor %eax, %eax
1313           :1440  1440  ffffffffbb66664a lapic_next_deadline+0x2a ([guest.kernel.kallsyms])             popq  %rbp
1314           :1440  1440  ffffffffbb66664b lapic_next_deadline+0x2b ([guest.kernel.kallsyms])             retq     IPC: 0.16 (4/25)
1315           :1440  1440  ffffffffbb74607f clockevents_program_event+0x8f ([guest.kernel.kallsyms])               test %eax, %eax
1316           :1440  1440  ffffffffbb746081 clockevents_program_event+0x91 ([guest.kernel.kallsyms])               jz 0xffffffffbb74603c    IPC: 0.06 (2/30)
1317           :1440  1440  ffffffffbb74603c clockevents_program_event+0x4c ([guest.kernel.kallsyms])               popq  %rbx
1318           :1440  1440  ffffffffbb74603d clockevents_program_event+0x4d ([guest.kernel.kallsyms])               popq  %r12
1319
1320Example using VM Time Correlation
1321
1322Start VM
1323
1324 $ sudo virsh start kubuntu20.04
1325 Domain kubuntu20.04 started
1326
1327Mount the guest file system.  Note sshfs needs -o direct_io to enable reading of proc files.  root access is needed to read /proc/kcore.
1328
1329 $ mkdir -p vm0
1330 $ sshfs -o direct_io root@vm0:/ vm0
1331
1332Copy the guest /proc/kallsyms, /proc/modules and /proc/kcore
1333
1334 $ perf buildid-cache -v --kcore vm0/proc/kcore
1335 same kcore found in /home/user/.debug/[kernel.kcore]/cc9c55a98c5e4ec0aeda69302554aabed5cd6491/2021021312450777
1336 $ KALLSYMS=/home/user/.debug/\[kernel.kcore\]/cc9c55a98c5e4ec0aeda69302554aabed5cd6491/2021021312450777/kallsyms
1337
1338Find the VM process
1339
1340 $ ps -eLl | grep 'KVM\|PID'
1341 F S   UID     PID    PPID     LWP  C PRI  NI ADDR SZ WCHAN  TTY          TIME CMD
1342 3 S 64055   16998       1   17005 13  80   0 - 1818189 -    ?        00:00:16 CPU 0/KVM
1343 3 S 64055   16998       1   17006  4  80   0 - 1818189 -    ?        00:00:05 CPU 1/KVM
1344 3 S 64055   16998       1   17007  3  80   0 - 1818189 -    ?        00:00:04 CPU 2/KVM
1345 3 S 64055   16998       1   17008  4  80   0 - 1818189 -    ?        00:00:05 CPU 3/KVM
1346
1347Start an open-ended perf record, tracing the VM process, do something on the VM, and then ctrl-C to stop.
1348IPC can be determined, hence cyc=1 can be added.
1349Only kernel decoding is supported, so 'k' must be specified.
1350Intel PT traces both the host and the guest so --guest and --host need to be specified.
1351
1352 $ sudo perf kvm --guest --host --guestkallsyms $KALLSYMS record --kcore -e intel_pt/cyc=1/k -p 16998
1353 ^C[ perf record: Woken up 1 times to write data ]
1354 [ perf record: Captured and wrote 9.041 MB perf.data.kvm ]
1355
1356Now 'perf inject' can be used to determine the VMX TCS Offset. Note, Intel PT TSC packets are
1357only 7-bytes, so the TSC Offset might differ from the actual value in the 8th byte. That will
1358have no effect i.e. the resulting timestamps will be correct anyway.
1359
1360 $ perf inject -i perf.data.kvm --vm-time-correlation=dry-run
1361 ERROR: Unknown TSC Offset for VMCS 0x1bff6a
1362 VMCS: 0x1bff6a  TSC Offset 0xffffe42722c64c41
1363 ERROR: Unknown TSC Offset for VMCS 0x1cbc08
1364 VMCS: 0x1cbc08  TSC Offset 0xffffe42722c64c41
1365 ERROR: Unknown TSC Offset for VMCS 0x1c3ce8
1366 VMCS: 0x1c3ce8  TSC Offset 0xffffe42722c64c41
1367 ERROR: Unknown TSC Offset for VMCS 0x1cbce9
1368 VMCS: 0x1cbce9  TSC Offset 0xffffe42722c64c41
1369
1370Each virtual CPU has a different Virtual Machine Control Structure (VMCS)
1371shown above with the calculated TSC Offset. For an unchanging TSC Offset
1372they should all be the same for the same virtual machine.
1373
1374Now that the TSC Offset is known, it can be provided to 'perf inject'
1375
1376 $ perf inject -i perf.data.kvm --vm-time-correlation="dry-run 0xffffe42722c64c41"
1377
1378Note the options for 'perf inject' --vm-time-correlation are:
1379
1380 [ dry-run ] [ <TSC Offset> [ : <VMCS> [ , <VMCS> ]... ]  ]...
1381
1382So it is possible to specify different TSC Offsets for different VMCS.
1383The option "dry-run" will cause the file to be processed but without updating it.
1384Note it is also possible to get a intel_pt.log file by adding option --itrace=d
1385
1386There were no errors so, do it for real
1387
1388 $ perf inject -i perf.data.kvm --vm-time-correlation=0xffffe42722c64c41 --force
1389
1390'perf script' can be used to see if there are any decoder errors
1391
1392 $ perf script -i perf.data.kvm --guestkallsyms $KALLSYMS --itrace=e-o
1393
1394There were none.
1395
1396'perf script' can be used to provide an instruction trace showing timestamps
1397
1398 $ perf script -i perf.data.kvm --guestkallsyms $KALLSYMS --insn-trace --xed -F+ipc | grep -C10 vmresume | head -21
1399       CPU 1/KVM 17006 [001] 11500.262865593:  ffffffff82133cdd __vmx_vcpu_run+0x3d ([kernel.kallsyms])                 movq  0x48(%rax), %r9
1400       CPU 1/KVM 17006 [001] 11500.262865593:  ffffffff82133ce1 __vmx_vcpu_run+0x41 ([kernel.kallsyms])                 movq  0x50(%rax), %r10
1401       CPU 1/KVM 17006 [001] 11500.262865593:  ffffffff82133ce5 __vmx_vcpu_run+0x45 ([kernel.kallsyms])                 movq  0x58(%rax), %r11
1402       CPU 1/KVM 17006 [001] 11500.262865593:  ffffffff82133ce9 __vmx_vcpu_run+0x49 ([kernel.kallsyms])                 movq  0x60(%rax), %r12
1403       CPU 1/KVM 17006 [001] 11500.262865593:  ffffffff82133ced __vmx_vcpu_run+0x4d ([kernel.kallsyms])                 movq  0x68(%rax), %r13
1404       CPU 1/KVM 17006 [001] 11500.262865593:  ffffffff82133cf1 __vmx_vcpu_run+0x51 ([kernel.kallsyms])                 movq  0x70(%rax), %r14
1405       CPU 1/KVM 17006 [001] 11500.262865593:  ffffffff82133cf5 __vmx_vcpu_run+0x55 ([kernel.kallsyms])                 movq  0x78(%rax), %r15
1406       CPU 1/KVM 17006 [001] 11500.262865593:  ffffffff82133cf9 __vmx_vcpu_run+0x59 ([kernel.kallsyms])                 movq  (%rax), %rax
1407       CPU 1/KVM 17006 [001] 11500.262865593:  ffffffff82133cfc __vmx_vcpu_run+0x5c ([kernel.kallsyms])                 callq  0xffffffff82133c40
1408       CPU 1/KVM 17006 [001] 11500.262865593:  ffffffff82133c40 vmx_vmenter+0x0 ([kernel.kallsyms])             jz 0xffffffff82133c46
1409       CPU 1/KVM 17006 [001] 11500.262866075:  ffffffff82133c42 vmx_vmenter+0x2 ([kernel.kallsyms])             vmresume         IPC: 0.05 (40/769)
1410          :17006 17006 [001] 11500.262869216:  ffffffff82200cb0 asm_sysvec_apic_timer_interrupt+0x0 ([guest.kernel.kallsyms])           clac
1411          :17006 17006 [001] 11500.262869216:  ffffffff82200cb3 asm_sysvec_apic_timer_interrupt+0x3 ([guest.kernel.kallsyms])           pushq  $0xffffffffffffffff
1412          :17006 17006 [001] 11500.262869216:  ffffffff82200cb5 asm_sysvec_apic_timer_interrupt+0x5 ([guest.kernel.kallsyms])           callq  0xffffffff82201160
1413          :17006 17006 [001] 11500.262869216:  ffffffff82201160 error_entry+0x0 ([guest.kernel.kallsyms])               cld
1414          :17006 17006 [001] 11500.262869216:  ffffffff82201161 error_entry+0x1 ([guest.kernel.kallsyms])               pushq  %rsi
1415          :17006 17006 [001] 11500.262869216:  ffffffff82201162 error_entry+0x2 ([guest.kernel.kallsyms])               movq  0x8(%rsp), %rsi
1416          :17006 17006 [001] 11500.262869216:  ffffffff82201167 error_entry+0x7 ([guest.kernel.kallsyms])               movq  %rdi, 0x8(%rsp)
1417          :17006 17006 [001] 11500.262869216:  ffffffff8220116c error_entry+0xc ([guest.kernel.kallsyms])               pushq  %rdx
1418          :17006 17006 [001] 11500.262869216:  ffffffff8220116d error_entry+0xd ([guest.kernel.kallsyms])               pushq  %rcx
1419          :17006 17006 [001] 11500.262869216:  ffffffff8220116e error_entry+0xe ([guest.kernel.kallsyms])               pushq  %rax
1420
1421
1422Tracing Virtual Machines (including user space)
1423-----------------------------------------------
1424
1425It is possible to use perf record to record sideband events within a virtual machine, so that an Intel PT trace on the host can be decoded.
1426Sideband events from the guest perf.data file can be injected into the host perf.data file using perf inject.
1427
1428Here is an example of the steps needed:
1429
1430On the guest machine:
1431
1432Check that no-kvmclock kernel command line option was used to boot:
1433
1434Note, this is essential to enable time correlation between host and guest machines.
1435
1436 $ cat /proc/cmdline
1437 BOOT_IMAGE=/boot/vmlinuz-5.10.0-16-amd64 root=UUID=cb49c910-e573-47e0-bce7-79e293df8e1d ro no-kvmclock
1438
1439There is no BPF support at present so, if possible, disable JIT compiling:
1440
1441 $ echo 0 | sudo tee /proc/sys/net/core/bpf_jit_enable
1442 0
1443
1444Start perf record to collect sideband events:
1445
1446 $ sudo perf record -o guest-sideband-testing-guest-perf.data --sample-identifier --buildid-all --switch-events --kcore -a -e dummy
1447
1448On the host machine:
1449
1450Start perf record to collect Intel PT trace:
1451
1452Note, the host trace will get very big, very fast, so the steps from starting to stopping the host trace really need to be done so that they happen in the shortest time possible.
1453
1454 $ sudo perf record -o guest-sideband-testing-host-perf.data -m,64M --kcore -a -e intel_pt/cyc/
1455
1456On the guest machine:
1457
1458Run a small test case, just 'uname' in this example:
1459
1460 $ uname
1461 Linux
1462
1463On the host machine:
1464
1465Stop the Intel PT trace:
1466
1467 ^C
1468 [ perf record: Woken up 1 times to write data ]
1469 [ perf record: Captured and wrote 76.122 MB guest-sideband-testing-host-perf.data ]
1470
1471On the guest machine:
1472
1473Stop the Intel PT trace:
1474
1475 ^C
1476 [ perf record: Woken up 1 times to write data ]
1477 [ perf record: Captured and wrote 1.247 MB guest-sideband-testing-guest-perf.data ]
1478
1479And then copy guest-sideband-testing-guest-perf.data to the host (not shown here).
1480
1481On the host machine:
1482
1483With the 2 perf.data recordings, and with their ownership changed to the user.
1484
1485Identify the TSC Offset:
1486
1487 $ perf inject -i guest-sideband-testing-host-perf.data --vm-time-correlation=dry-run
1488 VMCS: 0x103fc6  TSC Offset 0xfffffa6ae070cb20
1489 VMCS: 0x103ff2  TSC Offset 0xfffffa6ae070cb20
1490 VMCS: 0x10fdaa  TSC Offset 0xfffffa6ae070cb20
1491 VMCS: 0x24d57c  TSC Offset 0xfffffa6ae070cb20
1492
1493Correct Intel PT TSC timestamps for the guest machine:
1494
1495 $ perf inject -i guest-sideband-testing-host-perf.data --vm-time-correlation=0xfffffa6ae070cb20 --force
1496
1497Identify the guest machine PID:
1498
1499 $ perf script -i guest-sideband-testing-host-perf.data --no-itrace --show-task-events | grep KVM
1500       CPU 0/KVM     0 [000]     0.000000: PERF_RECORD_COMM: CPU 0/KVM:13376/13381
1501       CPU 1/KVM     0 [000]     0.000000: PERF_RECORD_COMM: CPU 1/KVM:13376/13382
1502       CPU 2/KVM     0 [000]     0.000000: PERF_RECORD_COMM: CPU 2/KVM:13376/13383
1503       CPU 3/KVM     0 [000]     0.000000: PERF_RECORD_COMM: CPU 3/KVM:13376/13384
1504
1505Note, the QEMU option -name debug-threads=on is needed so that thread names
1506can be used to determine which thread is running which VCPU as above. libvirt seems to use this by default.
1507
1508Create a guestmount, assuming the guest machine is 'vm_to_test':
1509
1510 $ mkdir -p ~/guestmount/13376
1511 $ sshfs -o direct_io vm_to_test:/ ~/guestmount/13376
1512
1513Inject the guest perf.data file into the host perf.data file:
1514
1515Note, due to the guestmount option, guest object files and debug files will be copied into the build ID cache from the guest machine, with the notable exception of VDSO.
1516If needed, VDSO can be copied manually in a fashion similar to that used by the perf-archive script.
1517
1518 $ perf inject -i guest-sideband-testing-host-perf.data -o inj --guestmount ~/guestmount --guest-data=guest-sideband-testing-guest-perf.data,13376,0xfffffa6ae070cb20
1519
1520Show an excerpt from the result.  In this case the CPU and time range have been to chosen to show interaction between guest and host when 'uname' is starting to run on the guest machine:
1521
1522Notes:
1523
1524	- the CPU displayed, [002] in this case, is always the host CPU
1525	- events happening in the virtual machine start with VM:13376 VCPU:003, which shows the hypervisor PID 13376 and the VCPU number
1526	- only calls and errors are displayed i.e. --itrace=ce
1527	- branches entering and exiting the virtual machine are split, and show as 2 branches to/from "0 [unknown] ([unknown])"
1528
1529 $ perf script -i inj --itrace=ce -F+machine_pid,+vcpu,+addr,+pid,+tid,-period --ns --time 7919.408803365,7919.408804631 -C 2
1530       CPU 3/KVM 13376/13384 [002]  7919.408803365:      branches:  ffffffffc0f8ebe0 vmx_vcpu_enter_exit+0xc0 ([kernel.kallsyms]) => ffffffffc0f8edc0 __vmx_vcpu_run+0x0 ([kernel.kallsyms])
1531       CPU 3/KVM 13376/13384 [002]  7919.408803365:      branches:  ffffffffc0f8edd5 __vmx_vcpu_run+0x15 ([kernel.kallsyms]) => ffffffffc0f8eca0 vmx_update_host_rsp+0x0 ([kernel.kallsyms])
1532       CPU 3/KVM 13376/13384 [002]  7919.408803365:      branches:  ffffffffc0f8ee1b __vmx_vcpu_run+0x5b ([kernel.kallsyms]) => ffffffffc0f8ed60 vmx_vmenter+0x0 ([kernel.kallsyms])
1533       CPU 3/KVM 13376/13384 [002]  7919.408803461:      branches:  ffffffffc0f8ed62 vmx_vmenter+0x2 ([kernel.kallsyms]) =>                0 [unknown] ([unknown])
1534 VM:13376 VCPU:003            uname  3404/3404  [002]  7919.408803461:      branches:                 0 [unknown] ([unknown]) =>     7f851c9b5a5c init_cacheinfo+0x3ac (/usr/lib/x86_64-linux-gnu/libc-2.31.so)
1535 VM:13376 VCPU:003            uname  3404/3404  [002]  7919.408803567:      branches:      7f851c9b5a5a init_cacheinfo+0x3aa (/usr/lib/x86_64-linux-gnu/libc-2.31.so) =>                0 [unknown] ([unknown])
1536       CPU 3/KVM 13376/13384 [002]  7919.408803567:      branches:                 0 [unknown] ([unknown]) => ffffffffc0f8ed80 vmx_vmexit+0x0 ([kernel.kallsyms])
1537       CPU 3/KVM 13376/13384 [002]  7919.408803596:      branches:  ffffffffc0f6619a vmx_vcpu_run+0x26a ([kernel.kallsyms]) => ffffffffb2255c60 x86_virt_spec_ctrl+0x0 ([kernel.kallsyms])
1538       CPU 3/KVM 13376/13384 [002]  7919.408803801:      branches:  ffffffffc0f66445 vmx_vcpu_run+0x515 ([kernel.kallsyms]) => ffffffffb2290b30 native_write_msr+0x0 ([kernel.kallsyms])
1539       CPU 3/KVM 13376/13384 [002]  7919.408803850:      branches:  ffffffffc0f661f8 vmx_vcpu_run+0x2c8 ([kernel.kallsyms]) => ffffffffc1092300 kvm_load_host_xsave_state+0x0 ([kernel.kallsyms])
1540       CPU 3/KVM 13376/13384 [002]  7919.408803850:      branches:  ffffffffc1092327 kvm_load_host_xsave_state+0x27 ([kernel.kallsyms]) => ffffffffc1092220 kvm_load_host_xsave_state.part.0+0x0 ([kernel.kallsyms])
1541       CPU 3/KVM 13376/13384 [002]  7919.408803862:      branches:  ffffffffc0f662cf vmx_vcpu_run+0x39f ([kernel.kallsyms]) => ffffffffc0f63f90 vmx_recover_nmi_blocking+0x0 ([kernel.kallsyms])
1542       CPU 3/KVM 13376/13384 [002]  7919.408803862:      branches:  ffffffffc0f662e9 vmx_vcpu_run+0x3b9 ([kernel.kallsyms]) => ffffffffc0f619a0 __vmx_complete_interrupts+0x0 ([kernel.kallsyms])
1543       CPU 3/KVM 13376/13384 [002]  7919.408803872:      branches:  ffffffffc109cfb2 vcpu_enter_guest+0x752 ([kernel.kallsyms]) => ffffffffc0f5f570 vmx_handle_exit_irqoff+0x0 ([kernel.kallsyms])
1544       CPU 3/KVM 13376/13384 [002]  7919.408803881:      branches:  ffffffffc109d028 vcpu_enter_guest+0x7c8 ([kernel.kallsyms]) => ffffffffb234f900 __srcu_read_lock+0x0 ([kernel.kallsyms])
1545       CPU 3/KVM 13376/13384 [002]  7919.408803897:      branches:  ffffffffc109d06f vcpu_enter_guest+0x80f ([kernel.kallsyms]) => ffffffffc0f72e30 vmx_handle_exit+0x0 ([kernel.kallsyms])
1546       CPU 3/KVM 13376/13384 [002]  7919.408803897:      branches:  ffffffffc0f72e3d vmx_handle_exit+0xd ([kernel.kallsyms]) => ffffffffc0f727c0 __vmx_handle_exit+0x0 ([kernel.kallsyms])
1547       CPU 3/KVM 13376/13384 [002]  7919.408803897:      branches:  ffffffffc0f72b15 __vmx_handle_exit+0x355 ([kernel.kallsyms]) => ffffffffc0f60ae0 vmx_flush_pml_buffer+0x0 ([kernel.kallsyms])
1548       CPU 3/KVM 13376/13384 [002]  7919.408803903:      branches:  ffffffffc0f72994 __vmx_handle_exit+0x1d4 ([kernel.kallsyms]) => ffffffffc10b7090 kvm_emulate_cpuid+0x0 ([kernel.kallsyms])
1549       CPU 3/KVM 13376/13384 [002]  7919.408803903:      branches:  ffffffffc10b70f1 kvm_emulate_cpuid+0x61 ([kernel.kallsyms]) => ffffffffc10b6e10 kvm_cpuid+0x0 ([kernel.kallsyms])
1550       CPU 3/KVM 13376/13384 [002]  7919.408803941:      branches:  ffffffffc10b7125 kvm_emulate_cpuid+0x95 ([kernel.kallsyms]) => ffffffffc1093110 kvm_skip_emulated_instruction+0x0 ([kernel.kallsyms])
1551       CPU 3/KVM 13376/13384 [002]  7919.408803941:      branches:  ffffffffc109311f kvm_skip_emulated_instruction+0xf ([kernel.kallsyms]) => ffffffffc0f5e180 vmx_get_rflags+0x0 ([kernel.kallsyms])
1552       CPU 3/KVM 13376/13384 [002]  7919.408803951:      branches:  ffffffffc109312a kvm_skip_emulated_instruction+0x1a ([kernel.kallsyms]) => ffffffffc0f5fd30 vmx_skip_emulated_instruction+0x0 ([kernel.kallsyms])
1553       CPU 3/KVM 13376/13384 [002]  7919.408803951:      branches:  ffffffffc0f5fd79 vmx_skip_emulated_instruction+0x49 ([kernel.kallsyms]) => ffffffffc0f5fb50 skip_emulated_instruction+0x0 ([kernel.kallsyms])
1554       CPU 3/KVM 13376/13384 [002]  7919.408803956:      branches:  ffffffffc0f5fc68 skip_emulated_instruction+0x118 ([kernel.kallsyms]) => ffffffffc0f6a940 vmx_cache_reg+0x0 ([kernel.kallsyms])
1555       CPU 3/KVM 13376/13384 [002]  7919.408803964:      branches:  ffffffffc0f5fc11 skip_emulated_instruction+0xc1 ([kernel.kallsyms]) => ffffffffc0f5f9e0 vmx_set_interrupt_shadow+0x0 ([kernel.kallsyms])
1556       CPU 3/KVM 13376/13384 [002]  7919.408803980:      branches:  ffffffffc109f8b1 vcpu_run+0x71 ([kernel.kallsyms]) => ffffffffc10ad2f0 kvm_cpu_has_pending_timer+0x0 ([kernel.kallsyms])
1557       CPU 3/KVM 13376/13384 [002]  7919.408803980:      branches:  ffffffffc10ad2fb kvm_cpu_has_pending_timer+0xb ([kernel.kallsyms]) => ffffffffc10b0490 apic_has_pending_timer+0x0 ([kernel.kallsyms])
1558       CPU 3/KVM 13376/13384 [002]  7919.408803991:      branches:  ffffffffc109f899 vcpu_run+0x59 ([kernel.kallsyms]) => ffffffffc109c860 vcpu_enter_guest+0x0 ([kernel.kallsyms])
1559       CPU 3/KVM 13376/13384 [002]  7919.408803993:      branches:  ffffffffc109cd4c vcpu_enter_guest+0x4ec ([kernel.kallsyms]) => ffffffffc0f69140 vmx_prepare_switch_to_guest+0x0 ([kernel.kallsyms])
1560       CPU 3/KVM 13376/13384 [002]  7919.408803996:      branches:  ffffffffc109cd7d vcpu_enter_guest+0x51d ([kernel.kallsyms]) => ffffffffb234f930 __srcu_read_unlock+0x0 ([kernel.kallsyms])
1561       CPU 3/KVM 13376/13384 [002]  7919.408803996:      branches:  ffffffffc109cd9c vcpu_enter_guest+0x53c ([kernel.kallsyms]) => ffffffffc0f609b0 vmx_sync_pir_to_irr+0x0 ([kernel.kallsyms])
1562       CPU 3/KVM 13376/13384 [002]  7919.408803996:      branches:  ffffffffc0f60a6d vmx_sync_pir_to_irr+0xbd ([kernel.kallsyms]) => ffffffffc10adc20 kvm_lapic_find_highest_irr+0x0 ([kernel.kallsyms])
1563       CPU 3/KVM 13376/13384 [002]  7919.408804010:      branches:  ffffffffc0f60abd vmx_sync_pir_to_irr+0x10d ([kernel.kallsyms]) => ffffffffc0f60820 vmx_set_rvi+0x0 ([kernel.kallsyms])
1564       CPU 3/KVM 13376/13384 [002]  7919.408804019:      branches:  ffffffffc109ceca vcpu_enter_guest+0x66a ([kernel.kallsyms]) => ffffffffb2249840 fpregs_assert_state_consistent+0x0 ([kernel.kallsyms])
1565       CPU 3/KVM 13376/13384 [002]  7919.408804021:      branches:  ffffffffc109cf10 vcpu_enter_guest+0x6b0 ([kernel.kallsyms]) => ffffffffc0f65f30 vmx_vcpu_run+0x0 ([kernel.kallsyms])
1566       CPU 3/KVM 13376/13384 [002]  7919.408804024:      branches:  ffffffffc0f6603b vmx_vcpu_run+0x10b ([kernel.kallsyms]) => ffffffffb229bed0 __get_current_cr3_fast+0x0 ([kernel.kallsyms])
1567       CPU 3/KVM 13376/13384 [002]  7919.408804024:      branches:  ffffffffc0f66055 vmx_vcpu_run+0x125 ([kernel.kallsyms]) => ffffffffb2253050 cr4_read_shadow+0x0 ([kernel.kallsyms])
1568       CPU 3/KVM 13376/13384 [002]  7919.408804030:      branches:  ffffffffc0f6608d vmx_vcpu_run+0x15d ([kernel.kallsyms]) => ffffffffc10921e0 kvm_load_guest_xsave_state+0x0 ([kernel.kallsyms])
1569       CPU 3/KVM 13376/13384 [002]  7919.408804030:      branches:  ffffffffc1092207 kvm_load_guest_xsave_state+0x27 ([kernel.kallsyms]) => ffffffffc1092110 kvm_load_guest_xsave_state.part.0+0x0 ([kernel.kallsyms])
1570       CPU 3/KVM 13376/13384 [002]  7919.408804032:      branches:  ffffffffc0f660c6 vmx_vcpu_run+0x196 ([kernel.kallsyms]) => ffffffffb22061a0 perf_guest_get_msrs+0x0 ([kernel.kallsyms])
1571       CPU 3/KVM 13376/13384 [002]  7919.408804032:      branches:  ffffffffb22061a9 perf_guest_get_msrs+0x9 ([kernel.kallsyms]) => ffffffffb220cda0 intel_guest_get_msrs+0x0 ([kernel.kallsyms])
1572       CPU 3/KVM 13376/13384 [002]  7919.408804039:      branches:  ffffffffc0f66109 vmx_vcpu_run+0x1d9 ([kernel.kallsyms]) => ffffffffc0f652c0 clear_atomic_switch_msr+0x0 ([kernel.kallsyms])
1573       CPU 3/KVM 13376/13384 [002]  7919.408804040:      branches:  ffffffffc0f66119 vmx_vcpu_run+0x1e9 ([kernel.kallsyms]) => ffffffffc0f73f60 intel_pmu_lbr_is_enabled+0x0 ([kernel.kallsyms])
1574       CPU 3/KVM 13376/13384 [002]  7919.408804042:      branches:  ffffffffc0f73f81 intel_pmu_lbr_is_enabled+0x21 ([kernel.kallsyms]) => ffffffffc10b68e0 kvm_find_cpuid_entry+0x0 ([kernel.kallsyms])
1575       CPU 3/KVM 13376/13384 [002]  7919.408804045:      branches:  ffffffffc0f66454 vmx_vcpu_run+0x524 ([kernel.kallsyms]) => ffffffffc0f61ff0 vmx_update_hv_timer+0x0 ([kernel.kallsyms])
1576       CPU 3/KVM 13376/13384 [002]  7919.408804057:      branches:  ffffffffc0f66142 vmx_vcpu_run+0x212 ([kernel.kallsyms]) => ffffffffc10af100 kvm_wait_lapic_expire+0x0 ([kernel.kallsyms])
1577       CPU 3/KVM 13376/13384 [002]  7919.408804057:      branches:  ffffffffc0f66156 vmx_vcpu_run+0x226 ([kernel.kallsyms]) => ffffffffb2255c60 x86_virt_spec_ctrl+0x0 ([kernel.kallsyms])
1578       CPU 3/KVM 13376/13384 [002]  7919.408804057:      branches:  ffffffffc0f66161 vmx_vcpu_run+0x231 ([kernel.kallsyms]) => ffffffffc0f8eb20 vmx_vcpu_enter_exit+0x0 ([kernel.kallsyms])
1579       CPU 3/KVM 13376/13384 [002]  7919.408804057:      branches:  ffffffffc0f8eb44 vmx_vcpu_enter_exit+0x24 ([kernel.kallsyms]) => ffffffffb2353e10 rcu_note_context_switch+0x0 ([kernel.kallsyms])
1580       CPU 3/KVM 13376/13384 [002]  7919.408804057:      branches:  ffffffffb2353e1c rcu_note_context_switch+0xc ([kernel.kallsyms]) => ffffffffb2353db0 rcu_qs+0x0 ([kernel.kallsyms])
1581       CPU 3/KVM 13376/13384 [002]  7919.408804066:      branches:  ffffffffc0f8ebe0 vmx_vcpu_enter_exit+0xc0 ([kernel.kallsyms]) => ffffffffc0f8edc0 __vmx_vcpu_run+0x0 ([kernel.kallsyms])
1582       CPU 3/KVM 13376/13384 [002]  7919.408804066:      branches:  ffffffffc0f8edd5 __vmx_vcpu_run+0x15 ([kernel.kallsyms]) => ffffffffc0f8eca0 vmx_update_host_rsp+0x0 ([kernel.kallsyms])
1583       CPU 3/KVM 13376/13384 [002]  7919.408804066:      branches:  ffffffffc0f8ee1b __vmx_vcpu_run+0x5b ([kernel.kallsyms]) => ffffffffc0f8ed60 vmx_vmenter+0x0 ([kernel.kallsyms])
1584       CPU 3/KVM 13376/13384 [002]  7919.408804162:      branches:  ffffffffc0f8ed62 vmx_vmenter+0x2 ([kernel.kallsyms]) =>                0 [unknown] ([unknown])
1585 VM:13376 VCPU:003            uname  3404/3404  [002]  7919.408804162:      branches:                 0 [unknown] ([unknown]) =>     7f851c9b5a5c init_cacheinfo+0x3ac (/usr/lib/x86_64-linux-gnu/libc-2.31.so)
1586 VM:13376 VCPU:003            uname  3404/3404  [002]  7919.408804273:      branches:      7f851cb7c0e4 _dl_init+0x74 (/usr/lib/x86_64-linux-gnu/ld-2.31.so) =>     7f851cb7bf50 call_init.part.0+0x0 (/usr/lib/x86_64-linux-gnu/ld-2.31.so)
1587 VM:13376 VCPU:003            uname  3404/3404  [002]  7919.408804526:      branches:      55e0c00136f0 _start+0x0 (/usr/bin/uname) => ffffffff83200ac0 asm_exc_page_fault+0x0 ([kernel.kallsyms])
1588 VM:13376 VCPU:003            uname  3404/3404  [002]  7919.408804526:      branches:  ffffffff83200ac3 asm_exc_page_fault+0x3 ([kernel.kallsyms]) => ffffffff83201290 error_entry+0x0 ([kernel.kallsyms])
1589 VM:13376 VCPU:003            uname  3404/3404  [002]  7919.408804534:      branches:  ffffffff832012fa error_entry+0x6a ([kernel.kallsyms]) => ffffffff830b59a0 sync_regs+0x0 ([kernel.kallsyms])
1590 VM:13376 VCPU:003            uname  3404/3404  [002]  7919.408804631:      branches:  ffffffff83200ad9 asm_exc_page_fault+0x19 ([kernel.kallsyms]) => ffffffff830b8210 exc_page_fault+0x0 ([kernel.kallsyms])
1591 VM:13376 VCPU:003            uname  3404/3404  [002]  7919.408804631:      branches:  ffffffff830b82a4 exc_page_fault+0x94 ([kernel.kallsyms]) => ffffffff830b80e0 __kvm_handle_async_pf+0x0 ([kernel.kallsyms])
1592 VM:13376 VCPU:003            uname  3404/3404  [002]  7919.408804631:      branches:  ffffffff830b80ed __kvm_handle_async_pf+0xd ([kernel.kallsyms]) => ffffffff830b80c0 kvm_read_and_reset_apf_flags+0x0 ([kernel.kallsyms])
1593
1594
1595Tracing Virtual Machines - Guest Code
1596-------------------------------------
1597
1598A common case for KVM test programs is that the test program acts as the
1599hypervisor, creating, running and destroying the virtual machine, and
1600providing the guest object code from its own object code. In this case,
1601the VM is not running an OS, but only the functions loaded into it by the
1602hypervisor test program, and conveniently, loaded at the same virtual
1603addresses. To support that, option "--guest-code" has been added to perf script
1604and perf kvm report.
1605
1606Here is an example tracing a test program from the kernel's KVM selftests:
1607
1608 # perf record --kcore -e intel_pt/cyc/ -- tools/testing/selftests/kselftest_install/kvm/tsc_msrs_test
1609 [ perf record: Woken up 1 times to write data ]
1610 [ perf record: Captured and wrote 0.280 MB perf.data ]
1611 # perf script --guest-code --itrace=bep --ns -F-period,+addr,+flags
1612 [SNIP]
1613   tsc_msrs_test 18436 [007] 10897.962087733:      branches:   call                   ffffffffc13b2ff5 __vmx_vcpu_run+0x15 (vmlinux) => ffffffffc13b2f50 vmx_update_host_rsp+0x0 (vmlinux)
1614   tsc_msrs_test 18436 [007] 10897.962087733:      branches:   return                 ffffffffc13b2f5d vmx_update_host_rsp+0xd (vmlinux) => ffffffffc13b2ffa __vmx_vcpu_run+0x1a (vmlinux)
1615   tsc_msrs_test 18436 [007] 10897.962087733:      branches:   call                   ffffffffc13b303b __vmx_vcpu_run+0x5b (vmlinux) => ffffffffc13b2f80 vmx_vmenter+0x0 (vmlinux)
1616   tsc_msrs_test 18436 [007] 10897.962087836:      branches:   vmentry                ffffffffc13b2f82 vmx_vmenter+0x2 (vmlinux) =>                0 [unknown] ([unknown])
1617   [guest/18436] 18436 [007] 10897.962087836:      branches:   vmentry                               0 [unknown] ([unknown]) =>           402c81 guest_code+0x131 (/home/user/git/work/tools/testing/selftests/kselftest_install/kvm/tsc_msrs_test)
1618   [guest/18436] 18436 [007] 10897.962087836:      branches:   call                             402c81 guest_code+0x131 (/home/user/git/work/tools/testing/selftests/kselftest_install/kvm/tsc_msrs_test) =>           40dba0 ucall+0x0 (/home/user/git/work/tools/testing/selftests/kselftest_install/kvm/tsc_msrs_test)
1619   [guest/18436] 18436 [007] 10897.962088248:      branches:   vmexit                           40dba0 ucall+0x0 (/home/user/git/work/tools/testing/selftests/kselftest_install/kvm/tsc_msrs_test) =>                0 [unknown] ([unknown])
1620   tsc_msrs_test 18436 [007] 10897.962088248:      branches:   vmexit                                0 [unknown] ([unknown]) => ffffffffc13b2fa0 vmx_vmexit+0x0 (vmlinux)
1621   tsc_msrs_test 18436 [007] 10897.962088248:      branches:   jmp                    ffffffffc13b2fa0 vmx_vmexit+0x0 (vmlinux) => ffffffffc13b2fd2 vmx_vmexit+0x32 (vmlinux)
1622   tsc_msrs_test 18436 [007] 10897.962088256:      branches:   return                 ffffffffc13b2fd2 vmx_vmexit+0x32 (vmlinux) => ffffffffc13b3040 __vmx_vcpu_run+0x60 (vmlinux)
1623   tsc_msrs_test 18436 [007] 10897.962088270:      branches:   return                 ffffffffc13b30b6 __vmx_vcpu_run+0xd6 (vmlinux) => ffffffffc13b2f2e vmx_vcpu_enter_exit+0x4e (vmlinux)
1624 [SNIP]
1625   tsc_msrs_test 18436 [007] 10897.962089321:      branches:   call                   ffffffffc13b2ff5 __vmx_vcpu_run+0x15 (vmlinux) => ffffffffc13b2f50 vmx_update_host_rsp+0x0 (vmlinux)
1626   tsc_msrs_test 18436 [007] 10897.962089321:      branches:   return                 ffffffffc13b2f5d vmx_update_host_rsp+0xd (vmlinux) => ffffffffc13b2ffa __vmx_vcpu_run+0x1a (vmlinux)
1627   tsc_msrs_test 18436 [007] 10897.962089321:      branches:   call                   ffffffffc13b303b __vmx_vcpu_run+0x5b (vmlinux) => ffffffffc13b2f80 vmx_vmenter+0x0 (vmlinux)
1628   tsc_msrs_test 18436 [007] 10897.962089424:      branches:   vmentry                ffffffffc13b2f82 vmx_vmenter+0x2 (vmlinux) =>                0 [unknown] ([unknown])
1629   [guest/18436] 18436 [007] 10897.962089424:      branches:   vmentry                               0 [unknown] ([unknown]) =>           40dba0 ucall+0x0 (/home/user/git/work/tools/testing/selftests/kselftest_install/kvm/tsc_msrs_test)
1630   [guest/18436] 18436 [007] 10897.962089701:      branches:   jmp                              40dc1b ucall+0x7b (/home/user/git/work/tools/testing/selftests/kselftest_install/kvm/tsc_msrs_test) =>           40dc39 ucall+0x99 (/home/user/git/work/tools/testing/selftests/kselftest_install/kvm/tsc_msrs_test)
1631   [guest/18436] 18436 [007] 10897.962089701:      branches:   jcc                              40dc3c ucall+0x9c (/home/user/git/work/tools/testing/selftests/kselftest_install/kvm/tsc_msrs_test) =>           40dc20 ucall+0x80 (/home/user/git/work/tools/testing/selftests/kselftest_install/kvm/tsc_msrs_test)
1632   [guest/18436] 18436 [007] 10897.962089701:      branches:   jcc                              40dc3c ucall+0x9c (/home/user/git/work/tools/testing/selftests/kselftest_install/kvm/tsc_msrs_test) =>           40dc20 ucall+0x80 (/home/user/git/work/tools/testing/selftests/kselftest_install/kvm/tsc_msrs_test)
1633   [guest/18436] 18436 [007] 10897.962089701:      branches:   jcc                              40dc37 ucall+0x97 (/home/user/git/work/tools/testing/selftests/kselftest_install/kvm/tsc_msrs_test) =>           40dc50 ucall+0xb0 (/home/user/git/work/tools/testing/selftests/kselftest_install/kvm/tsc_msrs_test)
1634   [guest/18436] 18436 [007] 10897.962089878:      branches:   vmexit                           40dc55 ucall+0xb5 (/home/user/git/work/tools/testing/selftests/kselftest_install/kvm/tsc_msrs_test) =>                0 [unknown] ([unknown])
1635   tsc_msrs_test 18436 [007] 10897.962089878:      branches:   vmexit                                0 [unknown] ([unknown]) => ffffffffc13b2fa0 vmx_vmexit+0x0 (vmlinux)
1636   tsc_msrs_test 18436 [007] 10897.962089878:      branches:   jmp                    ffffffffc13b2fa0 vmx_vmexit+0x0 (vmlinux) => ffffffffc13b2fd2 vmx_vmexit+0x32 (vmlinux)
1637   tsc_msrs_test 18436 [007] 10897.962089887:      branches:   return                 ffffffffc13b2fd2 vmx_vmexit+0x32 (vmlinux) => ffffffffc13b3040 __vmx_vcpu_run+0x60 (vmlinux)
1638   tsc_msrs_test 18436 [007] 10897.962089901:      branches:   return                 ffffffffc13b30b6 __vmx_vcpu_run+0xd6 (vmlinux) => ffffffffc13b2f2e vmx_vcpu_enter_exit+0x4e (vmlinux)
1639 [SNIP]
1640
1641 # perf kvm --guest-code --guest --host report -i perf.data --stdio | head -20
1642
1643 # To display the perf.data header info, please use --header/--header-only options.
1644 #
1645 #
1646 # Total Lost Samples: 0
1647 #
1648 # Samples: 12  of event 'instructions'
1649 # Event count (approx.): 2274583
1650 #
1651 # Children      Self  Command        Shared Object         Symbol
1652 # ........  ........  .............  ....................  ...........................................
1653 #
1654    54.70%     0.00%  tsc_msrs_test  [kernel.vmlinux]      [k] entry_SYSCALL_64_after_hwframe
1655            |
1656            ---entry_SYSCALL_64_after_hwframe
1657               do_syscall_64
1658               |
1659               |--29.44%--syscall_exit_to_user_mode
1660               |          exit_to_user_mode_prepare
1661               |          task_work_run
1662               |          __fput
1663
1664
1665Event Trace
1666-----------
1667
1668Event Trace records information about asynchronous events, for example interrupts,
1669faults, VM exits and entries.  The information is recorded in CFE and EVD packets,
1670and also the Interrupt Flag is recorded on the MODE.Exec packet.  The CFE packet
1671contains a type field to identify one of the following:
1672
1673	 1	INTR		interrupt, fault, exception, NMI
1674	 2	IRET		interrupt return
1675	 3	SMI		system management interrupt
1676	 4	RSM		resume from system management mode
1677	 5	SIPI		startup interprocessor interrupt
1678	 6	INIT		INIT signal
1679	 7	VMENTRY		VM-Entry
1680	 8	VMEXIT		VM-Entry
1681	 9	VMEXIT_INTR	VM-Exit due to interrupt
1682	10	SHUTDOWN	Shutdown
1683
1684For more details, refer to the Intel 64 and IA-32 Architectures Software
1685Developer Manuals (version 076 or later).
1686
1687The capability to do Event Trace is indicated by the
1688/sys/bus/event_source/devices/intel_pt/caps/event_trace file.
1689
1690Event trace is selected for recording using the "event" config term. e.g.
1691
1692	perf record -e intel_pt/event/u uname
1693
1694Event trace events are output using the --itrace I option. e.g.
1695
1696	perf script --itrace=Ie
1697
1698perf script displays events containing CFE type, vector and event data,
1699in the form:
1700
1701	  evt:   hw int            (t)  cfe: INTR IP: 1 vector: 3 PFA: 0x8877665544332211
1702
1703The IP flag indicates if the event binds to an IP, which includes any case where
1704flow control packet generation is enabled, as well as when CFE packet IP bit is
1705set.
1706
1707perf script displays events containing changes to the Interrupt Flag in the form:
1708
1709	iflag:   t                      IFLAG: 1->0 via branch
1710
1711where "via branch" indicates a branch (interrupt or return from interrupt) and
1712"non branch" indicates an instruction such as CFI, STI or POPF).
1713
1714In addition, the current state of the interrupt flag is indicated by the presence
1715or absence of the "D" (interrupt disabled) perf script flag.  If the interrupt
1716flag is changed, then the "t" flag is also included i.e.
1717
1718		no flag, interrupts enabled IF=1
1719	t	interrupts become disabled IF=1 -> IF=0
1720	D	interrupts are disabled IF=0
1721	Dt	interrupts become enabled  IF=0 -> IF=1
1722
1723The intel-pt-events.py script illustrates how to access Event Trace information
1724using a Python script.
1725
1726
1727TNT Disable
1728-----------
1729
1730TNT packets are disabled using the "notnt" config term. e.g.
1731
1732	perf record -e intel_pt/notnt/u uname
1733
1734In that case the --itrace q option is forced because walking executable code
1735to reconstruct the control flow is not possible.
1736
1737
1738Emulated PTWRITE
1739----------------
1740
1741Later perf tools support a method to emulate the ptwrite instruction, which
1742can be useful if hardware does not support the ptwrite instruction.
1743
1744Instead of using the ptwrite instruction, a function is used which produces
1745a trace that encodes the payload data into TNT packets.  Here is an example
1746of the function:
1747
1748 #include <stdint.h>
1749
1750 void perf_emulate_ptwrite(uint64_t x)
1751 __attribute__((externally_visible, noipa, no_instrument_function, naked));
1752
1753 #define PERF_EMULATE_PTWRITE_8_BITS \
1754                 "1: shl %rax\n"     \
1755                 "   jc 1f\n"        \
1756                 "1: shl %rax\n"     \
1757                 "   jc 1f\n"        \
1758                 "1: shl %rax\n"     \
1759                 "   jc 1f\n"        \
1760                 "1: shl %rax\n"     \
1761                 "   jc 1f\n"        \
1762                 "1: shl %rax\n"     \
1763                 "   jc 1f\n"        \
1764                 "1: shl %rax\n"     \
1765                 "   jc 1f\n"        \
1766                 "1: shl %rax\n"     \
1767                 "   jc 1f\n"        \
1768                 "1: shl %rax\n"     \
1769                 "   jc 1f\n"
1770
1771 /* Undefined instruction */
1772 #define PERF_EMULATE_PTWRITE_UD2        ".byte 0x0f, 0x0b\n"
1773
1774 #define PERF_EMULATE_PTWRITE_MAGIC        PERF_EMULATE_PTWRITE_UD2 ".ascii \"perf,ptwrite  \"\n"
1775
1776 void perf_emulate_ptwrite(uint64_t x __attribute__ ((__unused__)))
1777 {
1778          /* Assumes SysV ABI : x passed in rdi */
1779         __asm__ volatile (
1780                 "jmp 1f\n"
1781                 PERF_EMULATE_PTWRITE_MAGIC
1782                 "1: mov %rdi, %rax\n"
1783                 PERF_EMULATE_PTWRITE_8_BITS
1784                 PERF_EMULATE_PTWRITE_8_BITS
1785                 PERF_EMULATE_PTWRITE_8_BITS
1786                 PERF_EMULATE_PTWRITE_8_BITS
1787                 PERF_EMULATE_PTWRITE_8_BITS
1788                 PERF_EMULATE_PTWRITE_8_BITS
1789                 PERF_EMULATE_PTWRITE_8_BITS
1790                 PERF_EMULATE_PTWRITE_8_BITS
1791                 "1: ret\n"
1792         );
1793 }
1794
1795For example, a test program with the function above:
1796
1797 #include <stdio.h>
1798 #include <stdint.h>
1799 #include <stdlib.h>
1800
1801 #include "perf_emulate_ptwrite.h"
1802
1803 int main(int argc, char *argv[])
1804 {
1805         uint64_t x = 0;
1806
1807         if (argc > 1)
1808                 x = strtoull(argv[1], NULL, 0);
1809         perf_emulate_ptwrite(x);
1810         return 0;
1811 }
1812
1813Can be compiled and traced:
1814
1815 $ gcc -Wall -Wextra -O3 -g -o eg_ptw eg_ptw.c
1816 $ perf record -e intel_pt//u ./eg_ptw 0x1234567890abcdef
1817 [ perf record: Woken up 1 times to write data ]
1818 [ perf record: Captured and wrote 0.017 MB perf.data ]
1819 $ perf script --itrace=ew
1820           eg_ptw 19875 [007]  8061.235912:     ptwrite:  IP: 0 payload: 0x1234567890abcdef      55701249a196 perf_emulate_ptwrite+0x16 (/home/user/eg_ptw)
1821 $
1822
1823
1824EXAMPLE
1825-------
1826
1827Examples can be found on perf wiki page "Perf tools support for Intel® Processor Trace":
1828
1829https://perf.wiki.kernel.org/index.php/Perf_tools_support_for_Intel%C2%AE_Processor_Trace
1830
1831
1832SEE ALSO
1833--------
1834
1835linkperf:perf-record[1], linkperf:perf-script[1], linkperf:perf-report[1],
1836linkperf:perf-inject[1]