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v6.2
  1// SPDX-License-Identifier: GPL-2.0+
  2/*
  3 *
  4 *  Copyright (C) 2008 Christian Pellegrin <chripell@evolware.org>
  5 *
 
 
 
 
 
 
  6 * Notes: the MAX3100 doesn't provide an interrupt on CTS so we have
  7 * to use polling for flow control. TX empty IRQ is unusable, since
  8 * writing conf clears FIFO buffer and we cannot have this interrupt
  9 * always asking us for attention.
 10 *
 11 * Example platform data:
 12
 13 static struct plat_max3100 max3100_plat_data = {
 14 .loopback = 0,
 15 .crystal = 0,
 16 .poll_time = 100,
 17 };
 18
 19 static struct spi_board_info spi_board_info[] = {
 20 {
 21 .modalias	= "max3100",
 22 .platform_data	= &max3100_plat_data,
 23 .irq		= IRQ_EINT12,
 24 .max_speed_hz	= 5*1000*1000,
 25 .chip_select	= 0,
 26 },
 27 };
 28
 29 * The initial minor number is 209 in the low-density serial port:
 30 * mknod /dev/ttyMAX0 c 204 209
 31 */
 32
 33#define MAX3100_MAJOR 204
 34#define MAX3100_MINOR 209
 35/* 4 MAX3100s should be enough for everyone */
 36#define MAX_MAX3100 4
 37
 38#include <linux/delay.h>
 39#include <linux/slab.h>
 40#include <linux/device.h>
 41#include <linux/module.h>
 42#include <linux/serial_core.h>
 43#include <linux/serial.h>
 44#include <linux/spi/spi.h>
 45#include <linux/freezer.h>
 46#include <linux/tty.h>
 47#include <linux/tty_flip.h>
 48
 49#include <linux/serial_max3100.h>
 50
 51#define MAX3100_C    (1<<14)
 52#define MAX3100_D    (0<<14)
 53#define MAX3100_W    (1<<15)
 54#define MAX3100_RX   (0<<15)
 55
 56#define MAX3100_WC   (MAX3100_W  | MAX3100_C)
 57#define MAX3100_RC   (MAX3100_RX | MAX3100_C)
 58#define MAX3100_WD   (MAX3100_W  | MAX3100_D)
 59#define MAX3100_RD   (MAX3100_RX | MAX3100_D)
 60#define MAX3100_CMD  (3 << 14)
 61
 62#define MAX3100_T    (1<<14)
 63#define MAX3100_R    (1<<15)
 64
 65#define MAX3100_FEN  (1<<13)
 66#define MAX3100_SHDN (1<<12)
 67#define MAX3100_TM   (1<<11)
 68#define MAX3100_RM   (1<<10)
 69#define MAX3100_PM   (1<<9)
 70#define MAX3100_RAM  (1<<8)
 71#define MAX3100_IR   (1<<7)
 72#define MAX3100_ST   (1<<6)
 73#define MAX3100_PE   (1<<5)
 74#define MAX3100_L    (1<<4)
 75#define MAX3100_BAUD (0xf)
 76
 77#define MAX3100_TE   (1<<10)
 78#define MAX3100_RAFE (1<<10)
 79#define MAX3100_RTS  (1<<9)
 80#define MAX3100_CTS  (1<<9)
 81#define MAX3100_PT   (1<<8)
 82#define MAX3100_DATA (0xff)
 83
 84#define MAX3100_RT   (MAX3100_R | MAX3100_T)
 85#define MAX3100_RTC  (MAX3100_RT | MAX3100_CTS | MAX3100_RAFE)
 86
 87/* the following simulate a status reg for ignore_status_mask */
 88#define MAX3100_STATUS_PE 1
 89#define MAX3100_STATUS_FE 2
 90#define MAX3100_STATUS_OE 4
 91
 92struct max3100_port {
 93	struct uart_port port;
 94	struct spi_device *spi;
 95
 96	int cts;	        /* last CTS received for flow ctrl */
 97	int tx_empty;		/* last TX empty bit */
 98
 99	spinlock_t conf_lock;	/* shared data */
100	int conf_commit;	/* need to make changes */
101	int conf;		/* configuration for the MAX31000
102				 * (bits 0-7, bits 8-11 are irqs) */
103	int rts_commit;	        /* need to change rts */
104	int rts;		/* rts status */
105	int baud;		/* current baud rate */
106
107	int parity;		/* keeps track if we should send parity */
108#define MAX3100_PARITY_ON 1
109#define MAX3100_PARITY_ODD 2
110#define MAX3100_7BIT 4
111	int rx_enabled;	        /* if we should rx chars */
112
113	int irq;		/* irq assigned to the max3100 */
114
115	int minor;		/* minor number */
116	int crystal;		/* 1 if 3.6864Mhz crystal 0 for 1.8432 */
117	int loopback;		/* 1 if we are in loopback mode */
118
119	/* for handling irqs: need workqueue since we do spi_sync */
120	struct workqueue_struct *workqueue;
121	struct work_struct work;
122	/* set to 1 to make the workhandler exit as soon as possible */
123	int  force_end_work;
124	/* need to know we are suspending to avoid deadlock on workqueue */
125	int suspending;
126
127	/* hook for suspending MAX3100 via dedicated pin */
128	void (*max3100_hw_suspend) (int suspend);
129
130	/* poll time (in ms) for ctrl lines */
131	int poll_time;
132	/* and its timer */
133	struct timer_list	timer;
134};
135
136static struct max3100_port *max3100s[MAX_MAX3100]; /* the chips */
137static DEFINE_MUTEX(max3100s_lock);		   /* race on probe */
138
139static int max3100_do_parity(struct max3100_port *s, u16 c)
140{
141	int parity;
142
143	if (s->parity & MAX3100_PARITY_ODD)
144		parity = 1;
145	else
146		parity = 0;
147
148	if (s->parity & MAX3100_7BIT)
149		c &= 0x7f;
150	else
151		c &= 0xff;
152
153	parity = parity ^ (hweight8(c) & 1);
154	return parity;
155}
156
157static int max3100_check_parity(struct max3100_port *s, u16 c)
158{
159	return max3100_do_parity(s, c) == ((c >> 8) & 1);
160}
161
162static void max3100_calc_parity(struct max3100_port *s, u16 *c)
163{
164	if (s->parity & MAX3100_7BIT)
165		*c &= 0x7f;
166	else
167		*c &= 0xff;
168
169	if (s->parity & MAX3100_PARITY_ON)
170		*c |= max3100_do_parity(s, *c) << 8;
171}
172
173static void max3100_work(struct work_struct *w);
174
175static void max3100_dowork(struct max3100_port *s)
176{
177	if (!s->force_end_work && !freezing(current) && !s->suspending)
178		queue_work(s->workqueue, &s->work);
179}
180
181static void max3100_timeout(struct timer_list *t)
182{
183	struct max3100_port *s = from_timer(s, t, timer);
184
185	if (s->port.state) {
186		max3100_dowork(s);
187		mod_timer(&s->timer, jiffies + s->poll_time);
188	}
189}
190
191static int max3100_sr(struct max3100_port *s, u16 tx, u16 *rx)
192{
193	struct spi_message message;
194	u16 etx, erx;
195	int status;
196	struct spi_transfer tran = {
197		.tx_buf = &etx,
198		.rx_buf = &erx,
199		.len = 2,
200	};
201
202	etx = cpu_to_be16(tx);
203	spi_message_init(&message);
204	spi_message_add_tail(&tran, &message);
205	status = spi_sync(s->spi, &message);
206	if (status) {
207		dev_warn(&s->spi->dev, "error while calling spi_sync\n");
208		return -EIO;
209	}
210	*rx = be16_to_cpu(erx);
211	s->tx_empty = (*rx & MAX3100_T) > 0;
212	dev_dbg(&s->spi->dev, "%04x - %04x\n", tx, *rx);
213	return 0;
214}
215
216static int max3100_handlerx(struct max3100_port *s, u16 rx)
217{
218	unsigned int ch, flg, status = 0;
219	int ret = 0, cts;
220
221	if (rx & MAX3100_R && s->rx_enabled) {
222		dev_dbg(&s->spi->dev, "%s\n", __func__);
223		ch = rx & (s->parity & MAX3100_7BIT ? 0x7f : 0xff);
224		if (rx & MAX3100_RAFE) {
225			s->port.icount.frame++;
226			flg = TTY_FRAME;
227			status |= MAX3100_STATUS_FE;
228		} else {
229			if (s->parity & MAX3100_PARITY_ON) {
230				if (max3100_check_parity(s, rx)) {
231					s->port.icount.rx++;
232					flg = TTY_NORMAL;
233				} else {
234					s->port.icount.parity++;
235					flg = TTY_PARITY;
236					status |= MAX3100_STATUS_PE;
237				}
238			} else {
239				s->port.icount.rx++;
240				flg = TTY_NORMAL;
241			}
242		}
243		uart_insert_char(&s->port, status, MAX3100_STATUS_OE, ch, flg);
244		ret = 1;
245	}
246
247	cts = (rx & MAX3100_CTS) > 0;
248	if (s->cts != cts) {
249		s->cts = cts;
250		uart_handle_cts_change(&s->port, cts ? TIOCM_CTS : 0);
251	}
252
253	return ret;
254}
255
256static void max3100_work(struct work_struct *w)
257{
258	struct max3100_port *s = container_of(w, struct max3100_port, work);
259	int rxchars;
260	u16 tx, rx;
261	int conf, cconf, crts;
262	struct circ_buf *xmit = &s->port.state->xmit;
263
264	dev_dbg(&s->spi->dev, "%s\n", __func__);
265
266	rxchars = 0;
267	do {
268		spin_lock(&s->conf_lock);
269		conf = s->conf;
270		cconf = s->conf_commit;
271		s->conf_commit = 0;
 
272		crts = s->rts_commit;
273		s->rts_commit = 0;
274		spin_unlock(&s->conf_lock);
275		if (cconf)
276			max3100_sr(s, MAX3100_WC | conf, &rx);
277		if (crts) {
278			max3100_sr(s, MAX3100_WD | MAX3100_TE |
279				   (s->rts ? MAX3100_RTS : 0), &rx);
280			rxchars += max3100_handlerx(s, rx);
281		}
282
283		max3100_sr(s, MAX3100_RD, &rx);
284		rxchars += max3100_handlerx(s, rx);
285
286		if (rx & MAX3100_T) {
287			tx = 0xffff;
288			if (s->port.x_char) {
289				tx = s->port.x_char;
290				s->port.icount.tx++;
291				s->port.x_char = 0;
292			} else if (!uart_circ_empty(xmit) &&
293				   !uart_tx_stopped(&s->port)) {
294				tx = xmit->buf[xmit->tail];
295				uart_xmit_advance(&s->port, 1);
 
 
296			}
297			if (tx != 0xffff) {
298				max3100_calc_parity(s, &tx);
299				tx |= MAX3100_WD | (s->rts ? MAX3100_RTS : 0);
300				max3100_sr(s, tx, &rx);
301				rxchars += max3100_handlerx(s, rx);
302			}
303		}
304
305		if (rxchars > 16) {
306			tty_flip_buffer_push(&s->port.state->port);
307			rxchars = 0;
308		}
309		if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
310			uart_write_wakeup(&s->port);
311
312	} while (!s->force_end_work &&
313		 !freezing(current) &&
314		 ((rx & MAX3100_R) ||
315		  (!uart_circ_empty(xmit) &&
316		   !uart_tx_stopped(&s->port))));
317
318	if (rxchars > 0)
319		tty_flip_buffer_push(&s->port.state->port);
320}
321
322static irqreturn_t max3100_irq(int irqno, void *dev_id)
323{
324	struct max3100_port *s = dev_id;
325
326	dev_dbg(&s->spi->dev, "%s\n", __func__);
327
328	max3100_dowork(s);
329	return IRQ_HANDLED;
330}
331
332static void max3100_enable_ms(struct uart_port *port)
333{
334	struct max3100_port *s = container_of(port,
335					      struct max3100_port,
336					      port);
337
338	if (s->poll_time > 0)
339		mod_timer(&s->timer, jiffies);
340	dev_dbg(&s->spi->dev, "%s\n", __func__);
341}
342
343static void max3100_start_tx(struct uart_port *port)
344{
345	struct max3100_port *s = container_of(port,
346					      struct max3100_port,
347					      port);
348
349	dev_dbg(&s->spi->dev, "%s\n", __func__);
350
351	max3100_dowork(s);
352}
353
354static void max3100_stop_rx(struct uart_port *port)
355{
356	struct max3100_port *s = container_of(port,
357					      struct max3100_port,
358					      port);
359
360	dev_dbg(&s->spi->dev, "%s\n", __func__);
361
362	s->rx_enabled = 0;
363	spin_lock(&s->conf_lock);
364	s->conf &= ~MAX3100_RM;
365	s->conf_commit = 1;
366	spin_unlock(&s->conf_lock);
367	max3100_dowork(s);
368}
369
370static unsigned int max3100_tx_empty(struct uart_port *port)
371{
372	struct max3100_port *s = container_of(port,
373					      struct max3100_port,
374					      port);
375
376	dev_dbg(&s->spi->dev, "%s\n", __func__);
377
378	/* may not be truly up-to-date */
379	max3100_dowork(s);
380	return s->tx_empty;
381}
382
383static unsigned int max3100_get_mctrl(struct uart_port *port)
384{
385	struct max3100_port *s = container_of(port,
386					      struct max3100_port,
387					      port);
388
389	dev_dbg(&s->spi->dev, "%s\n", __func__);
390
391	/* may not be truly up-to-date */
392	max3100_dowork(s);
393	/* always assert DCD and DSR since these lines are not wired */
394	return (s->cts ? TIOCM_CTS : 0) | TIOCM_DSR | TIOCM_CAR;
395}
396
397static void max3100_set_mctrl(struct uart_port *port, unsigned int mctrl)
398{
399	struct max3100_port *s = container_of(port,
400					      struct max3100_port,
401					      port);
402	int rts;
403
404	dev_dbg(&s->spi->dev, "%s\n", __func__);
405
406	rts = (mctrl & TIOCM_RTS) > 0;
407
408	spin_lock(&s->conf_lock);
409	if (s->rts != rts) {
410		s->rts = rts;
411		s->rts_commit = 1;
412		max3100_dowork(s);
413	}
414	spin_unlock(&s->conf_lock);
415}
416
417static void
418max3100_set_termios(struct uart_port *port, struct ktermios *termios,
419		    const struct ktermios *old)
420{
421	struct max3100_port *s = container_of(port,
422					      struct max3100_port,
423					      port);
424	int baud = 0;
425	unsigned cflag;
426	u32 param_new, param_mask, parity = 0;
427
428	dev_dbg(&s->spi->dev, "%s\n", __func__);
429
430	cflag = termios->c_cflag;
 
431	param_mask = 0;
432
433	baud = tty_termios_baud_rate(termios);
434	param_new = s->conf & MAX3100_BAUD;
435	switch (baud) {
436	case 300:
437		if (s->crystal)
438			baud = s->baud;
439		else
440			param_new = 15;
441		break;
442	case 600:
443		param_new = 14 + s->crystal;
444		break;
445	case 1200:
446		param_new = 13 + s->crystal;
447		break;
448	case 2400:
449		param_new = 12 + s->crystal;
450		break;
451	case 4800:
452		param_new = 11 + s->crystal;
453		break;
454	case 9600:
455		param_new = 10 + s->crystal;
456		break;
457	case 19200:
458		param_new = 9 + s->crystal;
459		break;
460	case 38400:
461		param_new = 8 + s->crystal;
462		break;
463	case 57600:
464		param_new = 1 + s->crystal;
465		break;
466	case 115200:
467		param_new = 0 + s->crystal;
468		break;
469	case 230400:
470		if (s->crystal)
471			param_new = 0;
472		else
473			baud = s->baud;
474		break;
475	default:
476		baud = s->baud;
477	}
478	tty_termios_encode_baud_rate(termios, baud, baud);
479	s->baud = baud;
480	param_mask |= MAX3100_BAUD;
481
482	if ((cflag & CSIZE) == CS8) {
483		param_new &= ~MAX3100_L;
484		parity &= ~MAX3100_7BIT;
485	} else {
486		param_new |= MAX3100_L;
487		parity |= MAX3100_7BIT;
488		cflag = (cflag & ~CSIZE) | CS7;
489	}
490	param_mask |= MAX3100_L;
491
492	if (cflag & CSTOPB)
493		param_new |= MAX3100_ST;
494	else
495		param_new &= ~MAX3100_ST;
496	param_mask |= MAX3100_ST;
497
498	if (cflag & PARENB) {
499		param_new |= MAX3100_PE;
500		parity |= MAX3100_PARITY_ON;
501	} else {
502		param_new &= ~MAX3100_PE;
503		parity &= ~MAX3100_PARITY_ON;
504	}
505	param_mask |= MAX3100_PE;
506
507	if (cflag & PARODD)
508		parity |= MAX3100_PARITY_ODD;
509	else
510		parity &= ~MAX3100_PARITY_ODD;
511
512	/* mask termios capabilities we don't support */
513	cflag &= ~CMSPAR;
514	termios->c_cflag = cflag;
515
516	s->port.ignore_status_mask = 0;
517	if (termios->c_iflag & IGNPAR)
518		s->port.ignore_status_mask |=
519			MAX3100_STATUS_PE | MAX3100_STATUS_FE |
520			MAX3100_STATUS_OE;
521
 
 
 
522	if (s->poll_time > 0)
523		del_timer_sync(&s->timer);
524
525	uart_update_timeout(port, termios->c_cflag, baud);
526
527	spin_lock(&s->conf_lock);
528	s->conf = (s->conf & ~param_mask) | (param_new & param_mask);
529	s->conf_commit = 1;
530	s->parity = parity;
531	spin_unlock(&s->conf_lock);
532	max3100_dowork(s);
533
534	if (UART_ENABLE_MS(&s->port, termios->c_cflag))
535		max3100_enable_ms(&s->port);
536}
537
538static void max3100_shutdown(struct uart_port *port)
539{
540	struct max3100_port *s = container_of(port,
541					      struct max3100_port,
542					      port);
543
544	dev_dbg(&s->spi->dev, "%s\n", __func__);
545
546	if (s->suspending)
547		return;
548
549	s->force_end_work = 1;
550
551	if (s->poll_time > 0)
552		del_timer_sync(&s->timer);
553
554	if (s->workqueue) {
 
555		destroy_workqueue(s->workqueue);
556		s->workqueue = NULL;
557	}
558	if (s->irq)
559		free_irq(s->irq, s);
560
561	/* set shutdown mode to save power */
562	if (s->max3100_hw_suspend)
563		s->max3100_hw_suspend(1);
564	else  {
565		u16 tx, rx;
566
567		tx = MAX3100_WC | MAX3100_SHDN;
568		max3100_sr(s, tx, &rx);
569	}
570}
571
572static int max3100_startup(struct uart_port *port)
573{
574	struct max3100_port *s = container_of(port,
575					      struct max3100_port,
576					      port);
577	char b[12];
578
579	dev_dbg(&s->spi->dev, "%s\n", __func__);
580
581	s->conf = MAX3100_RM;
582	s->baud = s->crystal ? 230400 : 115200;
583	s->rx_enabled = 1;
584
585	if (s->suspending)
586		return 0;
587
588	s->force_end_work = 0;
589	s->parity = 0;
590	s->rts = 0;
591
592	sprintf(b, "max3100-%d", s->minor);
593	s->workqueue = create_freezable_workqueue(b);
594	if (!s->workqueue) {
595		dev_warn(&s->spi->dev, "cannot create workqueue\n");
596		return -EBUSY;
597	}
598	INIT_WORK(&s->work, max3100_work);
599
600	if (request_irq(s->irq, max3100_irq,
601			IRQF_TRIGGER_FALLING, "max3100", s) < 0) {
602		dev_warn(&s->spi->dev, "cannot allocate irq %d\n", s->irq);
603		s->irq = 0;
604		destroy_workqueue(s->workqueue);
605		s->workqueue = NULL;
606		return -EBUSY;
607	}
608
609	if (s->loopback) {
610		u16 tx, rx;
611		tx = 0x4001;
612		max3100_sr(s, tx, &rx);
613	}
614
615	if (s->max3100_hw_suspend)
616		s->max3100_hw_suspend(0);
617	s->conf_commit = 1;
618	max3100_dowork(s);
619	/* wait for clock to settle */
620	msleep(50);
621
622	max3100_enable_ms(&s->port);
623
624	return 0;
625}
626
627static const char *max3100_type(struct uart_port *port)
628{
629	struct max3100_port *s = container_of(port,
630					      struct max3100_port,
631					      port);
632
633	dev_dbg(&s->spi->dev, "%s\n", __func__);
634
635	return s->port.type == PORT_MAX3100 ? "MAX3100" : NULL;
636}
637
638static void max3100_release_port(struct uart_port *port)
639{
640	struct max3100_port *s = container_of(port,
641					      struct max3100_port,
642					      port);
643
644	dev_dbg(&s->spi->dev, "%s\n", __func__);
645}
646
647static void max3100_config_port(struct uart_port *port, int flags)
648{
649	struct max3100_port *s = container_of(port,
650					      struct max3100_port,
651					      port);
652
653	dev_dbg(&s->spi->dev, "%s\n", __func__);
654
655	if (flags & UART_CONFIG_TYPE)
656		s->port.type = PORT_MAX3100;
657}
658
659static int max3100_verify_port(struct uart_port *port,
660			       struct serial_struct *ser)
661{
662	struct max3100_port *s = container_of(port,
663					      struct max3100_port,
664					      port);
665	int ret = -EINVAL;
666
667	dev_dbg(&s->spi->dev, "%s\n", __func__);
668
669	if (ser->type == PORT_UNKNOWN || ser->type == PORT_MAX3100)
670		ret = 0;
671	return ret;
672}
673
674static void max3100_stop_tx(struct uart_port *port)
675{
676	struct max3100_port *s = container_of(port,
677					      struct max3100_port,
678					      port);
679
680	dev_dbg(&s->spi->dev, "%s\n", __func__);
681}
682
683static int max3100_request_port(struct uart_port *port)
684{
685	struct max3100_port *s = container_of(port,
686					      struct max3100_port,
687					      port);
688
689	dev_dbg(&s->spi->dev, "%s\n", __func__);
690	return 0;
691}
692
693static void max3100_break_ctl(struct uart_port *port, int break_state)
694{
695	struct max3100_port *s = container_of(port,
696					      struct max3100_port,
697					      port);
698
699	dev_dbg(&s->spi->dev, "%s\n", __func__);
700}
701
702static const struct uart_ops max3100_ops = {
703	.tx_empty	= max3100_tx_empty,
704	.set_mctrl	= max3100_set_mctrl,
705	.get_mctrl	= max3100_get_mctrl,
706	.stop_tx        = max3100_stop_tx,
707	.start_tx	= max3100_start_tx,
708	.stop_rx	= max3100_stop_rx,
709	.enable_ms      = max3100_enable_ms,
710	.break_ctl      = max3100_break_ctl,
711	.startup	= max3100_startup,
712	.shutdown	= max3100_shutdown,
713	.set_termios	= max3100_set_termios,
714	.type		= max3100_type,
715	.release_port   = max3100_release_port,
716	.request_port   = max3100_request_port,
717	.config_port	= max3100_config_port,
718	.verify_port	= max3100_verify_port,
719};
720
721static struct uart_driver max3100_uart_driver = {
722	.owner          = THIS_MODULE,
723	.driver_name    = "ttyMAX",
724	.dev_name       = "ttyMAX",
725	.major          = MAX3100_MAJOR,
726	.minor          = MAX3100_MINOR,
727	.nr             = MAX_MAX3100,
728};
729static int uart_driver_registered;
730
731static int max3100_probe(struct spi_device *spi)
732{
733	int i, retval;
734	struct plat_max3100 *pdata;
735	u16 tx, rx;
736
737	mutex_lock(&max3100s_lock);
738
739	if (!uart_driver_registered) {
740		uart_driver_registered = 1;
741		retval = uart_register_driver(&max3100_uart_driver);
742		if (retval) {
743			printk(KERN_ERR "Couldn't register max3100 uart driver\n");
744			mutex_unlock(&max3100s_lock);
745			return retval;
746		}
747	}
748
749	for (i = 0; i < MAX_MAX3100; i++)
750		if (!max3100s[i])
751			break;
752	if (i == MAX_MAX3100) {
753		dev_warn(&spi->dev, "too many MAX3100 chips\n");
754		mutex_unlock(&max3100s_lock);
755		return -ENOMEM;
756	}
757
758	max3100s[i] = kzalloc(sizeof(struct max3100_port), GFP_KERNEL);
759	if (!max3100s[i]) {
760		dev_warn(&spi->dev,
761			 "kmalloc for max3100 structure %d failed!\n", i);
762		mutex_unlock(&max3100s_lock);
763		return -ENOMEM;
764	}
765	max3100s[i]->spi = spi;
766	max3100s[i]->irq = spi->irq;
767	spin_lock_init(&max3100s[i]->conf_lock);
768	spi_set_drvdata(spi, max3100s[i]);
769	pdata = dev_get_platdata(&spi->dev);
770	max3100s[i]->crystal = pdata->crystal;
771	max3100s[i]->loopback = pdata->loopback;
772	max3100s[i]->poll_time = msecs_to_jiffies(pdata->poll_time);
773	if (pdata->poll_time > 0 && max3100s[i]->poll_time == 0)
774		max3100s[i]->poll_time = 1;
775	max3100s[i]->max3100_hw_suspend = pdata->max3100_hw_suspend;
776	max3100s[i]->minor = i;
777	timer_setup(&max3100s[i]->timer, max3100_timeout, 0);
 
 
778
779	dev_dbg(&spi->dev, "%s: adding port %d\n", __func__, i);
780	max3100s[i]->port.irq = max3100s[i]->irq;
781	max3100s[i]->port.uartclk = max3100s[i]->crystal ? 3686400 : 1843200;
782	max3100s[i]->port.fifosize = 16;
783	max3100s[i]->port.ops = &max3100_ops;
784	max3100s[i]->port.flags = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF;
785	max3100s[i]->port.line = i;
786	max3100s[i]->port.type = PORT_MAX3100;
787	max3100s[i]->port.dev = &spi->dev;
788	retval = uart_add_one_port(&max3100_uart_driver, &max3100s[i]->port);
789	if (retval < 0)
790		dev_warn(&spi->dev,
791			 "uart_add_one_port failed for line %d with error %d\n",
792			 i, retval);
793
794	/* set shutdown mode to save power. Will be woken-up on open */
795	if (max3100s[i]->max3100_hw_suspend)
796		max3100s[i]->max3100_hw_suspend(1);
797	else {
798		tx = MAX3100_WC | MAX3100_SHDN;
799		max3100_sr(max3100s[i], tx, &rx);
800	}
801	mutex_unlock(&max3100s_lock);
802	return 0;
803}
804
805static void max3100_remove(struct spi_device *spi)
806{
807	struct max3100_port *s = spi_get_drvdata(spi);
808	int i;
809
810	mutex_lock(&max3100s_lock);
811
812	/* find out the index for the chip we are removing */
813	for (i = 0; i < MAX_MAX3100; i++)
814		if (max3100s[i] == s) {
815			dev_dbg(&spi->dev, "%s: removing port %d\n", __func__, i);
816			uart_remove_one_port(&max3100_uart_driver, &max3100s[i]->port);
817			kfree(max3100s[i]);
818			max3100s[i] = NULL;
819			break;
820		}
821
822	WARN_ON(i == MAX_MAX3100);
823	
824	/* check if this is the last chip we have */
825	for (i = 0; i < MAX_MAX3100; i++)
826		if (max3100s[i]) {
827			mutex_unlock(&max3100s_lock);
828			return;
829		}
830	pr_debug("removing max3100 driver\n");
831	uart_unregister_driver(&max3100_uart_driver);
832
833	mutex_unlock(&max3100s_lock);
 
834}
835
836#ifdef CONFIG_PM_SLEEP
837
838static int max3100_suspend(struct device *dev)
839{
840	struct max3100_port *s = dev_get_drvdata(dev);
841
842	dev_dbg(&s->spi->dev, "%s\n", __func__);
843
844	disable_irq(s->irq);
845
846	s->suspending = 1;
847	uart_suspend_port(&max3100_uart_driver, &s->port);
848
849	if (s->max3100_hw_suspend)
850		s->max3100_hw_suspend(1);
851	else {
852		/* no HW suspend, so do SW one */
853		u16 tx, rx;
854
855		tx = MAX3100_WC | MAX3100_SHDN;
856		max3100_sr(s, tx, &rx);
857	}
858	return 0;
859}
860
861static int max3100_resume(struct device *dev)
862{
863	struct max3100_port *s = dev_get_drvdata(dev);
864
865	dev_dbg(&s->spi->dev, "%s\n", __func__);
866
867	if (s->max3100_hw_suspend)
868		s->max3100_hw_suspend(0);
869	uart_resume_port(&max3100_uart_driver, &s->port);
870	s->suspending = 0;
871
872	enable_irq(s->irq);
873
874	s->conf_commit = 1;
875	if (s->workqueue)
876		max3100_dowork(s);
877
878	return 0;
879}
880
881static SIMPLE_DEV_PM_OPS(max3100_pm_ops, max3100_suspend, max3100_resume);
882#define MAX3100_PM_OPS (&max3100_pm_ops)
883
884#else
885#define MAX3100_PM_OPS NULL
886#endif
887
888static struct spi_driver max3100_driver = {
889	.driver = {
890		.name		= "max3100",
 
891		.pm		= MAX3100_PM_OPS,
892	},
893	.probe		= max3100_probe,
894	.remove		= max3100_remove,
895};
896
897module_spi_driver(max3100_driver);
898
899MODULE_DESCRIPTION("MAX3100 driver");
900MODULE_AUTHOR("Christian Pellegrin <chripell@evolware.org>");
901MODULE_LICENSE("GPL");
902MODULE_ALIAS("spi:max3100");
v3.15
 
  1/*
  2 *
  3 *  Copyright (C) 2008 Christian Pellegrin <chripell@evolware.org>
  4 *
  5 * This program is free software; you can redistribute it and/or modify
  6 * it under the terms of the GNU General Public License as published by
  7 * the Free Software Foundation; either version 2 of the License, or
  8 * (at your option) any later version.
  9 *
 10 *
 11 * Notes: the MAX3100 doesn't provide an interrupt on CTS so we have
 12 * to use polling for flow control. TX empty IRQ is unusable, since
 13 * writing conf clears FIFO buffer and we cannot have this interrupt
 14 * always asking us for attention.
 15 *
 16 * Example platform data:
 17
 18 static struct plat_max3100 max3100_plat_data = {
 19 .loopback = 0,
 20 .crystal = 0,
 21 .poll_time = 100,
 22 };
 23
 24 static struct spi_board_info spi_board_info[] = {
 25 {
 26 .modalias	= "max3100",
 27 .platform_data	= &max3100_plat_data,
 28 .irq		= IRQ_EINT12,
 29 .max_speed_hz	= 5*1000*1000,
 30 .chip_select	= 0,
 31 },
 32 };
 33
 34 * The initial minor number is 209 in the low-density serial port:
 35 * mknod /dev/ttyMAX0 c 204 209
 36 */
 37
 38#define MAX3100_MAJOR 204
 39#define MAX3100_MINOR 209
 40/* 4 MAX3100s should be enough for everyone */
 41#define MAX_MAX3100 4
 42
 43#include <linux/delay.h>
 44#include <linux/slab.h>
 45#include <linux/device.h>
 46#include <linux/module.h>
 47#include <linux/serial_core.h>
 48#include <linux/serial.h>
 49#include <linux/spi/spi.h>
 50#include <linux/freezer.h>
 51#include <linux/tty.h>
 52#include <linux/tty_flip.h>
 53
 54#include <linux/serial_max3100.h>
 55
 56#define MAX3100_C    (1<<14)
 57#define MAX3100_D    (0<<14)
 58#define MAX3100_W    (1<<15)
 59#define MAX3100_RX   (0<<15)
 60
 61#define MAX3100_WC   (MAX3100_W  | MAX3100_C)
 62#define MAX3100_RC   (MAX3100_RX | MAX3100_C)
 63#define MAX3100_WD   (MAX3100_W  | MAX3100_D)
 64#define MAX3100_RD   (MAX3100_RX | MAX3100_D)
 65#define MAX3100_CMD  (3 << 14)
 66
 67#define MAX3100_T    (1<<14)
 68#define MAX3100_R    (1<<15)
 69
 70#define MAX3100_FEN  (1<<13)
 71#define MAX3100_SHDN (1<<12)
 72#define MAX3100_TM   (1<<11)
 73#define MAX3100_RM   (1<<10)
 74#define MAX3100_PM   (1<<9)
 75#define MAX3100_RAM  (1<<8)
 76#define MAX3100_IR   (1<<7)
 77#define MAX3100_ST   (1<<6)
 78#define MAX3100_PE   (1<<5)
 79#define MAX3100_L    (1<<4)
 80#define MAX3100_BAUD (0xf)
 81
 82#define MAX3100_TE   (1<<10)
 83#define MAX3100_RAFE (1<<10)
 84#define MAX3100_RTS  (1<<9)
 85#define MAX3100_CTS  (1<<9)
 86#define MAX3100_PT   (1<<8)
 87#define MAX3100_DATA (0xff)
 88
 89#define MAX3100_RT   (MAX3100_R | MAX3100_T)
 90#define MAX3100_RTC  (MAX3100_RT | MAX3100_CTS | MAX3100_RAFE)
 91
 92/* the following simulate a status reg for ignore_status_mask */
 93#define MAX3100_STATUS_PE 1
 94#define MAX3100_STATUS_FE 2
 95#define MAX3100_STATUS_OE 4
 96
 97struct max3100_port {
 98	struct uart_port port;
 99	struct spi_device *spi;
100
101	int cts;	        /* last CTS received for flow ctrl */
102	int tx_empty;		/* last TX empty bit */
103
104	spinlock_t conf_lock;	/* shared data */
105	int conf_commit;	/* need to make changes */
106	int conf;		/* configuration for the MAX31000
107				 * (bits 0-7, bits 8-11 are irqs) */
108	int rts_commit;	        /* need to change rts */
109	int rts;		/* rts status */
110	int baud;		/* current baud rate */
111
112	int parity;		/* keeps track if we should send parity */
113#define MAX3100_PARITY_ON 1
114#define MAX3100_PARITY_ODD 2
115#define MAX3100_7BIT 4
116	int rx_enabled;	        /* if we should rx chars */
117
118	int irq;		/* irq assigned to the max3100 */
119
120	int minor;		/* minor number */
121	int crystal;		/* 1 if 3.6864Mhz crystal 0 for 1.8432 */
122	int loopback;		/* 1 if we are in loopback mode */
123
124	/* for handling irqs: need workqueue since we do spi_sync */
125	struct workqueue_struct *workqueue;
126	struct work_struct work;
127	/* set to 1 to make the workhandler exit as soon as possible */
128	int  force_end_work;
129	/* need to know we are suspending to avoid deadlock on workqueue */
130	int suspending;
131
132	/* hook for suspending MAX3100 via dedicated pin */
133	void (*max3100_hw_suspend) (int suspend);
134
135	/* poll time (in ms) for ctrl lines */
136	int poll_time;
137	/* and its timer */
138	struct timer_list	timer;
139};
140
141static struct max3100_port *max3100s[MAX_MAX3100]; /* the chips */
142static DEFINE_MUTEX(max3100s_lock);		   /* race on probe */
143
144static int max3100_do_parity(struct max3100_port *s, u16 c)
145{
146	int parity;
147
148	if (s->parity & MAX3100_PARITY_ODD)
149		parity = 1;
150	else
151		parity = 0;
152
153	if (s->parity & MAX3100_7BIT)
154		c &= 0x7f;
155	else
156		c &= 0xff;
157
158	parity = parity ^ (hweight8(c) & 1);
159	return parity;
160}
161
162static int max3100_check_parity(struct max3100_port *s, u16 c)
163{
164	return max3100_do_parity(s, c) == ((c >> 8) & 1);
165}
166
167static void max3100_calc_parity(struct max3100_port *s, u16 *c)
168{
169	if (s->parity & MAX3100_7BIT)
170		*c &= 0x7f;
171	else
172		*c &= 0xff;
173
174	if (s->parity & MAX3100_PARITY_ON)
175		*c |= max3100_do_parity(s, *c) << 8;
176}
177
178static void max3100_work(struct work_struct *w);
179
180static void max3100_dowork(struct max3100_port *s)
181{
182	if (!s->force_end_work && !freezing(current) && !s->suspending)
183		queue_work(s->workqueue, &s->work);
184}
185
186static void max3100_timeout(unsigned long data)
187{
188	struct max3100_port *s = (struct max3100_port *)data;
189
190	if (s->port.state) {
191		max3100_dowork(s);
192		mod_timer(&s->timer, jiffies + s->poll_time);
193	}
194}
195
196static int max3100_sr(struct max3100_port *s, u16 tx, u16 *rx)
197{
198	struct spi_message message;
199	u16 etx, erx;
200	int status;
201	struct spi_transfer tran = {
202		.tx_buf = &etx,
203		.rx_buf = &erx,
204		.len = 2,
205	};
206
207	etx = cpu_to_be16(tx);
208	spi_message_init(&message);
209	spi_message_add_tail(&tran, &message);
210	status = spi_sync(s->spi, &message);
211	if (status) {
212		dev_warn(&s->spi->dev, "error while calling spi_sync\n");
213		return -EIO;
214	}
215	*rx = be16_to_cpu(erx);
216	s->tx_empty = (*rx & MAX3100_T) > 0;
217	dev_dbg(&s->spi->dev, "%04x - %04x\n", tx, *rx);
218	return 0;
219}
220
221static int max3100_handlerx(struct max3100_port *s, u16 rx)
222{
223	unsigned int ch, flg, status = 0;
224	int ret = 0, cts;
225
226	if (rx & MAX3100_R && s->rx_enabled) {
227		dev_dbg(&s->spi->dev, "%s\n", __func__);
228		ch = rx & (s->parity & MAX3100_7BIT ? 0x7f : 0xff);
229		if (rx & MAX3100_RAFE) {
230			s->port.icount.frame++;
231			flg = TTY_FRAME;
232			status |= MAX3100_STATUS_FE;
233		} else {
234			if (s->parity & MAX3100_PARITY_ON) {
235				if (max3100_check_parity(s, rx)) {
236					s->port.icount.rx++;
237					flg = TTY_NORMAL;
238				} else {
239					s->port.icount.parity++;
240					flg = TTY_PARITY;
241					status |= MAX3100_STATUS_PE;
242				}
243			} else {
244				s->port.icount.rx++;
245				flg = TTY_NORMAL;
246			}
247		}
248		uart_insert_char(&s->port, status, MAX3100_STATUS_OE, ch, flg);
249		ret = 1;
250	}
251
252	cts = (rx & MAX3100_CTS) > 0;
253	if (s->cts != cts) {
254		s->cts = cts;
255		uart_handle_cts_change(&s->port, cts ? TIOCM_CTS : 0);
256	}
257
258	return ret;
259}
260
261static void max3100_work(struct work_struct *w)
262{
263	struct max3100_port *s = container_of(w, struct max3100_port, work);
264	int rxchars;
265	u16 tx, rx;
266	int conf, cconf, rts, crts;
267	struct circ_buf *xmit = &s->port.state->xmit;
268
269	dev_dbg(&s->spi->dev, "%s\n", __func__);
270
271	rxchars = 0;
272	do {
273		spin_lock(&s->conf_lock);
274		conf = s->conf;
275		cconf = s->conf_commit;
276		s->conf_commit = 0;
277		rts = s->rts;
278		crts = s->rts_commit;
279		s->rts_commit = 0;
280		spin_unlock(&s->conf_lock);
281		if (cconf)
282			max3100_sr(s, MAX3100_WC | conf, &rx);
283		if (crts) {
284			max3100_sr(s, MAX3100_WD | MAX3100_TE |
285				   (s->rts ? MAX3100_RTS : 0), &rx);
286			rxchars += max3100_handlerx(s, rx);
287		}
288
289		max3100_sr(s, MAX3100_RD, &rx);
290		rxchars += max3100_handlerx(s, rx);
291
292		if (rx & MAX3100_T) {
293			tx = 0xffff;
294			if (s->port.x_char) {
295				tx = s->port.x_char;
296				s->port.icount.tx++;
297				s->port.x_char = 0;
298			} else if (!uart_circ_empty(xmit) &&
299				   !uart_tx_stopped(&s->port)) {
300				tx = xmit->buf[xmit->tail];
301				xmit->tail = (xmit->tail + 1) &
302					(UART_XMIT_SIZE - 1);
303				s->port.icount.tx++;
304			}
305			if (tx != 0xffff) {
306				max3100_calc_parity(s, &tx);
307				tx |= MAX3100_WD | (s->rts ? MAX3100_RTS : 0);
308				max3100_sr(s, tx, &rx);
309				rxchars += max3100_handlerx(s, rx);
310			}
311		}
312
313		if (rxchars > 16) {
314			tty_flip_buffer_push(&s->port.state->port);
315			rxchars = 0;
316		}
317		if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
318			uart_write_wakeup(&s->port);
319
320	} while (!s->force_end_work &&
321		 !freezing(current) &&
322		 ((rx & MAX3100_R) ||
323		  (!uart_circ_empty(xmit) &&
324		   !uart_tx_stopped(&s->port))));
325
326	if (rxchars > 0)
327		tty_flip_buffer_push(&s->port.state->port);
328}
329
330static irqreturn_t max3100_irq(int irqno, void *dev_id)
331{
332	struct max3100_port *s = dev_id;
333
334	dev_dbg(&s->spi->dev, "%s\n", __func__);
335
336	max3100_dowork(s);
337	return IRQ_HANDLED;
338}
339
340static void max3100_enable_ms(struct uart_port *port)
341{
342	struct max3100_port *s = container_of(port,
343					      struct max3100_port,
344					      port);
345
346	if (s->poll_time > 0)
347		mod_timer(&s->timer, jiffies);
348	dev_dbg(&s->spi->dev, "%s\n", __func__);
349}
350
351static void max3100_start_tx(struct uart_port *port)
352{
353	struct max3100_port *s = container_of(port,
354					      struct max3100_port,
355					      port);
356
357	dev_dbg(&s->spi->dev, "%s\n", __func__);
358
359	max3100_dowork(s);
360}
361
362static void max3100_stop_rx(struct uart_port *port)
363{
364	struct max3100_port *s = container_of(port,
365					      struct max3100_port,
366					      port);
367
368	dev_dbg(&s->spi->dev, "%s\n", __func__);
369
370	s->rx_enabled = 0;
371	spin_lock(&s->conf_lock);
372	s->conf &= ~MAX3100_RM;
373	s->conf_commit = 1;
374	spin_unlock(&s->conf_lock);
375	max3100_dowork(s);
376}
377
378static unsigned int max3100_tx_empty(struct uart_port *port)
379{
380	struct max3100_port *s = container_of(port,
381					      struct max3100_port,
382					      port);
383
384	dev_dbg(&s->spi->dev, "%s\n", __func__);
385
386	/* may not be truly up-to-date */
387	max3100_dowork(s);
388	return s->tx_empty;
389}
390
391static unsigned int max3100_get_mctrl(struct uart_port *port)
392{
393	struct max3100_port *s = container_of(port,
394					      struct max3100_port,
395					      port);
396
397	dev_dbg(&s->spi->dev, "%s\n", __func__);
398
399	/* may not be truly up-to-date */
400	max3100_dowork(s);
401	/* always assert DCD and DSR since these lines are not wired */
402	return (s->cts ? TIOCM_CTS : 0) | TIOCM_DSR | TIOCM_CAR;
403}
404
405static void max3100_set_mctrl(struct uart_port *port, unsigned int mctrl)
406{
407	struct max3100_port *s = container_of(port,
408					      struct max3100_port,
409					      port);
410	int rts;
411
412	dev_dbg(&s->spi->dev, "%s\n", __func__);
413
414	rts = (mctrl & TIOCM_RTS) > 0;
415
416	spin_lock(&s->conf_lock);
417	if (s->rts != rts) {
418		s->rts = rts;
419		s->rts_commit = 1;
420		max3100_dowork(s);
421	}
422	spin_unlock(&s->conf_lock);
423}
424
425static void
426max3100_set_termios(struct uart_port *port, struct ktermios *termios,
427		    struct ktermios *old)
428{
429	struct max3100_port *s = container_of(port,
430					      struct max3100_port,
431					      port);
432	int baud = 0;
433	unsigned cflag;
434	u32 param_new, param_mask, parity = 0;
435
436	dev_dbg(&s->spi->dev, "%s\n", __func__);
437
438	cflag = termios->c_cflag;
439	param_new = 0;
440	param_mask = 0;
441
442	baud = tty_termios_baud_rate(termios);
443	param_new = s->conf & MAX3100_BAUD;
444	switch (baud) {
445	case 300:
446		if (s->crystal)
447			baud = s->baud;
448		else
449			param_new = 15;
450		break;
451	case 600:
452		param_new = 14 + s->crystal;
453		break;
454	case 1200:
455		param_new = 13 + s->crystal;
456		break;
457	case 2400:
458		param_new = 12 + s->crystal;
459		break;
460	case 4800:
461		param_new = 11 + s->crystal;
462		break;
463	case 9600:
464		param_new = 10 + s->crystal;
465		break;
466	case 19200:
467		param_new = 9 + s->crystal;
468		break;
469	case 38400:
470		param_new = 8 + s->crystal;
471		break;
472	case 57600:
473		param_new = 1 + s->crystal;
474		break;
475	case 115200:
476		param_new = 0 + s->crystal;
477		break;
478	case 230400:
479		if (s->crystal)
480			param_new = 0;
481		else
482			baud = s->baud;
483		break;
484	default:
485		baud = s->baud;
486	}
487	tty_termios_encode_baud_rate(termios, baud, baud);
488	s->baud = baud;
489	param_mask |= MAX3100_BAUD;
490
491	if ((cflag & CSIZE) == CS8) {
492		param_new &= ~MAX3100_L;
493		parity &= ~MAX3100_7BIT;
494	} else {
495		param_new |= MAX3100_L;
496		parity |= MAX3100_7BIT;
497		cflag = (cflag & ~CSIZE) | CS7;
498	}
499	param_mask |= MAX3100_L;
500
501	if (cflag & CSTOPB)
502		param_new |= MAX3100_ST;
503	else
504		param_new &= ~MAX3100_ST;
505	param_mask |= MAX3100_ST;
506
507	if (cflag & PARENB) {
508		param_new |= MAX3100_PE;
509		parity |= MAX3100_PARITY_ON;
510	} else {
511		param_new &= ~MAX3100_PE;
512		parity &= ~MAX3100_PARITY_ON;
513	}
514	param_mask |= MAX3100_PE;
515
516	if (cflag & PARODD)
517		parity |= MAX3100_PARITY_ODD;
518	else
519		parity &= ~MAX3100_PARITY_ODD;
520
521	/* mask termios capabilities we don't support */
522	cflag &= ~CMSPAR;
523	termios->c_cflag = cflag;
524
525	s->port.ignore_status_mask = 0;
526	if (termios->c_iflag & IGNPAR)
527		s->port.ignore_status_mask |=
528			MAX3100_STATUS_PE | MAX3100_STATUS_FE |
529			MAX3100_STATUS_OE;
530
531	/* we are sending char from a workqueue so enable */
532	s->port.state->port.low_latency = 1;
533
534	if (s->poll_time > 0)
535		del_timer_sync(&s->timer);
536
537	uart_update_timeout(port, termios->c_cflag, baud);
538
539	spin_lock(&s->conf_lock);
540	s->conf = (s->conf & ~param_mask) | (param_new & param_mask);
541	s->conf_commit = 1;
542	s->parity = parity;
543	spin_unlock(&s->conf_lock);
544	max3100_dowork(s);
545
546	if (UART_ENABLE_MS(&s->port, termios->c_cflag))
547		max3100_enable_ms(&s->port);
548}
549
550static void max3100_shutdown(struct uart_port *port)
551{
552	struct max3100_port *s = container_of(port,
553					      struct max3100_port,
554					      port);
555
556	dev_dbg(&s->spi->dev, "%s\n", __func__);
557
558	if (s->suspending)
559		return;
560
561	s->force_end_work = 1;
562
563	if (s->poll_time > 0)
564		del_timer_sync(&s->timer);
565
566	if (s->workqueue) {
567		flush_workqueue(s->workqueue);
568		destroy_workqueue(s->workqueue);
569		s->workqueue = NULL;
570	}
571	if (s->irq)
572		free_irq(s->irq, s);
573
574	/* set shutdown mode to save power */
575	if (s->max3100_hw_suspend)
576		s->max3100_hw_suspend(1);
577	else  {
578		u16 tx, rx;
579
580		tx = MAX3100_WC | MAX3100_SHDN;
581		max3100_sr(s, tx, &rx);
582	}
583}
584
585static int max3100_startup(struct uart_port *port)
586{
587	struct max3100_port *s = container_of(port,
588					      struct max3100_port,
589					      port);
590	char b[12];
591
592	dev_dbg(&s->spi->dev, "%s\n", __func__);
593
594	s->conf = MAX3100_RM;
595	s->baud = s->crystal ? 230400 : 115200;
596	s->rx_enabled = 1;
597
598	if (s->suspending)
599		return 0;
600
601	s->force_end_work = 0;
602	s->parity = 0;
603	s->rts = 0;
604
605	sprintf(b, "max3100-%d", s->minor);
606	s->workqueue = create_freezable_workqueue(b);
607	if (!s->workqueue) {
608		dev_warn(&s->spi->dev, "cannot create workqueue\n");
609		return -EBUSY;
610	}
611	INIT_WORK(&s->work, max3100_work);
612
613	if (request_irq(s->irq, max3100_irq,
614			IRQF_TRIGGER_FALLING, "max3100", s) < 0) {
615		dev_warn(&s->spi->dev, "cannot allocate irq %d\n", s->irq);
616		s->irq = 0;
617		destroy_workqueue(s->workqueue);
618		s->workqueue = NULL;
619		return -EBUSY;
620	}
621
622	if (s->loopback) {
623		u16 tx, rx;
624		tx = 0x4001;
625		max3100_sr(s, tx, &rx);
626	}
627
628	if (s->max3100_hw_suspend)
629		s->max3100_hw_suspend(0);
630	s->conf_commit = 1;
631	max3100_dowork(s);
632	/* wait for clock to settle */
633	msleep(50);
634
635	max3100_enable_ms(&s->port);
636
637	return 0;
638}
639
640static const char *max3100_type(struct uart_port *port)
641{
642	struct max3100_port *s = container_of(port,
643					      struct max3100_port,
644					      port);
645
646	dev_dbg(&s->spi->dev, "%s\n", __func__);
647
648	return s->port.type == PORT_MAX3100 ? "MAX3100" : NULL;
649}
650
651static void max3100_release_port(struct uart_port *port)
652{
653	struct max3100_port *s = container_of(port,
654					      struct max3100_port,
655					      port);
656
657	dev_dbg(&s->spi->dev, "%s\n", __func__);
658}
659
660static void max3100_config_port(struct uart_port *port, int flags)
661{
662	struct max3100_port *s = container_of(port,
663					      struct max3100_port,
664					      port);
665
666	dev_dbg(&s->spi->dev, "%s\n", __func__);
667
668	if (flags & UART_CONFIG_TYPE)
669		s->port.type = PORT_MAX3100;
670}
671
672static int max3100_verify_port(struct uart_port *port,
673			       struct serial_struct *ser)
674{
675	struct max3100_port *s = container_of(port,
676					      struct max3100_port,
677					      port);
678	int ret = -EINVAL;
679
680	dev_dbg(&s->spi->dev, "%s\n", __func__);
681
682	if (ser->type == PORT_UNKNOWN || ser->type == PORT_MAX3100)
683		ret = 0;
684	return ret;
685}
686
687static void max3100_stop_tx(struct uart_port *port)
688{
689	struct max3100_port *s = container_of(port,
690					      struct max3100_port,
691					      port);
692
693	dev_dbg(&s->spi->dev, "%s\n", __func__);
694}
695
696static int max3100_request_port(struct uart_port *port)
697{
698	struct max3100_port *s = container_of(port,
699					      struct max3100_port,
700					      port);
701
702	dev_dbg(&s->spi->dev, "%s\n", __func__);
703	return 0;
704}
705
706static void max3100_break_ctl(struct uart_port *port, int break_state)
707{
708	struct max3100_port *s = container_of(port,
709					      struct max3100_port,
710					      port);
711
712	dev_dbg(&s->spi->dev, "%s\n", __func__);
713}
714
715static struct uart_ops max3100_ops = {
716	.tx_empty	= max3100_tx_empty,
717	.set_mctrl	= max3100_set_mctrl,
718	.get_mctrl	= max3100_get_mctrl,
719	.stop_tx        = max3100_stop_tx,
720	.start_tx	= max3100_start_tx,
721	.stop_rx	= max3100_stop_rx,
722	.enable_ms      = max3100_enable_ms,
723	.break_ctl      = max3100_break_ctl,
724	.startup	= max3100_startup,
725	.shutdown	= max3100_shutdown,
726	.set_termios	= max3100_set_termios,
727	.type		= max3100_type,
728	.release_port   = max3100_release_port,
729	.request_port   = max3100_request_port,
730	.config_port	= max3100_config_port,
731	.verify_port	= max3100_verify_port,
732};
733
734static struct uart_driver max3100_uart_driver = {
735	.owner          = THIS_MODULE,
736	.driver_name    = "ttyMAX",
737	.dev_name       = "ttyMAX",
738	.major          = MAX3100_MAJOR,
739	.minor          = MAX3100_MINOR,
740	.nr             = MAX_MAX3100,
741};
742static int uart_driver_registered;
743
744static int max3100_probe(struct spi_device *spi)
745{
746	int i, retval;
747	struct plat_max3100 *pdata;
748	u16 tx, rx;
749
750	mutex_lock(&max3100s_lock);
751
752	if (!uart_driver_registered) {
753		uart_driver_registered = 1;
754		retval = uart_register_driver(&max3100_uart_driver);
755		if (retval) {
756			printk(KERN_ERR "Couldn't register max3100 uart driver\n");
757			mutex_unlock(&max3100s_lock);
758			return retval;
759		}
760	}
761
762	for (i = 0; i < MAX_MAX3100; i++)
763		if (!max3100s[i])
764			break;
765	if (i == MAX_MAX3100) {
766		dev_warn(&spi->dev, "too many MAX3100 chips\n");
767		mutex_unlock(&max3100s_lock);
768		return -ENOMEM;
769	}
770
771	max3100s[i] = kzalloc(sizeof(struct max3100_port), GFP_KERNEL);
772	if (!max3100s[i]) {
773		dev_warn(&spi->dev,
774			 "kmalloc for max3100 structure %d failed!\n", i);
775		mutex_unlock(&max3100s_lock);
776		return -ENOMEM;
777	}
778	max3100s[i]->spi = spi;
779	max3100s[i]->irq = spi->irq;
780	spin_lock_init(&max3100s[i]->conf_lock);
781	spi_set_drvdata(spi, max3100s[i]);
782	pdata = dev_get_platdata(&spi->dev);
783	max3100s[i]->crystal = pdata->crystal;
784	max3100s[i]->loopback = pdata->loopback;
785	max3100s[i]->poll_time = pdata->poll_time * HZ / 1000;
786	if (pdata->poll_time > 0 && max3100s[i]->poll_time == 0)
787		max3100s[i]->poll_time = 1;
788	max3100s[i]->max3100_hw_suspend = pdata->max3100_hw_suspend;
789	max3100s[i]->minor = i;
790	init_timer(&max3100s[i]->timer);
791	max3100s[i]->timer.function = max3100_timeout;
792	max3100s[i]->timer.data = (unsigned long) max3100s[i];
793
794	dev_dbg(&spi->dev, "%s: adding port %d\n", __func__, i);
795	max3100s[i]->port.irq = max3100s[i]->irq;
796	max3100s[i]->port.uartclk = max3100s[i]->crystal ? 3686400 : 1843200;
797	max3100s[i]->port.fifosize = 16;
798	max3100s[i]->port.ops = &max3100_ops;
799	max3100s[i]->port.flags = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF;
800	max3100s[i]->port.line = i;
801	max3100s[i]->port.type = PORT_MAX3100;
802	max3100s[i]->port.dev = &spi->dev;
803	retval = uart_add_one_port(&max3100_uart_driver, &max3100s[i]->port);
804	if (retval < 0)
805		dev_warn(&spi->dev,
806			 "uart_add_one_port failed for line %d with error %d\n",
807			 i, retval);
808
809	/* set shutdown mode to save power. Will be woken-up on open */
810	if (max3100s[i]->max3100_hw_suspend)
811		max3100s[i]->max3100_hw_suspend(1);
812	else {
813		tx = MAX3100_WC | MAX3100_SHDN;
814		max3100_sr(max3100s[i], tx, &rx);
815	}
816	mutex_unlock(&max3100s_lock);
817	return 0;
818}
819
820static int max3100_remove(struct spi_device *spi)
821{
822	struct max3100_port *s = spi_get_drvdata(spi);
823	int i;
824
825	mutex_lock(&max3100s_lock);
826
827	/* find out the index for the chip we are removing */
828	for (i = 0; i < MAX_MAX3100; i++)
829		if (max3100s[i] == s) {
830			dev_dbg(&spi->dev, "%s: removing port %d\n", __func__, i);
831			uart_remove_one_port(&max3100_uart_driver, &max3100s[i]->port);
832			kfree(max3100s[i]);
833			max3100s[i] = NULL;
834			break;
835		}
836
837	WARN_ON(i == MAX_MAX3100);
838	
839	/* check if this is the last chip we have */
840	for (i = 0; i < MAX_MAX3100; i++)
841		if (max3100s[i]) {
842			mutex_unlock(&max3100s_lock);
843			return 0;
844		}
845	pr_debug("removing max3100 driver\n");
846	uart_unregister_driver(&max3100_uart_driver);
847
848	mutex_unlock(&max3100s_lock);
849	return 0;
850}
851
852#ifdef CONFIG_PM_SLEEP
853
854static int max3100_suspend(struct device *dev)
855{
856	struct max3100_port *s = dev_get_drvdata(dev);
857
858	dev_dbg(&s->spi->dev, "%s\n", __func__);
859
860	disable_irq(s->irq);
861
862	s->suspending = 1;
863	uart_suspend_port(&max3100_uart_driver, &s->port);
864
865	if (s->max3100_hw_suspend)
866		s->max3100_hw_suspend(1);
867	else {
868		/* no HW suspend, so do SW one */
869		u16 tx, rx;
870
871		tx = MAX3100_WC | MAX3100_SHDN;
872		max3100_sr(s, tx, &rx);
873	}
874	return 0;
875}
876
877static int max3100_resume(struct device *dev)
878{
879	struct max3100_port *s = dev_get_drvdata(dev);
880
881	dev_dbg(&s->spi->dev, "%s\n", __func__);
882
883	if (s->max3100_hw_suspend)
884		s->max3100_hw_suspend(0);
885	uart_resume_port(&max3100_uart_driver, &s->port);
886	s->suspending = 0;
887
888	enable_irq(s->irq);
889
890	s->conf_commit = 1;
891	if (s->workqueue)
892		max3100_dowork(s);
893
894	return 0;
895}
896
897static SIMPLE_DEV_PM_OPS(max3100_pm_ops, max3100_suspend, max3100_resume);
898#define MAX3100_PM_OPS (&max3100_pm_ops)
899
900#else
901#define MAX3100_PM_OPS NULL
902#endif
903
904static struct spi_driver max3100_driver = {
905	.driver = {
906		.name		= "max3100",
907		.owner		= THIS_MODULE,
908		.pm		= MAX3100_PM_OPS,
909	},
910	.probe		= max3100_probe,
911	.remove		= max3100_remove,
912};
913
914module_spi_driver(max3100_driver);
915
916MODULE_DESCRIPTION("MAX3100 driver");
917MODULE_AUTHOR("Christian Pellegrin <chripell@evolware.org>");
918MODULE_LICENSE("GPL");
919MODULE_ALIAS("spi:max3100");