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1// SPDX-License-Identifier: GPL-2.0-only
2// Copyright (C) 2013 Broadcom Corporation
3
4#include <linux/kernel.h>
5#include <linux/module.h>
6#include <linux/delay.h>
7#include <linux/highmem.h>
8#include <linux/platform_device.h>
9#include <linux/mmc/host.h>
10#include <linux/io.h>
11#include <linux/clk.h>
12#include <linux/regulator/consumer.h>
13#include <linux/of.h>
14#include <linux/of_device.h>
15#include <linux/mmc/slot-gpio.h>
16
17#include "sdhci-pltfm.h"
18#include "sdhci.h"
19
20#define SDHCI_SOFT_RESET 0x01000000
21#define KONA_SDHOST_CORECTRL 0x8000
22#define KONA_SDHOST_CD_PINCTRL 0x00000008
23#define KONA_SDHOST_STOP_HCLK 0x00000004
24#define KONA_SDHOST_RESET 0x00000002
25#define KONA_SDHOST_EN 0x00000001
26
27#define KONA_SDHOST_CORESTAT 0x8004
28#define KONA_SDHOST_WP 0x00000002
29#define KONA_SDHOST_CD_SW 0x00000001
30
31#define KONA_SDHOST_COREIMR 0x8008
32#define KONA_SDHOST_IP 0x00000001
33
34#define KONA_SDHOST_COREISR 0x800C
35#define KONA_SDHOST_COREIMSR 0x8010
36#define KONA_SDHOST_COREDBG1 0x8014
37#define KONA_SDHOST_COREGPO_MASK 0x8018
38
39#define SD_DETECT_GPIO_DEBOUNCE_128MS 128
40
41#define KONA_MMC_AUTOSUSPEND_DELAY (50)
42
43struct sdhci_bcm_kona_dev {
44 struct mutex write_lock; /* protect back to back writes */
45};
46
47
48static int sdhci_bcm_kona_sd_reset(struct sdhci_host *host)
49{
50 unsigned int val;
51 unsigned long timeout;
52
53 /* This timeout should be sufficent for core to reset */
54 timeout = jiffies + msecs_to_jiffies(100);
55
56 /* reset the host using the top level reset */
57 val = sdhci_readl(host, KONA_SDHOST_CORECTRL);
58 val |= KONA_SDHOST_RESET;
59 sdhci_writel(host, val, KONA_SDHOST_CORECTRL);
60
61 while (!(sdhci_readl(host, KONA_SDHOST_CORECTRL) & KONA_SDHOST_RESET)) {
62 if (time_is_before_jiffies(timeout)) {
63 pr_err("Error: sd host is stuck in reset!!!\n");
64 return -EFAULT;
65 }
66 }
67
68 /* bring the host out of reset */
69 val = sdhci_readl(host, KONA_SDHOST_CORECTRL);
70 val &= ~KONA_SDHOST_RESET;
71
72 /*
73 * Back-to-Back register write needs a delay of 1ms at bootup (min 10uS)
74 * Back-to-Back writes to same register needs delay when SD bus clock
75 * is very low w.r.t AHB clock, mainly during boot-time and during card
76 * insert-removal.
77 */
78 usleep_range(1000, 5000);
79 sdhci_writel(host, val, KONA_SDHOST_CORECTRL);
80
81 return 0;
82}
83
84static void sdhci_bcm_kona_sd_init(struct sdhci_host *host)
85{
86 unsigned int val;
87
88 /* enable the interrupt from the IP core */
89 val = sdhci_readl(host, KONA_SDHOST_COREIMR);
90 val |= KONA_SDHOST_IP;
91 sdhci_writel(host, val, KONA_SDHOST_COREIMR);
92
93 /* Enable the AHB clock gating module to the host */
94 val = sdhci_readl(host, KONA_SDHOST_CORECTRL);
95 val |= KONA_SDHOST_EN;
96
97 /*
98 * Back-to-Back register write needs a delay of 1ms at bootup (min 10uS)
99 * Back-to-Back writes to same register needs delay when SD bus clock
100 * is very low w.r.t AHB clock, mainly during boot-time and during card
101 * insert-removal.
102 */
103 usleep_range(1000, 5000);
104 sdhci_writel(host, val, KONA_SDHOST_CORECTRL);
105}
106
107/*
108 * Software emulation of the SD card insertion/removal. Set insert=1 for insert
109 * and insert=0 for removal. The card detection is done by GPIO. For Broadcom
110 * IP to function properly the bit 0 of CORESTAT register needs to be set/reset
111 * to generate the CD IRQ handled in sdhci.c which schedules card_tasklet.
112 */
113static int sdhci_bcm_kona_sd_card_emulate(struct sdhci_host *host, int insert)
114{
115 struct sdhci_pltfm_host *pltfm_priv = sdhci_priv(host);
116 struct sdhci_bcm_kona_dev *kona_dev = sdhci_pltfm_priv(pltfm_priv);
117 u32 val;
118
119 /*
120 * Back-to-Back register write needs a delay of min 10uS.
121 * Back-to-Back writes to same register needs delay when SD bus clock
122 * is very low w.r.t AHB clock, mainly during boot-time and during card
123 * insert-removal.
124 * We keep 20uS
125 */
126 mutex_lock(&kona_dev->write_lock);
127 udelay(20);
128 val = sdhci_readl(host, KONA_SDHOST_CORESTAT);
129
130 if (insert) {
131 int ret;
132
133 ret = mmc_gpio_get_ro(host->mmc);
134 if (ret >= 0)
135 val = (val & ~KONA_SDHOST_WP) |
136 ((ret) ? KONA_SDHOST_WP : 0);
137
138 val |= KONA_SDHOST_CD_SW;
139 sdhci_writel(host, val, KONA_SDHOST_CORESTAT);
140 } else {
141 val &= ~KONA_SDHOST_CD_SW;
142 sdhci_writel(host, val, KONA_SDHOST_CORESTAT);
143 }
144 mutex_unlock(&kona_dev->write_lock);
145
146 return 0;
147}
148
149/*
150 * SD card interrupt event callback
151 */
152static void sdhci_bcm_kona_card_event(struct sdhci_host *host)
153{
154 if (mmc_gpio_get_cd(host->mmc) > 0) {
155 dev_dbg(mmc_dev(host->mmc),
156 "card inserted\n");
157 sdhci_bcm_kona_sd_card_emulate(host, 1);
158 } else {
159 dev_dbg(mmc_dev(host->mmc),
160 "card removed\n");
161 sdhci_bcm_kona_sd_card_emulate(host, 0);
162 }
163}
164
165static void sdhci_bcm_kona_init_74_clocks(struct sdhci_host *host,
166 u8 power_mode)
167{
168 /*
169 * JEDEC and SD spec specify supplying 74 continuous clocks to
170 * device after power up. With minimum bus (100KHz) that
171 * translates to 740us
172 */
173 if (power_mode != MMC_POWER_OFF)
174 udelay(740);
175}
176
177static const struct sdhci_ops sdhci_bcm_kona_ops = {
178 .set_clock = sdhci_set_clock,
179 .get_max_clock = sdhci_pltfm_clk_get_max_clock,
180 .get_timeout_clock = sdhci_pltfm_clk_get_max_clock,
181 .platform_send_init_74_clocks = sdhci_bcm_kona_init_74_clocks,
182 .set_bus_width = sdhci_set_bus_width,
183 .reset = sdhci_reset,
184 .set_uhs_signaling = sdhci_set_uhs_signaling,
185 .card_event = sdhci_bcm_kona_card_event,
186};
187
188static const struct sdhci_pltfm_data sdhci_pltfm_data_kona = {
189 .ops = &sdhci_bcm_kona_ops,
190 .quirks = SDHCI_QUIRK_NO_CARD_NO_RESET |
191 SDHCI_QUIRK_BROKEN_TIMEOUT_VAL | SDHCI_QUIRK_32BIT_DMA_ADDR |
192 SDHCI_QUIRK_32BIT_DMA_SIZE | SDHCI_QUIRK_32BIT_ADMA_SIZE |
193 SDHCI_QUIRK_FORCE_BLK_SZ_2048 |
194 SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN,
195};
196
197static const struct of_device_id sdhci_bcm_kona_of_match[] = {
198 { .compatible = "brcm,kona-sdhci"},
199 { .compatible = "bcm,kona-sdhci"}, /* deprecated name */
200 {}
201};
202MODULE_DEVICE_TABLE(of, sdhci_bcm_kona_of_match);
203
204static int sdhci_bcm_kona_probe(struct platform_device *pdev)
205{
206 struct sdhci_bcm_kona_dev *kona_dev = NULL;
207 struct sdhci_pltfm_host *pltfm_priv;
208 struct device *dev = &pdev->dev;
209 struct sdhci_host *host;
210 int ret;
211
212 ret = 0;
213
214 host = sdhci_pltfm_init(pdev, &sdhci_pltfm_data_kona,
215 sizeof(*kona_dev));
216 if (IS_ERR(host))
217 return PTR_ERR(host);
218
219 dev_dbg(dev, "%s: inited. IOADDR=%p\n", __func__, host->ioaddr);
220
221 pltfm_priv = sdhci_priv(host);
222
223 kona_dev = sdhci_pltfm_priv(pltfm_priv);
224 mutex_init(&kona_dev->write_lock);
225
226 ret = mmc_of_parse(host->mmc);
227 if (ret)
228 goto err_pltfm_free;
229
230 if (!host->mmc->f_max) {
231 dev_err(&pdev->dev, "Missing max-freq for SDHCI cfg\n");
232 ret = -ENXIO;
233 goto err_pltfm_free;
234 }
235
236 /* Get and enable the core clock */
237 pltfm_priv->clk = devm_clk_get(dev, NULL);
238 if (IS_ERR(pltfm_priv->clk)) {
239 dev_err(dev, "Failed to get core clock\n");
240 ret = PTR_ERR(pltfm_priv->clk);
241 goto err_pltfm_free;
242 }
243
244 ret = clk_set_rate(pltfm_priv->clk, host->mmc->f_max);
245 if (ret) {
246 dev_err(dev, "Failed to set rate core clock\n");
247 goto err_pltfm_free;
248 }
249
250 ret = clk_prepare_enable(pltfm_priv->clk);
251 if (ret) {
252 dev_err(dev, "Failed to enable core clock\n");
253 goto err_pltfm_free;
254 }
255
256 dev_dbg(dev, "non-removable=%c\n",
257 mmc_card_is_removable(host->mmc) ? 'N' : 'Y');
258 dev_dbg(dev, "cd_gpio %c, wp_gpio %c\n",
259 (mmc_gpio_get_cd(host->mmc) != -ENOSYS) ? 'Y' : 'N',
260 (mmc_gpio_get_ro(host->mmc) != -ENOSYS) ? 'Y' : 'N');
261
262 if (!mmc_card_is_removable(host->mmc))
263 host->quirks |= SDHCI_QUIRK_BROKEN_CARD_DETECTION;
264
265 dev_dbg(dev, "is_8bit=%c\n",
266 (host->mmc->caps & MMC_CAP_8_BIT_DATA) ? 'Y' : 'N');
267
268 ret = sdhci_bcm_kona_sd_reset(host);
269 if (ret)
270 goto err_clk_disable;
271
272 sdhci_bcm_kona_sd_init(host);
273
274 ret = sdhci_add_host(host);
275 if (ret)
276 goto err_reset;
277
278 /* if device is eMMC, emulate card insert right here */
279 if (!mmc_card_is_removable(host->mmc)) {
280 ret = sdhci_bcm_kona_sd_card_emulate(host, 1);
281 if (ret) {
282 dev_err(dev,
283 "unable to emulate card insertion\n");
284 goto err_remove_host;
285 }
286 }
287 /*
288 * Since the card detection GPIO interrupt is configured to be
289 * edge sensitive, check the initial GPIO value here, emulate
290 * only if the card is present
291 */
292 if (mmc_gpio_get_cd(host->mmc) > 0)
293 sdhci_bcm_kona_sd_card_emulate(host, 1);
294
295 dev_dbg(dev, "initialized properly\n");
296 return 0;
297
298err_remove_host:
299 sdhci_remove_host(host, 0);
300
301err_reset:
302 sdhci_bcm_kona_sd_reset(host);
303
304err_clk_disable:
305 clk_disable_unprepare(pltfm_priv->clk);
306
307err_pltfm_free:
308 sdhci_pltfm_free(pdev);
309
310 dev_err(dev, "Probing of sdhci-pltfm failed: %d\n", ret);
311 return ret;
312}
313
314static struct platform_driver sdhci_bcm_kona_driver = {
315 .driver = {
316 .name = "sdhci-kona",
317 .probe_type = PROBE_PREFER_ASYNCHRONOUS,
318 .pm = &sdhci_pltfm_pmops,
319 .of_match_table = sdhci_bcm_kona_of_match,
320 },
321 .probe = sdhci_bcm_kona_probe,
322 .remove = sdhci_pltfm_unregister,
323};
324module_platform_driver(sdhci_bcm_kona_driver);
325
326MODULE_DESCRIPTION("SDHCI driver for Broadcom Kona platform");
327MODULE_AUTHOR("Broadcom");
328MODULE_LICENSE("GPL v2");
1/*
2 * Copyright (C) 2013 Broadcom Corporation
3 *
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License as
6 * published by the Free Software Foundation version 2.
7 *
8 * This program is distributed "as is" WITHOUT ANY WARRANTY of any
9 * kind, whether express or implied; without even the implied warranty
10 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
12 */
13
14#include <linux/kernel.h>
15#include <linux/module.h>
16#include <linux/delay.h>
17#include <linux/highmem.h>
18#include <linux/platform_device.h>
19#include <linux/mmc/host.h>
20#include <linux/io.h>
21#include <linux/gpio.h>
22#include <linux/clk.h>
23#include <linux/regulator/consumer.h>
24#include <linux/of.h>
25#include <linux/of_device.h>
26#include <linux/of_gpio.h>
27#include <linux/mmc/slot-gpio.h>
28
29#include "sdhci-pltfm.h"
30#include "sdhci.h"
31
32#define SDHCI_SOFT_RESET 0x01000000
33#define KONA_SDHOST_CORECTRL 0x8000
34#define KONA_SDHOST_CD_PINCTRL 0x00000008
35#define KONA_SDHOST_STOP_HCLK 0x00000004
36#define KONA_SDHOST_RESET 0x00000002
37#define KONA_SDHOST_EN 0x00000001
38
39#define KONA_SDHOST_CORESTAT 0x8004
40#define KONA_SDHOST_WP 0x00000002
41#define KONA_SDHOST_CD_SW 0x00000001
42
43#define KONA_SDHOST_COREIMR 0x8008
44#define KONA_SDHOST_IP 0x00000001
45
46#define KONA_SDHOST_COREISR 0x800C
47#define KONA_SDHOST_COREIMSR 0x8010
48#define KONA_SDHOST_COREDBG1 0x8014
49#define KONA_SDHOST_COREGPO_MASK 0x8018
50
51#define SD_DETECT_GPIO_DEBOUNCE_128MS 128
52
53#define KONA_MMC_AUTOSUSPEND_DELAY (50)
54
55struct sdhci_bcm_kona_dev {
56 struct mutex write_lock; /* protect back to back writes */
57 struct clk *external_clk;
58};
59
60
61static int sdhci_bcm_kona_sd_reset(struct sdhci_host *host)
62{
63 unsigned int val;
64 unsigned long timeout;
65
66 /* This timeout should be sufficent for core to reset */
67 timeout = jiffies + msecs_to_jiffies(100);
68
69 /* reset the host using the top level reset */
70 val = sdhci_readl(host, KONA_SDHOST_CORECTRL);
71 val |= KONA_SDHOST_RESET;
72 sdhci_writel(host, val, KONA_SDHOST_CORECTRL);
73
74 while (!(sdhci_readl(host, KONA_SDHOST_CORECTRL) & KONA_SDHOST_RESET)) {
75 if (time_is_before_jiffies(timeout)) {
76 pr_err("Error: sd host is stuck in reset!!!\n");
77 return -EFAULT;
78 }
79 }
80
81 /* bring the host out of reset */
82 val = sdhci_readl(host, KONA_SDHOST_CORECTRL);
83 val &= ~KONA_SDHOST_RESET;
84
85 /*
86 * Back-to-Back register write needs a delay of 1ms at bootup (min 10uS)
87 * Back-to-Back writes to same register needs delay when SD bus clock
88 * is very low w.r.t AHB clock, mainly during boot-time and during card
89 * insert-removal.
90 */
91 usleep_range(1000, 5000);
92 sdhci_writel(host, val, KONA_SDHOST_CORECTRL);
93
94 return 0;
95}
96
97static void sdhci_bcm_kona_sd_init(struct sdhci_host *host)
98{
99 unsigned int val;
100
101 /* enable the interrupt from the IP core */
102 val = sdhci_readl(host, KONA_SDHOST_COREIMR);
103 val |= KONA_SDHOST_IP;
104 sdhci_writel(host, val, KONA_SDHOST_COREIMR);
105
106 /* Enable the AHB clock gating module to the host */
107 val = sdhci_readl(host, KONA_SDHOST_CORECTRL);
108 val |= KONA_SDHOST_EN;
109
110 /*
111 * Back-to-Back register write needs a delay of 1ms at bootup (min 10uS)
112 * Back-to-Back writes to same register needs delay when SD bus clock
113 * is very low w.r.t AHB clock, mainly during boot-time and during card
114 * insert-removal.
115 */
116 usleep_range(1000, 5000);
117 sdhci_writel(host, val, KONA_SDHOST_CORECTRL);
118}
119
120/*
121 * Software emulation of the SD card insertion/removal. Set insert=1 for insert
122 * and insert=0 for removal. The card detection is done by GPIO. For Broadcom
123 * IP to function properly the bit 0 of CORESTAT register needs to be set/reset
124 * to generate the CD IRQ handled in sdhci.c which schedules card_tasklet.
125 */
126static int sdhci_bcm_kona_sd_card_emulate(struct sdhci_host *host, int insert)
127{
128 struct sdhci_pltfm_host *pltfm_priv = sdhci_priv(host);
129 struct sdhci_bcm_kona_dev *kona_dev = sdhci_pltfm_priv(pltfm_priv);
130 u32 val;
131
132 /*
133 * Back-to-Back register write needs a delay of min 10uS.
134 * Back-to-Back writes to same register needs delay when SD bus clock
135 * is very low w.r.t AHB clock, mainly during boot-time and during card
136 * insert-removal.
137 * We keep 20uS
138 */
139 mutex_lock(&kona_dev->write_lock);
140 udelay(20);
141 val = sdhci_readl(host, KONA_SDHOST_CORESTAT);
142
143 if (insert) {
144 int ret;
145
146 ret = mmc_gpio_get_ro(host->mmc);
147 if (ret >= 0)
148 val = (val & ~KONA_SDHOST_WP) |
149 ((ret) ? KONA_SDHOST_WP : 0);
150
151 val |= KONA_SDHOST_CD_SW;
152 sdhci_writel(host, val, KONA_SDHOST_CORESTAT);
153 } else {
154 val &= ~KONA_SDHOST_CD_SW;
155 sdhci_writel(host, val, KONA_SDHOST_CORESTAT);
156 }
157 mutex_unlock(&kona_dev->write_lock);
158
159 return 0;
160}
161
162/*
163 * SD card interrupt event callback
164 */
165static void sdhci_bcm_kona_card_event(struct sdhci_host *host)
166{
167 if (mmc_gpio_get_cd(host->mmc) > 0) {
168 dev_dbg(mmc_dev(host->mmc),
169 "card inserted\n");
170 sdhci_bcm_kona_sd_card_emulate(host, 1);
171 } else {
172 dev_dbg(mmc_dev(host->mmc),
173 "card removed\n");
174 sdhci_bcm_kona_sd_card_emulate(host, 0);
175 }
176}
177
178/*
179 * Get the base clock. Use central clock source for now. Not sure if different
180 * clock speed to each dev is allowed
181 */
182static unsigned int sdhci_bcm_kona_get_max_clk(struct sdhci_host *host)
183{
184 struct sdhci_bcm_kona_dev *kona_dev;
185 struct sdhci_pltfm_host *pltfm_priv = sdhci_priv(host);
186 kona_dev = sdhci_pltfm_priv(pltfm_priv);
187
188 return host->mmc->f_max;
189}
190
191static unsigned int sdhci_bcm_kona_get_timeout_clock(struct sdhci_host *host)
192{
193 return sdhci_bcm_kona_get_max_clk(host);
194}
195
196static void sdhci_bcm_kona_init_74_clocks(struct sdhci_host *host,
197 u8 power_mode)
198{
199 /*
200 * JEDEC and SD spec specify supplying 74 continuous clocks to
201 * device after power up. With minimum bus (100KHz) that
202 * that translates to 740us
203 */
204 if (power_mode != MMC_POWER_OFF)
205 udelay(740);
206}
207
208static struct sdhci_ops sdhci_bcm_kona_ops = {
209 .get_max_clock = sdhci_bcm_kona_get_max_clk,
210 .get_timeout_clock = sdhci_bcm_kona_get_timeout_clock,
211 .platform_send_init_74_clocks = sdhci_bcm_kona_init_74_clocks,
212 .card_event = sdhci_bcm_kona_card_event,
213};
214
215static struct sdhci_pltfm_data sdhci_pltfm_data_kona = {
216 .ops = &sdhci_bcm_kona_ops,
217 .quirks = SDHCI_QUIRK_NO_CARD_NO_RESET |
218 SDHCI_QUIRK_BROKEN_TIMEOUT_VAL | SDHCI_QUIRK_32BIT_DMA_ADDR |
219 SDHCI_QUIRK_32BIT_DMA_SIZE | SDHCI_QUIRK_32BIT_ADMA_SIZE |
220 SDHCI_QUIRK_FORCE_BLK_SZ_2048 |
221 SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN,
222};
223
224static struct __initconst of_device_id sdhci_bcm_kona_of_match[] = {
225 { .compatible = "brcm,kona-sdhci"},
226 { .compatible = "bcm,kona-sdhci"}, /* deprecated name */
227 {}
228};
229MODULE_DEVICE_TABLE(of, sdhci_bcm_kona_of_match);
230
231static int sdhci_bcm_kona_probe(struct platform_device *pdev)
232{
233 struct sdhci_bcm_kona_dev *kona_dev = NULL;
234 struct sdhci_pltfm_host *pltfm_priv;
235 struct device *dev = &pdev->dev;
236 struct sdhci_host *host;
237 int ret;
238
239 ret = 0;
240
241 host = sdhci_pltfm_init(pdev, &sdhci_pltfm_data_kona,
242 sizeof(*kona_dev));
243 if (IS_ERR(host))
244 return PTR_ERR(host);
245
246 dev_dbg(dev, "%s: inited. IOADDR=%p\n", __func__, host->ioaddr);
247
248 pltfm_priv = sdhci_priv(host);
249
250 kona_dev = sdhci_pltfm_priv(pltfm_priv);
251 mutex_init(&kona_dev->write_lock);
252
253 mmc_of_parse(host->mmc);
254
255 if (!host->mmc->f_max) {
256 dev_err(&pdev->dev, "Missing max-freq for SDHCI cfg\n");
257 ret = -ENXIO;
258 goto err_pltfm_free;
259 }
260
261 /* Get and enable the external clock */
262 kona_dev->external_clk = devm_clk_get(dev, NULL);
263 if (IS_ERR(kona_dev->external_clk)) {
264 dev_err(dev, "Failed to get external clock\n");
265 ret = PTR_ERR(kona_dev->external_clk);
266 goto err_pltfm_free;
267 }
268
269 if (clk_set_rate(kona_dev->external_clk, host->mmc->f_max) != 0) {
270 dev_err(dev, "Failed to set rate external clock\n");
271 goto err_pltfm_free;
272 }
273
274 if (clk_prepare_enable(kona_dev->external_clk) != 0) {
275 dev_err(dev, "Failed to enable external clock\n");
276 goto err_pltfm_free;
277 }
278
279 dev_dbg(dev, "non-removable=%c\n",
280 (host->mmc->caps & MMC_CAP_NONREMOVABLE) ? 'Y' : 'N');
281 dev_dbg(dev, "cd_gpio %c, wp_gpio %c\n",
282 (mmc_gpio_get_cd(host->mmc) != -ENOSYS) ? 'Y' : 'N',
283 (mmc_gpio_get_ro(host->mmc) != -ENOSYS) ? 'Y' : 'N');
284
285 if (host->mmc->caps & MMC_CAP_NONREMOVABLE)
286 host->quirks |= SDHCI_QUIRK_BROKEN_CARD_DETECTION;
287
288 dev_dbg(dev, "is_8bit=%c\n",
289 (host->mmc->caps | MMC_CAP_8_BIT_DATA) ? 'Y' : 'N');
290
291 ret = sdhci_bcm_kona_sd_reset(host);
292 if (ret)
293 goto err_clk_disable;
294
295 sdhci_bcm_kona_sd_init(host);
296
297 ret = sdhci_add_host(host);
298 if (ret) {
299 dev_err(dev, "Failed sdhci_add_host\n");
300 goto err_reset;
301 }
302
303 /* if device is eMMC, emulate card insert right here */
304 if (host->mmc->caps & MMC_CAP_NONREMOVABLE) {
305 ret = sdhci_bcm_kona_sd_card_emulate(host, 1);
306 if (ret) {
307 dev_err(dev,
308 "unable to emulate card insertion\n");
309 goto err_remove_host;
310 }
311 }
312 /*
313 * Since the card detection GPIO interrupt is configured to be
314 * edge sensitive, check the initial GPIO value here, emulate
315 * only if the card is present
316 */
317 if (mmc_gpio_get_cd(host->mmc) > 0)
318 sdhci_bcm_kona_sd_card_emulate(host, 1);
319
320 dev_dbg(dev, "initialized properly\n");
321 return 0;
322
323err_remove_host:
324 sdhci_remove_host(host, 0);
325
326err_reset:
327 sdhci_bcm_kona_sd_reset(host);
328
329err_clk_disable:
330 clk_disable_unprepare(kona_dev->external_clk);
331
332err_pltfm_free:
333 sdhci_pltfm_free(pdev);
334
335 dev_err(dev, "Probing of sdhci-pltfm failed: %d\n", ret);
336 return ret;
337}
338
339static int sdhci_bcm_kona_remove(struct platform_device *pdev)
340{
341 struct sdhci_host *host = platform_get_drvdata(pdev);
342 struct sdhci_pltfm_host *pltfm_priv = sdhci_priv(host);
343 struct sdhci_bcm_kona_dev *kona_dev = sdhci_pltfm_priv(pltfm_priv);
344 int dead = (readl(host->ioaddr + SDHCI_INT_STATUS) == 0xffffffff);
345
346 sdhci_remove_host(host, dead);
347
348 clk_disable_unprepare(kona_dev->external_clk);
349
350 sdhci_pltfm_free(pdev);
351
352 return 0;
353}
354
355static struct platform_driver sdhci_bcm_kona_driver = {
356 .driver = {
357 .name = "sdhci-kona",
358 .owner = THIS_MODULE,
359 .pm = SDHCI_PLTFM_PMOPS,
360 .of_match_table = sdhci_bcm_kona_of_match,
361 },
362 .probe = sdhci_bcm_kona_probe,
363 .remove = sdhci_bcm_kona_remove,
364};
365module_platform_driver(sdhci_bcm_kona_driver);
366
367MODULE_DESCRIPTION("SDHCI driver for Broadcom Kona platform");
368MODULE_AUTHOR("Broadcom");
369MODULE_LICENSE("GPL v2");