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v6.2
  1/*
  2 * Copyright © 2007 David Airlie
  3 *
  4 * Permission is hereby granted, free of charge, to any person obtaining a
  5 * copy of this software and associated documentation files (the "Software"),
  6 * to deal in the Software without restriction, including without limitation
  7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  8 * and/or sell copies of the Software, and to permit persons to whom the
  9 * Software is furnished to do so, subject to the following conditions:
 10 *
 11 * The above copyright notice and this permission notice (including the next
 12 * paragraph) shall be included in all copies or substantial portions of the
 13 * Software.
 14 *
 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
 19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
 20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
 21 * DEALINGS IN THE SOFTWARE.
 22 *
 23 * Authors:
 24 *     David Airlie
 25 */
 26
 27#include <linux/module.h>
 28#include <linux/pci.h>
 29#include <linux/pm_runtime.h>
 30#include <linux/slab.h>
 31#include <linux/vga_switcheroo.h>
 32
 
 33#include <drm/drm_crtc.h>
 34#include <drm/drm_crtc_helper.h>
 35#include <drm/drm_fb_helper.h>
 36#include <drm/drm_fourcc.h>
 37#include <drm/drm_framebuffer.h>
 38#include <drm/radeon_drm.h>
 39
 40#include "radeon.h"
 41
 
 
 
 
 42/* object hierarchy -
 43 * this contains a helper + a radeon fb
 44 * the helper contains a pointer to radeon framebuffer baseclass.
 45 */
 46struct radeon_fbdev {
 47	struct drm_fb_helper helper; /* must be first */
 48	struct drm_framebuffer fb;
 
 49	struct radeon_device *rdev;
 50};
 51
 52static int
 53radeonfb_open(struct fb_info *info, int user)
 54{
 55	struct radeon_fbdev *rfbdev = info->par;
 56	struct radeon_device *rdev = rfbdev->rdev;
 57	int ret = pm_runtime_get_sync(rdev->ddev->dev);
 58
 59	if (ret < 0 && ret != -EACCES) {
 60		pm_runtime_mark_last_busy(rdev->ddev->dev);
 61		pm_runtime_put_autosuspend(rdev->ddev->dev);
 62		return ret;
 63	}
 64	return 0;
 65}
 66
 67static int
 68radeonfb_release(struct fb_info *info, int user)
 69{
 70	struct radeon_fbdev *rfbdev = info->par;
 71	struct radeon_device *rdev = rfbdev->rdev;
 72
 73	pm_runtime_mark_last_busy(rdev->ddev->dev);
 74	pm_runtime_put_autosuspend(rdev->ddev->dev);
 75	return 0;
 76}
 77
 78static const struct fb_ops radeonfb_ops = {
 79	.owner = THIS_MODULE,
 80	DRM_FB_HELPER_DEFAULT_OPS,
 81	.fb_open = radeonfb_open,
 82	.fb_release = radeonfb_release,
 83	.fb_read = drm_fb_helper_cfb_read,
 84	.fb_write = drm_fb_helper_cfb_write,
 85	.fb_fillrect = drm_fb_helper_cfb_fillrect,
 86	.fb_copyarea = drm_fb_helper_cfb_copyarea,
 87	.fb_imageblit = drm_fb_helper_cfb_imageblit,
 
 
 88};
 89
 90
 91int radeon_align_pitch(struct radeon_device *rdev, int width, int cpp, bool tiled)
 92{
 93	int aligned = width;
 94	int align_large = (ASIC_IS_AVIVO(rdev)) || tiled;
 95	int pitch_mask = 0;
 96
 97	switch (cpp) {
 98	case 1:
 99		pitch_mask = align_large ? 255 : 127;
100		break;
101	case 2:
102		pitch_mask = align_large ? 127 : 31;
103		break;
104	case 3:
105	case 4:
106		pitch_mask = align_large ? 63 : 15;
107		break;
108	}
109
110	aligned += pitch_mask;
111	aligned &= ~pitch_mask;
112	return aligned * cpp;
113}
114
115static void radeonfb_destroy_pinned_object(struct drm_gem_object *gobj)
116{
117	struct radeon_bo *rbo = gem_to_radeon_bo(gobj);
118	int ret;
119
120	ret = radeon_bo_reserve(rbo, false);
121	if (likely(ret == 0)) {
122		radeon_bo_kunmap(rbo);
123		radeon_bo_unpin(rbo);
124		radeon_bo_unreserve(rbo);
125	}
126	drm_gem_object_put(gobj);
127}
128
129static int radeonfb_create_pinned_object(struct radeon_fbdev *rfbdev,
130					 struct drm_mode_fb_cmd2 *mode_cmd,
131					 struct drm_gem_object **gobj_p)
132{
133	const struct drm_format_info *info;
134	struct radeon_device *rdev = rfbdev->rdev;
135	struct drm_gem_object *gobj = NULL;
136	struct radeon_bo *rbo = NULL;
137	bool fb_tiled = false; /* useful for testing */
138	u32 tiling_flags = 0;
139	int ret;
140	int aligned_size, size;
141	int height = mode_cmd->height;
142	u32 cpp;
143
144	info = drm_get_format_info(rdev->ddev, mode_cmd);
145	cpp = info->cpp[0];
146
147	/* need to align pitch with crtc limits */
148	mode_cmd->pitches[0] = radeon_align_pitch(rdev, mode_cmd->width, cpp,
149						  fb_tiled);
150
151	if (rdev->family >= CHIP_R600)
152		height = ALIGN(mode_cmd->height, 8);
153	size = mode_cmd->pitches[0] * height;
154	aligned_size = ALIGN(size, PAGE_SIZE);
155	ret = radeon_gem_object_create(rdev, aligned_size, 0,
156				       RADEON_GEM_DOMAIN_VRAM,
157				       0, true, &gobj);
 
158	if (ret) {
159		pr_err("failed to allocate framebuffer (%d)\n", aligned_size);
 
160		return -ENOMEM;
161	}
162	rbo = gem_to_radeon_bo(gobj);
163
164	if (fb_tiled)
165		tiling_flags = RADEON_TILING_MACRO;
166
167#ifdef __BIG_ENDIAN
168	switch (cpp) {
169	case 4:
170		tiling_flags |= RADEON_TILING_SWAP_32BIT;
171		break;
172	case 2:
173		tiling_flags |= RADEON_TILING_SWAP_16BIT;
174		break;
175	default:
176		break;
177	}
178#endif
179
180	if (tiling_flags) {
181		ret = radeon_bo_set_tiling_flags(rbo,
182						 tiling_flags | RADEON_TILING_SURFACE,
183						 mode_cmd->pitches[0]);
184		if (ret)
185			dev_err(rdev->dev, "FB failed to set tiling flags\n");
186	}
187
188
189	ret = radeon_bo_reserve(rbo, false);
190	if (unlikely(ret != 0))
191		goto out_unref;
192	/* Only 27 bit offset for legacy CRTC */
193	ret = radeon_bo_pin_restricted(rbo, RADEON_GEM_DOMAIN_VRAM,
194				       ASIC_IS_AVIVO(rdev) ? 0 : 1 << 27,
195				       NULL);
196	if (ret) {
197		radeon_bo_unreserve(rbo);
198		goto out_unref;
199	}
200	if (fb_tiled)
201		radeon_bo_check_tiling(rbo, 0, 0);
202	ret = radeon_bo_kmap(rbo, NULL);
203	radeon_bo_unreserve(rbo);
204	if (ret)
205		goto out_unref;
 
206
207	*gobj_p = gobj;
208	return 0;
209out_unref:
210	radeonfb_destroy_pinned_object(gobj);
211	*gobj_p = NULL;
212	return ret;
213}
214
215static int radeonfb_create(struct drm_fb_helper *helper,
216			   struct drm_fb_helper_surface_size *sizes)
217{
218	struct radeon_fbdev *rfbdev =
219		container_of(helper, struct radeon_fbdev, helper);
220	struct radeon_device *rdev = rfbdev->rdev;
221	struct fb_info *info;
222	struct drm_framebuffer *fb = NULL;
223	struct drm_mode_fb_cmd2 mode_cmd;
224	struct drm_gem_object *gobj = NULL;
225	struct radeon_bo *rbo = NULL;
 
226	int ret;
227	unsigned long tmp;
228
229	mode_cmd.width = sizes->surface_width;
230	mode_cmd.height = sizes->surface_height;
231
232	/* avivo can't scanout real 24bpp */
233	if ((sizes->surface_bpp == 24) && ASIC_IS_AVIVO(rdev))
234		sizes->surface_bpp = 32;
235
236	mode_cmd.pixel_format = drm_mode_legacy_fb_format(sizes->surface_bpp,
237							  sizes->surface_depth);
238
239	ret = radeonfb_create_pinned_object(rfbdev, &mode_cmd, &gobj);
240	if (ret) {
241		DRM_ERROR("failed to create fbcon object %d\n", ret);
242		return ret;
243	}
244
245	rbo = gem_to_radeon_bo(gobj);
246
247	/* okay we have an object now allocate the framebuffer */
248	info = drm_fb_helper_alloc_info(helper);
249	if (IS_ERR(info)) {
250		ret = PTR_ERR(info);
251		goto out;
252	}
253
254	/* radeon resume is fragile and needs a vt switch to help it along */
255	info->skip_vt_switch = false;
256
257	ret = radeon_framebuffer_init(rdev->ddev, &rfbdev->fb, &mode_cmd, gobj);
258	if (ret) {
259		DRM_ERROR("failed to initialize framebuffer %d\n", ret);
260		goto out;
261	}
262
263	fb = &rfbdev->fb;
264
265	/* setup helper */
266	rfbdev->helper.fb = fb;
 
267
268	memset_io(rbo->kptr, 0x0, radeon_bo_size(rbo));
269
 
 
 
 
 
270	info->fbops = &radeonfb_ops;
271
272	tmp = radeon_bo_gpu_offset(rbo) - rdev->mc.vram_start;
273	info->fix.smem_start = rdev->mc.aper_base + tmp;
274	info->fix.smem_len = radeon_bo_size(rbo);
275	info->screen_base = rbo->kptr;
276	info->screen_size = radeon_bo_size(rbo);
277
278	drm_fb_helper_fill_info(info, &rfbdev->helper, sizes);
279
280	/* setup aperture base/size for vesafb takeover */
281	info->apertures->ranges[0].base = rdev->mc.aper_base;
 
 
 
 
 
282	info->apertures->ranges[0].size = rdev->mc.aper_size;
283
284	/* Use default scratch pixmap (info->pixmap.flags = FB_PIXMAP_SYSTEM) */
285
286	if (info->screen_base == NULL) {
287		ret = -ENOSPC;
288		goto out;
 
 
 
 
 
 
289	}
290
291	DRM_INFO("fb mappable at 0x%lX\n",  info->fix.smem_start);
292	DRM_INFO("vram apper at 0x%lX\n",  (unsigned long)rdev->mc.aper_base);
293	DRM_INFO("size %lu\n", (unsigned long)radeon_bo_size(rbo));
294	DRM_INFO("fb depth is %d\n", fb->format->depth);
295	DRM_INFO("   pitch is %d\n", fb->pitches[0]);
296
297	vga_switcheroo_client_fb_set(rdev->pdev, info);
298	return 0;
299
300out:
 
 
 
301	if (fb && ret) {
302		drm_gem_object_put(gobj);
303		drm_framebuffer_unregister_private(fb);
304		drm_framebuffer_cleanup(fb);
305		kfree(fb);
306	}
307	return ret;
308}
309
 
 
 
 
 
310static int radeon_fbdev_destroy(struct drm_device *dev, struct radeon_fbdev *rfbdev)
311{
312	struct drm_framebuffer *fb = &rfbdev->fb;
 
313
314	drm_fb_helper_unregister_info(&rfbdev->helper);
 
315
316	if (fb->obj[0]) {
317		radeonfb_destroy_pinned_object(fb->obj[0]);
318		fb->obj[0] = NULL;
319		drm_framebuffer_unregister_private(fb);
320		drm_framebuffer_cleanup(fb);
 
 
 
 
321	}
322	drm_fb_helper_fini(&rfbdev->helper);
 
 
323
324	return 0;
325}
326
327static const struct drm_fb_helper_funcs radeon_fb_helper_funcs = {
 
 
328	.fb_probe = radeonfb_create,
329};
330
331int radeon_fbdev_init(struct radeon_device *rdev)
332{
333	struct radeon_fbdev *rfbdev;
334	int bpp_sel = 32;
335	int ret;
336
337	/* don't enable fbdev if no connectors */
338	if (list_empty(&rdev->ddev->mode_config.connector_list))
339		return 0;
340
341	/* select 8 bpp console on 8MB cards, or 16 bpp on RN50 or 32MB */
342	if (rdev->mc.real_vram_size <= (8*1024*1024))
343		bpp_sel = 8;
344	else if (ASIC_IS_RN50(rdev) ||
345		 rdev->mc.real_vram_size <= (32*1024*1024))
346		bpp_sel = 16;
347
348	rfbdev = kzalloc(sizeof(struct radeon_fbdev), GFP_KERNEL);
349	if (!rfbdev)
350		return -ENOMEM;
351
352	rfbdev->rdev = rdev;
353	rdev->mode_info.rfbdev = rfbdev;
 
354
355	drm_fb_helper_prepare(rdev->ddev, &rfbdev->helper,
356			      &radeon_fb_helper_funcs);
 
 
 
 
 
357
358	ret = drm_fb_helper_init(rdev->ddev, &rfbdev->helper);
359	if (ret)
360		goto free;
361
362	/* disable all the possible outputs/crtcs before entering KMS mode */
363	drm_helper_disable_unused_functions(rdev->ddev);
364
365	ret = drm_fb_helper_initial_config(&rfbdev->helper, bpp_sel);
366	if (ret)
367		goto fini;
368
369	return 0;
370
371fini:
372	drm_fb_helper_fini(&rfbdev->helper);
373free:
374	kfree(rfbdev);
375	return ret;
376}
377
378void radeon_fbdev_fini(struct radeon_device *rdev)
379{
380	if (!rdev->mode_info.rfbdev)
381		return;
382
383	radeon_fbdev_destroy(rdev->ddev, rdev->mode_info.rfbdev);
384	kfree(rdev->mode_info.rfbdev);
385	rdev->mode_info.rfbdev = NULL;
386}
387
388void radeon_fbdev_set_suspend(struct radeon_device *rdev, int state)
389{
390	if (rdev->mode_info.rfbdev)
391		drm_fb_helper_set_suspend(&rdev->mode_info.rfbdev->helper, state);
392}
393
394bool radeon_fbdev_robj_is_fb(struct radeon_device *rdev, struct radeon_bo *robj)
395{
396	if (!rdev->mode_info.rfbdev)
397		return false;
398
399	if (robj == gem_to_radeon_bo(rdev->mode_info.rfbdev->fb.obj[0]))
 
 
 
 
 
 
 
400		return true;
401	return false;
402}
v3.15
  1/*
  2 * Copyright © 2007 David Airlie
  3 *
  4 * Permission is hereby granted, free of charge, to any person obtaining a
  5 * copy of this software and associated documentation files (the "Software"),
  6 * to deal in the Software without restriction, including without limitation
  7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  8 * and/or sell copies of the Software, and to permit persons to whom the
  9 * Software is furnished to do so, subject to the following conditions:
 10 *
 11 * The above copyright notice and this permission notice (including the next
 12 * paragraph) shall be included in all copies or substantial portions of the
 13 * Software.
 14 *
 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
 19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
 20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
 21 * DEALINGS IN THE SOFTWARE.
 22 *
 23 * Authors:
 24 *     David Airlie
 25 */
 
 26#include <linux/module.h>
 
 
 27#include <linux/slab.h>
 28#include <linux/fb.h>
 29
 30#include <drm/drmP.h>
 31#include <drm/drm_crtc.h>
 32#include <drm/drm_crtc_helper.h>
 
 
 
 33#include <drm/radeon_drm.h>
 
 34#include "radeon.h"
 35
 36#include <drm/drm_fb_helper.h>
 37
 38#include <linux/vga_switcheroo.h>
 39
 40/* object hierarchy -
 41   this contains a helper + a radeon fb
 42   the helper contains a pointer to radeon framebuffer baseclass.
 43*/
 44struct radeon_fbdev {
 45	struct drm_fb_helper helper;
 46	struct radeon_framebuffer rfb;
 47	struct list_head fbdev_list;
 48	struct radeon_device *rdev;
 49};
 50
 51static struct fb_ops radeonfb_ops = {
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 52	.owner = THIS_MODULE,
 53	.fb_check_var = drm_fb_helper_check_var,
 54	.fb_set_par = drm_fb_helper_set_par,
 55	.fb_fillrect = cfb_fillrect,
 56	.fb_copyarea = cfb_copyarea,
 57	.fb_imageblit = cfb_imageblit,
 58	.fb_pan_display = drm_fb_helper_pan_display,
 59	.fb_blank = drm_fb_helper_blank,
 60	.fb_setcmap = drm_fb_helper_setcmap,
 61	.fb_debug_enter = drm_fb_helper_debug_enter,
 62	.fb_debug_leave = drm_fb_helper_debug_leave,
 63};
 64
 65
 66int radeon_align_pitch(struct radeon_device *rdev, int width, int bpp, bool tiled)
 67{
 68	int aligned = width;
 69	int align_large = (ASIC_IS_AVIVO(rdev)) || tiled;
 70	int pitch_mask = 0;
 71
 72	switch (bpp / 8) {
 73	case 1:
 74		pitch_mask = align_large ? 255 : 127;
 75		break;
 76	case 2:
 77		pitch_mask = align_large ? 127 : 31;
 78		break;
 79	case 3:
 80	case 4:
 81		pitch_mask = align_large ? 63 : 15;
 82		break;
 83	}
 84
 85	aligned += pitch_mask;
 86	aligned &= ~pitch_mask;
 87	return aligned;
 88}
 89
 90static void radeonfb_destroy_pinned_object(struct drm_gem_object *gobj)
 91{
 92	struct radeon_bo *rbo = gem_to_radeon_bo(gobj);
 93	int ret;
 94
 95	ret = radeon_bo_reserve(rbo, false);
 96	if (likely(ret == 0)) {
 97		radeon_bo_kunmap(rbo);
 98		radeon_bo_unpin(rbo);
 99		radeon_bo_unreserve(rbo);
100	}
101	drm_gem_object_unreference_unlocked(gobj);
102}
103
104static int radeonfb_create_pinned_object(struct radeon_fbdev *rfbdev,
105					 struct drm_mode_fb_cmd2 *mode_cmd,
106					 struct drm_gem_object **gobj_p)
107{
 
108	struct radeon_device *rdev = rfbdev->rdev;
109	struct drm_gem_object *gobj = NULL;
110	struct radeon_bo *rbo = NULL;
111	bool fb_tiled = false; /* useful for testing */
112	u32 tiling_flags = 0;
113	int ret;
114	int aligned_size, size;
115	int height = mode_cmd->height;
116	u32 bpp, depth;
117
118	drm_fb_get_bpp_depth(mode_cmd->pixel_format, &depth, &bpp);
 
119
120	/* need to align pitch with crtc limits */
121	mode_cmd->pitches[0] = radeon_align_pitch(rdev, mode_cmd->width, bpp,
122						  fb_tiled) * ((bpp + 1) / 8);
123
124	if (rdev->family >= CHIP_R600)
125		height = ALIGN(mode_cmd->height, 8);
126	size = mode_cmd->pitches[0] * height;
127	aligned_size = ALIGN(size, PAGE_SIZE);
128	ret = radeon_gem_object_create(rdev, aligned_size, 0,
129				       RADEON_GEM_DOMAIN_VRAM,
130				       false, true,
131				       &gobj);
132	if (ret) {
133		printk(KERN_ERR "failed to allocate framebuffer (%d)\n",
134		       aligned_size);
135		return -ENOMEM;
136	}
137	rbo = gem_to_radeon_bo(gobj);
138
139	if (fb_tiled)
140		tiling_flags = RADEON_TILING_MACRO;
141
142#ifdef __BIG_ENDIAN
143	switch (bpp) {
144	case 32:
145		tiling_flags |= RADEON_TILING_SWAP_32BIT;
146		break;
147	case 16:
148		tiling_flags |= RADEON_TILING_SWAP_16BIT;
 
149	default:
150		break;
151	}
152#endif
153
154	if (tiling_flags) {
155		ret = radeon_bo_set_tiling_flags(rbo,
156						 tiling_flags | RADEON_TILING_SURFACE,
157						 mode_cmd->pitches[0]);
158		if (ret)
159			dev_err(rdev->dev, "FB failed to set tiling flags\n");
160	}
161
162
163	ret = radeon_bo_reserve(rbo, false);
164	if (unlikely(ret != 0))
165		goto out_unref;
166	/* Only 27 bit offset for legacy CRTC */
167	ret = radeon_bo_pin_restricted(rbo, RADEON_GEM_DOMAIN_VRAM,
168				       ASIC_IS_AVIVO(rdev) ? 0 : 1 << 27,
169				       NULL);
170	if (ret) {
171		radeon_bo_unreserve(rbo);
172		goto out_unref;
173	}
174	if (fb_tiled)
175		radeon_bo_check_tiling(rbo, 0, 0);
176	ret = radeon_bo_kmap(rbo, NULL);
177	radeon_bo_unreserve(rbo);
178	if (ret) {
179		goto out_unref;
180	}
181
182	*gobj_p = gobj;
183	return 0;
184out_unref:
185	radeonfb_destroy_pinned_object(gobj);
186	*gobj_p = NULL;
187	return ret;
188}
189
190static int radeonfb_create(struct drm_fb_helper *helper,
191			   struct drm_fb_helper_surface_size *sizes)
192{
193	struct radeon_fbdev *rfbdev = (struct radeon_fbdev *)helper;
 
194	struct radeon_device *rdev = rfbdev->rdev;
195	struct fb_info *info;
196	struct drm_framebuffer *fb = NULL;
197	struct drm_mode_fb_cmd2 mode_cmd;
198	struct drm_gem_object *gobj = NULL;
199	struct radeon_bo *rbo = NULL;
200	struct device *device = &rdev->pdev->dev;
201	int ret;
202	unsigned long tmp;
203
204	mode_cmd.width = sizes->surface_width;
205	mode_cmd.height = sizes->surface_height;
206
207	/* avivo can't scanout real 24bpp */
208	if ((sizes->surface_bpp == 24) && ASIC_IS_AVIVO(rdev))
209		sizes->surface_bpp = 32;
210
211	mode_cmd.pixel_format = drm_mode_legacy_fb_format(sizes->surface_bpp,
212							  sizes->surface_depth);
213
214	ret = radeonfb_create_pinned_object(rfbdev, &mode_cmd, &gobj);
215	if (ret) {
216		DRM_ERROR("failed to create fbcon object %d\n", ret);
217		return ret;
218	}
219
220	rbo = gem_to_radeon_bo(gobj);
221
222	/* okay we have an object now allocate the framebuffer */
223	info = framebuffer_alloc(0, device);
224	if (info == NULL) {
225		ret = -ENOMEM;
226		goto out_unref;
227	}
228
229	info->par = rfbdev;
 
230
231	ret = radeon_framebuffer_init(rdev->ddev, &rfbdev->rfb, &mode_cmd, gobj);
232	if (ret) {
233		DRM_ERROR("failed to initialize framebuffer %d\n", ret);
234		goto out_unref;
235	}
236
237	fb = &rfbdev->rfb.base;
238
239	/* setup helper */
240	rfbdev->helper.fb = fb;
241	rfbdev->helper.fbdev = info;
242
243	memset_io(rbo->kptr, 0x0, radeon_bo_size(rbo));
244
245	strcpy(info->fix.id, "radeondrmfb");
246
247	drm_fb_helper_fill_fix(info, fb->pitches[0], fb->depth);
248
249	info->flags = FBINFO_DEFAULT | FBINFO_CAN_FORCE_OUTPUT;
250	info->fbops = &radeonfb_ops;
251
252	tmp = radeon_bo_gpu_offset(rbo) - rdev->mc.vram_start;
253	info->fix.smem_start = rdev->mc.aper_base + tmp;
254	info->fix.smem_len = radeon_bo_size(rbo);
255	info->screen_base = rbo->kptr;
256	info->screen_size = radeon_bo_size(rbo);
257
258	drm_fb_helper_fill_var(info, &rfbdev->helper, sizes->fb_width, sizes->fb_height);
259
260	/* setup aperture base/size for vesafb takeover */
261	info->apertures = alloc_apertures(1);
262	if (!info->apertures) {
263		ret = -ENOMEM;
264		goto out_unref;
265	}
266	info->apertures->ranges[0].base = rdev->ddev->mode_config.fb_base;
267	info->apertures->ranges[0].size = rdev->mc.aper_size;
268
269	/* Use default scratch pixmap (info->pixmap.flags = FB_PIXMAP_SYSTEM) */
270
271	if (info->screen_base == NULL) {
272		ret = -ENOSPC;
273		goto out_unref;
274	}
275
276	ret = fb_alloc_cmap(&info->cmap, 256, 0);
277	if (ret) {
278		ret = -ENOMEM;
279		goto out_unref;
280	}
281
282	DRM_INFO("fb mappable at 0x%lX\n",  info->fix.smem_start);
283	DRM_INFO("vram apper at 0x%lX\n",  (unsigned long)rdev->mc.aper_base);
284	DRM_INFO("size %lu\n", (unsigned long)radeon_bo_size(rbo));
285	DRM_INFO("fb depth is %d\n", fb->depth);
286	DRM_INFO("   pitch is %d\n", fb->pitches[0]);
287
288	vga_switcheroo_client_fb_set(rdev->ddev->pdev, info);
289	return 0;
290
291out_unref:
292	if (rbo) {
293
294	}
295	if (fb && ret) {
296		drm_gem_object_unreference(gobj);
297		drm_framebuffer_unregister_private(fb);
298		drm_framebuffer_cleanup(fb);
299		kfree(fb);
300	}
301	return ret;
302}
303
304void radeon_fb_output_poll_changed(struct radeon_device *rdev)
305{
306	drm_fb_helper_hotplug_event(&rdev->mode_info.rfbdev->helper);
307}
308
309static int radeon_fbdev_destroy(struct drm_device *dev, struct radeon_fbdev *rfbdev)
310{
311	struct fb_info *info;
312	struct radeon_framebuffer *rfb = &rfbdev->rfb;
313
314	if (rfbdev->helper.fbdev) {
315		info = rfbdev->helper.fbdev;
316
317		unregister_framebuffer(info);
318		if (info->cmap.len)
319			fb_dealloc_cmap(&info->cmap);
320		framebuffer_release(info);
321	}
322
323	if (rfb->obj) {
324		radeonfb_destroy_pinned_object(rfb->obj);
325		rfb->obj = NULL;
326	}
327	drm_fb_helper_fini(&rfbdev->helper);
328	drm_framebuffer_unregister_private(&rfb->base);
329	drm_framebuffer_cleanup(&rfb->base);
330
331	return 0;
332}
333
334static struct drm_fb_helper_funcs radeon_fb_helper_funcs = {
335	.gamma_set = radeon_crtc_fb_gamma_set,
336	.gamma_get = radeon_crtc_fb_gamma_get,
337	.fb_probe = radeonfb_create,
338};
339
340int radeon_fbdev_init(struct radeon_device *rdev)
341{
342	struct radeon_fbdev *rfbdev;
343	int bpp_sel = 32;
344	int ret;
345
346	/* select 8 bpp console on RN50 or 16MB cards */
347	if (ASIC_IS_RN50(rdev) || rdev->mc.real_vram_size <= (32*1024*1024))
 
 
 
 
348		bpp_sel = 8;
 
 
 
349
350	rfbdev = kzalloc(sizeof(struct radeon_fbdev), GFP_KERNEL);
351	if (!rfbdev)
352		return -ENOMEM;
353
354	rfbdev->rdev = rdev;
355	rdev->mode_info.rfbdev = rfbdev;
356	rfbdev->helper.funcs = &radeon_fb_helper_funcs;
357
358	ret = drm_fb_helper_init(rdev->ddev, &rfbdev->helper,
359				 rdev->num_crtc,
360				 RADEONFB_CONN_LIMIT);
361	if (ret) {
362		kfree(rfbdev);
363		return ret;
364	}
365
366	drm_fb_helper_single_add_all_connectors(&rfbdev->helper);
 
 
367
368	/* disable all the possible outputs/crtcs before entering KMS mode */
369	drm_helper_disable_unused_functions(rdev->ddev);
370
371	drm_fb_helper_initial_config(&rfbdev->helper, bpp_sel);
 
 
 
372	return 0;
 
 
 
 
 
 
373}
374
375void radeon_fbdev_fini(struct radeon_device *rdev)
376{
377	if (!rdev->mode_info.rfbdev)
378		return;
379
380	radeon_fbdev_destroy(rdev->ddev, rdev->mode_info.rfbdev);
381	kfree(rdev->mode_info.rfbdev);
382	rdev->mode_info.rfbdev = NULL;
383}
384
385void radeon_fbdev_set_suspend(struct radeon_device *rdev, int state)
386{
387	fb_set_suspend(rdev->mode_info.rfbdev->helper.fbdev, state);
 
388}
389
390int radeon_fbdev_total_size(struct radeon_device *rdev)
391{
392	struct radeon_bo *robj;
393	int size = 0;
394
395	robj = gem_to_radeon_bo(rdev->mode_info.rfbdev->rfb.obj);
396	size += radeon_bo_size(robj);
397	return size;
398}
399
400bool radeon_fbdev_robj_is_fb(struct radeon_device *rdev, struct radeon_bo *robj)
401{
402	if (robj == gem_to_radeon_bo(rdev->mode_info.rfbdev->rfb.obj))
403		return true;
404	return false;
405}