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1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Xilinx Zynq MPSoC Firmware layer
4 *
5 * Copyright (C) 2014-2022 Xilinx, Inc.
6 *
7 * Michal Simek <michal.simek@xilinx.com>
8 * Davorin Mista <davorin.mista@aggios.com>
9 * Jolly Shah <jollys@xilinx.com>
10 * Rajan Vaja <rajanv@xilinx.com>
11 */
12
13#include <linux/arm-smccc.h>
14#include <linux/compiler.h>
15#include <linux/device.h>
16#include <linux/init.h>
17#include <linux/mfd/core.h>
18#include <linux/module.h>
19#include <linux/of.h>
20#include <linux/of_platform.h>
21#include <linux/slab.h>
22#include <linux/uaccess.h>
23#include <linux/hashtable.h>
24
25#include <linux/firmware/xlnx-zynqmp.h>
26#include <linux/firmware/xlnx-event-manager.h>
27#include "zynqmp-debug.h"
28
29/* Max HashMap Order for PM API feature check (1<<7 = 128) */
30#define PM_API_FEATURE_CHECK_MAX_ORDER 7
31
32/* CRL registers and bitfields */
33#define CRL_APB_BASE 0xFF5E0000U
34/* BOOT_PIN_CTRL- Used to control the mode pins after boot */
35#define CRL_APB_BOOT_PIN_CTRL (CRL_APB_BASE + (0x250U))
36/* BOOT_PIN_CTRL_MASK- out_val[11:8], out_en[3:0] */
37#define CRL_APB_BOOTPIN_CTRL_MASK 0xF0FU
38
39/* IOCTL/QUERY feature payload size */
40#define FEATURE_PAYLOAD_SIZE 2
41
42/* Firmware feature check version mask */
43#define FIRMWARE_VERSION_MASK GENMASK(15, 0)
44
45static bool feature_check_enabled;
46static DEFINE_HASHTABLE(pm_api_features_map, PM_API_FEATURE_CHECK_MAX_ORDER);
47static u32 ioctl_features[FEATURE_PAYLOAD_SIZE];
48static u32 query_features[FEATURE_PAYLOAD_SIZE];
49
50static struct platform_device *em_dev;
51
52/**
53 * struct zynqmp_devinfo - Structure for Zynqmp device instance
54 * @dev: Device Pointer
55 * @feature_conf_id: Feature conf id
56 */
57struct zynqmp_devinfo {
58 struct device *dev;
59 u32 feature_conf_id;
60};
61
62/**
63 * struct pm_api_feature_data - PM API Feature data
64 * @pm_api_id: PM API Id, used as key to index into hashmap
65 * @feature_status: status of PM API feature: valid, invalid
66 * @hentry: hlist_node that hooks this entry into hashtable
67 */
68struct pm_api_feature_data {
69 u32 pm_api_id;
70 int feature_status;
71 struct hlist_node hentry;
72};
73
74static const struct mfd_cell firmware_devs[] = {
75 {
76 .name = "zynqmp_power_controller",
77 },
78};
79
80/**
81 * zynqmp_pm_ret_code() - Convert PMU-FW error codes to Linux error codes
82 * @ret_status: PMUFW return code
83 *
84 * Return: corresponding Linux error code
85 */
86static int zynqmp_pm_ret_code(u32 ret_status)
87{
88 switch (ret_status) {
89 case XST_PM_SUCCESS:
90 case XST_PM_DOUBLE_REQ:
91 return 0;
92 case XST_PM_NO_FEATURE:
93 return -ENOTSUPP;
94 case XST_PM_NO_ACCESS:
95 return -EACCES;
96 case XST_PM_ABORT_SUSPEND:
97 return -ECANCELED;
98 case XST_PM_MULT_USER:
99 return -EUSERS;
100 case XST_PM_INTERNAL:
101 case XST_PM_CONFLICT:
102 case XST_PM_INVALID_NODE:
103 default:
104 return -EINVAL;
105 }
106}
107
108static noinline int do_fw_call_fail(u64 arg0, u64 arg1, u64 arg2,
109 u32 *ret_payload)
110{
111 return -ENODEV;
112}
113
114/*
115 * PM function call wrapper
116 * Invoke do_fw_call_smc or do_fw_call_hvc, depending on the configuration
117 */
118static int (*do_fw_call)(u64, u64, u64, u32 *ret_payload) = do_fw_call_fail;
119
120/**
121 * do_fw_call_smc() - Call system-level platform management layer (SMC)
122 * @arg0: Argument 0 to SMC call
123 * @arg1: Argument 1 to SMC call
124 * @arg2: Argument 2 to SMC call
125 * @ret_payload: Returned value array
126 *
127 * Invoke platform management function via SMC call (no hypervisor present).
128 *
129 * Return: Returns status, either success or error+reason
130 */
131static noinline int do_fw_call_smc(u64 arg0, u64 arg1, u64 arg2,
132 u32 *ret_payload)
133{
134 struct arm_smccc_res res;
135
136 arm_smccc_smc(arg0, arg1, arg2, 0, 0, 0, 0, 0, &res);
137
138 if (ret_payload) {
139 ret_payload[0] = lower_32_bits(res.a0);
140 ret_payload[1] = upper_32_bits(res.a0);
141 ret_payload[2] = lower_32_bits(res.a1);
142 ret_payload[3] = upper_32_bits(res.a1);
143 }
144
145 return zynqmp_pm_ret_code((enum pm_ret_status)res.a0);
146}
147
148/**
149 * do_fw_call_hvc() - Call system-level platform management layer (HVC)
150 * @arg0: Argument 0 to HVC call
151 * @arg1: Argument 1 to HVC call
152 * @arg2: Argument 2 to HVC call
153 * @ret_payload: Returned value array
154 *
155 * Invoke platform management function via HVC
156 * HVC-based for communication through hypervisor
157 * (no direct communication with ATF).
158 *
159 * Return: Returns status, either success or error+reason
160 */
161static noinline int do_fw_call_hvc(u64 arg0, u64 arg1, u64 arg2,
162 u32 *ret_payload)
163{
164 struct arm_smccc_res res;
165
166 arm_smccc_hvc(arg0, arg1, arg2, 0, 0, 0, 0, 0, &res);
167
168 if (ret_payload) {
169 ret_payload[0] = lower_32_bits(res.a0);
170 ret_payload[1] = upper_32_bits(res.a0);
171 ret_payload[2] = lower_32_bits(res.a1);
172 ret_payload[3] = upper_32_bits(res.a1);
173 }
174
175 return zynqmp_pm_ret_code((enum pm_ret_status)res.a0);
176}
177
178static int __do_feature_check_call(const u32 api_id, u32 *ret_payload)
179{
180 int ret;
181 u64 smc_arg[2];
182
183 smc_arg[0] = PM_SIP_SVC | PM_FEATURE_CHECK;
184 smc_arg[1] = api_id;
185
186 ret = do_fw_call(smc_arg[0], smc_arg[1], 0, ret_payload);
187 if (ret)
188 ret = -EOPNOTSUPP;
189 else
190 ret = ret_payload[1];
191
192 return ret;
193}
194
195static int do_feature_check_call(const u32 api_id)
196{
197 int ret;
198 u32 ret_payload[PAYLOAD_ARG_CNT];
199 struct pm_api_feature_data *feature_data;
200
201 /* Check for existing entry in hash table for given api */
202 hash_for_each_possible(pm_api_features_map, feature_data, hentry,
203 api_id) {
204 if (feature_data->pm_api_id == api_id)
205 return feature_data->feature_status;
206 }
207
208 /* Add new entry if not present */
209 feature_data = kmalloc(sizeof(*feature_data), GFP_KERNEL);
210 if (!feature_data)
211 return -ENOMEM;
212
213 feature_data->pm_api_id = api_id;
214 ret = __do_feature_check_call(api_id, ret_payload);
215
216 feature_data->feature_status = ret;
217 hash_add(pm_api_features_map, &feature_data->hentry, api_id);
218
219 if (api_id == PM_IOCTL)
220 /* Store supported IOCTL IDs mask */
221 memcpy(ioctl_features, &ret_payload[2], FEATURE_PAYLOAD_SIZE * 4);
222 else if (api_id == PM_QUERY_DATA)
223 /* Store supported QUERY IDs mask */
224 memcpy(query_features, &ret_payload[2], FEATURE_PAYLOAD_SIZE * 4);
225
226 return ret;
227}
228EXPORT_SYMBOL_GPL(zynqmp_pm_feature);
229
230/**
231 * zynqmp_pm_feature() - Check whether given feature is supported or not and
232 * store supported IOCTL/QUERY ID mask
233 * @api_id: API ID to check
234 *
235 * Return: Returns status, either success or error+reason
236 */
237int zynqmp_pm_feature(const u32 api_id)
238{
239 int ret;
240
241 if (!feature_check_enabled)
242 return 0;
243
244 ret = do_feature_check_call(api_id);
245
246 return ret;
247}
248
249/**
250 * zynqmp_pm_is_function_supported() - Check whether given IOCTL/QUERY function
251 * is supported or not
252 * @api_id: PM_IOCTL or PM_QUERY_DATA
253 * @id: IOCTL or QUERY function IDs
254 *
255 * Return: Returns status, either success or error+reason
256 */
257int zynqmp_pm_is_function_supported(const u32 api_id, const u32 id)
258{
259 int ret;
260 u32 *bit_mask;
261
262 /* Input arguments validation */
263 if (id >= 64 || (api_id != PM_IOCTL && api_id != PM_QUERY_DATA))
264 return -EINVAL;
265
266 /* Check feature check API version */
267 ret = do_feature_check_call(PM_FEATURE_CHECK);
268 if (ret < 0)
269 return ret;
270
271 /* Check if feature check version 2 is supported or not */
272 if ((ret & FIRMWARE_VERSION_MASK) == PM_API_VERSION_2) {
273 /*
274 * Call feature check for IOCTL/QUERY API to get IOCTL ID or
275 * QUERY ID feature status.
276 */
277 ret = do_feature_check_call(api_id);
278 if (ret < 0)
279 return ret;
280
281 bit_mask = (api_id == PM_IOCTL) ? ioctl_features : query_features;
282
283 if ((bit_mask[(id / 32)] & BIT((id % 32))) == 0U)
284 return -EOPNOTSUPP;
285 } else {
286 return -ENODATA;
287 }
288
289 return 0;
290}
291EXPORT_SYMBOL_GPL(zynqmp_pm_is_function_supported);
292
293/**
294 * zynqmp_pm_invoke_fn() - Invoke the system-level platform management layer
295 * caller function depending on the configuration
296 * @pm_api_id: Requested PM-API call
297 * @arg0: Argument 0 to requested PM-API call
298 * @arg1: Argument 1 to requested PM-API call
299 * @arg2: Argument 2 to requested PM-API call
300 * @arg3: Argument 3 to requested PM-API call
301 * @ret_payload: Returned value array
302 *
303 * Invoke platform management function for SMC or HVC call, depending on
304 * configuration.
305 * Following SMC Calling Convention (SMCCC) for SMC64:
306 * Pm Function Identifier,
307 * PM_SIP_SVC + PM_API_ID =
308 * ((SMC_TYPE_FAST << FUNCID_TYPE_SHIFT)
309 * ((SMC_64) << FUNCID_CC_SHIFT)
310 * ((SIP_START) << FUNCID_OEN_SHIFT)
311 * ((PM_API_ID) & FUNCID_NUM_MASK))
312 *
313 * PM_SIP_SVC - Registered ZynqMP SIP Service Call.
314 * PM_API_ID - Platform Management API ID.
315 *
316 * Return: Returns status, either success or error+reason
317 */
318int zynqmp_pm_invoke_fn(u32 pm_api_id, u32 arg0, u32 arg1,
319 u32 arg2, u32 arg3, u32 *ret_payload)
320{
321 /*
322 * Added SIP service call Function Identifier
323 * Make sure to stay in x0 register
324 */
325 u64 smc_arg[4];
326 int ret;
327
328 /* Check if feature is supported or not */
329 ret = zynqmp_pm_feature(pm_api_id);
330 if (ret < 0)
331 return ret;
332
333 smc_arg[0] = PM_SIP_SVC | pm_api_id;
334 smc_arg[1] = ((u64)arg1 << 32) | arg0;
335 smc_arg[2] = ((u64)arg3 << 32) | arg2;
336
337 return do_fw_call(smc_arg[0], smc_arg[1], smc_arg[2], ret_payload);
338}
339
340static u32 pm_api_version;
341static u32 pm_tz_version;
342
343int zynqmp_pm_register_sgi(u32 sgi_num, u32 reset)
344{
345 int ret;
346
347 ret = zynqmp_pm_invoke_fn(TF_A_PM_REGISTER_SGI, sgi_num, reset, 0, 0,
348 NULL);
349 if (!ret)
350 return ret;
351
352 /* try old implementation as fallback strategy if above fails */
353 return zynqmp_pm_invoke_fn(PM_IOCTL, 0, IOCTL_REGISTER_SGI, sgi_num,
354 reset, NULL);
355}
356
357/**
358 * zynqmp_pm_get_api_version() - Get version number of PMU PM firmware
359 * @version: Returned version value
360 *
361 * Return: Returns status, either success or error+reason
362 */
363int zynqmp_pm_get_api_version(u32 *version)
364{
365 u32 ret_payload[PAYLOAD_ARG_CNT];
366 int ret;
367
368 if (!version)
369 return -EINVAL;
370
371 /* Check is PM API version already verified */
372 if (pm_api_version > 0) {
373 *version = pm_api_version;
374 return 0;
375 }
376 ret = zynqmp_pm_invoke_fn(PM_GET_API_VERSION, 0, 0, 0, 0, ret_payload);
377 *version = ret_payload[1];
378
379 return ret;
380}
381EXPORT_SYMBOL_GPL(zynqmp_pm_get_api_version);
382
383/**
384 * zynqmp_pm_get_chipid - Get silicon ID registers
385 * @idcode: IDCODE register
386 * @version: version register
387 *
388 * Return: Returns the status of the operation and the idcode and version
389 * registers in @idcode and @version.
390 */
391int zynqmp_pm_get_chipid(u32 *idcode, u32 *version)
392{
393 u32 ret_payload[PAYLOAD_ARG_CNT];
394 int ret;
395
396 if (!idcode || !version)
397 return -EINVAL;
398
399 ret = zynqmp_pm_invoke_fn(PM_GET_CHIPID, 0, 0, 0, 0, ret_payload);
400 *idcode = ret_payload[1];
401 *version = ret_payload[2];
402
403 return ret;
404}
405EXPORT_SYMBOL_GPL(zynqmp_pm_get_chipid);
406
407/**
408 * zynqmp_pm_get_trustzone_version() - Get secure trustzone firmware version
409 * @version: Returned version value
410 *
411 * Return: Returns status, either success or error+reason
412 */
413static int zynqmp_pm_get_trustzone_version(u32 *version)
414{
415 u32 ret_payload[PAYLOAD_ARG_CNT];
416 int ret;
417
418 if (!version)
419 return -EINVAL;
420
421 /* Check is PM trustzone version already verified */
422 if (pm_tz_version > 0) {
423 *version = pm_tz_version;
424 return 0;
425 }
426 ret = zynqmp_pm_invoke_fn(PM_GET_TRUSTZONE_VERSION, 0, 0,
427 0, 0, ret_payload);
428 *version = ret_payload[1];
429
430 return ret;
431}
432
433/**
434 * get_set_conduit_method() - Choose SMC or HVC based communication
435 * @np: Pointer to the device_node structure
436 *
437 * Use SMC or HVC-based functions to communicate with EL2/EL3.
438 *
439 * Return: Returns 0 on success or error code
440 */
441static int get_set_conduit_method(struct device_node *np)
442{
443 const char *method;
444
445 if (of_property_read_string(np, "method", &method)) {
446 pr_warn("%s missing \"method\" property\n", __func__);
447 return -ENXIO;
448 }
449
450 if (!strcmp("hvc", method)) {
451 do_fw_call = do_fw_call_hvc;
452 } else if (!strcmp("smc", method)) {
453 do_fw_call = do_fw_call_smc;
454 } else {
455 pr_warn("%s Invalid \"method\" property: %s\n",
456 __func__, method);
457 return -EINVAL;
458 }
459
460 return 0;
461}
462
463/**
464 * zynqmp_pm_query_data() - Get query data from firmware
465 * @qdata: Variable to the zynqmp_pm_query_data structure
466 * @out: Returned output value
467 *
468 * Return: Returns status, either success or error+reason
469 */
470int zynqmp_pm_query_data(struct zynqmp_pm_query_data qdata, u32 *out)
471{
472 int ret;
473
474 ret = zynqmp_pm_invoke_fn(PM_QUERY_DATA, qdata.qid, qdata.arg1,
475 qdata.arg2, qdata.arg3, out);
476
477 /*
478 * For clock name query, all bytes in SMC response are clock name
479 * characters and return code is always success. For invalid clocks,
480 * clock name bytes would be zeros.
481 */
482 return qdata.qid == PM_QID_CLOCK_GET_NAME ? 0 : ret;
483}
484EXPORT_SYMBOL_GPL(zynqmp_pm_query_data);
485
486/**
487 * zynqmp_pm_clock_enable() - Enable the clock for given id
488 * @clock_id: ID of the clock to be enabled
489 *
490 * This function is used by master to enable the clock
491 * including peripherals and PLL clocks.
492 *
493 * Return: Returns status, either success or error+reason
494 */
495int zynqmp_pm_clock_enable(u32 clock_id)
496{
497 return zynqmp_pm_invoke_fn(PM_CLOCK_ENABLE, clock_id, 0, 0, 0, NULL);
498}
499EXPORT_SYMBOL_GPL(zynqmp_pm_clock_enable);
500
501/**
502 * zynqmp_pm_clock_disable() - Disable the clock for given id
503 * @clock_id: ID of the clock to be disable
504 *
505 * This function is used by master to disable the clock
506 * including peripherals and PLL clocks.
507 *
508 * Return: Returns status, either success or error+reason
509 */
510int zynqmp_pm_clock_disable(u32 clock_id)
511{
512 return zynqmp_pm_invoke_fn(PM_CLOCK_DISABLE, clock_id, 0, 0, 0, NULL);
513}
514EXPORT_SYMBOL_GPL(zynqmp_pm_clock_disable);
515
516/**
517 * zynqmp_pm_clock_getstate() - Get the clock state for given id
518 * @clock_id: ID of the clock to be queried
519 * @state: 1/0 (Enabled/Disabled)
520 *
521 * This function is used by master to get the state of clock
522 * including peripherals and PLL clocks.
523 *
524 * Return: Returns status, either success or error+reason
525 */
526int zynqmp_pm_clock_getstate(u32 clock_id, u32 *state)
527{
528 u32 ret_payload[PAYLOAD_ARG_CNT];
529 int ret;
530
531 ret = zynqmp_pm_invoke_fn(PM_CLOCK_GETSTATE, clock_id, 0,
532 0, 0, ret_payload);
533 *state = ret_payload[1];
534
535 return ret;
536}
537EXPORT_SYMBOL_GPL(zynqmp_pm_clock_getstate);
538
539/**
540 * zynqmp_pm_clock_setdivider() - Set the clock divider for given id
541 * @clock_id: ID of the clock
542 * @divider: divider value
543 *
544 * This function is used by master to set divider for any clock
545 * to achieve desired rate.
546 *
547 * Return: Returns status, either success or error+reason
548 */
549int zynqmp_pm_clock_setdivider(u32 clock_id, u32 divider)
550{
551 return zynqmp_pm_invoke_fn(PM_CLOCK_SETDIVIDER, clock_id, divider,
552 0, 0, NULL);
553}
554EXPORT_SYMBOL_GPL(zynqmp_pm_clock_setdivider);
555
556/**
557 * zynqmp_pm_clock_getdivider() - Get the clock divider for given id
558 * @clock_id: ID of the clock
559 * @divider: divider value
560 *
561 * This function is used by master to get divider values
562 * for any clock.
563 *
564 * Return: Returns status, either success or error+reason
565 */
566int zynqmp_pm_clock_getdivider(u32 clock_id, u32 *divider)
567{
568 u32 ret_payload[PAYLOAD_ARG_CNT];
569 int ret;
570
571 ret = zynqmp_pm_invoke_fn(PM_CLOCK_GETDIVIDER, clock_id, 0,
572 0, 0, ret_payload);
573 *divider = ret_payload[1];
574
575 return ret;
576}
577EXPORT_SYMBOL_GPL(zynqmp_pm_clock_getdivider);
578
579/**
580 * zynqmp_pm_clock_setrate() - Set the clock rate for given id
581 * @clock_id: ID of the clock
582 * @rate: rate value in hz
583 *
584 * This function is used by master to set rate for any clock.
585 *
586 * Return: Returns status, either success or error+reason
587 */
588int zynqmp_pm_clock_setrate(u32 clock_id, u64 rate)
589{
590 return zynqmp_pm_invoke_fn(PM_CLOCK_SETRATE, clock_id,
591 lower_32_bits(rate),
592 upper_32_bits(rate),
593 0, NULL);
594}
595EXPORT_SYMBOL_GPL(zynqmp_pm_clock_setrate);
596
597/**
598 * zynqmp_pm_clock_getrate() - Get the clock rate for given id
599 * @clock_id: ID of the clock
600 * @rate: rate value in hz
601 *
602 * This function is used by master to get rate
603 * for any clock.
604 *
605 * Return: Returns status, either success or error+reason
606 */
607int zynqmp_pm_clock_getrate(u32 clock_id, u64 *rate)
608{
609 u32 ret_payload[PAYLOAD_ARG_CNT];
610 int ret;
611
612 ret = zynqmp_pm_invoke_fn(PM_CLOCK_GETRATE, clock_id, 0,
613 0, 0, ret_payload);
614 *rate = ((u64)ret_payload[2] << 32) | ret_payload[1];
615
616 return ret;
617}
618EXPORT_SYMBOL_GPL(zynqmp_pm_clock_getrate);
619
620/**
621 * zynqmp_pm_clock_setparent() - Set the clock parent for given id
622 * @clock_id: ID of the clock
623 * @parent_id: parent id
624 *
625 * This function is used by master to set parent for any clock.
626 *
627 * Return: Returns status, either success or error+reason
628 */
629int zynqmp_pm_clock_setparent(u32 clock_id, u32 parent_id)
630{
631 return zynqmp_pm_invoke_fn(PM_CLOCK_SETPARENT, clock_id,
632 parent_id, 0, 0, NULL);
633}
634EXPORT_SYMBOL_GPL(zynqmp_pm_clock_setparent);
635
636/**
637 * zynqmp_pm_clock_getparent() - Get the clock parent for given id
638 * @clock_id: ID of the clock
639 * @parent_id: parent id
640 *
641 * This function is used by master to get parent index
642 * for any clock.
643 *
644 * Return: Returns status, either success or error+reason
645 */
646int zynqmp_pm_clock_getparent(u32 clock_id, u32 *parent_id)
647{
648 u32 ret_payload[PAYLOAD_ARG_CNT];
649 int ret;
650
651 ret = zynqmp_pm_invoke_fn(PM_CLOCK_GETPARENT, clock_id, 0,
652 0, 0, ret_payload);
653 *parent_id = ret_payload[1];
654
655 return ret;
656}
657EXPORT_SYMBOL_GPL(zynqmp_pm_clock_getparent);
658
659/**
660 * zynqmp_pm_set_pll_frac_mode() - PM API for set PLL mode
661 *
662 * @clk_id: PLL clock ID
663 * @mode: PLL mode (PLL_MODE_FRAC/PLL_MODE_INT)
664 *
665 * This function sets PLL mode
666 *
667 * Return: Returns status, either success or error+reason
668 */
669int zynqmp_pm_set_pll_frac_mode(u32 clk_id, u32 mode)
670{
671 return zynqmp_pm_invoke_fn(PM_IOCTL, 0, IOCTL_SET_PLL_FRAC_MODE,
672 clk_id, mode, NULL);
673}
674EXPORT_SYMBOL_GPL(zynqmp_pm_set_pll_frac_mode);
675
676/**
677 * zynqmp_pm_get_pll_frac_mode() - PM API for get PLL mode
678 *
679 * @clk_id: PLL clock ID
680 * @mode: PLL mode
681 *
682 * This function return current PLL mode
683 *
684 * Return: Returns status, either success or error+reason
685 */
686int zynqmp_pm_get_pll_frac_mode(u32 clk_id, u32 *mode)
687{
688 return zynqmp_pm_invoke_fn(PM_IOCTL, 0, IOCTL_GET_PLL_FRAC_MODE,
689 clk_id, 0, mode);
690}
691EXPORT_SYMBOL_GPL(zynqmp_pm_get_pll_frac_mode);
692
693/**
694 * zynqmp_pm_set_pll_frac_data() - PM API for setting pll fraction data
695 *
696 * @clk_id: PLL clock ID
697 * @data: fraction data
698 *
699 * This function sets fraction data.
700 * It is valid for fraction mode only.
701 *
702 * Return: Returns status, either success or error+reason
703 */
704int zynqmp_pm_set_pll_frac_data(u32 clk_id, u32 data)
705{
706 return zynqmp_pm_invoke_fn(PM_IOCTL, 0, IOCTL_SET_PLL_FRAC_DATA,
707 clk_id, data, NULL);
708}
709EXPORT_SYMBOL_GPL(zynqmp_pm_set_pll_frac_data);
710
711/**
712 * zynqmp_pm_get_pll_frac_data() - PM API for getting pll fraction data
713 *
714 * @clk_id: PLL clock ID
715 * @data: fraction data
716 *
717 * This function returns fraction data value.
718 *
719 * Return: Returns status, either success or error+reason
720 */
721int zynqmp_pm_get_pll_frac_data(u32 clk_id, u32 *data)
722{
723 return zynqmp_pm_invoke_fn(PM_IOCTL, 0, IOCTL_GET_PLL_FRAC_DATA,
724 clk_id, 0, data);
725}
726EXPORT_SYMBOL_GPL(zynqmp_pm_get_pll_frac_data);
727
728/**
729 * zynqmp_pm_set_sd_tapdelay() - Set tap delay for the SD device
730 *
731 * @node_id: Node ID of the device
732 * @type: Type of tap delay to set (input/output)
733 * @value: Value to set fot the tap delay
734 *
735 * This function sets input/output tap delay for the SD device.
736 *
737 * Return: Returns status, either success or error+reason
738 */
739int zynqmp_pm_set_sd_tapdelay(u32 node_id, u32 type, u32 value)
740{
741 return zynqmp_pm_invoke_fn(PM_IOCTL, node_id, IOCTL_SET_SD_TAPDELAY,
742 type, value, NULL);
743}
744EXPORT_SYMBOL_GPL(zynqmp_pm_set_sd_tapdelay);
745
746/**
747 * zynqmp_pm_sd_dll_reset() - Reset DLL logic
748 *
749 * @node_id: Node ID of the device
750 * @type: Reset type
751 *
752 * This function resets DLL logic for the SD device.
753 *
754 * Return: Returns status, either success or error+reason
755 */
756int zynqmp_pm_sd_dll_reset(u32 node_id, u32 type)
757{
758 return zynqmp_pm_invoke_fn(PM_IOCTL, node_id, IOCTL_SD_DLL_RESET,
759 type, 0, NULL);
760}
761EXPORT_SYMBOL_GPL(zynqmp_pm_sd_dll_reset);
762
763/**
764 * zynqmp_pm_ospi_mux_select() - OSPI Mux selection
765 *
766 * @dev_id: Device Id of the OSPI device.
767 * @select: OSPI Mux select value.
768 *
769 * This function select the OSPI Mux.
770 *
771 * Return: Returns status, either success or error+reason
772 */
773int zynqmp_pm_ospi_mux_select(u32 dev_id, u32 select)
774{
775 return zynqmp_pm_invoke_fn(PM_IOCTL, dev_id, IOCTL_OSPI_MUX_SELECT,
776 select, 0, NULL);
777}
778EXPORT_SYMBOL_GPL(zynqmp_pm_ospi_mux_select);
779
780/**
781 * zynqmp_pm_write_ggs() - PM API for writing global general storage (ggs)
782 * @index: GGS register index
783 * @value: Register value to be written
784 *
785 * This function writes value to GGS register.
786 *
787 * Return: Returns status, either success or error+reason
788 */
789int zynqmp_pm_write_ggs(u32 index, u32 value)
790{
791 return zynqmp_pm_invoke_fn(PM_IOCTL, 0, IOCTL_WRITE_GGS,
792 index, value, NULL);
793}
794EXPORT_SYMBOL_GPL(zynqmp_pm_write_ggs);
795
796/**
797 * zynqmp_pm_read_ggs() - PM API for reading global general storage (ggs)
798 * @index: GGS register index
799 * @value: Register value to be written
800 *
801 * This function returns GGS register value.
802 *
803 * Return: Returns status, either success or error+reason
804 */
805int zynqmp_pm_read_ggs(u32 index, u32 *value)
806{
807 return zynqmp_pm_invoke_fn(PM_IOCTL, 0, IOCTL_READ_GGS,
808 index, 0, value);
809}
810EXPORT_SYMBOL_GPL(zynqmp_pm_read_ggs);
811
812/**
813 * zynqmp_pm_write_pggs() - PM API for writing persistent global general
814 * storage (pggs)
815 * @index: PGGS register index
816 * @value: Register value to be written
817 *
818 * This function writes value to PGGS register.
819 *
820 * Return: Returns status, either success or error+reason
821 */
822int zynqmp_pm_write_pggs(u32 index, u32 value)
823{
824 return zynqmp_pm_invoke_fn(PM_IOCTL, 0, IOCTL_WRITE_PGGS, index, value,
825 NULL);
826}
827EXPORT_SYMBOL_GPL(zynqmp_pm_write_pggs);
828
829/**
830 * zynqmp_pm_read_pggs() - PM API for reading persistent global general
831 * storage (pggs)
832 * @index: PGGS register index
833 * @value: Register value to be written
834 *
835 * This function returns PGGS register value.
836 *
837 * Return: Returns status, either success or error+reason
838 */
839int zynqmp_pm_read_pggs(u32 index, u32 *value)
840{
841 return zynqmp_pm_invoke_fn(PM_IOCTL, 0, IOCTL_READ_PGGS, index, 0,
842 value);
843}
844EXPORT_SYMBOL_GPL(zynqmp_pm_read_pggs);
845
846int zynqmp_pm_set_tapdelay_bypass(u32 index, u32 value)
847{
848 return zynqmp_pm_invoke_fn(PM_IOCTL, 0, IOCTL_SET_TAPDELAY_BYPASS,
849 index, value, NULL);
850}
851EXPORT_SYMBOL_GPL(zynqmp_pm_set_tapdelay_bypass);
852
853/**
854 * zynqmp_pm_set_boot_health_status() - PM API for setting healthy boot status
855 * @value: Status value to be written
856 *
857 * This function sets healthy bit value to indicate boot health status
858 * to firmware.
859 *
860 * Return: Returns status, either success or error+reason
861 */
862int zynqmp_pm_set_boot_health_status(u32 value)
863{
864 return zynqmp_pm_invoke_fn(PM_IOCTL, 0, IOCTL_SET_BOOT_HEALTH_STATUS,
865 value, 0, NULL);
866}
867
868/**
869 * zynqmp_pm_reset_assert - Request setting of reset (1 - assert, 0 - release)
870 * @reset: Reset to be configured
871 * @assert_flag: Flag stating should reset be asserted (1) or
872 * released (0)
873 *
874 * Return: Returns status, either success or error+reason
875 */
876int zynqmp_pm_reset_assert(const enum zynqmp_pm_reset reset,
877 const enum zynqmp_pm_reset_action assert_flag)
878{
879 return zynqmp_pm_invoke_fn(PM_RESET_ASSERT, reset, assert_flag,
880 0, 0, NULL);
881}
882EXPORT_SYMBOL_GPL(zynqmp_pm_reset_assert);
883
884/**
885 * zynqmp_pm_reset_get_status - Get status of the reset
886 * @reset: Reset whose status should be returned
887 * @status: Returned status
888 *
889 * Return: Returns status, either success or error+reason
890 */
891int zynqmp_pm_reset_get_status(const enum zynqmp_pm_reset reset, u32 *status)
892{
893 u32 ret_payload[PAYLOAD_ARG_CNT];
894 int ret;
895
896 if (!status)
897 return -EINVAL;
898
899 ret = zynqmp_pm_invoke_fn(PM_RESET_GET_STATUS, reset, 0,
900 0, 0, ret_payload);
901 *status = ret_payload[1];
902
903 return ret;
904}
905EXPORT_SYMBOL_GPL(zynqmp_pm_reset_get_status);
906
907/**
908 * zynqmp_pm_fpga_load - Perform the fpga load
909 * @address: Address to write to
910 * @size: pl bitstream size
911 * @flags: Bitstream type
912 * -XILINX_ZYNQMP_PM_FPGA_FULL: FPGA full reconfiguration
913 * -XILINX_ZYNQMP_PM_FPGA_PARTIAL: FPGA partial reconfiguration
914 *
915 * This function provides access to pmufw. To transfer
916 * the required bitstream into PL.
917 *
918 * Return: Returns status, either success or error+reason
919 */
920int zynqmp_pm_fpga_load(const u64 address, const u32 size, const u32 flags)
921{
922 return zynqmp_pm_invoke_fn(PM_FPGA_LOAD, lower_32_bits(address),
923 upper_32_bits(address), size, flags, NULL);
924}
925EXPORT_SYMBOL_GPL(zynqmp_pm_fpga_load);
926
927/**
928 * zynqmp_pm_fpga_get_status - Read value from PCAP status register
929 * @value: Value to read
930 *
931 * This function provides access to the pmufw to get the PCAP
932 * status
933 *
934 * Return: Returns status, either success or error+reason
935 */
936int zynqmp_pm_fpga_get_status(u32 *value)
937{
938 u32 ret_payload[PAYLOAD_ARG_CNT];
939 int ret;
940
941 if (!value)
942 return -EINVAL;
943
944 ret = zynqmp_pm_invoke_fn(PM_FPGA_GET_STATUS, 0, 0, 0, 0, ret_payload);
945 *value = ret_payload[1];
946
947 return ret;
948}
949EXPORT_SYMBOL_GPL(zynqmp_pm_fpga_get_status);
950
951/**
952 * zynqmp_pm_pinctrl_request - Request Pin from firmware
953 * @pin: Pin number to request
954 *
955 * This function requests pin from firmware.
956 *
957 * Return: Returns status, either success or error+reason.
958 */
959int zynqmp_pm_pinctrl_request(const u32 pin)
960{
961 return zynqmp_pm_invoke_fn(PM_PINCTRL_REQUEST, pin, 0, 0, 0, NULL);
962}
963EXPORT_SYMBOL_GPL(zynqmp_pm_pinctrl_request);
964
965/**
966 * zynqmp_pm_pinctrl_release - Inform firmware that Pin control is released
967 * @pin: Pin number to release
968 *
969 * This function release pin from firmware.
970 *
971 * Return: Returns status, either success or error+reason.
972 */
973int zynqmp_pm_pinctrl_release(const u32 pin)
974{
975 return zynqmp_pm_invoke_fn(PM_PINCTRL_RELEASE, pin, 0, 0, 0, NULL);
976}
977EXPORT_SYMBOL_GPL(zynqmp_pm_pinctrl_release);
978
979/**
980 * zynqmp_pm_pinctrl_get_function - Read function id set for the given pin
981 * @pin: Pin number
982 * @id: Buffer to store function ID
983 *
984 * This function provides the function currently set for the given pin.
985 *
986 * Return: Returns status, either success or error+reason
987 */
988int zynqmp_pm_pinctrl_get_function(const u32 pin, u32 *id)
989{
990 u32 ret_payload[PAYLOAD_ARG_CNT];
991 int ret;
992
993 if (!id)
994 return -EINVAL;
995
996 ret = zynqmp_pm_invoke_fn(PM_PINCTRL_GET_FUNCTION, pin, 0,
997 0, 0, ret_payload);
998 *id = ret_payload[1];
999
1000 return ret;
1001}
1002EXPORT_SYMBOL_GPL(zynqmp_pm_pinctrl_get_function);
1003
1004/**
1005 * zynqmp_pm_pinctrl_set_function - Set requested function for the pin
1006 * @pin: Pin number
1007 * @id: Function ID to set
1008 *
1009 * This function sets requested function for the given pin.
1010 *
1011 * Return: Returns status, either success or error+reason.
1012 */
1013int zynqmp_pm_pinctrl_set_function(const u32 pin, const u32 id)
1014{
1015 return zynqmp_pm_invoke_fn(PM_PINCTRL_SET_FUNCTION, pin, id,
1016 0, 0, NULL);
1017}
1018EXPORT_SYMBOL_GPL(zynqmp_pm_pinctrl_set_function);
1019
1020/**
1021 * zynqmp_pm_pinctrl_get_config - Get configuration parameter for the pin
1022 * @pin: Pin number
1023 * @param: Parameter to get
1024 * @value: Buffer to store parameter value
1025 *
1026 * This function gets requested configuration parameter for the given pin.
1027 *
1028 * Return: Returns status, either success or error+reason.
1029 */
1030int zynqmp_pm_pinctrl_get_config(const u32 pin, const u32 param,
1031 u32 *value)
1032{
1033 u32 ret_payload[PAYLOAD_ARG_CNT];
1034 int ret;
1035
1036 if (!value)
1037 return -EINVAL;
1038
1039 ret = zynqmp_pm_invoke_fn(PM_PINCTRL_CONFIG_PARAM_GET, pin, param,
1040 0, 0, ret_payload);
1041 *value = ret_payload[1];
1042
1043 return ret;
1044}
1045EXPORT_SYMBOL_GPL(zynqmp_pm_pinctrl_get_config);
1046
1047/**
1048 * zynqmp_pm_pinctrl_set_config - Set configuration parameter for the pin
1049 * @pin: Pin number
1050 * @param: Parameter to set
1051 * @value: Parameter value to set
1052 *
1053 * This function sets requested configuration parameter for the given pin.
1054 *
1055 * Return: Returns status, either success or error+reason.
1056 */
1057int zynqmp_pm_pinctrl_set_config(const u32 pin, const u32 param,
1058 u32 value)
1059{
1060 return zynqmp_pm_invoke_fn(PM_PINCTRL_CONFIG_PARAM_SET, pin,
1061 param, value, 0, NULL);
1062}
1063EXPORT_SYMBOL_GPL(zynqmp_pm_pinctrl_set_config);
1064
1065/**
1066 * zynqmp_pm_bootmode_read() - PM Config API for read bootpin status
1067 * @ps_mode: Returned output value of ps_mode
1068 *
1069 * This API function is to be used for notify the power management controller
1070 * to read bootpin status.
1071 *
1072 * Return: status, either success or error+reason
1073 */
1074unsigned int zynqmp_pm_bootmode_read(u32 *ps_mode)
1075{
1076 unsigned int ret;
1077 u32 ret_payload[PAYLOAD_ARG_CNT];
1078
1079 ret = zynqmp_pm_invoke_fn(PM_MMIO_READ, CRL_APB_BOOT_PIN_CTRL, 0,
1080 0, 0, ret_payload);
1081
1082 *ps_mode = ret_payload[1];
1083
1084 return ret;
1085}
1086EXPORT_SYMBOL_GPL(zynqmp_pm_bootmode_read);
1087
1088/**
1089 * zynqmp_pm_bootmode_write() - PM Config API for Configure bootpin
1090 * @ps_mode: Value to be written to the bootpin ctrl register
1091 *
1092 * This API function is to be used for notify the power management controller
1093 * to configure bootpin.
1094 *
1095 * Return: Returns status, either success or error+reason
1096 */
1097int zynqmp_pm_bootmode_write(u32 ps_mode)
1098{
1099 return zynqmp_pm_invoke_fn(PM_MMIO_WRITE, CRL_APB_BOOT_PIN_CTRL,
1100 CRL_APB_BOOTPIN_CTRL_MASK, ps_mode, 0, NULL);
1101}
1102EXPORT_SYMBOL_GPL(zynqmp_pm_bootmode_write);
1103
1104/**
1105 * zynqmp_pm_init_finalize() - PM call to inform firmware that the caller
1106 * master has initialized its own power management
1107 *
1108 * Return: Returns status, either success or error+reason
1109 *
1110 * This API function is to be used for notify the power management controller
1111 * about the completed power management initialization.
1112 */
1113int zynqmp_pm_init_finalize(void)
1114{
1115 return zynqmp_pm_invoke_fn(PM_PM_INIT_FINALIZE, 0, 0, 0, 0, NULL);
1116}
1117EXPORT_SYMBOL_GPL(zynqmp_pm_init_finalize);
1118
1119/**
1120 * zynqmp_pm_set_suspend_mode() - Set system suspend mode
1121 * @mode: Mode to set for system suspend
1122 *
1123 * This API function is used to set mode of system suspend.
1124 *
1125 * Return: Returns status, either success or error+reason
1126 */
1127int zynqmp_pm_set_suspend_mode(u32 mode)
1128{
1129 return zynqmp_pm_invoke_fn(PM_SET_SUSPEND_MODE, mode, 0, 0, 0, NULL);
1130}
1131EXPORT_SYMBOL_GPL(zynqmp_pm_set_suspend_mode);
1132
1133/**
1134 * zynqmp_pm_request_node() - Request a node with specific capabilities
1135 * @node: Node ID of the slave
1136 * @capabilities: Requested capabilities of the slave
1137 * @qos: Quality of service (not supported)
1138 * @ack: Flag to specify whether acknowledge is requested
1139 *
1140 * This function is used by master to request particular node from firmware.
1141 * Every master must request node before using it.
1142 *
1143 * Return: Returns status, either success or error+reason
1144 */
1145int zynqmp_pm_request_node(const u32 node, const u32 capabilities,
1146 const u32 qos, const enum zynqmp_pm_request_ack ack)
1147{
1148 return zynqmp_pm_invoke_fn(PM_REQUEST_NODE, node, capabilities,
1149 qos, ack, NULL);
1150}
1151EXPORT_SYMBOL_GPL(zynqmp_pm_request_node);
1152
1153/**
1154 * zynqmp_pm_release_node() - Release a node
1155 * @node: Node ID of the slave
1156 *
1157 * This function is used by master to inform firmware that master
1158 * has released node. Once released, master must not use that node
1159 * without re-request.
1160 *
1161 * Return: Returns status, either success or error+reason
1162 */
1163int zynqmp_pm_release_node(const u32 node)
1164{
1165 return zynqmp_pm_invoke_fn(PM_RELEASE_NODE, node, 0, 0, 0, NULL);
1166}
1167EXPORT_SYMBOL_GPL(zynqmp_pm_release_node);
1168
1169/**
1170 * zynqmp_pm_get_rpu_mode() - Get RPU mode
1171 * @node_id: Node ID of the device
1172 * @rpu_mode: return by reference value
1173 * either split or lockstep
1174 *
1175 * Return: return 0 on success or error+reason.
1176 * if success, then rpu_mode will be set
1177 * to current rpu mode.
1178 */
1179int zynqmp_pm_get_rpu_mode(u32 node_id, enum rpu_oper_mode *rpu_mode)
1180{
1181 u32 ret_payload[PAYLOAD_ARG_CNT];
1182 int ret;
1183
1184 ret = zynqmp_pm_invoke_fn(PM_IOCTL, node_id,
1185 IOCTL_GET_RPU_OPER_MODE, 0, 0, ret_payload);
1186
1187 /* only set rpu_mode if no error */
1188 if (ret == XST_PM_SUCCESS)
1189 *rpu_mode = ret_payload[0];
1190
1191 return ret;
1192}
1193EXPORT_SYMBOL_GPL(zynqmp_pm_get_rpu_mode);
1194
1195/**
1196 * zynqmp_pm_set_rpu_mode() - Set RPU mode
1197 * @node_id: Node ID of the device
1198 * @rpu_mode: Argument 1 to requested IOCTL call. either split or lockstep
1199 *
1200 * This function is used to set RPU mode to split or
1201 * lockstep
1202 *
1203 * Return: Returns status, either success or error+reason
1204 */
1205int zynqmp_pm_set_rpu_mode(u32 node_id, enum rpu_oper_mode rpu_mode)
1206{
1207 return zynqmp_pm_invoke_fn(PM_IOCTL, node_id,
1208 IOCTL_SET_RPU_OPER_MODE, (u32)rpu_mode,
1209 0, NULL);
1210}
1211EXPORT_SYMBOL_GPL(zynqmp_pm_set_rpu_mode);
1212
1213/**
1214 * zynqmp_pm_set_tcm_config - configure TCM
1215 * @node_id: Firmware specific TCM subsystem ID
1216 * @tcm_mode: Argument 1 to requested IOCTL call
1217 * either PM_RPU_TCM_COMB or PM_RPU_TCM_SPLIT
1218 *
1219 * This function is used to set RPU mode to split or combined
1220 *
1221 * Return: status: 0 for success, else failure
1222 */
1223int zynqmp_pm_set_tcm_config(u32 node_id, enum rpu_tcm_comb tcm_mode)
1224{
1225 return zynqmp_pm_invoke_fn(PM_IOCTL, node_id,
1226 IOCTL_TCM_COMB_CONFIG, (u32)tcm_mode, 0,
1227 NULL);
1228}
1229EXPORT_SYMBOL_GPL(zynqmp_pm_set_tcm_config);
1230
1231/**
1232 * zynqmp_pm_force_pwrdwn - PM call to request for another PU or subsystem to
1233 * be powered down forcefully
1234 * @node: Node ID of the targeted PU or subsystem
1235 * @ack: Flag to specify whether acknowledge is requested
1236 *
1237 * Return: status, either success or error+reason
1238 */
1239int zynqmp_pm_force_pwrdwn(const u32 node,
1240 const enum zynqmp_pm_request_ack ack)
1241{
1242 return zynqmp_pm_invoke_fn(PM_FORCE_POWERDOWN, node, ack, 0, 0, NULL);
1243}
1244EXPORT_SYMBOL_GPL(zynqmp_pm_force_pwrdwn);
1245
1246/**
1247 * zynqmp_pm_request_wake - PM call to wake up selected master or subsystem
1248 * @node: Node ID of the master or subsystem
1249 * @set_addr: Specifies whether the address argument is relevant
1250 * @address: Address from which to resume when woken up
1251 * @ack: Flag to specify whether acknowledge requested
1252 *
1253 * Return: status, either success or error+reason
1254 */
1255int zynqmp_pm_request_wake(const u32 node,
1256 const bool set_addr,
1257 const u64 address,
1258 const enum zynqmp_pm_request_ack ack)
1259{
1260 /* set_addr flag is encoded into 1st bit of address */
1261 return zynqmp_pm_invoke_fn(PM_REQUEST_WAKEUP, node, address | set_addr,
1262 address >> 32, ack, NULL);
1263}
1264EXPORT_SYMBOL_GPL(zynqmp_pm_request_wake);
1265
1266/**
1267 * zynqmp_pm_set_requirement() - PM call to set requirement for PM slaves
1268 * @node: Node ID of the slave
1269 * @capabilities: Requested capabilities of the slave
1270 * @qos: Quality of service (not supported)
1271 * @ack: Flag to specify whether acknowledge is requested
1272 *
1273 * This API function is to be used for slaves a PU already has requested
1274 * to change its capabilities.
1275 *
1276 * Return: Returns status, either success or error+reason
1277 */
1278int zynqmp_pm_set_requirement(const u32 node, const u32 capabilities,
1279 const u32 qos,
1280 const enum zynqmp_pm_request_ack ack)
1281{
1282 return zynqmp_pm_invoke_fn(PM_SET_REQUIREMENT, node, capabilities,
1283 qos, ack, NULL);
1284}
1285EXPORT_SYMBOL_GPL(zynqmp_pm_set_requirement);
1286
1287/**
1288 * zynqmp_pm_load_pdi - Load and process PDI
1289 * @src: Source device where PDI is located
1290 * @address: PDI src address
1291 *
1292 * This function provides support to load PDI from linux
1293 *
1294 * Return: Returns status, either success or error+reason
1295 */
1296int zynqmp_pm_load_pdi(const u32 src, const u64 address)
1297{
1298 return zynqmp_pm_invoke_fn(PM_LOAD_PDI, src,
1299 lower_32_bits(address),
1300 upper_32_bits(address), 0, NULL);
1301}
1302EXPORT_SYMBOL_GPL(zynqmp_pm_load_pdi);
1303
1304/**
1305 * zynqmp_pm_aes_engine - Access AES hardware to encrypt/decrypt the data using
1306 * AES-GCM core.
1307 * @address: Address of the AesParams structure.
1308 * @out: Returned output value
1309 *
1310 * Return: Returns status, either success or error code.
1311 */
1312int zynqmp_pm_aes_engine(const u64 address, u32 *out)
1313{
1314 u32 ret_payload[PAYLOAD_ARG_CNT];
1315 int ret;
1316
1317 if (!out)
1318 return -EINVAL;
1319
1320 ret = zynqmp_pm_invoke_fn(PM_SECURE_AES, upper_32_bits(address),
1321 lower_32_bits(address),
1322 0, 0, ret_payload);
1323 *out = ret_payload[1];
1324
1325 return ret;
1326}
1327EXPORT_SYMBOL_GPL(zynqmp_pm_aes_engine);
1328
1329/**
1330 * zynqmp_pm_sha_hash - Access the SHA engine to calculate the hash
1331 * @address: Address of the data/ Address of output buffer where
1332 * hash should be stored.
1333 * @size: Size of the data.
1334 * @flags:
1335 * BIT(0) - for initializing csudma driver and SHA3(Here address
1336 * and size inputs can be NULL).
1337 * BIT(1) - to call Sha3_Update API which can be called multiple
1338 * times when data is not contiguous.
1339 * BIT(2) - to get final hash of the whole updated data.
1340 * Hash will be overwritten at provided address with
1341 * 48 bytes.
1342 *
1343 * Return: Returns status, either success or error code.
1344 */
1345int zynqmp_pm_sha_hash(const u64 address, const u32 size, const u32 flags)
1346{
1347 u32 lower_addr = lower_32_bits(address);
1348 u32 upper_addr = upper_32_bits(address);
1349
1350 return zynqmp_pm_invoke_fn(PM_SECURE_SHA, upper_addr, lower_addr,
1351 size, flags, NULL);
1352}
1353EXPORT_SYMBOL_GPL(zynqmp_pm_sha_hash);
1354
1355/**
1356 * zynqmp_pm_register_notifier() - PM API for register a subsystem
1357 * to be notified about specific
1358 * event/error.
1359 * @node: Node ID to which the event is related.
1360 * @event: Event Mask of Error events for which wants to get notified.
1361 * @wake: Wake subsystem upon capturing the event if value 1
1362 * @enable: Enable the registration for value 1, disable for value 0
1363 *
1364 * This function is used to register/un-register for particular node-event
1365 * combination in firmware.
1366 *
1367 * Return: Returns status, either success or error+reason
1368 */
1369
1370int zynqmp_pm_register_notifier(const u32 node, const u32 event,
1371 const u32 wake, const u32 enable)
1372{
1373 return zynqmp_pm_invoke_fn(PM_REGISTER_NOTIFIER, node, event,
1374 wake, enable, NULL);
1375}
1376EXPORT_SYMBOL_GPL(zynqmp_pm_register_notifier);
1377
1378/**
1379 * zynqmp_pm_system_shutdown - PM call to request a system shutdown or restart
1380 * @type: Shutdown or restart? 0 for shutdown, 1 for restart
1381 * @subtype: Specifies which system should be restarted or shut down
1382 *
1383 * Return: Returns status, either success or error+reason
1384 */
1385int zynqmp_pm_system_shutdown(const u32 type, const u32 subtype)
1386{
1387 return zynqmp_pm_invoke_fn(PM_SYSTEM_SHUTDOWN, type, subtype,
1388 0, 0, NULL);
1389}
1390
1391/**
1392 * zynqmp_pm_set_feature_config - PM call to request IOCTL for feature config
1393 * @id: The config ID of the feature to be configured
1394 * @value: The config value of the feature to be configured
1395 *
1396 * Return: Returns 0 on success or error value on failure.
1397 */
1398int zynqmp_pm_set_feature_config(enum pm_feature_config_id id, u32 value)
1399{
1400 return zynqmp_pm_invoke_fn(PM_IOCTL, 0, IOCTL_SET_FEATURE_CONFIG,
1401 id, value, NULL);
1402}
1403
1404/**
1405 * zynqmp_pm_get_feature_config - PM call to get value of configured feature
1406 * @id: The config id of the feature to be queried
1407 * @payload: Returned value array
1408 *
1409 * Return: Returns 0 on success or error value on failure.
1410 */
1411int zynqmp_pm_get_feature_config(enum pm_feature_config_id id,
1412 u32 *payload)
1413{
1414 return zynqmp_pm_invoke_fn(PM_IOCTL, 0, IOCTL_GET_FEATURE_CONFIG,
1415 id, 0, payload);
1416}
1417
1418/**
1419 * zynqmp_pm_set_sd_config - PM call to set value of SD config registers
1420 * @node: SD node ID
1421 * @config: The config type of SD registers
1422 * @value: Value to be set
1423 *
1424 * Return: Returns 0 on success or error value on failure.
1425 */
1426int zynqmp_pm_set_sd_config(u32 node, enum pm_sd_config_type config, u32 value)
1427{
1428 return zynqmp_pm_invoke_fn(PM_IOCTL, node, IOCTL_SET_SD_CONFIG,
1429 config, value, NULL);
1430}
1431EXPORT_SYMBOL_GPL(zynqmp_pm_set_sd_config);
1432
1433/**
1434 * zynqmp_pm_set_gem_config - PM call to set value of GEM config registers
1435 * @node: GEM node ID
1436 * @config: The config type of GEM registers
1437 * @value: Value to be set
1438 *
1439 * Return: Returns 0 on success or error value on failure.
1440 */
1441int zynqmp_pm_set_gem_config(u32 node, enum pm_gem_config_type config,
1442 u32 value)
1443{
1444 return zynqmp_pm_invoke_fn(PM_IOCTL, node, IOCTL_SET_GEM_CONFIG,
1445 config, value, NULL);
1446}
1447EXPORT_SYMBOL_GPL(zynqmp_pm_set_gem_config);
1448
1449/**
1450 * struct zynqmp_pm_shutdown_scope - Struct for shutdown scope
1451 * @subtype: Shutdown subtype
1452 * @name: Matching string for scope argument
1453 *
1454 * This struct encapsulates mapping between shutdown scope ID and string.
1455 */
1456struct zynqmp_pm_shutdown_scope {
1457 const enum zynqmp_pm_shutdown_subtype subtype;
1458 const char *name;
1459};
1460
1461static struct zynqmp_pm_shutdown_scope shutdown_scopes[] = {
1462 [ZYNQMP_PM_SHUTDOWN_SUBTYPE_SUBSYSTEM] = {
1463 .subtype = ZYNQMP_PM_SHUTDOWN_SUBTYPE_SUBSYSTEM,
1464 .name = "subsystem",
1465 },
1466 [ZYNQMP_PM_SHUTDOWN_SUBTYPE_PS_ONLY] = {
1467 .subtype = ZYNQMP_PM_SHUTDOWN_SUBTYPE_PS_ONLY,
1468 .name = "ps_only",
1469 },
1470 [ZYNQMP_PM_SHUTDOWN_SUBTYPE_SYSTEM] = {
1471 .subtype = ZYNQMP_PM_SHUTDOWN_SUBTYPE_SYSTEM,
1472 .name = "system",
1473 },
1474};
1475
1476static struct zynqmp_pm_shutdown_scope *selected_scope =
1477 &shutdown_scopes[ZYNQMP_PM_SHUTDOWN_SUBTYPE_SYSTEM];
1478
1479/**
1480 * zynqmp_pm_is_shutdown_scope_valid - Check if shutdown scope string is valid
1481 * @scope_string: Shutdown scope string
1482 *
1483 * Return: Return pointer to matching shutdown scope struct from
1484 * array of available options in system if string is valid,
1485 * otherwise returns NULL.
1486 */
1487static struct zynqmp_pm_shutdown_scope*
1488 zynqmp_pm_is_shutdown_scope_valid(const char *scope_string)
1489{
1490 int count;
1491
1492 for (count = 0; count < ARRAY_SIZE(shutdown_scopes); count++)
1493 if (sysfs_streq(scope_string, shutdown_scopes[count].name))
1494 return &shutdown_scopes[count];
1495
1496 return NULL;
1497}
1498
1499static ssize_t shutdown_scope_show(struct device *device,
1500 struct device_attribute *attr,
1501 char *buf)
1502{
1503 int i;
1504
1505 for (i = 0; i < ARRAY_SIZE(shutdown_scopes); i++) {
1506 if (&shutdown_scopes[i] == selected_scope) {
1507 strcat(buf, "[");
1508 strcat(buf, shutdown_scopes[i].name);
1509 strcat(buf, "]");
1510 } else {
1511 strcat(buf, shutdown_scopes[i].name);
1512 }
1513 strcat(buf, " ");
1514 }
1515 strcat(buf, "\n");
1516
1517 return strlen(buf);
1518}
1519
1520static ssize_t shutdown_scope_store(struct device *device,
1521 struct device_attribute *attr,
1522 const char *buf, size_t count)
1523{
1524 int ret;
1525 struct zynqmp_pm_shutdown_scope *scope;
1526
1527 scope = zynqmp_pm_is_shutdown_scope_valid(buf);
1528 if (!scope)
1529 return -EINVAL;
1530
1531 ret = zynqmp_pm_system_shutdown(ZYNQMP_PM_SHUTDOWN_TYPE_SETSCOPE_ONLY,
1532 scope->subtype);
1533 if (ret) {
1534 pr_err("unable to set shutdown scope %s\n", buf);
1535 return ret;
1536 }
1537
1538 selected_scope = scope;
1539
1540 return count;
1541}
1542
1543static DEVICE_ATTR_RW(shutdown_scope);
1544
1545static ssize_t health_status_store(struct device *device,
1546 struct device_attribute *attr,
1547 const char *buf, size_t count)
1548{
1549 int ret;
1550 unsigned int value;
1551
1552 ret = kstrtouint(buf, 10, &value);
1553 if (ret)
1554 return ret;
1555
1556 ret = zynqmp_pm_set_boot_health_status(value);
1557 if (ret) {
1558 dev_err(device, "unable to set healthy bit value to %u\n",
1559 value);
1560 return ret;
1561 }
1562
1563 return count;
1564}
1565
1566static DEVICE_ATTR_WO(health_status);
1567
1568static ssize_t ggs_show(struct device *device,
1569 struct device_attribute *attr,
1570 char *buf,
1571 u32 reg)
1572{
1573 int ret;
1574 u32 ret_payload[PAYLOAD_ARG_CNT];
1575
1576 ret = zynqmp_pm_read_ggs(reg, ret_payload);
1577 if (ret)
1578 return ret;
1579
1580 return sprintf(buf, "0x%x\n", ret_payload[1]);
1581}
1582
1583static ssize_t ggs_store(struct device *device,
1584 struct device_attribute *attr,
1585 const char *buf, size_t count,
1586 u32 reg)
1587{
1588 long value;
1589 int ret;
1590
1591 if (reg >= GSS_NUM_REGS)
1592 return -EINVAL;
1593
1594 ret = kstrtol(buf, 16, &value);
1595 if (ret) {
1596 count = -EFAULT;
1597 goto err;
1598 }
1599
1600 ret = zynqmp_pm_write_ggs(reg, value);
1601 if (ret)
1602 count = -EFAULT;
1603err:
1604 return count;
1605}
1606
1607/* GGS register show functions */
1608#define GGS0_SHOW(N) \
1609 ssize_t ggs##N##_show(struct device *device, \
1610 struct device_attribute *attr, \
1611 char *buf) \
1612 { \
1613 return ggs_show(device, attr, buf, N); \
1614 }
1615
1616static GGS0_SHOW(0);
1617static GGS0_SHOW(1);
1618static GGS0_SHOW(2);
1619static GGS0_SHOW(3);
1620
1621/* GGS register store function */
1622#define GGS0_STORE(N) \
1623 ssize_t ggs##N##_store(struct device *device, \
1624 struct device_attribute *attr, \
1625 const char *buf, \
1626 size_t count) \
1627 { \
1628 return ggs_store(device, attr, buf, count, N); \
1629 }
1630
1631static GGS0_STORE(0);
1632static GGS0_STORE(1);
1633static GGS0_STORE(2);
1634static GGS0_STORE(3);
1635
1636static ssize_t pggs_show(struct device *device,
1637 struct device_attribute *attr,
1638 char *buf,
1639 u32 reg)
1640{
1641 int ret;
1642 u32 ret_payload[PAYLOAD_ARG_CNT];
1643
1644 ret = zynqmp_pm_read_pggs(reg, ret_payload);
1645 if (ret)
1646 return ret;
1647
1648 return sprintf(buf, "0x%x\n", ret_payload[1]);
1649}
1650
1651static ssize_t pggs_store(struct device *device,
1652 struct device_attribute *attr,
1653 const char *buf, size_t count,
1654 u32 reg)
1655{
1656 long value;
1657 int ret;
1658
1659 if (reg >= GSS_NUM_REGS)
1660 return -EINVAL;
1661
1662 ret = kstrtol(buf, 16, &value);
1663 if (ret) {
1664 count = -EFAULT;
1665 goto err;
1666 }
1667
1668 ret = zynqmp_pm_write_pggs(reg, value);
1669 if (ret)
1670 count = -EFAULT;
1671
1672err:
1673 return count;
1674}
1675
1676#define PGGS0_SHOW(N) \
1677 ssize_t pggs##N##_show(struct device *device, \
1678 struct device_attribute *attr, \
1679 char *buf) \
1680 { \
1681 return pggs_show(device, attr, buf, N); \
1682 }
1683
1684#define PGGS0_STORE(N) \
1685 ssize_t pggs##N##_store(struct device *device, \
1686 struct device_attribute *attr, \
1687 const char *buf, \
1688 size_t count) \
1689 { \
1690 return pggs_store(device, attr, buf, count, N); \
1691 }
1692
1693/* PGGS register show functions */
1694static PGGS0_SHOW(0);
1695static PGGS0_SHOW(1);
1696static PGGS0_SHOW(2);
1697static PGGS0_SHOW(3);
1698
1699/* PGGS register store functions */
1700static PGGS0_STORE(0);
1701static PGGS0_STORE(1);
1702static PGGS0_STORE(2);
1703static PGGS0_STORE(3);
1704
1705/* GGS register attributes */
1706static DEVICE_ATTR_RW(ggs0);
1707static DEVICE_ATTR_RW(ggs1);
1708static DEVICE_ATTR_RW(ggs2);
1709static DEVICE_ATTR_RW(ggs3);
1710
1711/* PGGS register attributes */
1712static DEVICE_ATTR_RW(pggs0);
1713static DEVICE_ATTR_RW(pggs1);
1714static DEVICE_ATTR_RW(pggs2);
1715static DEVICE_ATTR_RW(pggs3);
1716
1717static ssize_t feature_config_id_show(struct device *device,
1718 struct device_attribute *attr,
1719 char *buf)
1720{
1721 struct zynqmp_devinfo *devinfo = dev_get_drvdata(device);
1722
1723 return sysfs_emit(buf, "%d\n", devinfo->feature_conf_id);
1724}
1725
1726static ssize_t feature_config_id_store(struct device *device,
1727 struct device_attribute *attr,
1728 const char *buf, size_t count)
1729{
1730 u32 config_id;
1731 int ret;
1732 struct zynqmp_devinfo *devinfo = dev_get_drvdata(device);
1733
1734 if (!buf)
1735 return -EINVAL;
1736
1737 ret = kstrtou32(buf, 10, &config_id);
1738 if (ret)
1739 return ret;
1740
1741 devinfo->feature_conf_id = config_id;
1742
1743 return count;
1744}
1745
1746static DEVICE_ATTR_RW(feature_config_id);
1747
1748static ssize_t feature_config_value_show(struct device *device,
1749 struct device_attribute *attr,
1750 char *buf)
1751{
1752 int ret;
1753 u32 ret_payload[PAYLOAD_ARG_CNT];
1754 struct zynqmp_devinfo *devinfo = dev_get_drvdata(device);
1755
1756 ret = zynqmp_pm_get_feature_config(devinfo->feature_conf_id,
1757 ret_payload);
1758 if (ret)
1759 return ret;
1760
1761 return sysfs_emit(buf, "%d\n", ret_payload[1]);
1762}
1763
1764static ssize_t feature_config_value_store(struct device *device,
1765 struct device_attribute *attr,
1766 const char *buf, size_t count)
1767{
1768 u32 value;
1769 int ret;
1770 struct zynqmp_devinfo *devinfo = dev_get_drvdata(device);
1771
1772 if (!buf)
1773 return -EINVAL;
1774
1775 ret = kstrtou32(buf, 10, &value);
1776 if (ret)
1777 return ret;
1778
1779 ret = zynqmp_pm_set_feature_config(devinfo->feature_conf_id,
1780 value);
1781 if (ret)
1782 return ret;
1783
1784 return count;
1785}
1786
1787static DEVICE_ATTR_RW(feature_config_value);
1788
1789static struct attribute *zynqmp_firmware_attrs[] = {
1790 &dev_attr_ggs0.attr,
1791 &dev_attr_ggs1.attr,
1792 &dev_attr_ggs2.attr,
1793 &dev_attr_ggs3.attr,
1794 &dev_attr_pggs0.attr,
1795 &dev_attr_pggs1.attr,
1796 &dev_attr_pggs2.attr,
1797 &dev_attr_pggs3.attr,
1798 &dev_attr_shutdown_scope.attr,
1799 &dev_attr_health_status.attr,
1800 &dev_attr_feature_config_id.attr,
1801 &dev_attr_feature_config_value.attr,
1802 NULL,
1803};
1804
1805ATTRIBUTE_GROUPS(zynqmp_firmware);
1806
1807static int zynqmp_firmware_probe(struct platform_device *pdev)
1808{
1809 struct device *dev = &pdev->dev;
1810 struct device_node *np;
1811 struct zynqmp_devinfo *devinfo;
1812 int ret;
1813
1814 ret = get_set_conduit_method(dev->of_node);
1815 if (ret)
1816 return ret;
1817
1818 np = of_find_compatible_node(NULL, NULL, "xlnx,zynqmp");
1819 if (!np) {
1820 np = of_find_compatible_node(NULL, NULL, "xlnx,versal");
1821 if (!np)
1822 return 0;
1823
1824 feature_check_enabled = true;
1825 }
1826
1827 if (!feature_check_enabled) {
1828 ret = do_feature_check_call(PM_FEATURE_CHECK);
1829 if (ret >= 0)
1830 feature_check_enabled = true;
1831 }
1832
1833 of_node_put(np);
1834
1835 devinfo = devm_kzalloc(dev, sizeof(*devinfo), GFP_KERNEL);
1836 if (!devinfo)
1837 return -ENOMEM;
1838
1839 devinfo->dev = dev;
1840
1841 platform_set_drvdata(pdev, devinfo);
1842
1843 /* Check PM API version number */
1844 ret = zynqmp_pm_get_api_version(&pm_api_version);
1845 if (ret)
1846 return ret;
1847
1848 if (pm_api_version < ZYNQMP_PM_VERSION) {
1849 panic("%s Platform Management API version error. Expected: v%d.%d - Found: v%d.%d\n",
1850 __func__,
1851 ZYNQMP_PM_VERSION_MAJOR, ZYNQMP_PM_VERSION_MINOR,
1852 pm_api_version >> 16, pm_api_version & 0xFFFF);
1853 }
1854
1855 pr_info("%s Platform Management API v%d.%d\n", __func__,
1856 pm_api_version >> 16, pm_api_version & 0xFFFF);
1857
1858 /* Check trustzone version number */
1859 ret = zynqmp_pm_get_trustzone_version(&pm_tz_version);
1860 if (ret)
1861 panic("Legacy trustzone found without version support\n");
1862
1863 if (pm_tz_version < ZYNQMP_TZ_VERSION)
1864 panic("%s Trustzone version error. Expected: v%d.%d - Found: v%d.%d\n",
1865 __func__,
1866 ZYNQMP_TZ_VERSION_MAJOR, ZYNQMP_TZ_VERSION_MINOR,
1867 pm_tz_version >> 16, pm_tz_version & 0xFFFF);
1868
1869 pr_info("%s Trustzone version v%d.%d\n", __func__,
1870 pm_tz_version >> 16, pm_tz_version & 0xFFFF);
1871
1872 ret = mfd_add_devices(&pdev->dev, PLATFORM_DEVID_NONE, firmware_devs,
1873 ARRAY_SIZE(firmware_devs), NULL, 0, NULL);
1874 if (ret) {
1875 dev_err(&pdev->dev, "failed to add MFD devices %d\n", ret);
1876 return ret;
1877 }
1878
1879 zynqmp_pm_api_debugfs_init();
1880
1881 np = of_find_compatible_node(NULL, NULL, "xlnx,versal");
1882 if (np) {
1883 em_dev = platform_device_register_data(&pdev->dev, "xlnx_event_manager",
1884 -1, NULL, 0);
1885 if (IS_ERR(em_dev))
1886 dev_err_probe(&pdev->dev, PTR_ERR(em_dev), "EM register fail with error\n");
1887 }
1888 of_node_put(np);
1889
1890 return of_platform_populate(dev->of_node, NULL, NULL, dev);
1891}
1892
1893static int zynqmp_firmware_remove(struct platform_device *pdev)
1894{
1895 struct pm_api_feature_data *feature_data;
1896 struct hlist_node *tmp;
1897 int i;
1898
1899 mfd_remove_devices(&pdev->dev);
1900 zynqmp_pm_api_debugfs_exit();
1901
1902 hash_for_each_safe(pm_api_features_map, i, tmp, feature_data, hentry) {
1903 hash_del(&feature_data->hentry);
1904 kfree(feature_data);
1905 }
1906
1907 platform_device_unregister(em_dev);
1908
1909 return 0;
1910}
1911
1912static const struct of_device_id zynqmp_firmware_of_match[] = {
1913 {.compatible = "xlnx,zynqmp-firmware"},
1914 {.compatible = "xlnx,versal-firmware"},
1915 {},
1916};
1917MODULE_DEVICE_TABLE(of, zynqmp_firmware_of_match);
1918
1919static struct platform_driver zynqmp_firmware_driver = {
1920 .driver = {
1921 .name = "zynqmp_firmware",
1922 .of_match_table = zynqmp_firmware_of_match,
1923 .dev_groups = zynqmp_firmware_groups,
1924 },
1925 .probe = zynqmp_firmware_probe,
1926 .remove = zynqmp_firmware_remove,
1927};
1928module_platform_driver(zynqmp_firmware_driver);