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1// SPDX-License-Identifier: GPL-2.0
2/ {
3 mbus@f1000000 {
4 pciec: pcie@82000000 {
5 compatible = "marvell,kirkwood-pcie";
6 status = "disabled";
7 device_type = "pci";
8
9 #address-cells = <3>;
10 #size-cells = <2>;
11
12 bus-range = <0x00 0xff>;
13
14 ranges =
15 <0x82000000 0 0x40000 MBUS_ID(0xf0, 0x01) 0x40000 0 0x00002000
16 0x82000000 0x1 0 MBUS_ID(0x04, 0xe8) 0 1 0 /* Port 0.0 MEM */
17 0x81000000 0x1 0 MBUS_ID(0x04, 0xe0) 0 1 0 /* Port 0.0 IO */>;
18
19 pcie0: pcie@1,0 {
20 device_type = "pci";
21 assigned-addresses = <0x82000800 0 0x00040000 0 0x2000>;
22 reg = <0x0800 0 0 0 0>;
23 #address-cells = <3>;
24 #size-cells = <2>;
25 #interrupt-cells = <1>;
26 ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0
27 0x81000000 0 0 0x81000000 0x1 0 1 0>;
28 bus-range = <0x00 0xff>;
29 interrupt-names = "intx", "error";
30 interrupts = <9>, <44>;
31 interrupt-map-mask = <0 0 0 7>;
32 interrupt-map = <0 0 0 1 &pcie_intc 0>,
33 <0 0 0 2 &pcie_intc 1>,
34 <0 0 0 3 &pcie_intc 2>,
35 <0 0 0 4 &pcie_intc 3>;
36 marvell,pcie-port = <0>;
37 marvell,pcie-lane = <0>;
38 clocks = <&gate_clk 2>;
39 status = "disabled";
40
41 pcie_intc: interrupt-controller {
42 interrupt-controller;
43 #interrupt-cells = <1>;
44 };
45 };
46 };
47 };
48
49 ocp@f1000000 {
50 pinctrl: pin-controller@10000 {
51 compatible = "marvell,88f6281-pinctrl";
52
53 pmx_sata0: pmx-sata0 {
54 marvell,pins = "mpp5", "mpp21", "mpp23";
55 marvell,function = "sata0";
56 };
57 pmx_sata1: pmx-sata1 {
58 marvell,pins = "mpp4", "mpp20", "mpp22";
59 marvell,function = "sata1";
60 };
61 pmx_sdio: pmx-sdio {
62 marvell,pins = "mpp12", "mpp13", "mpp14",
63 "mpp15", "mpp16", "mpp17";
64 marvell,function = "sdio";
65 };
66 };
67
68 rtc: rtc@10300 {
69 compatible = "marvell,kirkwood-rtc", "marvell,orion-rtc";
70 reg = <0x10300 0x20>;
71 interrupts = <53>;
72 clocks = <&gate_clk 7>;
73 };
74
75 sata: sata@80000 {
76 compatible = "marvell,orion-sata";
77 reg = <0x80000 0x5000>;
78 interrupts = <21>;
79 clocks = <&gate_clk 14>, <&gate_clk 15>;
80 clock-names = "0", "1";
81 phys = <&sata_phy0>, <&sata_phy1>;
82 phy-names = "port0", "port1";
83 status = "disabled";
84 };
85
86 sdio: mvsdio@90000 {
87 compatible = "marvell,orion-sdio";
88 reg = <0x90000 0x200>;
89 interrupts = <28>;
90 clocks = <&gate_clk 4>;
91 pinctrl-0 = <&pmx_sdio>;
92 pinctrl-names = "default";
93 bus-width = <4>;
94 cap-sdio-irq;
95 cap-sd-highspeed;
96 cap-mmc-highspeed;
97 status = "disabled";
98 };
99 };
100};
1/ {
2 mbus {
3 pcie-controller {
4 compatible = "marvell,kirkwood-pcie";
5 status = "disabled";
6 device_type = "pci";
7
8 #address-cells = <3>;
9 #size-cells = <2>;
10
11 bus-range = <0x00 0xff>;
12
13 ranges =
14 <0x82000000 0 0x40000 MBUS_ID(0xf0, 0x01) 0x40000 0 0x00002000
15 0x82000000 0x1 0 MBUS_ID(0x04, 0xe8) 0 1 0 /* Port 0.0 MEM */
16 0x81000000 0x1 0 MBUS_ID(0x04, 0xe0) 0 1 0 /* Port 0.0 IO */>;
17
18 pcie@1,0 {
19 device_type = "pci";
20 assigned-addresses = <0x82000800 0 0x00040000 0 0x2000>;
21 reg = <0x0800 0 0 0 0>;
22 #address-cells = <3>;
23 #size-cells = <2>;
24 #interrupt-cells = <1>;
25 ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0
26 0x81000000 0 0 0x81000000 0x1 0 1 0>;
27 interrupt-map-mask = <0 0 0 0>;
28 interrupt-map = <0 0 0 0 &intc 9>;
29 marvell,pcie-port = <0>;
30 marvell,pcie-lane = <0>;
31 clocks = <&gate_clk 2>;
32 status = "disabled";
33 };
34 };
35 };
36
37 ocp@f1000000 {
38 pinctrl: pinctrl@10000 {
39 compatible = "marvell,88f6281-pinctrl";
40 reg = <0x10000 0x20>;
41
42 pmx_nand: pmx-nand {
43 marvell,pins = "mpp0", "mpp1", "mpp2", "mpp3",
44 "mpp4", "mpp5", "mpp18",
45 "mpp19";
46 marvell,function = "nand";
47 };
48 pmx_sata0: pmx-sata0 {
49 marvell,pins = "mpp5", "mpp21", "mpp23";
50 marvell,function = "sata0";
51 };
52 pmx_sata1: pmx-sata1 {
53 marvell,pins = "mpp4", "mpp20", "mpp22";
54 marvell,function = "sata1";
55 };
56 pmx_spi: pmx-spi {
57 marvell,pins = "mpp0", "mpp1", "mpp2", "mpp3";
58 marvell,function = "spi";
59 };
60 pmx_twsi0: pmx-twsi0 {
61 marvell,pins = "mpp8", "mpp9";
62 marvell,function = "twsi0";
63 };
64 pmx_uart0: pmx-uart0 {
65 marvell,pins = "mpp10", "mpp11";
66 marvell,function = "uart0";
67 };
68 pmx_uart1: pmx-uart1 {
69 marvell,pins = "mpp13", "mpp14";
70 marvell,function = "uart1";
71 };
72 pmx_sdio: pmx-sdio {
73 marvell,pins = "mpp12", "mpp13", "mpp14",
74 "mpp15", "mpp16", "mpp17";
75 marvell,function = "sdio";
76 };
77 };
78
79 rtc@10300 {
80 compatible = "marvell,kirkwood-rtc", "marvell,orion-rtc";
81 reg = <0x10300 0x20>;
82 interrupts = <53>;
83 clocks = <&gate_clk 7>;
84 };
85
86 sata@80000 {
87 compatible = "marvell,orion-sata";
88 reg = <0x80000 0x5000>;
89 interrupts = <21>;
90 clocks = <&gate_clk 14>, <&gate_clk 15>;
91 clock-names = "0", "1";
92 phys = <&sata_phy0>, <&sata_phy1>;
93 phy-names = "port0", "port1";
94 status = "disabled";
95 };
96
97 mvsdio@90000 {
98 compatible = "marvell,orion-sdio";
99 reg = <0x90000 0x200>;
100 interrupts = <28>;
101 clocks = <&gate_clk 4>;
102 pinctrl-0 = <&pmx_sdio>;
103 pinctrl-names = "default";
104 bus-width = <4>;
105 cap-sdio-irq;
106 cap-sd-highspeed;
107 cap-mmc-highspeed;
108 status = "disabled";
109 };
110 };
111};