1# SPDX-License-Identifier: GPL-2.0-only
 
 
 
 
  2menu "IRQ subsystem"
 
 
 
 
 
 
  3# Options selectable by the architecture code
  4
  5# Make sparse irq Kconfig switch below available
  6config MAY_HAVE_SPARSE_IRQ
  7       bool
  8
  9# Legacy support, required for itanic
 10config GENERIC_IRQ_LEGACY
 11       bool
 12
 13# Enable the generic irq autoprobe mechanism
 14config GENERIC_IRQ_PROBE
 15	bool
 16
 17# Use the generic /proc/interrupts implementation
 18config GENERIC_IRQ_SHOW
 19       bool
 20
 21# Print level/edge extra information
 22config GENERIC_IRQ_SHOW_LEVEL
 23       bool
 24
 25# Supports effective affinity mask
 26config GENERIC_IRQ_EFFECTIVE_AFF_MASK
 27       depends on SMP
 28       bool
 29
 30# Support for delayed migration from interrupt context
 31config GENERIC_PENDING_IRQ
 32	bool
 33
 34# Support for generic irq migrating off cpu before the cpu is offline.
 35config GENERIC_IRQ_MIGRATION
 36	bool
 37
 38# Alpha specific irq affinity mechanism
 39config AUTO_IRQ_AFFINITY
 40       bool
 41
 42# Interrupt injection mechanism
 43config GENERIC_IRQ_INJECTION
 44	bool
 45
 46# Tasklet based software resend for pending interrupts on enable_irq()
 47config HARDIRQS_SW_RESEND
 48       bool
 49
 
 
 
 
 50# Edge style eoi based handler (cell)
 51config IRQ_EDGE_EOI_HANDLER
 52       bool
 53
 54# Generic configurable interrupt chip implementation
 55config GENERIC_IRQ_CHIP
 56       bool
 57       select IRQ_DOMAIN
 58
 59# Generic irq_domain hw <--> linux irq number translation
 60config IRQ_DOMAIN
 61	bool
 62
 63# Support for simulated interrupts
 64config IRQ_SIM
 65	bool
 66	select IRQ_WORK
 67	select IRQ_DOMAIN
 68
 69# Support for hierarchical irq domains
 70config IRQ_DOMAIN_HIERARCHY
 71	bool
 72	select IRQ_DOMAIN
 73
 74# Support for obsolete non-mapping irq domains
 75config IRQ_DOMAIN_NOMAP
 76	bool
 77	select IRQ_DOMAIN
 78
 79# Support for hierarchical fasteoi+edge and fasteoi+level handlers
 80config IRQ_FASTEOI_HIERARCHY_HANDLERS
 81	bool
 82
 83# Generic IRQ IPI support
 84config GENERIC_IRQ_IPI
 85	bool
 86	depends on SMP
 87	select IRQ_DOMAIN_HIERARCHY
 88
 89# Generic MSI hierarchical interrupt domain support
 90config GENERIC_MSI_IRQ
 91	bool
 92	select IRQ_DOMAIN_HIERARCHY
 93
 94config IRQ_MSI_IOMMU
 95	bool
 96
 97config IRQ_TIMINGS
 98	bool
 99
100config GENERIC_IRQ_MATRIX_ALLOCATOR
101	bool
102
103config GENERIC_IRQ_RESERVATION_MODE
104	bool
105
106# Support forced irq threading
107config IRQ_FORCED_THREADING
108       bool
109
110config SPARSE_IRQ
111	bool "Support sparse irq numbering" if MAY_HAVE_SPARSE_IRQ
112	help
 
113
114	  Sparse irq numbering is useful for distro kernels that want
115	  to define a high CONFIG_NR_CPUS value but still want to have
116	  low kernel memory footprint on smaller machines.
117
118	  ( Sparse irqs can also be beneficial on NUMA boxes, as they spread
119	    out the interrupt descriptors in a more NUMA-friendly way. )
120
121	  If you don't know what to do here, say N.
122
123config GENERIC_IRQ_DEBUGFS
124	bool "Expose irq internals in debugfs"
125	depends on DEBUG_FS
126	select GENERIC_IRQ_INJECTION
127	default n
128	help
129
130	  Exposes internal state information through debugfs. Mostly for
131	  developers and debugging of hard to diagnose interrupt problems.
132
133	  If you don't know what to do here, say N.
134
135endmenu
136
137config GENERIC_IRQ_MULTI_HANDLER
138	bool
139	help
140	  Allow to specify the low level IRQ handler at run time.
141
142# Cavium Octeon is the last system to use this deprecated option
143# Do not even think of enabling this on any new platform
144config DEPRECATED_IRQ_CPU_ONOFFLINE
145	bool
146	depends on CAVIUM_OCTEON_SOC
147	default CAVIUM_OCTEON_SOC

 1# Select this to activate the generic irq options below
 2config HAVE_GENERIC_HARDIRQS
 3	bool
 4
 5if HAVE_GENERIC_HARDIRQS
 6menu "IRQ subsystem"
 7#
 8# Interrupt subsystem related configuration options
 9#
10config GENERIC_HARDIRQS
11       def_bool y
12
13# Options selectable by the architecture code
14
15# Make sparse irq Kconfig switch below available
16config HAVE_SPARSE_IRQ
 
 
 
 
17       bool
18
19# Enable the generic irq autoprobe mechanism
20config GENERIC_IRQ_PROBE
21	bool
22
23# Use the generic /proc/interrupts implementation
24config GENERIC_IRQ_SHOW
25       bool
26
27# Print level/edge extra information
28config GENERIC_IRQ_SHOW_LEVEL
29       bool
30
 
 
 
 
 
31# Support for delayed migration from interrupt context
32config GENERIC_PENDING_IRQ
33	bool
34
 
 
 
 
35# Alpha specific irq affinity mechanism
36config AUTO_IRQ_AFFINITY
37       bool
38
 
 
 
 
39# Tasklet based software resend for pending interrupts on enable_irq()
40config HARDIRQS_SW_RESEND
41       bool
42
43# Preflow handler support for fasteoi (sparc64)
44config IRQ_PREFLOW_FASTEOI
45       bool
46
47# Edge style eoi based handler (cell)
48config IRQ_EDGE_EOI_HANDLER
49       bool
50
51# Generic configurable interrupt chip implementation
52config GENERIC_IRQ_CHIP
53       bool
 
54
55# Generic irq_domain hw <--> linux irq number translation
56config IRQ_DOMAIN
57	bool
58
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
59# Support forced irq threading
60config IRQ_FORCED_THREADING
61       bool
62
63config SPARSE_IRQ
64	bool "Support sparse irq numbering"
65	depends on HAVE_SPARSE_IRQ
66	---help---
67
68	  Sparse irq numbering is useful for distro kernels that want
69	  to define a high CONFIG_NR_CPUS value but still want to have
70	  low kernel memory footprint on smaller machines.
71
72	  ( Sparse irqs can also be beneficial on NUMA boxes, as they spread
73	    out the interrupt descriptors in a more NUMA-friendly way. )
74
75	  If you don't know what to do here, say N.
76
 
 
 
 
 
 
 
 
 
 
 
 
77endmenu
78endif