1/* SPDX-License-Identifier: GPL-2.0
  2 *
  3 * r8a7793 clock definition
  4 *
  5 * Copyright (C) 2014  Renesas Electronics Corporation
  6 */
  7
  8#ifndef __DT_BINDINGS_CLOCK_R8A7793_H__
  9#define __DT_BINDINGS_CLOCK_R8A7793_H__
 10
 11/* CPG */
 12#define R8A7793_CLK_MAIN		0
 13#define R8A7793_CLK_PLL0		1
 14#define R8A7793_CLK_PLL1		2
 15#define R8A7793_CLK_PLL3		3
 16#define R8A7793_CLK_LB			4
 17#define R8A7793_CLK_QSPI		5
 18#define R8A7793_CLK_SDH			6
 19#define R8A7793_CLK_SD0			7
 20#define R8A7793_CLK_Z			8
 21#define R8A7793_CLK_RCAN		9
 22#define R8A7793_CLK_ADSP		10
 23
 24/* MSTP0 */
 25#define R8A7793_CLK_MSIOF0		0
 26
 27/* MSTP1 */
 28#define R8A7793_CLK_VCP0		1
 29#define R8A7793_CLK_VPC0		3
 30#define R8A7793_CLK_SSP1		9
 31#define R8A7793_CLK_TMU1		11
 32#define R8A7793_CLK_3DG			12
 33#define R8A7793_CLK_2DDMAC		15
 34#define R8A7793_CLK_FDP1_1		18
 35#define R8A7793_CLK_FDP1_0		19
 36#define R8A7793_CLK_TMU3		21
 37#define R8A7793_CLK_TMU2		22
 38#define R8A7793_CLK_CMT0		24
 39#define R8A7793_CLK_TMU0		25
 40#define R8A7793_CLK_VSP1_DU1		27
 41#define R8A7793_CLK_VSP1_DU0		28
 42#define R8A7793_CLK_VSP1_S		31
 43
 44/* MSTP2 */
 45#define R8A7793_CLK_SCIFA2		2
 46#define R8A7793_CLK_SCIFA1		3
 47#define R8A7793_CLK_SCIFA0		4
 48#define R8A7793_CLK_MSIOF2		5
 49#define R8A7793_CLK_SCIFB0		6
 50#define R8A7793_CLK_SCIFB1		7
 51#define R8A7793_CLK_MSIOF1		8
 52#define R8A7793_CLK_SCIFB2		16
 53#define R8A7793_CLK_SYS_DMAC1		18
 54#define R8A7793_CLK_SYS_DMAC0		19
 55
 56/* MSTP3 */
 57#define R8A7793_CLK_TPU0		4
 58#define R8A7793_CLK_SDHI2		11
 59#define R8A7793_CLK_SDHI1		12
 60#define R8A7793_CLK_SDHI0		14
 61#define R8A7793_CLK_MMCIF0		15
 62#define R8A7793_CLK_IIC0		18
 63#define R8A7793_CLK_PCIEC		19
 64#define R8A7793_CLK_IIC1		23
 65#define R8A7793_CLK_SSUSB		28
 66#define R8A7793_CLK_CMT1		29
 67#define R8A7793_CLK_USBDMAC0		30
 68#define R8A7793_CLK_USBDMAC1		31
 69
 70/* MSTP4 */
 71#define R8A7793_CLK_IRQC		7
 72#define R8A7793_CLK_INTC_SYS		8
 73
 74/* MSTP5 */
 75#define R8A7793_CLK_AUDIO_DMAC1		1
 76#define R8A7793_CLK_AUDIO_DMAC0		2
 77#define R8A7793_CLK_ADSP_MOD		6
 78#define R8A7793_CLK_THERMAL		22
 79#define R8A7793_CLK_PWM			23
 80
 81/* MSTP7 */
 82#define R8A7793_CLK_EHCI		3
 83#define R8A7793_CLK_HSUSB		4
 84#define R8A7793_CLK_HSCIF2		13
 85#define R8A7793_CLK_SCIF5		14
 86#define R8A7793_CLK_SCIF4		15
 87#define R8A7793_CLK_HSCIF1		16
 88#define R8A7793_CLK_HSCIF0		17
 89#define R8A7793_CLK_SCIF3		18
 90#define R8A7793_CLK_SCIF2		19
 91#define R8A7793_CLK_SCIF1		20
 92#define R8A7793_CLK_SCIF0		21
 93#define R8A7793_CLK_DU1			23
 94#define R8A7793_CLK_DU0			24
 95#define R8A7793_CLK_LVDS0		26
 96
 97/* MSTP8 */
 98#define R8A7793_CLK_IPMMU_SGX		0
 99#define R8A7793_CLK_VIN2		9
100#define R8A7793_CLK_VIN1		10
101#define R8A7793_CLK_VIN0		11
102#define R8A7793_CLK_ETHER		13
103#define R8A7793_CLK_SATA1		14
104#define R8A7793_CLK_SATA0		15
105
106/* MSTP9 */
107#define R8A7793_CLK_GPIO7		4
108#define R8A7793_CLK_GPIO6		5
109#define R8A7793_CLK_GPIO5		7
110#define R8A7793_CLK_GPIO4		8
111#define R8A7793_CLK_GPIO3		9
112#define R8A7793_CLK_GPIO2		10
113#define R8A7793_CLK_GPIO1		11
114#define R8A7793_CLK_GPIO0		12
115#define R8A7793_CLK_RCAN1		15
116#define R8A7793_CLK_RCAN0		16
117#define R8A7793_CLK_QSPI_MOD		17
118#define R8A7793_CLK_I2C5		25
119#define R8A7793_CLK_IICDVFS		26
120#define R8A7793_CLK_I2C4		27
121#define R8A7793_CLK_I2C3		28
122#define R8A7793_CLK_I2C2		29
123#define R8A7793_CLK_I2C1		30
124#define R8A7793_CLK_I2C0		31
125
126/* MSTP10 */
127#define R8A7793_CLK_SSI_ALL		5
128#define R8A7793_CLK_SSI9		6
129#define R8A7793_CLK_SSI8		7
130#define R8A7793_CLK_SSI7		8
131#define R8A7793_CLK_SSI6		9
132#define R8A7793_CLK_SSI5		10
133#define R8A7793_CLK_SSI4		11
134#define R8A7793_CLK_SSI3		12
135#define R8A7793_CLK_SSI2		13
136#define R8A7793_CLK_SSI1		14
137#define R8A7793_CLK_SSI0		15
138#define R8A7793_CLK_SCU_ALL		17
139#define R8A7793_CLK_SCU_DVC1		18
140#define R8A7793_CLK_SCU_DVC0		19
141#define R8A7793_CLK_SCU_CTU1_MIX1	20
142#define R8A7793_CLK_SCU_CTU0_MIX0	21
143#define R8A7793_CLK_SCU_SRC9		22
144#define R8A7793_CLK_SCU_SRC8		23
145#define R8A7793_CLK_SCU_SRC7		24
146#define R8A7793_CLK_SCU_SRC6		25
147#define R8A7793_CLK_SCU_SRC5		26
148#define R8A7793_CLK_SCU_SRC4		27
149#define R8A7793_CLK_SCU_SRC3		28
150#define R8A7793_CLK_SCU_SRC2		29
151#define R8A7793_CLK_SCU_SRC1		30
152#define R8A7793_CLK_SCU_SRC0		31
153
154/* MSTP11 */
155#define R8A7793_CLK_SCIFA3		6
156#define R8A7793_CLK_SCIFA4		7
157#define R8A7793_CLK_SCIFA5		8
158
159#endif /* __DT_BINDINGS_CLOCK_R8A7793_H__ */