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1// SPDX-License-Identifier: GPL-2.0+
2/*
3 * linux/drivers/usb/gadget/s3c2410_udc.c
4 *
5 * Samsung S3C24xx series on-chip full speed USB device controllers
6 *
7 * Copyright (C) 2004-2007 Herbert Pötzl - Arnaud Patard
8 * Additional cleanups by Ben Dooks <ben-linux@fluff.org>
9 */
10
11#define pr_fmt(fmt) "s3c2410_udc: " fmt
12
13#include <linux/module.h>
14#include <linux/kernel.h>
15#include <linux/delay.h>
16#include <linux/ioport.h>
17#include <linux/sched.h>
18#include <linux/slab.h>
19#include <linux/errno.h>
20#include <linux/init.h>
21#include <linux/timer.h>
22#include <linux/list.h>
23#include <linux/interrupt.h>
24#include <linux/platform_device.h>
25#include <linux/clk.h>
26#include <linux/gpio/consumer.h>
27#include <linux/prefetch.h>
28#include <linux/io.h>
29
30#include <linux/debugfs.h>
31#include <linux/seq_file.h>
32
33#include <linux/usb.h>
34#include <linux/usb/gadget.h>
35
36#include <asm/byteorder.h>
37#include <asm/irq.h>
38#include <asm/unaligned.h>
39
40#include <linux/platform_data/usb-s3c2410_udc.h>
41
42#include "s3c2410_udc.h"
43#include "s3c2410_udc_regs.h"
44
45#define DRIVER_DESC "S3C2410 USB Device Controller Gadget"
46#define DRIVER_AUTHOR "Herbert Pötzl <herbert@13thfloor.at>, " \
47 "Arnaud Patard <arnaud.patard@rtp-net.org>"
48
49static const char gadget_name[] = "s3c2410_udc";
50static const char driver_desc[] = DRIVER_DESC;
51
52static struct s3c2410_udc *the_controller;
53static struct clk *udc_clock;
54static struct clk *usb_bus_clock;
55static void __iomem *base_addr;
56static int irq_usbd;
57static struct dentry *s3c2410_udc_debugfs_root;
58
59static inline u32 udc_read(u32 reg)
60{
61 return readb(base_addr + reg);
62}
63
64static inline void udc_write(u32 value, u32 reg)
65{
66 writeb(value, base_addr + reg);
67}
68
69static inline void udc_writeb(void __iomem *base, u32 value, u32 reg)
70{
71 writeb(value, base + reg);
72}
73
74static struct s3c2410_udc_mach_info *udc_info;
75
76/*************************** DEBUG FUNCTION ***************************/
77#define DEBUG_NORMAL 1
78#define DEBUG_VERBOSE 2
79
80#ifdef CONFIG_USB_S3C2410_DEBUG
81#define USB_S3C2410_DEBUG_LEVEL 0
82
83static uint32_t s3c2410_ticks = 0;
84
85__printf(2, 3)
86static void dprintk(int level, const char *fmt, ...)
87{
88 static long prevticks;
89 static int invocation;
90 struct va_format vaf;
91 va_list args;
92
93 if (level > USB_S3C2410_DEBUG_LEVEL)
94 return;
95
96 va_start(args, fmt);
97
98 vaf.fmt = fmt;
99 vaf.va = &args;
100
101 if (s3c2410_ticks != prevticks) {
102 prevticks = s3c2410_ticks;
103 invocation = 0;
104 }
105
106 pr_debug("%1lu.%02d USB: %pV", prevticks, invocation++, &vaf);
107
108 va_end(args);
109}
110#else
111__printf(2, 3)
112static void dprintk(int level, const char *fmt, ...)
113{
114}
115#endif
116
117static int s3c2410_udc_debugfs_show(struct seq_file *m, void *p)
118{
119 u32 addr_reg, pwr_reg, ep_int_reg, usb_int_reg;
120 u32 ep_int_en_reg, usb_int_en_reg, ep0_csr;
121 u32 ep1_i_csr1, ep1_i_csr2, ep1_o_csr1, ep1_o_csr2;
122 u32 ep2_i_csr1, ep2_i_csr2, ep2_o_csr1, ep2_o_csr2;
123
124 addr_reg = udc_read(S3C2410_UDC_FUNC_ADDR_REG);
125 pwr_reg = udc_read(S3C2410_UDC_PWR_REG);
126 ep_int_reg = udc_read(S3C2410_UDC_EP_INT_REG);
127 usb_int_reg = udc_read(S3C2410_UDC_USB_INT_REG);
128 ep_int_en_reg = udc_read(S3C2410_UDC_EP_INT_EN_REG);
129 usb_int_en_reg = udc_read(S3C2410_UDC_USB_INT_EN_REG);
130 udc_write(0, S3C2410_UDC_INDEX_REG);
131 ep0_csr = udc_read(S3C2410_UDC_IN_CSR1_REG);
132 udc_write(1, S3C2410_UDC_INDEX_REG);
133 ep1_i_csr1 = udc_read(S3C2410_UDC_IN_CSR1_REG);
134 ep1_i_csr2 = udc_read(S3C2410_UDC_IN_CSR2_REG);
135 ep1_o_csr1 = udc_read(S3C2410_UDC_IN_CSR1_REG);
136 ep1_o_csr2 = udc_read(S3C2410_UDC_IN_CSR2_REG);
137 udc_write(2, S3C2410_UDC_INDEX_REG);
138 ep2_i_csr1 = udc_read(S3C2410_UDC_IN_CSR1_REG);
139 ep2_i_csr2 = udc_read(S3C2410_UDC_IN_CSR2_REG);
140 ep2_o_csr1 = udc_read(S3C2410_UDC_IN_CSR1_REG);
141 ep2_o_csr2 = udc_read(S3C2410_UDC_IN_CSR2_REG);
142
143 seq_printf(m, "FUNC_ADDR_REG : 0x%04X\n"
144 "PWR_REG : 0x%04X\n"
145 "EP_INT_REG : 0x%04X\n"
146 "USB_INT_REG : 0x%04X\n"
147 "EP_INT_EN_REG : 0x%04X\n"
148 "USB_INT_EN_REG : 0x%04X\n"
149 "EP0_CSR : 0x%04X\n"
150 "EP1_I_CSR1 : 0x%04X\n"
151 "EP1_I_CSR2 : 0x%04X\n"
152 "EP1_O_CSR1 : 0x%04X\n"
153 "EP1_O_CSR2 : 0x%04X\n"
154 "EP2_I_CSR1 : 0x%04X\n"
155 "EP2_I_CSR2 : 0x%04X\n"
156 "EP2_O_CSR1 : 0x%04X\n"
157 "EP2_O_CSR2 : 0x%04X\n",
158 addr_reg, pwr_reg, ep_int_reg, usb_int_reg,
159 ep_int_en_reg, usb_int_en_reg, ep0_csr,
160 ep1_i_csr1, ep1_i_csr2, ep1_o_csr1, ep1_o_csr2,
161 ep2_i_csr1, ep2_i_csr2, ep2_o_csr1, ep2_o_csr2
162 );
163
164 return 0;
165}
166DEFINE_SHOW_ATTRIBUTE(s3c2410_udc_debugfs);
167
168/* io macros */
169
170static inline void s3c2410_udc_clear_ep0_opr(void __iomem *base)
171{
172 udc_writeb(base, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG);
173 udc_writeb(base, S3C2410_UDC_EP0_CSR_SOPKTRDY,
174 S3C2410_UDC_EP0_CSR_REG);
175}
176
177static inline void s3c2410_udc_clear_ep0_sst(void __iomem *base)
178{
179 udc_writeb(base, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG);
180 writeb(0x00, base + S3C2410_UDC_EP0_CSR_REG);
181}
182
183static inline void s3c2410_udc_clear_ep0_se(void __iomem *base)
184{
185 udc_writeb(base, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG);
186 udc_writeb(base, S3C2410_UDC_EP0_CSR_SSE, S3C2410_UDC_EP0_CSR_REG);
187}
188
189static inline void s3c2410_udc_set_ep0_ipr(void __iomem *base)
190{
191 udc_writeb(base, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG);
192 udc_writeb(base, S3C2410_UDC_EP0_CSR_IPKRDY, S3C2410_UDC_EP0_CSR_REG);
193}
194
195static inline void s3c2410_udc_set_ep0_de(void __iomem *base)
196{
197 udc_writeb(base, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG);
198 udc_writeb(base, S3C2410_UDC_EP0_CSR_DE, S3C2410_UDC_EP0_CSR_REG);
199}
200
201static inline void s3c2410_udc_set_ep0_ss(void __iomem *b)
202{
203 udc_writeb(b, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG);
204 udc_writeb(b, S3C2410_UDC_EP0_CSR_SENDSTL, S3C2410_UDC_EP0_CSR_REG);
205}
206
207static inline void s3c2410_udc_set_ep0_de_out(void __iomem *base)
208{
209 udc_writeb(base, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG);
210
211 udc_writeb(base, (S3C2410_UDC_EP0_CSR_SOPKTRDY
212 | S3C2410_UDC_EP0_CSR_DE),
213 S3C2410_UDC_EP0_CSR_REG);
214}
215
216static inline void s3c2410_udc_set_ep0_de_in(void __iomem *base)
217{
218 udc_writeb(base, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG);
219 udc_writeb(base, (S3C2410_UDC_EP0_CSR_IPKRDY
220 | S3C2410_UDC_EP0_CSR_DE),
221 S3C2410_UDC_EP0_CSR_REG);
222}
223
224/*------------------------- I/O ----------------------------------*/
225
226/*
227 * s3c2410_udc_done
228 */
229static void s3c2410_udc_done(struct s3c2410_ep *ep,
230 struct s3c2410_request *req, int status)
231{
232 unsigned halted = ep->halted;
233
234 list_del_init(&req->queue);
235
236 if (likely(req->req.status == -EINPROGRESS))
237 req->req.status = status;
238 else
239 status = req->req.status;
240
241 ep->halted = 1;
242 usb_gadget_giveback_request(&ep->ep, &req->req);
243 ep->halted = halted;
244}
245
246static void s3c2410_udc_nuke(struct s3c2410_udc *udc,
247 struct s3c2410_ep *ep, int status)
248{
249 while (!list_empty(&ep->queue)) {
250 struct s3c2410_request *req;
251 req = list_entry(ep->queue.next, struct s3c2410_request,
252 queue);
253 s3c2410_udc_done(ep, req, status);
254 }
255}
256
257static inline int s3c2410_udc_fifo_count_out(void)
258{
259 int tmp;
260
261 tmp = udc_read(S3C2410_UDC_OUT_FIFO_CNT2_REG) << 8;
262 tmp |= udc_read(S3C2410_UDC_OUT_FIFO_CNT1_REG);
263 return tmp;
264}
265
266/*
267 * s3c2410_udc_write_packet
268 */
269static inline int s3c2410_udc_write_packet(int fifo,
270 struct s3c2410_request *req,
271 unsigned max)
272{
273 unsigned len = min(req->req.length - req->req.actual, max);
274 u8 *buf = req->req.buf + req->req.actual;
275
276 prefetch(buf);
277
278 dprintk(DEBUG_VERBOSE, "%s %d %d %d %d\n", __func__,
279 req->req.actual, req->req.length, len, req->req.actual + len);
280
281 req->req.actual += len;
282
283 udelay(5);
284 writesb(base_addr + fifo, buf, len);
285 return len;
286}
287
288/*
289 * s3c2410_udc_write_fifo
290 *
291 * return: 0 = still running, 1 = completed, negative = errno
292 */
293static int s3c2410_udc_write_fifo(struct s3c2410_ep *ep,
294 struct s3c2410_request *req)
295{
296 unsigned count;
297 int is_last;
298 u32 idx;
299 int fifo_reg;
300 u32 ep_csr;
301
302 idx = ep->bEndpointAddress & 0x7F;
303 switch (idx) {
304 default:
305 idx = 0;
306 fallthrough;
307 case 0:
308 fifo_reg = S3C2410_UDC_EP0_FIFO_REG;
309 break;
310 case 1:
311 fifo_reg = S3C2410_UDC_EP1_FIFO_REG;
312 break;
313 case 2:
314 fifo_reg = S3C2410_UDC_EP2_FIFO_REG;
315 break;
316 case 3:
317 fifo_reg = S3C2410_UDC_EP3_FIFO_REG;
318 break;
319 case 4:
320 fifo_reg = S3C2410_UDC_EP4_FIFO_REG;
321 break;
322 }
323
324 count = s3c2410_udc_write_packet(fifo_reg, req, ep->ep.maxpacket);
325
326 /* last packet is often short (sometimes a zlp) */
327 if (count != ep->ep.maxpacket)
328 is_last = 1;
329 else if (req->req.length != req->req.actual || req->req.zero)
330 is_last = 0;
331 else
332 is_last = 2;
333
334 /* Only ep0 debug messages are interesting */
335 if (idx == 0)
336 dprintk(DEBUG_NORMAL,
337 "Written ep%d %d.%d of %d b [last %d,z %d]\n",
338 idx, count, req->req.actual, req->req.length,
339 is_last, req->req.zero);
340
341 if (is_last) {
342 /* The order is important. It prevents sending 2 packets
343 * at the same time */
344
345 if (idx == 0) {
346 /* Reset signal => no need to say 'data sent' */
347 if (!(udc_read(S3C2410_UDC_USB_INT_REG)
348 & S3C2410_UDC_USBINT_RESET))
349 s3c2410_udc_set_ep0_de_in(base_addr);
350 ep->dev->ep0state = EP0_IDLE;
351 } else {
352 udc_write(idx, S3C2410_UDC_INDEX_REG);
353 ep_csr = udc_read(S3C2410_UDC_IN_CSR1_REG);
354 udc_write(idx, S3C2410_UDC_INDEX_REG);
355 udc_write(ep_csr | S3C2410_UDC_ICSR1_PKTRDY,
356 S3C2410_UDC_IN_CSR1_REG);
357 }
358
359 s3c2410_udc_done(ep, req, 0);
360 is_last = 1;
361 } else {
362 if (idx == 0) {
363 /* Reset signal => no need to say 'data sent' */
364 if (!(udc_read(S3C2410_UDC_USB_INT_REG)
365 & S3C2410_UDC_USBINT_RESET))
366 s3c2410_udc_set_ep0_ipr(base_addr);
367 } else {
368 udc_write(idx, S3C2410_UDC_INDEX_REG);
369 ep_csr = udc_read(S3C2410_UDC_IN_CSR1_REG);
370 udc_write(idx, S3C2410_UDC_INDEX_REG);
371 udc_write(ep_csr | S3C2410_UDC_ICSR1_PKTRDY,
372 S3C2410_UDC_IN_CSR1_REG);
373 }
374 }
375
376 return is_last;
377}
378
379static inline int s3c2410_udc_read_packet(int fifo, u8 *buf,
380 struct s3c2410_request *req, unsigned avail)
381{
382 unsigned len;
383
384 len = min(req->req.length - req->req.actual, avail);
385 req->req.actual += len;
386
387 readsb(fifo + base_addr, buf, len);
388 return len;
389}
390
391/*
392 * return: 0 = still running, 1 = queue empty, negative = errno
393 */
394static int s3c2410_udc_read_fifo(struct s3c2410_ep *ep,
395 struct s3c2410_request *req)
396{
397 u8 *buf;
398 u32 ep_csr;
399 unsigned bufferspace;
400 int is_last = 1;
401 unsigned avail;
402 int fifo_count = 0;
403 u32 idx;
404 int fifo_reg;
405
406 idx = ep->bEndpointAddress & 0x7F;
407
408 switch (idx) {
409 default:
410 idx = 0;
411 fallthrough;
412 case 0:
413 fifo_reg = S3C2410_UDC_EP0_FIFO_REG;
414 break;
415 case 1:
416 fifo_reg = S3C2410_UDC_EP1_FIFO_REG;
417 break;
418 case 2:
419 fifo_reg = S3C2410_UDC_EP2_FIFO_REG;
420 break;
421 case 3:
422 fifo_reg = S3C2410_UDC_EP3_FIFO_REG;
423 break;
424 case 4:
425 fifo_reg = S3C2410_UDC_EP4_FIFO_REG;
426 break;
427 }
428
429 if (!req->req.length)
430 return 1;
431
432 buf = req->req.buf + req->req.actual;
433 bufferspace = req->req.length - req->req.actual;
434 if (!bufferspace) {
435 dprintk(DEBUG_NORMAL, "%s: buffer full!\n", __func__);
436 return -1;
437 }
438
439 udc_write(idx, S3C2410_UDC_INDEX_REG);
440
441 fifo_count = s3c2410_udc_fifo_count_out();
442 dprintk(DEBUG_NORMAL, "%s fifo count : %d\n", __func__, fifo_count);
443
444 if (fifo_count > ep->ep.maxpacket)
445 avail = ep->ep.maxpacket;
446 else
447 avail = fifo_count;
448
449 fifo_count = s3c2410_udc_read_packet(fifo_reg, buf, req, avail);
450
451 /* checking this with ep0 is not accurate as we already
452 * read a control request
453 **/
454 if (idx != 0 && fifo_count < ep->ep.maxpacket) {
455 is_last = 1;
456 /* overflowed this request? flush extra data */
457 if (fifo_count != avail)
458 req->req.status = -EOVERFLOW;
459 } else {
460 is_last = (req->req.length <= req->req.actual) ? 1 : 0;
461 }
462
463 udc_write(idx, S3C2410_UDC_INDEX_REG);
464 fifo_count = s3c2410_udc_fifo_count_out();
465
466 /* Only ep0 debug messages are interesting */
467 if (idx == 0)
468 dprintk(DEBUG_VERBOSE, "%s fifo count : %d [last %d]\n",
469 __func__, fifo_count, is_last);
470
471 if (is_last) {
472 if (idx == 0) {
473 s3c2410_udc_set_ep0_de_out(base_addr);
474 ep->dev->ep0state = EP0_IDLE;
475 } else {
476 udc_write(idx, S3C2410_UDC_INDEX_REG);
477 ep_csr = udc_read(S3C2410_UDC_OUT_CSR1_REG);
478 udc_write(idx, S3C2410_UDC_INDEX_REG);
479 udc_write(ep_csr & ~S3C2410_UDC_OCSR1_PKTRDY,
480 S3C2410_UDC_OUT_CSR1_REG);
481 }
482
483 s3c2410_udc_done(ep, req, 0);
484 } else {
485 if (idx == 0) {
486 s3c2410_udc_clear_ep0_opr(base_addr);
487 } else {
488 udc_write(idx, S3C2410_UDC_INDEX_REG);
489 ep_csr = udc_read(S3C2410_UDC_OUT_CSR1_REG);
490 udc_write(idx, S3C2410_UDC_INDEX_REG);
491 udc_write(ep_csr & ~S3C2410_UDC_OCSR1_PKTRDY,
492 S3C2410_UDC_OUT_CSR1_REG);
493 }
494 }
495
496 return is_last;
497}
498
499static int s3c2410_udc_read_fifo_crq(struct usb_ctrlrequest *crq)
500{
501 unsigned char *outbuf = (unsigned char *)crq;
502 int bytes_read = 0;
503
504 udc_write(0, S3C2410_UDC_INDEX_REG);
505
506 bytes_read = s3c2410_udc_fifo_count_out();
507
508 dprintk(DEBUG_NORMAL, "%s: fifo_count=%d\n", __func__, bytes_read);
509
510 if (bytes_read > sizeof(struct usb_ctrlrequest))
511 bytes_read = sizeof(struct usb_ctrlrequest);
512
513 readsb(S3C2410_UDC_EP0_FIFO_REG + base_addr, outbuf, bytes_read);
514
515 dprintk(DEBUG_VERBOSE, "%s: len=%d %02x:%02x {%x,%x,%x}\n", __func__,
516 bytes_read, crq->bRequest, crq->bRequestType,
517 crq->wValue, crq->wIndex, crq->wLength);
518
519 return bytes_read;
520}
521
522static int s3c2410_udc_get_status(struct s3c2410_udc *dev,
523 struct usb_ctrlrequest *crq)
524{
525 u16 status = 0;
526 u8 ep_num = crq->wIndex & 0x7F;
527 u8 is_in = crq->wIndex & USB_DIR_IN;
528
529 switch (crq->bRequestType & USB_RECIP_MASK) {
530 case USB_RECIP_INTERFACE:
531 break;
532
533 case USB_RECIP_DEVICE:
534 status = dev->devstatus;
535 break;
536
537 case USB_RECIP_ENDPOINT:
538 if (ep_num > 4 || crq->wLength > 2)
539 return 1;
540
541 if (ep_num == 0) {
542 udc_write(0, S3C2410_UDC_INDEX_REG);
543 status = udc_read(S3C2410_UDC_IN_CSR1_REG);
544 status = status & S3C2410_UDC_EP0_CSR_SENDSTL;
545 } else {
546 udc_write(ep_num, S3C2410_UDC_INDEX_REG);
547 if (is_in) {
548 status = udc_read(S3C2410_UDC_IN_CSR1_REG);
549 status = status & S3C2410_UDC_ICSR1_SENDSTL;
550 } else {
551 status = udc_read(S3C2410_UDC_OUT_CSR1_REG);
552 status = status & S3C2410_UDC_OCSR1_SENDSTL;
553 }
554 }
555
556 status = status ? 1 : 0;
557 break;
558
559 default:
560 return 1;
561 }
562
563 /* Seems to be needed to get it working. ouch :( */
564 udelay(5);
565 udc_write(status & 0xFF, S3C2410_UDC_EP0_FIFO_REG);
566 udc_write(status >> 8, S3C2410_UDC_EP0_FIFO_REG);
567 s3c2410_udc_set_ep0_de_in(base_addr);
568
569 return 0;
570}
571/*------------------------- usb state machine -------------------------------*/
572static int s3c2410_udc_set_halt(struct usb_ep *_ep, int value);
573
574static void s3c2410_udc_handle_ep0_idle(struct s3c2410_udc *dev,
575 struct s3c2410_ep *ep,
576 struct usb_ctrlrequest *crq,
577 u32 ep0csr)
578{
579 int len, ret, tmp;
580
581 /* start control request? */
582 if (!(ep0csr & S3C2410_UDC_EP0_CSR_OPKRDY))
583 return;
584
585 s3c2410_udc_nuke(dev, ep, -EPROTO);
586
587 len = s3c2410_udc_read_fifo_crq(crq);
588 if (len != sizeof(*crq)) {
589 dprintk(DEBUG_NORMAL, "setup begin: fifo READ ERROR"
590 " wanted %d bytes got %d. Stalling out...\n",
591 sizeof(*crq), len);
592 s3c2410_udc_set_ep0_ss(base_addr);
593 return;
594 }
595
596 dprintk(DEBUG_NORMAL, "bRequest = %d bRequestType %d wLength = %d\n",
597 crq->bRequest, crq->bRequestType, crq->wLength);
598
599 /* cope with automagic for some standard requests. */
600 dev->req_std = (crq->bRequestType & USB_TYPE_MASK)
601 == USB_TYPE_STANDARD;
602 dev->req_config = 0;
603 dev->req_pending = 1;
604
605 switch (crq->bRequest) {
606 case USB_REQ_SET_CONFIGURATION:
607 dprintk(DEBUG_NORMAL, "USB_REQ_SET_CONFIGURATION ...\n");
608
609 if (crq->bRequestType == USB_RECIP_DEVICE) {
610 dev->req_config = 1;
611 s3c2410_udc_set_ep0_de_out(base_addr);
612 }
613 break;
614
615 case USB_REQ_SET_INTERFACE:
616 dprintk(DEBUG_NORMAL, "USB_REQ_SET_INTERFACE ...\n");
617
618 if (crq->bRequestType == USB_RECIP_INTERFACE) {
619 dev->req_config = 1;
620 s3c2410_udc_set_ep0_de_out(base_addr);
621 }
622 break;
623
624 case USB_REQ_SET_ADDRESS:
625 dprintk(DEBUG_NORMAL, "USB_REQ_SET_ADDRESS ...\n");
626
627 if (crq->bRequestType == USB_RECIP_DEVICE) {
628 tmp = crq->wValue & 0x7F;
629 dev->address = tmp;
630 udc_write((tmp | S3C2410_UDC_FUNCADDR_UPDATE),
631 S3C2410_UDC_FUNC_ADDR_REG);
632 s3c2410_udc_set_ep0_de_out(base_addr);
633 return;
634 }
635 break;
636
637 case USB_REQ_GET_STATUS:
638 dprintk(DEBUG_NORMAL, "USB_REQ_GET_STATUS ...\n");
639 s3c2410_udc_clear_ep0_opr(base_addr);
640
641 if (dev->req_std) {
642 if (!s3c2410_udc_get_status(dev, crq))
643 return;
644 }
645 break;
646
647 case USB_REQ_CLEAR_FEATURE:
648 s3c2410_udc_clear_ep0_opr(base_addr);
649
650 if (crq->bRequestType != USB_RECIP_ENDPOINT)
651 break;
652
653 if (crq->wValue != USB_ENDPOINT_HALT || crq->wLength != 0)
654 break;
655
656 s3c2410_udc_set_halt(&dev->ep[crq->wIndex & 0x7f].ep, 0);
657 s3c2410_udc_set_ep0_de_out(base_addr);
658 return;
659
660 case USB_REQ_SET_FEATURE:
661 s3c2410_udc_clear_ep0_opr(base_addr);
662
663 if (crq->bRequestType != USB_RECIP_ENDPOINT)
664 break;
665
666 if (crq->wValue != USB_ENDPOINT_HALT || crq->wLength != 0)
667 break;
668
669 s3c2410_udc_set_halt(&dev->ep[crq->wIndex & 0x7f].ep, 1);
670 s3c2410_udc_set_ep0_de_out(base_addr);
671 return;
672
673 default:
674 s3c2410_udc_clear_ep0_opr(base_addr);
675 break;
676 }
677
678 if (crq->bRequestType & USB_DIR_IN)
679 dev->ep0state = EP0_IN_DATA_PHASE;
680 else
681 dev->ep0state = EP0_OUT_DATA_PHASE;
682
683 if (!dev->driver)
684 return;
685
686 /* deliver the request to the gadget driver */
687 ret = dev->driver->setup(&dev->gadget, crq);
688 if (ret < 0) {
689 if (dev->req_config) {
690 dprintk(DEBUG_NORMAL, "config change %02x fail %d?\n",
691 crq->bRequest, ret);
692 return;
693 }
694
695 if (ret == -EOPNOTSUPP)
696 dprintk(DEBUG_NORMAL, "Operation not supported\n");
697 else
698 dprintk(DEBUG_NORMAL,
699 "dev->driver->setup failed. (%d)\n", ret);
700
701 udelay(5);
702 s3c2410_udc_set_ep0_ss(base_addr);
703 s3c2410_udc_set_ep0_de_out(base_addr);
704 dev->ep0state = EP0_IDLE;
705 /* deferred i/o == no response yet */
706 } else if (dev->req_pending) {
707 dprintk(DEBUG_VERBOSE, "dev->req_pending... what now?\n");
708 dev->req_pending = 0;
709 }
710
711 dprintk(DEBUG_VERBOSE, "ep0state %s\n", ep0states[dev->ep0state]);
712}
713
714static void s3c2410_udc_handle_ep0(struct s3c2410_udc *dev)
715{
716 u32 ep0csr;
717 struct s3c2410_ep *ep = &dev->ep[0];
718 struct s3c2410_request *req;
719 struct usb_ctrlrequest crq;
720
721 if (list_empty(&ep->queue))
722 req = NULL;
723 else
724 req = list_entry(ep->queue.next, struct s3c2410_request, queue);
725
726 /* We make the assumption that S3C2410_UDC_IN_CSR1_REG equal to
727 * S3C2410_UDC_EP0_CSR_REG when index is zero */
728
729 udc_write(0, S3C2410_UDC_INDEX_REG);
730 ep0csr = udc_read(S3C2410_UDC_IN_CSR1_REG);
731
732 dprintk(DEBUG_NORMAL, "ep0csr %x ep0state %s\n",
733 ep0csr, ep0states[dev->ep0state]);
734
735 /* clear stall status */
736 if (ep0csr & S3C2410_UDC_EP0_CSR_SENTSTL) {
737 s3c2410_udc_nuke(dev, ep, -EPIPE);
738 dprintk(DEBUG_NORMAL, "... clear SENT_STALL ...\n");
739 s3c2410_udc_clear_ep0_sst(base_addr);
740 dev->ep0state = EP0_IDLE;
741 return;
742 }
743
744 /* clear setup end */
745 if (ep0csr & S3C2410_UDC_EP0_CSR_SE) {
746 dprintk(DEBUG_NORMAL, "... serviced SETUP_END ...\n");
747 s3c2410_udc_nuke(dev, ep, 0);
748 s3c2410_udc_clear_ep0_se(base_addr);
749 dev->ep0state = EP0_IDLE;
750 }
751
752 switch (dev->ep0state) {
753 case EP0_IDLE:
754 s3c2410_udc_handle_ep0_idle(dev, ep, &crq, ep0csr);
755 break;
756
757 case EP0_IN_DATA_PHASE: /* GET_DESCRIPTOR etc */
758 dprintk(DEBUG_NORMAL, "EP0_IN_DATA_PHASE ... what now?\n");
759 if (!(ep0csr & S3C2410_UDC_EP0_CSR_IPKRDY) && req)
760 s3c2410_udc_write_fifo(ep, req);
761 break;
762
763 case EP0_OUT_DATA_PHASE: /* SET_DESCRIPTOR etc */
764 dprintk(DEBUG_NORMAL, "EP0_OUT_DATA_PHASE ... what now?\n");
765 if ((ep0csr & S3C2410_UDC_EP0_CSR_OPKRDY) && req)
766 s3c2410_udc_read_fifo(ep, req);
767 break;
768
769 case EP0_END_XFER:
770 dprintk(DEBUG_NORMAL, "EP0_END_XFER ... what now?\n");
771 dev->ep0state = EP0_IDLE;
772 break;
773
774 case EP0_STALL:
775 dprintk(DEBUG_NORMAL, "EP0_STALL ... what now?\n");
776 dev->ep0state = EP0_IDLE;
777 break;
778 }
779}
780
781/*
782 * handle_ep - Manage I/O endpoints
783 */
784
785static void s3c2410_udc_handle_ep(struct s3c2410_ep *ep)
786{
787 struct s3c2410_request *req;
788 int is_in = ep->bEndpointAddress & USB_DIR_IN;
789 u32 ep_csr1;
790 u32 idx;
791
792 if (likely(!list_empty(&ep->queue)))
793 req = list_entry(ep->queue.next,
794 struct s3c2410_request, queue);
795 else
796 req = NULL;
797
798 idx = ep->bEndpointAddress & 0x7F;
799
800 if (is_in) {
801 udc_write(idx, S3C2410_UDC_INDEX_REG);
802 ep_csr1 = udc_read(S3C2410_UDC_IN_CSR1_REG);
803 dprintk(DEBUG_VERBOSE, "ep%01d write csr:%02x %d\n",
804 idx, ep_csr1, req ? 1 : 0);
805
806 if (ep_csr1 & S3C2410_UDC_ICSR1_SENTSTL) {
807 dprintk(DEBUG_VERBOSE, "st\n");
808 udc_write(idx, S3C2410_UDC_INDEX_REG);
809 udc_write(ep_csr1 & ~S3C2410_UDC_ICSR1_SENTSTL,
810 S3C2410_UDC_IN_CSR1_REG);
811 return;
812 }
813
814 if (!(ep_csr1 & S3C2410_UDC_ICSR1_PKTRDY) && req)
815 s3c2410_udc_write_fifo(ep, req);
816 } else {
817 udc_write(idx, S3C2410_UDC_INDEX_REG);
818 ep_csr1 = udc_read(S3C2410_UDC_OUT_CSR1_REG);
819 dprintk(DEBUG_VERBOSE, "ep%01d rd csr:%02x\n", idx, ep_csr1);
820
821 if (ep_csr1 & S3C2410_UDC_OCSR1_SENTSTL) {
822 udc_write(idx, S3C2410_UDC_INDEX_REG);
823 udc_write(ep_csr1 & ~S3C2410_UDC_OCSR1_SENTSTL,
824 S3C2410_UDC_OUT_CSR1_REG);
825 return;
826 }
827
828 if ((ep_csr1 & S3C2410_UDC_OCSR1_PKTRDY) && req)
829 s3c2410_udc_read_fifo(ep, req);
830 }
831}
832
833/*
834 * s3c2410_udc_irq - interrupt handler
835 */
836static irqreturn_t s3c2410_udc_irq(int dummy, void *_dev)
837{
838 struct s3c2410_udc *dev = _dev;
839 int usb_status;
840 int usbd_status;
841 int pwr_reg;
842 int ep0csr;
843 int i;
844 u32 idx, idx2;
845 unsigned long flags;
846
847 spin_lock_irqsave(&dev->lock, flags);
848
849 /* Driver connected ? */
850 if (!dev->driver) {
851 /* Clear interrupts */
852 udc_write(udc_read(S3C2410_UDC_USB_INT_REG),
853 S3C2410_UDC_USB_INT_REG);
854 udc_write(udc_read(S3C2410_UDC_EP_INT_REG),
855 S3C2410_UDC_EP_INT_REG);
856 }
857
858 /* Save index */
859 idx = udc_read(S3C2410_UDC_INDEX_REG);
860
861 /* Read status registers */
862 usb_status = udc_read(S3C2410_UDC_USB_INT_REG);
863 usbd_status = udc_read(S3C2410_UDC_EP_INT_REG);
864 pwr_reg = udc_read(S3C2410_UDC_PWR_REG);
865
866 udc_writeb(base_addr, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG);
867 ep0csr = udc_read(S3C2410_UDC_IN_CSR1_REG);
868
869 dprintk(DEBUG_NORMAL, "usbs=%02x, usbds=%02x, pwr=%02x ep0csr=%02x\n",
870 usb_status, usbd_status, pwr_reg, ep0csr);
871
872 /*
873 * Now, handle interrupts. There's two types :
874 * - Reset, Resume, Suspend coming -> usb_int_reg
875 * - EP -> ep_int_reg
876 */
877
878 /* RESET */
879 if (usb_status & S3C2410_UDC_USBINT_RESET) {
880 /* two kind of reset :
881 * - reset start -> pwr reg = 8
882 * - reset end -> pwr reg = 0
883 **/
884 dprintk(DEBUG_NORMAL, "USB reset csr %x pwr %x\n",
885 ep0csr, pwr_reg);
886
887 dev->gadget.speed = USB_SPEED_UNKNOWN;
888 udc_write(0x00, S3C2410_UDC_INDEX_REG);
889 udc_write((dev->ep[0].ep.maxpacket & 0x7ff) >> 3,
890 S3C2410_UDC_MAXP_REG);
891 dev->address = 0;
892
893 dev->ep0state = EP0_IDLE;
894 dev->gadget.speed = USB_SPEED_FULL;
895
896 /* clear interrupt */
897 udc_write(S3C2410_UDC_USBINT_RESET,
898 S3C2410_UDC_USB_INT_REG);
899
900 udc_write(idx, S3C2410_UDC_INDEX_REG);
901 spin_unlock_irqrestore(&dev->lock, flags);
902 return IRQ_HANDLED;
903 }
904
905 /* RESUME */
906 if (usb_status & S3C2410_UDC_USBINT_RESUME) {
907 dprintk(DEBUG_NORMAL, "USB resume\n");
908
909 /* clear interrupt */
910 udc_write(S3C2410_UDC_USBINT_RESUME,
911 S3C2410_UDC_USB_INT_REG);
912
913 if (dev->gadget.speed != USB_SPEED_UNKNOWN
914 && dev->driver
915 && dev->driver->resume)
916 dev->driver->resume(&dev->gadget);
917 }
918
919 /* SUSPEND */
920 if (usb_status & S3C2410_UDC_USBINT_SUSPEND) {
921 dprintk(DEBUG_NORMAL, "USB suspend\n");
922
923 /* clear interrupt */
924 udc_write(S3C2410_UDC_USBINT_SUSPEND,
925 S3C2410_UDC_USB_INT_REG);
926
927 if (dev->gadget.speed != USB_SPEED_UNKNOWN
928 && dev->driver
929 && dev->driver->suspend)
930 dev->driver->suspend(&dev->gadget);
931
932 dev->ep0state = EP0_IDLE;
933 }
934
935 /* EP */
936 /* control traffic */
937 /* check on ep0csr != 0 is not a good idea as clearing in_pkt_ready
938 * generate an interrupt
939 */
940 if (usbd_status & S3C2410_UDC_INT_EP0) {
941 dprintk(DEBUG_VERBOSE, "USB ep0 irq\n");
942 /* Clear the interrupt bit by setting it to 1 */
943 udc_write(S3C2410_UDC_INT_EP0, S3C2410_UDC_EP_INT_REG);
944 s3c2410_udc_handle_ep0(dev);
945 }
946
947 /* endpoint data transfers */
948 for (i = 1; i < S3C2410_ENDPOINTS; i++) {
949 u32 tmp = 1 << i;
950 if (usbd_status & tmp) {
951 dprintk(DEBUG_VERBOSE, "USB ep%d irq\n", i);
952
953 /* Clear the interrupt bit by setting it to 1 */
954 udc_write(tmp, S3C2410_UDC_EP_INT_REG);
955 s3c2410_udc_handle_ep(&dev->ep[i]);
956 }
957 }
958
959 /* what else causes this interrupt? a receive! who is it? */
960 if (!usb_status && !usbd_status && !pwr_reg && !ep0csr) {
961 for (i = 1; i < S3C2410_ENDPOINTS; i++) {
962 idx2 = udc_read(S3C2410_UDC_INDEX_REG);
963 udc_write(i, S3C2410_UDC_INDEX_REG);
964
965 if (udc_read(S3C2410_UDC_OUT_CSR1_REG) & 0x1)
966 s3c2410_udc_handle_ep(&dev->ep[i]);
967
968 /* restore index */
969 udc_write(idx2, S3C2410_UDC_INDEX_REG);
970 }
971 }
972
973 dprintk(DEBUG_VERBOSE, "irq: %d s3c2410_udc_done.\n", irq_usbd);
974
975 /* Restore old index */
976 udc_write(idx, S3C2410_UDC_INDEX_REG);
977
978 spin_unlock_irqrestore(&dev->lock, flags);
979
980 return IRQ_HANDLED;
981}
982/*------------------------- s3c2410_ep_ops ----------------------------------*/
983
984static inline struct s3c2410_ep *to_s3c2410_ep(struct usb_ep *ep)
985{
986 return container_of(ep, struct s3c2410_ep, ep);
987}
988
989static inline struct s3c2410_udc *to_s3c2410_udc(struct usb_gadget *gadget)
990{
991 return container_of(gadget, struct s3c2410_udc, gadget);
992}
993
994static inline struct s3c2410_request *to_s3c2410_req(struct usb_request *req)
995{
996 return container_of(req, struct s3c2410_request, req);
997}
998
999/*
1000 * s3c2410_udc_ep_enable
1001 */
1002static int s3c2410_udc_ep_enable(struct usb_ep *_ep,
1003 const struct usb_endpoint_descriptor *desc)
1004{
1005 struct s3c2410_udc *dev;
1006 struct s3c2410_ep *ep;
1007 u32 max, tmp;
1008 unsigned long flags;
1009 u32 csr1, csr2;
1010 u32 int_en_reg;
1011
1012 ep = to_s3c2410_ep(_ep);
1013
1014 if (!_ep || !desc
1015 || _ep->name == ep0name
1016 || desc->bDescriptorType != USB_DT_ENDPOINT)
1017 return -EINVAL;
1018
1019 dev = ep->dev;
1020 if (!dev->driver || dev->gadget.speed == USB_SPEED_UNKNOWN)
1021 return -ESHUTDOWN;
1022
1023 max = usb_endpoint_maxp(desc);
1024
1025 local_irq_save(flags);
1026 _ep->maxpacket = max;
1027 ep->ep.desc = desc;
1028 ep->halted = 0;
1029 ep->bEndpointAddress = desc->bEndpointAddress;
1030
1031 /* set max packet */
1032 udc_write(ep->num, S3C2410_UDC_INDEX_REG);
1033 udc_write(max >> 3, S3C2410_UDC_MAXP_REG);
1034
1035 /* set type, direction, address; reset fifo counters */
1036 if (desc->bEndpointAddress & USB_DIR_IN) {
1037 csr1 = S3C2410_UDC_ICSR1_FFLUSH|S3C2410_UDC_ICSR1_CLRDT;
1038 csr2 = S3C2410_UDC_ICSR2_MODEIN|S3C2410_UDC_ICSR2_DMAIEN;
1039
1040 udc_write(ep->num, S3C2410_UDC_INDEX_REG);
1041 udc_write(csr1, S3C2410_UDC_IN_CSR1_REG);
1042 udc_write(ep->num, S3C2410_UDC_INDEX_REG);
1043 udc_write(csr2, S3C2410_UDC_IN_CSR2_REG);
1044 } else {
1045 /* don't flush in fifo or it will cause endpoint interrupt */
1046 csr1 = S3C2410_UDC_ICSR1_CLRDT;
1047 csr2 = S3C2410_UDC_ICSR2_DMAIEN;
1048
1049 udc_write(ep->num, S3C2410_UDC_INDEX_REG);
1050 udc_write(csr1, S3C2410_UDC_IN_CSR1_REG);
1051 udc_write(ep->num, S3C2410_UDC_INDEX_REG);
1052 udc_write(csr2, S3C2410_UDC_IN_CSR2_REG);
1053
1054 csr1 = S3C2410_UDC_OCSR1_FFLUSH | S3C2410_UDC_OCSR1_CLRDT;
1055 csr2 = S3C2410_UDC_OCSR2_DMAIEN;
1056
1057 udc_write(ep->num, S3C2410_UDC_INDEX_REG);
1058 udc_write(csr1, S3C2410_UDC_OUT_CSR1_REG);
1059 udc_write(ep->num, S3C2410_UDC_INDEX_REG);
1060 udc_write(csr2, S3C2410_UDC_OUT_CSR2_REG);
1061 }
1062
1063 /* enable irqs */
1064 int_en_reg = udc_read(S3C2410_UDC_EP_INT_EN_REG);
1065 udc_write(int_en_reg | (1 << ep->num), S3C2410_UDC_EP_INT_EN_REG);
1066
1067 /* print some debug message */
1068 tmp = desc->bEndpointAddress;
1069 dprintk(DEBUG_NORMAL, "enable %s(%d) ep%x%s-blk max %02x\n",
1070 _ep->name, ep->num, tmp,
1071 desc->bEndpointAddress & USB_DIR_IN ? "in" : "out", max);
1072
1073 local_irq_restore(flags);
1074 s3c2410_udc_set_halt(_ep, 0);
1075
1076 return 0;
1077}
1078
1079/*
1080 * s3c2410_udc_ep_disable
1081 */
1082static int s3c2410_udc_ep_disable(struct usb_ep *_ep)
1083{
1084 struct s3c2410_ep *ep = to_s3c2410_ep(_ep);
1085 unsigned long flags;
1086 u32 int_en_reg;
1087
1088 if (!_ep || !ep->ep.desc) {
1089 dprintk(DEBUG_NORMAL, "%s not enabled\n",
1090 _ep ? ep->ep.name : NULL);
1091 return -EINVAL;
1092 }
1093
1094 local_irq_save(flags);
1095
1096 dprintk(DEBUG_NORMAL, "ep_disable: %s\n", _ep->name);
1097
1098 ep->ep.desc = NULL;
1099 ep->halted = 1;
1100
1101 s3c2410_udc_nuke(ep->dev, ep, -ESHUTDOWN);
1102
1103 /* disable irqs */
1104 int_en_reg = udc_read(S3C2410_UDC_EP_INT_EN_REG);
1105 udc_write(int_en_reg & ~(1<<ep->num), S3C2410_UDC_EP_INT_EN_REG);
1106
1107 local_irq_restore(flags);
1108
1109 dprintk(DEBUG_NORMAL, "%s disabled\n", _ep->name);
1110
1111 return 0;
1112}
1113
1114/*
1115 * s3c2410_udc_alloc_request
1116 */
1117static struct usb_request *
1118s3c2410_udc_alloc_request(struct usb_ep *_ep, gfp_t mem_flags)
1119{
1120 struct s3c2410_request *req;
1121
1122 dprintk(DEBUG_VERBOSE, "%s(%p,%d)\n", __func__, _ep, mem_flags);
1123
1124 if (!_ep)
1125 return NULL;
1126
1127 req = kzalloc(sizeof(struct s3c2410_request), mem_flags);
1128 if (!req)
1129 return NULL;
1130
1131 INIT_LIST_HEAD(&req->queue);
1132 return &req->req;
1133}
1134
1135/*
1136 * s3c2410_udc_free_request
1137 */
1138static void
1139s3c2410_udc_free_request(struct usb_ep *_ep, struct usb_request *_req)
1140{
1141 struct s3c2410_ep *ep = to_s3c2410_ep(_ep);
1142 struct s3c2410_request *req = to_s3c2410_req(_req);
1143
1144 dprintk(DEBUG_VERBOSE, "%s(%p,%p)\n", __func__, _ep, _req);
1145
1146 if (!ep || !_req || (!ep->ep.desc && _ep->name != ep0name))
1147 return;
1148
1149 WARN_ON(!list_empty(&req->queue));
1150 kfree(req);
1151}
1152
1153/*
1154 * s3c2410_udc_queue
1155 */
1156static int s3c2410_udc_queue(struct usb_ep *_ep, struct usb_request *_req,
1157 gfp_t gfp_flags)
1158{
1159 struct s3c2410_request *req = to_s3c2410_req(_req);
1160 struct s3c2410_ep *ep = to_s3c2410_ep(_ep);
1161 struct s3c2410_udc *dev;
1162 u32 ep_csr = 0;
1163 int fifo_count = 0;
1164 unsigned long flags;
1165
1166 if (unlikely(!_ep || (!ep->ep.desc && ep->ep.name != ep0name))) {
1167 dprintk(DEBUG_NORMAL, "%s: invalid args\n", __func__);
1168 return -EINVAL;
1169 }
1170
1171 dev = ep->dev;
1172 if (unlikely(!dev->driver
1173 || dev->gadget.speed == USB_SPEED_UNKNOWN)) {
1174 return -ESHUTDOWN;
1175 }
1176
1177 local_irq_save(flags);
1178
1179 if (unlikely(!_req || !_req->complete
1180 || !_req->buf || !list_empty(&req->queue))) {
1181 if (!_req)
1182 dprintk(DEBUG_NORMAL, "%s: 1 X X X\n", __func__);
1183 else {
1184 dprintk(DEBUG_NORMAL, "%s: 0 %01d %01d %01d\n",
1185 __func__, !_req->complete, !_req->buf,
1186 !list_empty(&req->queue));
1187 }
1188
1189 local_irq_restore(flags);
1190 return -EINVAL;
1191 }
1192
1193 _req->status = -EINPROGRESS;
1194 _req->actual = 0;
1195
1196 dprintk(DEBUG_VERBOSE, "%s: ep%x len %d\n",
1197 __func__, ep->bEndpointAddress, _req->length);
1198
1199 if (ep->bEndpointAddress) {
1200 udc_write(ep->bEndpointAddress & 0x7F, S3C2410_UDC_INDEX_REG);
1201
1202 ep_csr = udc_read((ep->bEndpointAddress & USB_DIR_IN)
1203 ? S3C2410_UDC_IN_CSR1_REG
1204 : S3C2410_UDC_OUT_CSR1_REG);
1205 fifo_count = s3c2410_udc_fifo_count_out();
1206 } else {
1207 udc_write(0, S3C2410_UDC_INDEX_REG);
1208 ep_csr = udc_read(S3C2410_UDC_IN_CSR1_REG);
1209 fifo_count = s3c2410_udc_fifo_count_out();
1210 }
1211
1212 /* kickstart this i/o queue? */
1213 if (list_empty(&ep->queue) && !ep->halted) {
1214 if (ep->bEndpointAddress == 0 /* ep0 */) {
1215 switch (dev->ep0state) {
1216 case EP0_IN_DATA_PHASE:
1217 if (!(ep_csr&S3C2410_UDC_EP0_CSR_IPKRDY)
1218 && s3c2410_udc_write_fifo(ep,
1219 req)) {
1220 dev->ep0state = EP0_IDLE;
1221 req = NULL;
1222 }
1223 break;
1224
1225 case EP0_OUT_DATA_PHASE:
1226 if ((!_req->length)
1227 || ((ep_csr & S3C2410_UDC_OCSR1_PKTRDY)
1228 && s3c2410_udc_read_fifo(ep,
1229 req))) {
1230 dev->ep0state = EP0_IDLE;
1231 req = NULL;
1232 }
1233 break;
1234
1235 default:
1236 local_irq_restore(flags);
1237 return -EL2HLT;
1238 }
1239 } else if ((ep->bEndpointAddress & USB_DIR_IN) != 0
1240 && (!(ep_csr&S3C2410_UDC_OCSR1_PKTRDY))
1241 && s3c2410_udc_write_fifo(ep, req)) {
1242 req = NULL;
1243 } else if ((ep_csr & S3C2410_UDC_OCSR1_PKTRDY)
1244 && fifo_count
1245 && s3c2410_udc_read_fifo(ep, req)) {
1246 req = NULL;
1247 }
1248 }
1249
1250 /* pio or dma irq handler advances the queue. */
1251 if (likely(req))
1252 list_add_tail(&req->queue, &ep->queue);
1253
1254 local_irq_restore(flags);
1255
1256 dprintk(DEBUG_VERBOSE, "%s ok\n", __func__);
1257 return 0;
1258}
1259
1260/*
1261 * s3c2410_udc_dequeue
1262 */
1263static int s3c2410_udc_dequeue(struct usb_ep *_ep, struct usb_request *_req)
1264{
1265 struct s3c2410_ep *ep = to_s3c2410_ep(_ep);
1266 int retval = -EINVAL;
1267 unsigned long flags;
1268 struct s3c2410_request *req = NULL, *iter;
1269
1270 dprintk(DEBUG_VERBOSE, "%s(%p,%p)\n", __func__, _ep, _req);
1271
1272 if (!the_controller->driver)
1273 return -ESHUTDOWN;
1274
1275 if (!_ep || !_req)
1276 return retval;
1277
1278 local_irq_save(flags);
1279
1280 list_for_each_entry(iter, &ep->queue, queue) {
1281 if (&iter->req != _req)
1282 continue;
1283 list_del_init(&iter->queue);
1284 _req->status = -ECONNRESET;
1285 req = iter;
1286 retval = 0;
1287 break;
1288 }
1289
1290 if (retval == 0) {
1291 dprintk(DEBUG_VERBOSE,
1292 "dequeued req %p from %s, len %d buf %p\n",
1293 req, _ep->name, _req->length, _req->buf);
1294
1295 s3c2410_udc_done(ep, req, -ECONNRESET);
1296 }
1297
1298 local_irq_restore(flags);
1299 return retval;
1300}
1301
1302/*
1303 * s3c2410_udc_set_halt
1304 */
1305static int s3c2410_udc_set_halt(struct usb_ep *_ep, int value)
1306{
1307 struct s3c2410_ep *ep = to_s3c2410_ep(_ep);
1308 u32 ep_csr = 0;
1309 unsigned long flags;
1310 u32 idx;
1311
1312 if (unlikely(!_ep || (!ep->ep.desc && ep->ep.name != ep0name))) {
1313 dprintk(DEBUG_NORMAL, "%s: inval 2\n", __func__);
1314 return -EINVAL;
1315 }
1316
1317 local_irq_save(flags);
1318
1319 idx = ep->bEndpointAddress & 0x7F;
1320
1321 if (idx == 0) {
1322 s3c2410_udc_set_ep0_ss(base_addr);
1323 s3c2410_udc_set_ep0_de_out(base_addr);
1324 } else {
1325 udc_write(idx, S3C2410_UDC_INDEX_REG);
1326 ep_csr = udc_read((ep->bEndpointAddress & USB_DIR_IN)
1327 ? S3C2410_UDC_IN_CSR1_REG
1328 : S3C2410_UDC_OUT_CSR1_REG);
1329
1330 if ((ep->bEndpointAddress & USB_DIR_IN) != 0) {
1331 if (value)
1332 udc_write(ep_csr | S3C2410_UDC_ICSR1_SENDSTL,
1333 S3C2410_UDC_IN_CSR1_REG);
1334 else {
1335 ep_csr &= ~S3C2410_UDC_ICSR1_SENDSTL;
1336 udc_write(ep_csr, S3C2410_UDC_IN_CSR1_REG);
1337 ep_csr |= S3C2410_UDC_ICSR1_CLRDT;
1338 udc_write(ep_csr, S3C2410_UDC_IN_CSR1_REG);
1339 }
1340 } else {
1341 if (value)
1342 udc_write(ep_csr | S3C2410_UDC_OCSR1_SENDSTL,
1343 S3C2410_UDC_OUT_CSR1_REG);
1344 else {
1345 ep_csr &= ~S3C2410_UDC_OCSR1_SENDSTL;
1346 udc_write(ep_csr, S3C2410_UDC_OUT_CSR1_REG);
1347 ep_csr |= S3C2410_UDC_OCSR1_CLRDT;
1348 udc_write(ep_csr, S3C2410_UDC_OUT_CSR1_REG);
1349 }
1350 }
1351 }
1352
1353 ep->halted = value ? 1 : 0;
1354 local_irq_restore(flags);
1355
1356 return 0;
1357}
1358
1359static const struct usb_ep_ops s3c2410_ep_ops = {
1360 .enable = s3c2410_udc_ep_enable,
1361 .disable = s3c2410_udc_ep_disable,
1362
1363 .alloc_request = s3c2410_udc_alloc_request,
1364 .free_request = s3c2410_udc_free_request,
1365
1366 .queue = s3c2410_udc_queue,
1367 .dequeue = s3c2410_udc_dequeue,
1368
1369 .set_halt = s3c2410_udc_set_halt,
1370};
1371
1372/*------------------------- usb_gadget_ops ----------------------------------*/
1373
1374/*
1375 * s3c2410_udc_get_frame
1376 */
1377static int s3c2410_udc_get_frame(struct usb_gadget *_gadget)
1378{
1379 int tmp;
1380
1381 dprintk(DEBUG_VERBOSE, "%s()\n", __func__);
1382
1383 tmp = udc_read(S3C2410_UDC_FRAME_NUM2_REG) << 8;
1384 tmp |= udc_read(S3C2410_UDC_FRAME_NUM1_REG);
1385 return tmp;
1386}
1387
1388/*
1389 * s3c2410_udc_wakeup
1390 */
1391static int s3c2410_udc_wakeup(struct usb_gadget *_gadget)
1392{
1393 dprintk(DEBUG_NORMAL, "%s()\n", __func__);
1394 return 0;
1395}
1396
1397/*
1398 * s3c2410_udc_set_selfpowered
1399 */
1400static int s3c2410_udc_set_selfpowered(struct usb_gadget *gadget, int value)
1401{
1402 struct s3c2410_udc *udc = to_s3c2410_udc(gadget);
1403
1404 dprintk(DEBUG_NORMAL, "%s()\n", __func__);
1405
1406 gadget->is_selfpowered = (value != 0);
1407 if (value)
1408 udc->devstatus |= (1 << USB_DEVICE_SELF_POWERED);
1409 else
1410 udc->devstatus &= ~(1 << USB_DEVICE_SELF_POWERED);
1411
1412 return 0;
1413}
1414
1415static void s3c2410_udc_disable(struct s3c2410_udc *dev);
1416static void s3c2410_udc_enable(struct s3c2410_udc *dev);
1417
1418static int s3c2410_udc_set_pullup(struct s3c2410_udc *udc, int is_on)
1419{
1420 dprintk(DEBUG_NORMAL, "%s()\n", __func__);
1421
1422 if (udc_info && (udc_info->udc_command || udc->pullup_gpiod)) {
1423
1424 if (is_on)
1425 s3c2410_udc_enable(udc);
1426 else {
1427 if (udc->gadget.speed != USB_SPEED_UNKNOWN) {
1428 if (udc->driver && udc->driver->disconnect)
1429 udc->driver->disconnect(&udc->gadget);
1430
1431 }
1432 s3c2410_udc_disable(udc);
1433 }
1434 } else {
1435 return -EOPNOTSUPP;
1436 }
1437
1438 return 0;
1439}
1440
1441static int s3c2410_udc_vbus_session(struct usb_gadget *gadget, int is_active)
1442{
1443 struct s3c2410_udc *udc = to_s3c2410_udc(gadget);
1444
1445 dprintk(DEBUG_NORMAL, "%s()\n", __func__);
1446
1447 udc->vbus = (is_active != 0);
1448 s3c2410_udc_set_pullup(udc, is_active);
1449 return 0;
1450}
1451
1452static int s3c2410_udc_pullup(struct usb_gadget *gadget, int is_on)
1453{
1454 struct s3c2410_udc *udc = to_s3c2410_udc(gadget);
1455
1456 dprintk(DEBUG_NORMAL, "%s()\n", __func__);
1457
1458 s3c2410_udc_set_pullup(udc, is_on);
1459 return 0;
1460}
1461
1462static irqreturn_t s3c2410_udc_vbus_irq(int irq, void *_dev)
1463{
1464 struct s3c2410_udc *dev = _dev;
1465 unsigned int value;
1466
1467 dprintk(DEBUG_NORMAL, "%s()\n", __func__);
1468
1469 value = gpiod_get_value(dev->vbus_gpiod);
1470
1471 if (value != dev->vbus)
1472 s3c2410_udc_vbus_session(&dev->gadget, value);
1473
1474 return IRQ_HANDLED;
1475}
1476
1477static int s3c2410_vbus_draw(struct usb_gadget *_gadget, unsigned ma)
1478{
1479 dprintk(DEBUG_NORMAL, "%s()\n", __func__);
1480
1481 if (udc_info && udc_info->vbus_draw) {
1482 udc_info->vbus_draw(ma);
1483 return 0;
1484 }
1485
1486 return -ENOTSUPP;
1487}
1488
1489static int s3c2410_udc_start(struct usb_gadget *g,
1490 struct usb_gadget_driver *driver);
1491static int s3c2410_udc_stop(struct usb_gadget *g);
1492
1493static const struct usb_gadget_ops s3c2410_ops = {
1494 .get_frame = s3c2410_udc_get_frame,
1495 .wakeup = s3c2410_udc_wakeup,
1496 .set_selfpowered = s3c2410_udc_set_selfpowered,
1497 .pullup = s3c2410_udc_pullup,
1498 .vbus_session = s3c2410_udc_vbus_session,
1499 .vbus_draw = s3c2410_vbus_draw,
1500 .udc_start = s3c2410_udc_start,
1501 .udc_stop = s3c2410_udc_stop,
1502};
1503
1504static void s3c2410_udc_command(struct s3c2410_udc *udc,
1505 enum s3c2410_udc_cmd_e cmd)
1506{
1507 if (!udc_info)
1508 return;
1509
1510 if (udc_info->udc_command) {
1511 udc_info->udc_command(cmd);
1512 } else if (udc->pullup_gpiod) {
1513 int value;
1514
1515 switch (cmd) {
1516 case S3C2410_UDC_P_ENABLE:
1517 value = 1;
1518 break;
1519 case S3C2410_UDC_P_DISABLE:
1520 value = 0;
1521 break;
1522 default:
1523 return;
1524 }
1525
1526 gpiod_set_value(udc->pullup_gpiod, value);
1527 }
1528}
1529
1530/*------------------------- gadget driver handling---------------------------*/
1531/*
1532 * s3c2410_udc_disable
1533 */
1534static void s3c2410_udc_disable(struct s3c2410_udc *dev)
1535{
1536 dprintk(DEBUG_NORMAL, "%s()\n", __func__);
1537
1538 /* Disable all interrupts */
1539 udc_write(0x00, S3C2410_UDC_USB_INT_EN_REG);
1540 udc_write(0x00, S3C2410_UDC_EP_INT_EN_REG);
1541
1542 /* Clear the interrupt registers */
1543 udc_write(S3C2410_UDC_USBINT_RESET
1544 | S3C2410_UDC_USBINT_RESUME
1545 | S3C2410_UDC_USBINT_SUSPEND,
1546 S3C2410_UDC_USB_INT_REG);
1547
1548 udc_write(0x1F, S3C2410_UDC_EP_INT_REG);
1549
1550 /* Good bye, cruel world */
1551 s3c2410_udc_command(dev, S3C2410_UDC_P_DISABLE);
1552
1553 /* Set speed to unknown */
1554 dev->gadget.speed = USB_SPEED_UNKNOWN;
1555}
1556
1557/*
1558 * s3c2410_udc_reinit
1559 */
1560static void s3c2410_udc_reinit(struct s3c2410_udc *dev)
1561{
1562 u32 i;
1563
1564 /* device/ep0 records init */
1565 INIT_LIST_HEAD(&dev->gadget.ep_list);
1566 INIT_LIST_HEAD(&dev->gadget.ep0->ep_list);
1567 dev->ep0state = EP0_IDLE;
1568
1569 for (i = 0; i < S3C2410_ENDPOINTS; i++) {
1570 struct s3c2410_ep *ep = &dev->ep[i];
1571
1572 if (i != 0)
1573 list_add_tail(&ep->ep.ep_list, &dev->gadget.ep_list);
1574
1575 ep->dev = dev;
1576 ep->ep.desc = NULL;
1577 ep->halted = 0;
1578 INIT_LIST_HEAD(&ep->queue);
1579 usb_ep_set_maxpacket_limit(&ep->ep, ep->ep.maxpacket);
1580 }
1581}
1582
1583/*
1584 * s3c2410_udc_enable
1585 */
1586static void s3c2410_udc_enable(struct s3c2410_udc *dev)
1587{
1588 int i;
1589
1590 dprintk(DEBUG_NORMAL, "s3c2410_udc_enable called\n");
1591
1592 /* dev->gadget.speed = USB_SPEED_UNKNOWN; */
1593 dev->gadget.speed = USB_SPEED_FULL;
1594
1595 /* Set MAXP for all endpoints */
1596 for (i = 0; i < S3C2410_ENDPOINTS; i++) {
1597 udc_write(i, S3C2410_UDC_INDEX_REG);
1598 udc_write((dev->ep[i].ep.maxpacket & 0x7ff) >> 3,
1599 S3C2410_UDC_MAXP_REG);
1600 }
1601
1602 /* Set default power state */
1603 udc_write(DEFAULT_POWER_STATE, S3C2410_UDC_PWR_REG);
1604
1605 /* Enable reset and suspend interrupt interrupts */
1606 udc_write(S3C2410_UDC_USBINT_RESET | S3C2410_UDC_USBINT_SUSPEND,
1607 S3C2410_UDC_USB_INT_EN_REG);
1608
1609 /* Enable ep0 interrupt */
1610 udc_write(S3C2410_UDC_INT_EP0, S3C2410_UDC_EP_INT_EN_REG);
1611
1612 /* time to say "hello, world" */
1613 s3c2410_udc_command(dev, S3C2410_UDC_P_ENABLE);
1614}
1615
1616static int s3c2410_udc_start(struct usb_gadget *g,
1617 struct usb_gadget_driver *driver)
1618{
1619 struct s3c2410_udc *udc = to_s3c2410(g);
1620
1621 dprintk(DEBUG_NORMAL, "%s() '%s'\n", __func__, driver->driver.name);
1622
1623 /* Hook the driver */
1624 udc->driver = driver;
1625
1626 /* Enable udc */
1627 s3c2410_udc_enable(udc);
1628
1629 return 0;
1630}
1631
1632static int s3c2410_udc_stop(struct usb_gadget *g)
1633{
1634 struct s3c2410_udc *udc = to_s3c2410(g);
1635
1636 udc->driver = NULL;
1637
1638 /* Disable udc */
1639 s3c2410_udc_disable(udc);
1640
1641 return 0;
1642}
1643
1644/*---------------------------------------------------------------------------*/
1645static struct s3c2410_udc memory = {
1646 .gadget = {
1647 .ops = &s3c2410_ops,
1648 .ep0 = &memory.ep[0].ep,
1649 .name = gadget_name,
1650 .dev = {
1651 .init_name = "gadget",
1652 },
1653 },
1654
1655 /* control endpoint */
1656 .ep[0] = {
1657 .num = 0,
1658 .ep = {
1659 .name = ep0name,
1660 .ops = &s3c2410_ep_ops,
1661 .maxpacket = EP0_FIFO_SIZE,
1662 .caps = USB_EP_CAPS(USB_EP_CAPS_TYPE_CONTROL,
1663 USB_EP_CAPS_DIR_ALL),
1664 },
1665 .dev = &memory,
1666 },
1667
1668 /* first group of endpoints */
1669 .ep[1] = {
1670 .num = 1,
1671 .ep = {
1672 .name = "ep1-bulk",
1673 .ops = &s3c2410_ep_ops,
1674 .maxpacket = EP_FIFO_SIZE,
1675 .caps = USB_EP_CAPS(USB_EP_CAPS_TYPE_BULK,
1676 USB_EP_CAPS_DIR_ALL),
1677 },
1678 .dev = &memory,
1679 .fifo_size = EP_FIFO_SIZE,
1680 .bEndpointAddress = 1,
1681 .bmAttributes = USB_ENDPOINT_XFER_BULK,
1682 },
1683 .ep[2] = {
1684 .num = 2,
1685 .ep = {
1686 .name = "ep2-bulk",
1687 .ops = &s3c2410_ep_ops,
1688 .maxpacket = EP_FIFO_SIZE,
1689 .caps = USB_EP_CAPS(USB_EP_CAPS_TYPE_BULK,
1690 USB_EP_CAPS_DIR_ALL),
1691 },
1692 .dev = &memory,
1693 .fifo_size = EP_FIFO_SIZE,
1694 .bEndpointAddress = 2,
1695 .bmAttributes = USB_ENDPOINT_XFER_BULK,
1696 },
1697 .ep[3] = {
1698 .num = 3,
1699 .ep = {
1700 .name = "ep3-bulk",
1701 .ops = &s3c2410_ep_ops,
1702 .maxpacket = EP_FIFO_SIZE,
1703 .caps = USB_EP_CAPS(USB_EP_CAPS_TYPE_BULK,
1704 USB_EP_CAPS_DIR_ALL),
1705 },
1706 .dev = &memory,
1707 .fifo_size = EP_FIFO_SIZE,
1708 .bEndpointAddress = 3,
1709 .bmAttributes = USB_ENDPOINT_XFER_BULK,
1710 },
1711 .ep[4] = {
1712 .num = 4,
1713 .ep = {
1714 .name = "ep4-bulk",
1715 .ops = &s3c2410_ep_ops,
1716 .maxpacket = EP_FIFO_SIZE,
1717 .caps = USB_EP_CAPS(USB_EP_CAPS_TYPE_BULK,
1718 USB_EP_CAPS_DIR_ALL),
1719 },
1720 .dev = &memory,
1721 .fifo_size = EP_FIFO_SIZE,
1722 .bEndpointAddress = 4,
1723 .bmAttributes = USB_ENDPOINT_XFER_BULK,
1724 }
1725
1726};
1727
1728/*
1729 * probe - binds to the platform device
1730 */
1731static int s3c2410_udc_probe(struct platform_device *pdev)
1732{
1733 struct s3c2410_udc *udc = &memory;
1734 struct device *dev = &pdev->dev;
1735 int retval;
1736 int irq;
1737
1738 dev_dbg(dev, "%s()\n", __func__);
1739
1740 usb_bus_clock = clk_get(NULL, "usb-bus-gadget");
1741 if (IS_ERR(usb_bus_clock)) {
1742 dev_err(dev, "failed to get usb bus clock source\n");
1743 return PTR_ERR(usb_bus_clock);
1744 }
1745
1746 clk_prepare_enable(usb_bus_clock);
1747
1748 udc_clock = clk_get(NULL, "usb-device");
1749 if (IS_ERR(udc_clock)) {
1750 dev_err(dev, "failed to get udc clock source\n");
1751 retval = PTR_ERR(udc_clock);
1752 goto err_usb_bus_clk;
1753 }
1754
1755 clk_prepare_enable(udc_clock);
1756
1757 mdelay(10);
1758
1759 dev_dbg(dev, "got and enabled clocks\n");
1760
1761 if (strncmp(pdev->name, "s3c2440", 7) == 0) {
1762 dev_info(dev, "S3C2440: increasing FIFO to 128 bytes\n");
1763 memory.ep[1].fifo_size = S3C2440_EP_FIFO_SIZE;
1764 memory.ep[2].fifo_size = S3C2440_EP_FIFO_SIZE;
1765 memory.ep[3].fifo_size = S3C2440_EP_FIFO_SIZE;
1766 memory.ep[4].fifo_size = S3C2440_EP_FIFO_SIZE;
1767 }
1768
1769 spin_lock_init(&udc->lock);
1770 udc_info = dev_get_platdata(&pdev->dev);
1771
1772 base_addr = devm_platform_ioremap_resource(pdev, 0);
1773 if (IS_ERR(base_addr)) {
1774 retval = PTR_ERR(base_addr);
1775 goto err_udc_clk;
1776 }
1777
1778 the_controller = udc;
1779 platform_set_drvdata(pdev, udc);
1780
1781 s3c2410_udc_disable(udc);
1782 s3c2410_udc_reinit(udc);
1783
1784 irq_usbd = platform_get_irq(pdev, 0);
1785 if (irq_usbd < 0) {
1786 retval = irq_usbd;
1787 goto err_udc_clk;
1788 }
1789
1790 /* irq setup after old hardware state is cleaned up */
1791 retval = request_irq(irq_usbd, s3c2410_udc_irq,
1792 0, gadget_name, udc);
1793
1794 if (retval != 0) {
1795 dev_err(dev, "cannot get irq %i, err %d\n", irq_usbd, retval);
1796 retval = -EBUSY;
1797 goto err_udc_clk;
1798 }
1799
1800 dev_dbg(dev, "got irq %i\n", irq_usbd);
1801
1802 udc->vbus_gpiod = gpiod_get_optional(dev, "vbus", GPIOD_IN);
1803 if (IS_ERR(udc->vbus_gpiod)) {
1804 retval = PTR_ERR(udc->vbus_gpiod);
1805 goto err_int;
1806 }
1807 if (udc->vbus_gpiod) {
1808 gpiod_set_consumer_name(udc->vbus_gpiod, "udc vbus");
1809
1810 irq = gpiod_to_irq(udc->vbus_gpiod);
1811 if (irq < 0) {
1812 dev_err(dev, "no irq for gpio vbus pin\n");
1813 retval = irq;
1814 goto err_gpio_claim;
1815 }
1816
1817 retval = request_irq(irq, s3c2410_udc_vbus_irq,
1818 IRQF_TRIGGER_RISING
1819 | IRQF_TRIGGER_FALLING | IRQF_SHARED,
1820 gadget_name, udc);
1821
1822 if (retval != 0) {
1823 dev_err(dev, "can't get vbus irq %d, err %d\n",
1824 irq, retval);
1825 retval = -EBUSY;
1826 goto err_gpio_claim;
1827 }
1828
1829 dev_dbg(dev, "got irq %i\n", irq);
1830 } else {
1831 udc->vbus = 1;
1832 }
1833
1834 udc->pullup_gpiod = gpiod_get_optional(dev, "pullup", GPIOD_OUT_LOW);
1835 if (IS_ERR(udc->pullup_gpiod)) {
1836 retval = PTR_ERR(udc->pullup_gpiod);
1837 goto err_vbus_irq;
1838 }
1839 gpiod_set_consumer_name(udc->pullup_gpiod, "udc pullup");
1840
1841 retval = usb_add_gadget_udc(&pdev->dev, &udc->gadget);
1842 if (retval)
1843 goto err_add_udc;
1844
1845 debugfs_create_file("registers", S_IRUGO, s3c2410_udc_debugfs_root, udc,
1846 &s3c2410_udc_debugfs_fops);
1847
1848 dev_dbg(dev, "probe ok\n");
1849
1850 return 0;
1851
1852err_add_udc:
1853err_vbus_irq:
1854 if (udc->vbus_gpiod)
1855 free_irq(gpiod_to_irq(udc->vbus_gpiod), udc);
1856err_gpio_claim:
1857err_int:
1858 free_irq(irq_usbd, udc);
1859err_udc_clk:
1860 clk_disable_unprepare(udc_clock);
1861 clk_put(udc_clock);
1862 udc_clock = NULL;
1863err_usb_bus_clk:
1864 clk_disable_unprepare(usb_bus_clock);
1865 clk_put(usb_bus_clock);
1866 usb_bus_clock = NULL;
1867
1868 return retval;
1869}
1870
1871/*
1872 * s3c2410_udc_remove
1873 */
1874static int s3c2410_udc_remove(struct platform_device *pdev)
1875{
1876 struct s3c2410_udc *udc = platform_get_drvdata(pdev);
1877
1878 dev_dbg(&pdev->dev, "%s()\n", __func__);
1879
1880 if (udc->driver)
1881 return -EBUSY;
1882
1883 usb_del_gadget_udc(&udc->gadget);
1884 debugfs_remove(debugfs_lookup("registers", s3c2410_udc_debugfs_root));
1885
1886 if (udc->vbus_gpiod)
1887 free_irq(gpiod_to_irq(udc->vbus_gpiod), udc);
1888
1889 free_irq(irq_usbd, udc);
1890
1891 if (!IS_ERR(udc_clock) && udc_clock != NULL) {
1892 clk_disable_unprepare(udc_clock);
1893 clk_put(udc_clock);
1894 udc_clock = NULL;
1895 }
1896
1897 if (!IS_ERR(usb_bus_clock) && usb_bus_clock != NULL) {
1898 clk_disable_unprepare(usb_bus_clock);
1899 clk_put(usb_bus_clock);
1900 usb_bus_clock = NULL;
1901 }
1902
1903 dev_dbg(&pdev->dev, "%s: remove ok\n", __func__);
1904 return 0;
1905}
1906
1907#ifdef CONFIG_PM
1908static int
1909s3c2410_udc_suspend(struct platform_device *pdev, pm_message_t message)
1910{
1911 struct s3c2410_udc *udc = platform_get_drvdata(pdev);
1912
1913 s3c2410_udc_command(udc, S3C2410_UDC_P_DISABLE);
1914
1915 return 0;
1916}
1917
1918static int s3c2410_udc_resume(struct platform_device *pdev)
1919{
1920 struct s3c2410_udc *udc = platform_get_drvdata(pdev);
1921
1922 s3c2410_udc_command(udc, S3C2410_UDC_P_ENABLE);
1923
1924 return 0;
1925}
1926#else
1927#define s3c2410_udc_suspend NULL
1928#define s3c2410_udc_resume NULL
1929#endif
1930
1931static const struct platform_device_id s3c_udc_ids[] = {
1932 { "s3c2410-usbgadget", },
1933 { "s3c2440-usbgadget", },
1934 { }
1935};
1936MODULE_DEVICE_TABLE(platform, s3c_udc_ids);
1937
1938static struct platform_driver udc_driver_24x0 = {
1939 .driver = {
1940 .name = "s3c24x0-usbgadget",
1941 },
1942 .probe = s3c2410_udc_probe,
1943 .remove = s3c2410_udc_remove,
1944 .suspend = s3c2410_udc_suspend,
1945 .resume = s3c2410_udc_resume,
1946 .id_table = s3c_udc_ids,
1947};
1948
1949static int __init udc_init(void)
1950{
1951 int retval;
1952
1953 dprintk(DEBUG_NORMAL, "%s\n", gadget_name);
1954
1955 s3c2410_udc_debugfs_root = debugfs_create_dir(gadget_name,
1956 usb_debug_root);
1957
1958 retval = platform_driver_register(&udc_driver_24x0);
1959 if (retval)
1960 goto err;
1961
1962 return 0;
1963
1964err:
1965 debugfs_remove(s3c2410_udc_debugfs_root);
1966 return retval;
1967}
1968
1969static void __exit udc_exit(void)
1970{
1971 platform_driver_unregister(&udc_driver_24x0);
1972 debugfs_remove_recursive(s3c2410_udc_debugfs_root);
1973}
1974
1975module_init(udc_init);
1976module_exit(udc_exit);
1977
1978MODULE_AUTHOR(DRIVER_AUTHOR);
1979MODULE_DESCRIPTION(DRIVER_DESC);
1980MODULE_LICENSE("GPL");