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1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * An i2c driver for the Xicor/Intersil X1205 RTC
4 * Copyright 2004 Karen Spearel
5 * Copyright 2005 Alessandro Zummo
6 *
7 * please send all reports to:
8 * Karen Spearel <kas111 at gmail dot com>
9 * Alessandro Zummo <a.zummo@towertech.it>
10 *
11 * based on a lot of other RTC drivers.
12 *
13 * Information and datasheet:
14 * http://www.intersil.com/cda/deviceinfo/0,1477,X1205,00.html
15 */
16
17#include <linux/i2c.h>
18#include <linux/bcd.h>
19#include <linux/rtc.h>
20#include <linux/delay.h>
21#include <linux/module.h>
22#include <linux/bitops.h>
23
24/* offsets into CCR area */
25
26#define CCR_SEC 0
27#define CCR_MIN 1
28#define CCR_HOUR 2
29#define CCR_MDAY 3
30#define CCR_MONTH 4
31#define CCR_YEAR 5
32#define CCR_WDAY 6
33#define CCR_Y2K 7
34
35#define X1205_REG_SR 0x3F /* status register */
36#define X1205_REG_Y2K 0x37
37#define X1205_REG_DW 0x36
38#define X1205_REG_YR 0x35
39#define X1205_REG_MO 0x34
40#define X1205_REG_DT 0x33
41#define X1205_REG_HR 0x32
42#define X1205_REG_MN 0x31
43#define X1205_REG_SC 0x30
44#define X1205_REG_DTR 0x13
45#define X1205_REG_ATR 0x12
46#define X1205_REG_INT 0x11
47#define X1205_REG_0 0x10
48#define X1205_REG_Y2K1 0x0F
49#define X1205_REG_DWA1 0x0E
50#define X1205_REG_YRA1 0x0D
51#define X1205_REG_MOA1 0x0C
52#define X1205_REG_DTA1 0x0B
53#define X1205_REG_HRA1 0x0A
54#define X1205_REG_MNA1 0x09
55#define X1205_REG_SCA1 0x08
56#define X1205_REG_Y2K0 0x07
57#define X1205_REG_DWA0 0x06
58#define X1205_REG_YRA0 0x05
59#define X1205_REG_MOA0 0x04
60#define X1205_REG_DTA0 0x03
61#define X1205_REG_HRA0 0x02
62#define X1205_REG_MNA0 0x01
63#define X1205_REG_SCA0 0x00
64
65#define X1205_CCR_BASE 0x30 /* Base address of CCR */
66#define X1205_ALM0_BASE 0x00 /* Base address of ALARM0 */
67
68#define X1205_SR_RTCF 0x01 /* Clock failure */
69#define X1205_SR_WEL 0x02 /* Write Enable Latch */
70#define X1205_SR_RWEL 0x04 /* Register Write Enable */
71#define X1205_SR_AL0 0x20 /* Alarm 0 match */
72
73#define X1205_DTR_DTR0 0x01
74#define X1205_DTR_DTR1 0x02
75#define X1205_DTR_DTR2 0x04
76
77#define X1205_HR_MIL 0x80 /* Set in ccr.hour for 24 hr mode */
78
79#define X1205_INT_AL0E 0x20 /* Alarm 0 enable */
80
81static struct i2c_driver x1205_driver;
82
83/*
84 * In the routines that deal directly with the x1205 hardware, we use
85 * rtc_time -- month 0-11, hour 0-23, yr = calendar year-epoch
86 * Epoch is initialized as 2000. Time is set to UTC.
87 */
88static int x1205_get_datetime(struct i2c_client *client, struct rtc_time *tm,
89 unsigned char reg_base)
90{
91 unsigned char dt_addr[2] = { 0, reg_base };
92 unsigned char buf[8];
93 int i;
94
95 struct i2c_msg msgs[] = {
96 {/* setup read ptr */
97 .addr = client->addr,
98 .len = 2,
99 .buf = dt_addr
100 },
101 {/* read date */
102 .addr = client->addr,
103 .flags = I2C_M_RD,
104 .len = 8,
105 .buf = buf
106 },
107 };
108
109 /* read date registers */
110 if (i2c_transfer(client->adapter, &msgs[0], 2) != 2) {
111 dev_err(&client->dev, "%s: read error\n", __func__);
112 return -EIO;
113 }
114
115 dev_dbg(&client->dev,
116 "%s: raw read data - sec=%02x, min=%02x, hr=%02x, "
117 "mday=%02x, mon=%02x, year=%02x, wday=%02x, y2k=%02x\n",
118 __func__,
119 buf[0], buf[1], buf[2], buf[3],
120 buf[4], buf[5], buf[6], buf[7]);
121
122 /* Mask out the enable bits if these are alarm registers */
123 if (reg_base < X1205_CCR_BASE)
124 for (i = 0; i <= 4; i++)
125 buf[i] &= 0x7F;
126
127 tm->tm_sec = bcd2bin(buf[CCR_SEC]);
128 tm->tm_min = bcd2bin(buf[CCR_MIN]);
129 tm->tm_hour = bcd2bin(buf[CCR_HOUR] & 0x3F); /* hr is 0-23 */
130 tm->tm_mday = bcd2bin(buf[CCR_MDAY]);
131 tm->tm_mon = bcd2bin(buf[CCR_MONTH]) - 1; /* mon is 0-11 */
132 tm->tm_year = bcd2bin(buf[CCR_YEAR])
133 + (bcd2bin(buf[CCR_Y2K]) * 100) - 1900;
134 tm->tm_wday = buf[CCR_WDAY];
135
136 dev_dbg(&client->dev, "%s: tm is secs=%d, mins=%d, hours=%d, "
137 "mday=%d, mon=%d, year=%d, wday=%d\n",
138 __func__,
139 tm->tm_sec, tm->tm_min, tm->tm_hour,
140 tm->tm_mday, tm->tm_mon, tm->tm_year, tm->tm_wday);
141
142 return 0;
143}
144
145static int x1205_get_status(struct i2c_client *client, unsigned char *sr)
146{
147 static unsigned char sr_addr[2] = { 0, X1205_REG_SR };
148
149 struct i2c_msg msgs[] = {
150 { /* setup read ptr */
151 .addr = client->addr,
152 .len = 2,
153 .buf = sr_addr
154 },
155 { /* read status */
156 .addr = client->addr,
157 .flags = I2C_M_RD,
158 .len = 1,
159 .buf = sr
160 },
161 };
162
163 /* read status register */
164 if (i2c_transfer(client->adapter, &msgs[0], 2) != 2) {
165 dev_err(&client->dev, "%s: read error\n", __func__);
166 return -EIO;
167 }
168
169 return 0;
170}
171
172static int x1205_set_datetime(struct i2c_client *client, struct rtc_time *tm,
173 u8 reg_base, unsigned char alm_enable)
174{
175 int i, xfer;
176 unsigned char rdata[10] = { 0, reg_base };
177 unsigned char *buf = rdata + 2;
178
179 static const unsigned char wel[3] = { 0, X1205_REG_SR,
180 X1205_SR_WEL };
181
182 static const unsigned char rwel[3] = { 0, X1205_REG_SR,
183 X1205_SR_WEL | X1205_SR_RWEL };
184
185 static const unsigned char diswe[3] = { 0, X1205_REG_SR, 0 };
186
187 dev_dbg(&client->dev,
188 "%s: sec=%d min=%d hour=%d mday=%d mon=%d year=%d wday=%d\n",
189 __func__, tm->tm_sec, tm->tm_min, tm->tm_hour, tm->tm_mday,
190 tm->tm_mon, tm->tm_year, tm->tm_wday);
191
192 buf[CCR_SEC] = bin2bcd(tm->tm_sec);
193 buf[CCR_MIN] = bin2bcd(tm->tm_min);
194
195 /* set hour and 24hr bit */
196 buf[CCR_HOUR] = bin2bcd(tm->tm_hour) | X1205_HR_MIL;
197
198 buf[CCR_MDAY] = bin2bcd(tm->tm_mday);
199
200 /* month, 1 - 12 */
201 buf[CCR_MONTH] = bin2bcd(tm->tm_mon + 1);
202
203 /* year, since the rtc epoch*/
204 buf[CCR_YEAR] = bin2bcd(tm->tm_year % 100);
205 buf[CCR_WDAY] = tm->tm_wday & 0x07;
206 buf[CCR_Y2K] = bin2bcd((tm->tm_year + 1900) / 100);
207
208 /* If writing alarm registers, set compare bits on registers 0-4 */
209 if (reg_base < X1205_CCR_BASE)
210 for (i = 0; i <= 4; i++)
211 buf[i] |= 0x80;
212
213 /* this sequence is required to unlock the chip */
214 xfer = i2c_master_send(client, wel, 3);
215 if (xfer != 3) {
216 dev_err(&client->dev, "%s: wel - %d\n", __func__, xfer);
217 return -EIO;
218 }
219
220 xfer = i2c_master_send(client, rwel, 3);
221 if (xfer != 3) {
222 dev_err(&client->dev, "%s: rwel - %d\n", __func__, xfer);
223 return -EIO;
224 }
225
226 xfer = i2c_master_send(client, rdata, sizeof(rdata));
227 if (xfer != sizeof(rdata)) {
228 dev_err(&client->dev,
229 "%s: result=%d addr=%02x, data=%02x\n",
230 __func__,
231 xfer, rdata[1], rdata[2]);
232 return -EIO;
233 }
234
235 /* If we wrote to the nonvolatile region, wait 10msec for write cycle*/
236 if (reg_base < X1205_CCR_BASE) {
237 unsigned char al0e[3] = { 0, X1205_REG_INT, 0 };
238
239 msleep(10);
240
241 /* ...and set or clear the AL0E bit in the INT register */
242
243 /* Need to set RWEL again as the write has cleared it */
244 xfer = i2c_master_send(client, rwel, 3);
245 if (xfer != 3) {
246 dev_err(&client->dev,
247 "%s: aloe rwel - %d\n",
248 __func__,
249 xfer);
250 return -EIO;
251 }
252
253 if (alm_enable)
254 al0e[2] = X1205_INT_AL0E;
255
256 xfer = i2c_master_send(client, al0e, 3);
257 if (xfer != 3) {
258 dev_err(&client->dev,
259 "%s: al0e - %d\n",
260 __func__,
261 xfer);
262 return -EIO;
263 }
264
265 /* and wait 10msec again for this write to complete */
266 msleep(10);
267 }
268
269 /* disable further writes */
270 xfer = i2c_master_send(client, diswe, 3);
271 if (xfer != 3) {
272 dev_err(&client->dev, "%s: diswe - %d\n", __func__, xfer);
273 return -EIO;
274 }
275
276 return 0;
277}
278
279static int x1205_fix_osc(struct i2c_client *client)
280{
281 int err;
282 struct rtc_time tm;
283
284 memset(&tm, 0, sizeof(tm));
285
286 err = x1205_set_datetime(client, &tm, X1205_CCR_BASE, 0);
287 if (err < 0)
288 dev_err(&client->dev, "unable to restart the oscillator\n");
289
290 return err;
291}
292
293static int x1205_get_dtrim(struct i2c_client *client, int *trim)
294{
295 unsigned char dtr;
296 static unsigned char dtr_addr[2] = { 0, X1205_REG_DTR };
297
298 struct i2c_msg msgs[] = {
299 { /* setup read ptr */
300 .addr = client->addr,
301 .len = 2,
302 .buf = dtr_addr
303 },
304 { /* read dtr */
305 .addr = client->addr,
306 .flags = I2C_M_RD,
307 .len = 1,
308 .buf = &dtr
309 },
310 };
311
312 /* read dtr register */
313 if (i2c_transfer(client->adapter, &msgs[0], 2) != 2) {
314 dev_err(&client->dev, "%s: read error\n", __func__);
315 return -EIO;
316 }
317
318 dev_dbg(&client->dev, "%s: raw dtr=%x\n", __func__, dtr);
319
320 *trim = 0;
321
322 if (dtr & X1205_DTR_DTR0)
323 *trim += 20;
324
325 if (dtr & X1205_DTR_DTR1)
326 *trim += 10;
327
328 if (dtr & X1205_DTR_DTR2)
329 *trim = -*trim;
330
331 return 0;
332}
333
334static int x1205_get_atrim(struct i2c_client *client, int *trim)
335{
336 s8 atr;
337 static unsigned char atr_addr[2] = { 0, X1205_REG_ATR };
338
339 struct i2c_msg msgs[] = {
340 {/* setup read ptr */
341 .addr = client->addr,
342 .len = 2,
343 .buf = atr_addr
344 },
345 {/* read atr */
346 .addr = client->addr,
347 .flags = I2C_M_RD,
348 .len = 1,
349 .buf = &atr
350 },
351 };
352
353 /* read atr register */
354 if (i2c_transfer(client->adapter, &msgs[0], 2) != 2) {
355 dev_err(&client->dev, "%s: read error\n", __func__);
356 return -EIO;
357 }
358
359 dev_dbg(&client->dev, "%s: raw atr=%x\n", __func__, atr);
360
361 /* atr is a two's complement value on 6 bits,
362 * perform sign extension. The formula is
363 * Catr = (atr * 0.25pF) + 11.00pF.
364 */
365 atr = sign_extend32(atr, 5);
366
367 dev_dbg(&client->dev, "%s: raw atr=%x (%d)\n", __func__, atr, atr);
368
369 *trim = (atr * 250) + 11000;
370
371 dev_dbg(&client->dev, "%s: real=%d\n", __func__, *trim);
372
373 return 0;
374}
375
376struct x1205_limit {
377 unsigned char reg, mask, min, max;
378};
379
380static int x1205_validate_client(struct i2c_client *client)
381{
382 int i, xfer;
383
384 /* Probe array. We will read the register at the specified
385 * address and check if the given bits are zero.
386 */
387 static const unsigned char probe_zero_pattern[] = {
388 /* register, mask */
389 X1205_REG_SR, 0x18,
390 X1205_REG_DTR, 0xF8,
391 X1205_REG_ATR, 0xC0,
392 X1205_REG_INT, 0x18,
393 X1205_REG_0, 0xFF,
394 };
395
396 static const struct x1205_limit probe_limits_pattern[] = {
397 /* register, mask, min, max */
398 { X1205_REG_Y2K, 0xFF, 19, 20 },
399 { X1205_REG_DW, 0xFF, 0, 6 },
400 { X1205_REG_YR, 0xFF, 0, 99 },
401 { X1205_REG_MO, 0xFF, 0, 12 },
402 { X1205_REG_DT, 0xFF, 0, 31 },
403 { X1205_REG_HR, 0x7F, 0, 23 },
404 { X1205_REG_MN, 0xFF, 0, 59 },
405 { X1205_REG_SC, 0xFF, 0, 59 },
406 { X1205_REG_Y2K1, 0xFF, 19, 20 },
407 { X1205_REG_Y2K0, 0xFF, 19, 20 },
408 };
409
410 /* check that registers have bits a 0 where expected */
411 for (i = 0; i < ARRAY_SIZE(probe_zero_pattern); i += 2) {
412 unsigned char buf;
413
414 unsigned char addr[2] = { 0, probe_zero_pattern[i] };
415
416 struct i2c_msg msgs[2] = {
417 {
418 .addr = client->addr,
419 .len = 2,
420 .buf = addr
421 },
422 {
423 .addr = client->addr,
424 .flags = I2C_M_RD,
425 .len = 1,
426 .buf = &buf
427 },
428 };
429
430 xfer = i2c_transfer(client->adapter, msgs, 2);
431 if (xfer != 2) {
432 dev_err(&client->dev,
433 "%s: could not read register %x\n",
434 __func__, probe_zero_pattern[i]);
435
436 return -EIO;
437 }
438
439 if ((buf & probe_zero_pattern[i+1]) != 0) {
440 dev_err(&client->dev,
441 "%s: register=%02x, zero pattern=%d, value=%x\n",
442 __func__, probe_zero_pattern[i], i, buf);
443
444 return -ENODEV;
445 }
446 }
447
448 /* check limits (only registers with bcd values) */
449 for (i = 0; i < ARRAY_SIZE(probe_limits_pattern); i++) {
450 unsigned char reg, value;
451
452 unsigned char addr[2] = { 0, probe_limits_pattern[i].reg };
453
454 struct i2c_msg msgs[2] = {
455 {
456 .addr = client->addr,
457 .len = 2,
458 .buf = addr
459 },
460 {
461 .addr = client->addr,
462 .flags = I2C_M_RD,
463 .len = 1,
464 .buf = ®
465 },
466 };
467
468 xfer = i2c_transfer(client->adapter, msgs, 2);
469 if (xfer != 2) {
470 dev_err(&client->dev,
471 "%s: could not read register %x\n",
472 __func__, probe_limits_pattern[i].reg);
473
474 return -EIO;
475 }
476
477 value = bcd2bin(reg & probe_limits_pattern[i].mask);
478
479 if (value > probe_limits_pattern[i].max ||
480 value < probe_limits_pattern[i].min) {
481 dev_dbg(&client->dev,
482 "%s: register=%x, lim pattern=%d, value=%d\n",
483 __func__, probe_limits_pattern[i].reg,
484 i, value);
485
486 return -ENODEV;
487 }
488 }
489
490 return 0;
491}
492
493static int x1205_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
494{
495 int err;
496 unsigned char intreg, status;
497 static unsigned char int_addr[2] = { 0, X1205_REG_INT };
498 struct i2c_client *client = to_i2c_client(dev);
499 struct i2c_msg msgs[] = {
500 { /* setup read ptr */
501 .addr = client->addr,
502 .len = 2,
503 .buf = int_addr
504 },
505 {/* read INT register */
506
507 .addr = client->addr,
508 .flags = I2C_M_RD,
509 .len = 1,
510 .buf = &intreg
511 },
512 };
513
514 /* read interrupt register and status register */
515 if (i2c_transfer(client->adapter, &msgs[0], 2) != 2) {
516 dev_err(&client->dev, "%s: read error\n", __func__);
517 return -EIO;
518 }
519 err = x1205_get_status(client, &status);
520 if (err == 0) {
521 alrm->pending = (status & X1205_SR_AL0) ? 1 : 0;
522 alrm->enabled = (intreg & X1205_INT_AL0E) ? 1 : 0;
523 err = x1205_get_datetime(client, &alrm->time, X1205_ALM0_BASE);
524 }
525 return err;
526}
527
528static int x1205_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
529{
530 return x1205_set_datetime(to_i2c_client(dev),
531 &alrm->time, X1205_ALM0_BASE, alrm->enabled);
532}
533
534static int x1205_rtc_read_time(struct device *dev, struct rtc_time *tm)
535{
536 return x1205_get_datetime(to_i2c_client(dev),
537 tm, X1205_CCR_BASE);
538}
539
540static int x1205_rtc_set_time(struct device *dev, struct rtc_time *tm)
541{
542 return x1205_set_datetime(to_i2c_client(dev),
543 tm, X1205_CCR_BASE, 0);
544}
545
546static int x1205_rtc_proc(struct device *dev, struct seq_file *seq)
547{
548 int err, dtrim, atrim;
549
550 err = x1205_get_dtrim(to_i2c_client(dev), &dtrim);
551 if (!err)
552 seq_printf(seq, "digital_trim\t: %d ppm\n", dtrim);
553
554 err = x1205_get_atrim(to_i2c_client(dev), &atrim);
555 if (!err)
556 seq_printf(seq, "analog_trim\t: %d.%02d pF\n",
557 atrim / 1000, atrim % 1000);
558 return 0;
559}
560
561static const struct rtc_class_ops x1205_rtc_ops = {
562 .proc = x1205_rtc_proc,
563 .read_time = x1205_rtc_read_time,
564 .set_time = x1205_rtc_set_time,
565 .read_alarm = x1205_rtc_read_alarm,
566 .set_alarm = x1205_rtc_set_alarm,
567};
568
569static ssize_t x1205_sysfs_show_atrim(struct device *dev,
570 struct device_attribute *attr, char *buf)
571{
572 int err, atrim;
573
574 err = x1205_get_atrim(to_i2c_client(dev), &atrim);
575 if (err)
576 return err;
577
578 return sprintf(buf, "%d.%02d pF\n", atrim / 1000, atrim % 1000);
579}
580static DEVICE_ATTR(atrim, S_IRUGO, x1205_sysfs_show_atrim, NULL);
581
582static ssize_t x1205_sysfs_show_dtrim(struct device *dev,
583 struct device_attribute *attr, char *buf)
584{
585 int err, dtrim;
586
587 err = x1205_get_dtrim(to_i2c_client(dev), &dtrim);
588 if (err)
589 return err;
590
591 return sprintf(buf, "%d ppm\n", dtrim);
592}
593static DEVICE_ATTR(dtrim, S_IRUGO, x1205_sysfs_show_dtrim, NULL);
594
595static int x1205_sysfs_register(struct device *dev)
596{
597 int err;
598
599 err = device_create_file(dev, &dev_attr_atrim);
600 if (err)
601 return err;
602
603 err = device_create_file(dev, &dev_attr_dtrim);
604 if (err)
605 device_remove_file(dev, &dev_attr_atrim);
606
607 return err;
608}
609
610static void x1205_sysfs_unregister(struct device *dev)
611{
612 device_remove_file(dev, &dev_attr_atrim);
613 device_remove_file(dev, &dev_attr_dtrim);
614}
615
616
617static int x1205_probe(struct i2c_client *client)
618{
619 int err = 0;
620 unsigned char sr;
621 struct rtc_device *rtc;
622
623 dev_dbg(&client->dev, "%s\n", __func__);
624
625 if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C))
626 return -ENODEV;
627
628 if (x1205_validate_client(client) < 0)
629 return -ENODEV;
630
631 rtc = devm_rtc_device_register(&client->dev, x1205_driver.driver.name,
632 &x1205_rtc_ops, THIS_MODULE);
633
634 if (IS_ERR(rtc))
635 return PTR_ERR(rtc);
636
637 i2c_set_clientdata(client, rtc);
638
639 /* Check for power failures and eventually enable the osc */
640 err = x1205_get_status(client, &sr);
641 if (!err) {
642 if (sr & X1205_SR_RTCF) {
643 dev_err(&client->dev,
644 "power failure detected, "
645 "please set the clock\n");
646 udelay(50);
647 x1205_fix_osc(client);
648 }
649 } else {
650 dev_err(&client->dev, "couldn't read status\n");
651 }
652
653 err = x1205_sysfs_register(&client->dev);
654 if (err)
655 dev_err(&client->dev, "Unable to create sysfs entries\n");
656
657 return 0;
658}
659
660static void x1205_remove(struct i2c_client *client)
661{
662 x1205_sysfs_unregister(&client->dev);
663}
664
665static const struct i2c_device_id x1205_id[] = {
666 { "x1205", 0 },
667 { }
668};
669MODULE_DEVICE_TABLE(i2c, x1205_id);
670
671static const struct of_device_id x1205_dt_ids[] = {
672 { .compatible = "xircom,x1205", },
673 {},
674};
675MODULE_DEVICE_TABLE(of, x1205_dt_ids);
676
677static struct i2c_driver x1205_driver = {
678 .driver = {
679 .name = "rtc-x1205",
680 .of_match_table = x1205_dt_ids,
681 },
682 .probe_new = x1205_probe,
683 .remove = x1205_remove,
684 .id_table = x1205_id,
685};
686
687module_i2c_driver(x1205_driver);
688
689MODULE_AUTHOR(
690 "Karen Spearel <kas111 at gmail dot com>, "
691 "Alessandro Zummo <a.zummo@towertech.it>");
692MODULE_DESCRIPTION("Xicor/Intersil X1205 RTC driver");
693MODULE_LICENSE("GPL");
1/*
2 * An i2c driver for the Xicor/Intersil X1205 RTC
3 * Copyright 2004 Karen Spearel
4 * Copyright 2005 Alessandro Zummo
5 *
6 * please send all reports to:
7 * Karen Spearel <kas111 at gmail dot com>
8 * Alessandro Zummo <a.zummo@towertech.it>
9 *
10 * based on a lot of other RTC drivers.
11 *
12 * Information and datasheet:
13 * http://www.intersil.com/cda/deviceinfo/0,1477,X1205,00.html
14 *
15 * This program is free software; you can redistribute it and/or modify
16 * it under the terms of the GNU General Public License version 2 as
17 * published by the Free Software Foundation.
18 */
19
20#include <linux/i2c.h>
21#include <linux/bcd.h>
22#include <linux/rtc.h>
23#include <linux/delay.h>
24
25#define DRV_VERSION "1.0.8"
26
27/* offsets into CCR area */
28
29#define CCR_SEC 0
30#define CCR_MIN 1
31#define CCR_HOUR 2
32#define CCR_MDAY 3
33#define CCR_MONTH 4
34#define CCR_YEAR 5
35#define CCR_WDAY 6
36#define CCR_Y2K 7
37
38#define X1205_REG_SR 0x3F /* status register */
39#define X1205_REG_Y2K 0x37
40#define X1205_REG_DW 0x36
41#define X1205_REG_YR 0x35
42#define X1205_REG_MO 0x34
43#define X1205_REG_DT 0x33
44#define X1205_REG_HR 0x32
45#define X1205_REG_MN 0x31
46#define X1205_REG_SC 0x30
47#define X1205_REG_DTR 0x13
48#define X1205_REG_ATR 0x12
49#define X1205_REG_INT 0x11
50#define X1205_REG_0 0x10
51#define X1205_REG_Y2K1 0x0F
52#define X1205_REG_DWA1 0x0E
53#define X1205_REG_YRA1 0x0D
54#define X1205_REG_MOA1 0x0C
55#define X1205_REG_DTA1 0x0B
56#define X1205_REG_HRA1 0x0A
57#define X1205_REG_MNA1 0x09
58#define X1205_REG_SCA1 0x08
59#define X1205_REG_Y2K0 0x07
60#define X1205_REG_DWA0 0x06
61#define X1205_REG_YRA0 0x05
62#define X1205_REG_MOA0 0x04
63#define X1205_REG_DTA0 0x03
64#define X1205_REG_HRA0 0x02
65#define X1205_REG_MNA0 0x01
66#define X1205_REG_SCA0 0x00
67
68#define X1205_CCR_BASE 0x30 /* Base address of CCR */
69#define X1205_ALM0_BASE 0x00 /* Base address of ALARM0 */
70
71#define X1205_SR_RTCF 0x01 /* Clock failure */
72#define X1205_SR_WEL 0x02 /* Write Enable Latch */
73#define X1205_SR_RWEL 0x04 /* Register Write Enable */
74#define X1205_SR_AL0 0x20 /* Alarm 0 match */
75
76#define X1205_DTR_DTR0 0x01
77#define X1205_DTR_DTR1 0x02
78#define X1205_DTR_DTR2 0x04
79
80#define X1205_HR_MIL 0x80 /* Set in ccr.hour for 24 hr mode */
81
82#define X1205_INT_AL0E 0x20 /* Alarm 0 enable */
83
84static struct i2c_driver x1205_driver;
85
86/*
87 * In the routines that deal directly with the x1205 hardware, we use
88 * rtc_time -- month 0-11, hour 0-23, yr = calendar year-epoch
89 * Epoch is initialized as 2000. Time is set to UTC.
90 */
91static int x1205_get_datetime(struct i2c_client *client, struct rtc_time *tm,
92 unsigned char reg_base)
93{
94 unsigned char dt_addr[2] = { 0, reg_base };
95 unsigned char buf[8];
96 int i;
97
98 struct i2c_msg msgs[] = {
99 { client->addr, 0, 2, dt_addr }, /* setup read ptr */
100 { client->addr, I2C_M_RD, 8, buf }, /* read date */
101 };
102
103 /* read date registers */
104 if (i2c_transfer(client->adapter, &msgs[0], 2) != 2) {
105 dev_err(&client->dev, "%s: read error\n", __func__);
106 return -EIO;
107 }
108
109 dev_dbg(&client->dev,
110 "%s: raw read data - sec=%02x, min=%02x, hr=%02x, "
111 "mday=%02x, mon=%02x, year=%02x, wday=%02x, y2k=%02x\n",
112 __func__,
113 buf[0], buf[1], buf[2], buf[3],
114 buf[4], buf[5], buf[6], buf[7]);
115
116 /* Mask out the enable bits if these are alarm registers */
117 if (reg_base < X1205_CCR_BASE)
118 for (i = 0; i <= 4; i++)
119 buf[i] &= 0x7F;
120
121 tm->tm_sec = bcd2bin(buf[CCR_SEC]);
122 tm->tm_min = bcd2bin(buf[CCR_MIN]);
123 tm->tm_hour = bcd2bin(buf[CCR_HOUR] & 0x3F); /* hr is 0-23 */
124 tm->tm_mday = bcd2bin(buf[CCR_MDAY]);
125 tm->tm_mon = bcd2bin(buf[CCR_MONTH]) - 1; /* mon is 0-11 */
126 tm->tm_year = bcd2bin(buf[CCR_YEAR])
127 + (bcd2bin(buf[CCR_Y2K]) * 100) - 1900;
128 tm->tm_wday = buf[CCR_WDAY];
129
130 dev_dbg(&client->dev, "%s: tm is secs=%d, mins=%d, hours=%d, "
131 "mday=%d, mon=%d, year=%d, wday=%d\n",
132 __func__,
133 tm->tm_sec, tm->tm_min, tm->tm_hour,
134 tm->tm_mday, tm->tm_mon, tm->tm_year, tm->tm_wday);
135
136 return 0;
137}
138
139static int x1205_get_status(struct i2c_client *client, unsigned char *sr)
140{
141 static unsigned char sr_addr[2] = { 0, X1205_REG_SR };
142
143 struct i2c_msg msgs[] = {
144 { client->addr, 0, 2, sr_addr }, /* setup read ptr */
145 { client->addr, I2C_M_RD, 1, sr }, /* read status */
146 };
147
148 /* read status register */
149 if (i2c_transfer(client->adapter, &msgs[0], 2) != 2) {
150 dev_err(&client->dev, "%s: read error\n", __func__);
151 return -EIO;
152 }
153
154 return 0;
155}
156
157static int x1205_set_datetime(struct i2c_client *client, struct rtc_time *tm,
158 u8 reg_base, unsigned char alm_enable)
159{
160 int i, xfer;
161 unsigned char rdata[10] = { 0, reg_base };
162 unsigned char *buf = rdata + 2;
163
164 static const unsigned char wel[3] = { 0, X1205_REG_SR,
165 X1205_SR_WEL };
166
167 static const unsigned char rwel[3] = { 0, X1205_REG_SR,
168 X1205_SR_WEL | X1205_SR_RWEL };
169
170 static const unsigned char diswe[3] = { 0, X1205_REG_SR, 0 };
171
172 dev_dbg(&client->dev,
173 "%s: sec=%d min=%d hour=%d mday=%d mon=%d year=%d wday=%d\n",
174 __func__, tm->tm_sec, tm->tm_min, tm->tm_hour, tm->tm_mday,
175 tm->tm_mon, tm->tm_year, tm->tm_wday);
176
177 buf[CCR_SEC] = bin2bcd(tm->tm_sec);
178 buf[CCR_MIN] = bin2bcd(tm->tm_min);
179
180 /* set hour and 24hr bit */
181 buf[CCR_HOUR] = bin2bcd(tm->tm_hour) | X1205_HR_MIL;
182
183 buf[CCR_MDAY] = bin2bcd(tm->tm_mday);
184
185 /* month, 1 - 12 */
186 buf[CCR_MONTH] = bin2bcd(tm->tm_mon + 1);
187
188 /* year, since the rtc epoch*/
189 buf[CCR_YEAR] = bin2bcd(tm->tm_year % 100);
190 buf[CCR_WDAY] = tm->tm_wday & 0x07;
191 buf[CCR_Y2K] = bin2bcd((tm->tm_year + 1900) / 100);
192
193 /* If writing alarm registers, set compare bits on registers 0-4 */
194 if (reg_base < X1205_CCR_BASE)
195 for (i = 0; i <= 4; i++)
196 buf[i] |= 0x80;
197
198 /* this sequence is required to unlock the chip */
199 if ((xfer = i2c_master_send(client, wel, 3)) != 3) {
200 dev_err(&client->dev, "%s: wel - %d\n", __func__, xfer);
201 return -EIO;
202 }
203
204 if ((xfer = i2c_master_send(client, rwel, 3)) != 3) {
205 dev_err(&client->dev, "%s: rwel - %d\n", __func__, xfer);
206 return -EIO;
207 }
208
209 xfer = i2c_master_send(client, rdata, sizeof(rdata));
210 if (xfer != sizeof(rdata)) {
211 dev_err(&client->dev,
212 "%s: result=%d addr=%02x, data=%02x\n",
213 __func__,
214 xfer, rdata[1], rdata[2]);
215 return -EIO;
216 }
217
218 /* If we wrote to the nonvolatile region, wait 10msec for write cycle*/
219 if (reg_base < X1205_CCR_BASE) {
220 unsigned char al0e[3] = { 0, X1205_REG_INT, 0 };
221
222 msleep(10);
223
224 /* ...and set or clear the AL0E bit in the INT register */
225
226 /* Need to set RWEL again as the write has cleared it */
227 xfer = i2c_master_send(client, rwel, 3);
228 if (xfer != 3) {
229 dev_err(&client->dev,
230 "%s: aloe rwel - %d\n",
231 __func__,
232 xfer);
233 return -EIO;
234 }
235
236 if (alm_enable)
237 al0e[2] = X1205_INT_AL0E;
238
239 xfer = i2c_master_send(client, al0e, 3);
240 if (xfer != 3) {
241 dev_err(&client->dev,
242 "%s: al0e - %d\n",
243 __func__,
244 xfer);
245 return -EIO;
246 }
247
248 /* and wait 10msec again for this write to complete */
249 msleep(10);
250 }
251
252 /* disable further writes */
253 if ((xfer = i2c_master_send(client, diswe, 3)) != 3) {
254 dev_err(&client->dev, "%s: diswe - %d\n", __func__, xfer);
255 return -EIO;
256 }
257
258 return 0;
259}
260
261static int x1205_fix_osc(struct i2c_client *client)
262{
263 int err;
264 struct rtc_time tm;
265
266 memset(&tm, 0, sizeof(tm));
267
268 err = x1205_set_datetime(client, &tm, X1205_CCR_BASE, 0);
269 if (err < 0)
270 dev_err(&client->dev, "unable to restart the oscillator\n");
271
272 return err;
273}
274
275static int x1205_get_dtrim(struct i2c_client *client, int *trim)
276{
277 unsigned char dtr;
278 static unsigned char dtr_addr[2] = { 0, X1205_REG_DTR };
279
280 struct i2c_msg msgs[] = {
281 { client->addr, 0, 2, dtr_addr }, /* setup read ptr */
282 { client->addr, I2C_M_RD, 1, &dtr }, /* read dtr */
283 };
284
285 /* read dtr register */
286 if (i2c_transfer(client->adapter, &msgs[0], 2) != 2) {
287 dev_err(&client->dev, "%s: read error\n", __func__);
288 return -EIO;
289 }
290
291 dev_dbg(&client->dev, "%s: raw dtr=%x\n", __func__, dtr);
292
293 *trim = 0;
294
295 if (dtr & X1205_DTR_DTR0)
296 *trim += 20;
297
298 if (dtr & X1205_DTR_DTR1)
299 *trim += 10;
300
301 if (dtr & X1205_DTR_DTR2)
302 *trim = -*trim;
303
304 return 0;
305}
306
307static int x1205_get_atrim(struct i2c_client *client, int *trim)
308{
309 s8 atr;
310 static unsigned char atr_addr[2] = { 0, X1205_REG_ATR };
311
312 struct i2c_msg msgs[] = {
313 { client->addr, 0, 2, atr_addr }, /* setup read ptr */
314 { client->addr, I2C_M_RD, 1, &atr }, /* read atr */
315 };
316
317 /* read atr register */
318 if (i2c_transfer(client->adapter, &msgs[0], 2) != 2) {
319 dev_err(&client->dev, "%s: read error\n", __func__);
320 return -EIO;
321 }
322
323 dev_dbg(&client->dev, "%s: raw atr=%x\n", __func__, atr);
324
325 /* atr is a two's complement value on 6 bits,
326 * perform sign extension. The formula is
327 * Catr = (atr * 0.25pF) + 11.00pF.
328 */
329 if (atr & 0x20)
330 atr |= 0xC0;
331
332 dev_dbg(&client->dev, "%s: raw atr=%x (%d)\n", __func__, atr, atr);
333
334 *trim = (atr * 250) + 11000;
335
336 dev_dbg(&client->dev, "%s: real=%d\n", __func__, *trim);
337
338 return 0;
339}
340
341struct x1205_limit
342{
343 unsigned char reg, mask, min, max;
344};
345
346static int x1205_validate_client(struct i2c_client *client)
347{
348 int i, xfer;
349
350 /* Probe array. We will read the register at the specified
351 * address and check if the given bits are zero.
352 */
353 static const unsigned char probe_zero_pattern[] = {
354 /* register, mask */
355 X1205_REG_SR, 0x18,
356 X1205_REG_DTR, 0xF8,
357 X1205_REG_ATR, 0xC0,
358 X1205_REG_INT, 0x18,
359 X1205_REG_0, 0xFF,
360 };
361
362 static const struct x1205_limit probe_limits_pattern[] = {
363 /* register, mask, min, max */
364 { X1205_REG_Y2K, 0xFF, 19, 20 },
365 { X1205_REG_DW, 0xFF, 0, 6 },
366 { X1205_REG_YR, 0xFF, 0, 99 },
367 { X1205_REG_MO, 0xFF, 0, 12 },
368 { X1205_REG_DT, 0xFF, 0, 31 },
369 { X1205_REG_HR, 0x7F, 0, 23 },
370 { X1205_REG_MN, 0xFF, 0, 59 },
371 { X1205_REG_SC, 0xFF, 0, 59 },
372 { X1205_REG_Y2K1, 0xFF, 19, 20 },
373 { X1205_REG_Y2K0, 0xFF, 19, 20 },
374 };
375
376 /* check that registers have bits a 0 where expected */
377 for (i = 0; i < ARRAY_SIZE(probe_zero_pattern); i += 2) {
378 unsigned char buf;
379
380 unsigned char addr[2] = { 0, probe_zero_pattern[i] };
381
382 struct i2c_msg msgs[2] = {
383 { client->addr, 0, 2, addr },
384 { client->addr, I2C_M_RD, 1, &buf },
385 };
386
387 if ((xfer = i2c_transfer(client->adapter, msgs, 2)) != 2) {
388 dev_err(&client->dev,
389 "%s: could not read register %x\n",
390 __func__, probe_zero_pattern[i]);
391
392 return -EIO;
393 }
394
395 if ((buf & probe_zero_pattern[i+1]) != 0) {
396 dev_err(&client->dev,
397 "%s: register=%02x, zero pattern=%d, value=%x\n",
398 __func__, probe_zero_pattern[i], i, buf);
399
400 return -ENODEV;
401 }
402 }
403
404 /* check limits (only registers with bcd values) */
405 for (i = 0; i < ARRAY_SIZE(probe_limits_pattern); i++) {
406 unsigned char reg, value;
407
408 unsigned char addr[2] = { 0, probe_limits_pattern[i].reg };
409
410 struct i2c_msg msgs[2] = {
411 { client->addr, 0, 2, addr },
412 { client->addr, I2C_M_RD, 1, ® },
413 };
414
415 if ((xfer = i2c_transfer(client->adapter, msgs, 2)) != 2) {
416 dev_err(&client->dev,
417 "%s: could not read register %x\n",
418 __func__, probe_limits_pattern[i].reg);
419
420 return -EIO;
421 }
422
423 value = bcd2bin(reg & probe_limits_pattern[i].mask);
424
425 if (value > probe_limits_pattern[i].max ||
426 value < probe_limits_pattern[i].min) {
427 dev_dbg(&client->dev,
428 "%s: register=%x, lim pattern=%d, value=%d\n",
429 __func__, probe_limits_pattern[i].reg,
430 i, value);
431
432 return -ENODEV;
433 }
434 }
435
436 return 0;
437}
438
439static int x1205_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
440{
441 int err;
442 unsigned char intreg, status;
443 static unsigned char int_addr[2] = { 0, X1205_REG_INT };
444 struct i2c_client *client = to_i2c_client(dev);
445 struct i2c_msg msgs[] = {
446 { client->addr, 0, 2, int_addr }, /* setup read ptr */
447 { client->addr, I2C_M_RD, 1, &intreg }, /* read INT register */
448 };
449
450 /* read interrupt register and status register */
451 if (i2c_transfer(client->adapter, &msgs[0], 2) != 2) {
452 dev_err(&client->dev, "%s: read error\n", __func__);
453 return -EIO;
454 }
455 err = x1205_get_status(client, &status);
456 if (err == 0) {
457 alrm->pending = (status & X1205_SR_AL0) ? 1 : 0;
458 alrm->enabled = (intreg & X1205_INT_AL0E) ? 1 : 0;
459 err = x1205_get_datetime(client, &alrm->time, X1205_ALM0_BASE);
460 }
461 return err;
462}
463
464static int x1205_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
465{
466 return x1205_set_datetime(to_i2c_client(dev),
467 &alrm->time, X1205_ALM0_BASE, alrm->enabled);
468}
469
470static int x1205_rtc_read_time(struct device *dev, struct rtc_time *tm)
471{
472 return x1205_get_datetime(to_i2c_client(dev),
473 tm, X1205_CCR_BASE);
474}
475
476static int x1205_rtc_set_time(struct device *dev, struct rtc_time *tm)
477{
478 return x1205_set_datetime(to_i2c_client(dev),
479 tm, X1205_CCR_BASE, 0);
480}
481
482static int x1205_rtc_proc(struct device *dev, struct seq_file *seq)
483{
484 int err, dtrim, atrim;
485
486 if ((err = x1205_get_dtrim(to_i2c_client(dev), &dtrim)) == 0)
487 seq_printf(seq, "digital_trim\t: %d ppm\n", dtrim);
488
489 if ((err = x1205_get_atrim(to_i2c_client(dev), &atrim)) == 0)
490 seq_printf(seq, "analog_trim\t: %d.%02d pF\n",
491 atrim / 1000, atrim % 1000);
492 return 0;
493}
494
495static const struct rtc_class_ops x1205_rtc_ops = {
496 .proc = x1205_rtc_proc,
497 .read_time = x1205_rtc_read_time,
498 .set_time = x1205_rtc_set_time,
499 .read_alarm = x1205_rtc_read_alarm,
500 .set_alarm = x1205_rtc_set_alarm,
501};
502
503static ssize_t x1205_sysfs_show_atrim(struct device *dev,
504 struct device_attribute *attr, char *buf)
505{
506 int err, atrim;
507
508 err = x1205_get_atrim(to_i2c_client(dev), &atrim);
509 if (err)
510 return err;
511
512 return sprintf(buf, "%d.%02d pF\n", atrim / 1000, atrim % 1000);
513}
514static DEVICE_ATTR(atrim, S_IRUGO, x1205_sysfs_show_atrim, NULL);
515
516static ssize_t x1205_sysfs_show_dtrim(struct device *dev,
517 struct device_attribute *attr, char *buf)
518{
519 int err, dtrim;
520
521 err = x1205_get_dtrim(to_i2c_client(dev), &dtrim);
522 if (err)
523 return err;
524
525 return sprintf(buf, "%d ppm\n", dtrim);
526}
527static DEVICE_ATTR(dtrim, S_IRUGO, x1205_sysfs_show_dtrim, NULL);
528
529static int x1205_sysfs_register(struct device *dev)
530{
531 int err;
532
533 err = device_create_file(dev, &dev_attr_atrim);
534 if (err)
535 return err;
536
537 err = device_create_file(dev, &dev_attr_dtrim);
538 if (err)
539 device_remove_file(dev, &dev_attr_atrim);
540
541 return err;
542}
543
544static void x1205_sysfs_unregister(struct device *dev)
545{
546 device_remove_file(dev, &dev_attr_atrim);
547 device_remove_file(dev, &dev_attr_dtrim);
548}
549
550
551static int x1205_probe(struct i2c_client *client,
552 const struct i2c_device_id *id)
553{
554 int err = 0;
555 unsigned char sr;
556 struct rtc_device *rtc;
557
558 dev_dbg(&client->dev, "%s\n", __func__);
559
560 if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C))
561 return -ENODEV;
562
563 if (x1205_validate_client(client) < 0)
564 return -ENODEV;
565
566 dev_info(&client->dev, "chip found, driver version " DRV_VERSION "\n");
567
568 rtc = rtc_device_register(x1205_driver.driver.name, &client->dev,
569 &x1205_rtc_ops, THIS_MODULE);
570
571 if (IS_ERR(rtc))
572 return PTR_ERR(rtc);
573
574 i2c_set_clientdata(client, rtc);
575
576 /* Check for power failures and eventually enable the osc */
577 if ((err = x1205_get_status(client, &sr)) == 0) {
578 if (sr & X1205_SR_RTCF) {
579 dev_err(&client->dev,
580 "power failure detected, "
581 "please set the clock\n");
582 udelay(50);
583 x1205_fix_osc(client);
584 }
585 }
586 else
587 dev_err(&client->dev, "couldn't read status\n");
588
589 err = x1205_sysfs_register(&client->dev);
590 if (err)
591 goto exit_devreg;
592
593 return 0;
594
595exit_devreg:
596 rtc_device_unregister(rtc);
597
598 return err;
599}
600
601static int x1205_remove(struct i2c_client *client)
602{
603 struct rtc_device *rtc = i2c_get_clientdata(client);
604
605 rtc_device_unregister(rtc);
606 x1205_sysfs_unregister(&client->dev);
607 return 0;
608}
609
610static const struct i2c_device_id x1205_id[] = {
611 { "x1205", 0 },
612 { }
613};
614MODULE_DEVICE_TABLE(i2c, x1205_id);
615
616static struct i2c_driver x1205_driver = {
617 .driver = {
618 .name = "rtc-x1205",
619 },
620 .probe = x1205_probe,
621 .remove = x1205_remove,
622 .id_table = x1205_id,
623};
624
625static int __init x1205_init(void)
626{
627 return i2c_add_driver(&x1205_driver);
628}
629
630static void __exit x1205_exit(void)
631{
632 i2c_del_driver(&x1205_driver);
633}
634
635MODULE_AUTHOR(
636 "Karen Spearel <kas111 at gmail dot com>, "
637 "Alessandro Zummo <a.zummo@towertech.it>");
638MODULE_DESCRIPTION("Xicor/Intersil X1205 RTC driver");
639MODULE_LICENSE("GPL");
640MODULE_VERSION(DRV_VERSION);
641
642module_init(x1205_init);
643module_exit(x1205_exit);