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   1// SPDX-License-Identifier: GPL-2.0
   2/*
   3 * imx214.c - imx214 sensor driver
   4 *
   5 * Copyright 2018 Qtechnology A/S
   6 *
   7 * Ricardo Ribalda <ribalda@kernel.org>
   8 */
   9#include <linux/clk.h>
  10#include <linux/delay.h>
  11#include <linux/gpio/consumer.h>
  12#include <linux/i2c.h>
  13#include <linux/module.h>
  14#include <linux/pm_runtime.h>
  15#include <linux/regmap.h>
  16#include <linux/regulator/consumer.h>
  17#include <media/media-entity.h>
  18#include <media/v4l2-ctrls.h>
  19#include <media/v4l2-fwnode.h>
  20#include <media/v4l2-subdev.h>
  21
  22#define IMX214_DEFAULT_CLK_FREQ	24000000
  23#define IMX214_DEFAULT_LINK_FREQ 480000000
  24#define IMX214_DEFAULT_PIXEL_RATE ((IMX214_DEFAULT_LINK_FREQ * 8LL) / 10)
  25#define IMX214_FPS 30
  26#define IMX214_MBUS_CODE MEDIA_BUS_FMT_SRGGB10_1X10
  27
  28static const char * const imx214_supply_name[] = {
  29	"vdda",
  30	"vddd",
  31	"vdddo",
  32};
  33
  34#define IMX214_NUM_SUPPLIES ARRAY_SIZE(imx214_supply_name)
  35
  36struct imx214 {
  37	struct device *dev;
  38	struct clk *xclk;
  39	struct regmap *regmap;
  40
  41	struct v4l2_subdev sd;
  42	struct media_pad pad;
  43	struct v4l2_mbus_framefmt fmt;
  44	struct v4l2_rect crop;
  45
  46	struct v4l2_ctrl_handler ctrls;
  47	struct v4l2_ctrl *pixel_rate;
  48	struct v4l2_ctrl *link_freq;
  49	struct v4l2_ctrl *exposure;
  50	struct v4l2_ctrl *unit_size;
  51
  52	struct regulator_bulk_data	supplies[IMX214_NUM_SUPPLIES];
  53
  54	struct gpio_desc *enable_gpio;
  55
  56	/*
  57	 * Serialize control access, get/set format, get selection
  58	 * and start streaming.
  59	 */
  60	struct mutex mutex;
  61
  62	bool streaming;
  63};
  64
  65struct reg_8 {
  66	u16 addr;
  67	u8 val;
  68};
  69
  70enum {
  71	IMX214_TABLE_WAIT_MS = 0,
  72	IMX214_TABLE_END,
  73	IMX214_MAX_RETRIES,
  74	IMX214_WAIT_MS
  75};
  76
  77/*From imx214_mode_tbls.h*/
  78static const struct reg_8 mode_4096x2304[] = {
  79	{0x0114, 0x03},
  80	{0x0220, 0x00},
  81	{0x0221, 0x11},
  82	{0x0222, 0x01},
  83	{0x0340, 0x0C},
  84	{0x0341, 0x7A},
  85	{0x0342, 0x13},
  86	{0x0343, 0x90},
  87	{0x0344, 0x00},
  88	{0x0345, 0x38},
  89	{0x0346, 0x01},
  90	{0x0347, 0x98},
  91	{0x0348, 0x10},
  92	{0x0349, 0x37},
  93	{0x034A, 0x0A},
  94	{0x034B, 0x97},
  95	{0x0381, 0x01},
  96	{0x0383, 0x01},
  97	{0x0385, 0x01},
  98	{0x0387, 0x01},
  99	{0x0900, 0x00},
 100	{0x0901, 0x00},
 101	{0x0902, 0x00},
 102	{0x3000, 0x35},
 103	{0x3054, 0x01},
 104	{0x305C, 0x11},
 105
 106	{0x0112, 0x0A},
 107	{0x0113, 0x0A},
 108	{0x034C, 0x10},
 109	{0x034D, 0x00},
 110	{0x034E, 0x09},
 111	{0x034F, 0x00},
 112	{0x0401, 0x00},
 113	{0x0404, 0x00},
 114	{0x0405, 0x10},
 115	{0x0408, 0x00},
 116	{0x0409, 0x00},
 117	{0x040A, 0x00},
 118	{0x040B, 0x00},
 119	{0x040C, 0x10},
 120	{0x040D, 0x00},
 121	{0x040E, 0x09},
 122	{0x040F, 0x00},
 123
 124	{0x0301, 0x05},
 125	{0x0303, 0x02},
 126	{0x0305, 0x03},
 127	{0x0306, 0x00},
 128	{0x0307, 0x96},
 129	{0x0309, 0x0A},
 130	{0x030B, 0x01},
 131	{0x0310, 0x00},
 132
 133	{0x0820, 0x12},
 134	{0x0821, 0xC0},
 135	{0x0822, 0x00},
 136	{0x0823, 0x00},
 137
 138	{0x3A03, 0x09},
 139	{0x3A04, 0x50},
 140	{0x3A05, 0x01},
 141
 142	{0x0B06, 0x01},
 143	{0x30A2, 0x00},
 144
 145	{0x30B4, 0x00},
 146
 147	{0x3A02, 0xFF},
 148
 149	{0x3011, 0x00},
 150	{0x3013, 0x01},
 151
 152	{0x0202, 0x0C},
 153	{0x0203, 0x70},
 154	{0x0224, 0x01},
 155	{0x0225, 0xF4},
 156
 157	{0x0204, 0x00},
 158	{0x0205, 0x00},
 159	{0x020E, 0x01},
 160	{0x020F, 0x00},
 161	{0x0210, 0x01},
 162	{0x0211, 0x00},
 163	{0x0212, 0x01},
 164	{0x0213, 0x00},
 165	{0x0214, 0x01},
 166	{0x0215, 0x00},
 167	{0x0216, 0x00},
 168	{0x0217, 0x00},
 169
 170	{0x4170, 0x00},
 171	{0x4171, 0x10},
 172	{0x4176, 0x00},
 173	{0x4177, 0x3C},
 174	{0xAE20, 0x04},
 175	{0xAE21, 0x5C},
 176
 177	{IMX214_TABLE_WAIT_MS, 10},
 178	{0x0138, 0x01},
 179	{IMX214_TABLE_END, 0x00}
 180};
 181
 182static const struct reg_8 mode_1920x1080[] = {
 183	{0x0114, 0x03},
 184	{0x0220, 0x00},
 185	{0x0221, 0x11},
 186	{0x0222, 0x01},
 187	{0x0340, 0x0C},
 188	{0x0341, 0x7A},
 189	{0x0342, 0x13},
 190	{0x0343, 0x90},
 191	{0x0344, 0x04},
 192	{0x0345, 0x78},
 193	{0x0346, 0x03},
 194	{0x0347, 0xFC},
 195	{0x0348, 0x0B},
 196	{0x0349, 0xF7},
 197	{0x034A, 0x08},
 198	{0x034B, 0x33},
 199	{0x0381, 0x01},
 200	{0x0383, 0x01},
 201	{0x0385, 0x01},
 202	{0x0387, 0x01},
 203	{0x0900, 0x00},
 204	{0x0901, 0x00},
 205	{0x0902, 0x00},
 206	{0x3000, 0x35},
 207	{0x3054, 0x01},
 208	{0x305C, 0x11},
 209
 210	{0x0112, 0x0A},
 211	{0x0113, 0x0A},
 212	{0x034C, 0x07},
 213	{0x034D, 0x80},
 214	{0x034E, 0x04},
 215	{0x034F, 0x38},
 216	{0x0401, 0x00},
 217	{0x0404, 0x00},
 218	{0x0405, 0x10},
 219	{0x0408, 0x00},
 220	{0x0409, 0x00},
 221	{0x040A, 0x00},
 222	{0x040B, 0x00},
 223	{0x040C, 0x07},
 224	{0x040D, 0x80},
 225	{0x040E, 0x04},
 226	{0x040F, 0x38},
 227
 228	{0x0301, 0x05},
 229	{0x0303, 0x02},
 230	{0x0305, 0x03},
 231	{0x0306, 0x00},
 232	{0x0307, 0x96},
 233	{0x0309, 0x0A},
 234	{0x030B, 0x01},
 235	{0x0310, 0x00},
 236
 237	{0x0820, 0x12},
 238	{0x0821, 0xC0},
 239	{0x0822, 0x00},
 240	{0x0823, 0x00},
 241
 242	{0x3A03, 0x04},
 243	{0x3A04, 0xF8},
 244	{0x3A05, 0x02},
 245
 246	{0x0B06, 0x01},
 247	{0x30A2, 0x00},
 248
 249	{0x30B4, 0x00},
 250
 251	{0x3A02, 0xFF},
 252
 253	{0x3011, 0x00},
 254	{0x3013, 0x01},
 255
 256	{0x0202, 0x0C},
 257	{0x0203, 0x70},
 258	{0x0224, 0x01},
 259	{0x0225, 0xF4},
 260
 261	{0x0204, 0x00},
 262	{0x0205, 0x00},
 263	{0x020E, 0x01},
 264	{0x020F, 0x00},
 265	{0x0210, 0x01},
 266	{0x0211, 0x00},
 267	{0x0212, 0x01},
 268	{0x0213, 0x00},
 269	{0x0214, 0x01},
 270	{0x0215, 0x00},
 271	{0x0216, 0x00},
 272	{0x0217, 0x00},
 273
 274	{0x4170, 0x00},
 275	{0x4171, 0x10},
 276	{0x4176, 0x00},
 277	{0x4177, 0x3C},
 278	{0xAE20, 0x04},
 279	{0xAE21, 0x5C},
 280
 281	{IMX214_TABLE_WAIT_MS, 10},
 282	{0x0138, 0x01},
 283	{IMX214_TABLE_END, 0x00}
 284};
 285
 286static const struct reg_8 mode_table_common[] = {
 287	/* software reset */
 288
 289	/* software standby settings */
 290	{0x0100, 0x00},
 291
 292	/* ATR setting */
 293	{0x9300, 0x02},
 294
 295	/* external clock setting */
 296	{0x0136, 0x18},
 297	{0x0137, 0x00},
 298
 299	/* global setting */
 300	/* basic config */
 301	{0x0101, 0x00},
 302	{0x0105, 0x01},
 303	{0x0106, 0x01},
 304	{0x4550, 0x02},
 305	{0x4601, 0x00},
 306	{0x4642, 0x05},
 307	{0x6227, 0x11},
 308	{0x6276, 0x00},
 309	{0x900E, 0x06},
 310	{0xA802, 0x90},
 311	{0xA803, 0x11},
 312	{0xA804, 0x62},
 313	{0xA805, 0x77},
 314	{0xA806, 0xAE},
 315	{0xA807, 0x34},
 316	{0xA808, 0xAE},
 317	{0xA809, 0x35},
 318	{0xA80A, 0x62},
 319	{0xA80B, 0x83},
 320	{0xAE33, 0x00},
 321
 322	/* analog setting */
 323	{0x4174, 0x00},
 324	{0x4175, 0x11},
 325	{0x4612, 0x29},
 326	{0x461B, 0x12},
 327	{0x461F, 0x06},
 328	{0x4635, 0x07},
 329	{0x4637, 0x30},
 330	{0x463F, 0x18},
 331	{0x4641, 0x0D},
 332	{0x465B, 0x12},
 333	{0x465F, 0x11},
 334	{0x4663, 0x11},
 335	{0x4667, 0x0F},
 336	{0x466F, 0x0F},
 337	{0x470E, 0x09},
 338	{0x4909, 0xAB},
 339	{0x490B, 0x95},
 340	{0x4915, 0x5D},
 341	{0x4A5F, 0xFF},
 342	{0x4A61, 0xFF},
 343	{0x4A73, 0x62},
 344	{0x4A85, 0x00},
 345	{0x4A87, 0xFF},
 346
 347	/* embedded data */
 348	{0x5041, 0x04},
 349	{0x583C, 0x04},
 350	{0x620E, 0x04},
 351	{0x6EB2, 0x01},
 352	{0x6EB3, 0x00},
 353	{0x9300, 0x02},
 354
 355	/* imagequality */
 356	/* HDR setting */
 357	{0x3001, 0x07},
 358	{0x6D12, 0x3F},
 359	{0x6D13, 0xFF},
 360	{0x9344, 0x03},
 361	{0x9706, 0x10},
 362	{0x9707, 0x03},
 363	{0x9708, 0x03},
 364	{0x9E04, 0x01},
 365	{0x9E05, 0x00},
 366	{0x9E0C, 0x01},
 367	{0x9E0D, 0x02},
 368	{0x9E24, 0x00},
 369	{0x9E25, 0x8C},
 370	{0x9E26, 0x00},
 371	{0x9E27, 0x94},
 372	{0x9E28, 0x00},
 373	{0x9E29, 0x96},
 374
 375	/* CNR parameter setting */
 376	{0x69DB, 0x01},
 377
 378	/* Moire reduction */
 379	{0x6957, 0x01},
 380
 381	/* image enhancement */
 382	{0x6987, 0x17},
 383	{0x698A, 0x03},
 384	{0x698B, 0x03},
 385
 386	/* white balanace */
 387	{0x0B8E, 0x01},
 388	{0x0B8F, 0x00},
 389	{0x0B90, 0x01},
 390	{0x0B91, 0x00},
 391	{0x0B92, 0x01},
 392	{0x0B93, 0x00},
 393	{0x0B94, 0x01},
 394	{0x0B95, 0x00},
 395
 396	/* ATR setting */
 397	{0x6E50, 0x00},
 398	{0x6E51, 0x32},
 399	{0x9340, 0x00},
 400	{0x9341, 0x3C},
 401	{0x9342, 0x03},
 402	{0x9343, 0xFF},
 403	{IMX214_TABLE_END, 0x00}
 404};
 405
 406/*
 407 * Declare modes in order, from biggest
 408 * to smallest height.
 409 */
 410static const struct imx214_mode {
 411	u32 width;
 412	u32 height;
 413	const struct reg_8 *reg_table;
 414} imx214_modes[] = {
 415	{
 416		.width = 4096,
 417		.height = 2304,
 418		.reg_table = mode_4096x2304,
 419	},
 420	{
 421		.width = 1920,
 422		.height = 1080,
 423		.reg_table = mode_1920x1080,
 424	},
 425};
 426
 427static inline struct imx214 *to_imx214(struct v4l2_subdev *sd)
 428{
 429	return container_of(sd, struct imx214, sd);
 430}
 431
 432static int __maybe_unused imx214_power_on(struct device *dev)
 433{
 434	struct i2c_client *client = to_i2c_client(dev);
 435	struct v4l2_subdev *sd = i2c_get_clientdata(client);
 436	struct imx214 *imx214 = to_imx214(sd);
 437	int ret;
 438
 439	ret = regulator_bulk_enable(IMX214_NUM_SUPPLIES, imx214->supplies);
 440	if (ret < 0) {
 441		dev_err(imx214->dev, "failed to enable regulators: %d\n", ret);
 442		return ret;
 443	}
 444
 445	usleep_range(2000, 3000);
 446
 447	ret = clk_prepare_enable(imx214->xclk);
 448	if (ret < 0) {
 449		regulator_bulk_disable(IMX214_NUM_SUPPLIES, imx214->supplies);
 450		dev_err(imx214->dev, "clk prepare enable failed\n");
 451		return ret;
 452	}
 453
 454	gpiod_set_value_cansleep(imx214->enable_gpio, 1);
 455	usleep_range(12000, 15000);
 456
 457	return 0;
 458}
 459
 460static int __maybe_unused imx214_power_off(struct device *dev)
 461{
 462	struct i2c_client *client = to_i2c_client(dev);
 463	struct v4l2_subdev *sd = i2c_get_clientdata(client);
 464	struct imx214 *imx214 = to_imx214(sd);
 465
 466	gpiod_set_value_cansleep(imx214->enable_gpio, 0);
 467
 468	clk_disable_unprepare(imx214->xclk);
 469
 470	regulator_bulk_disable(IMX214_NUM_SUPPLIES, imx214->supplies);
 471	usleep_range(10, 20);
 472
 473	return 0;
 474}
 475
 476static int imx214_enum_mbus_code(struct v4l2_subdev *sd,
 477				 struct v4l2_subdev_state *sd_state,
 478				 struct v4l2_subdev_mbus_code_enum *code)
 479{
 480	if (code->index > 0)
 481		return -EINVAL;
 482
 483	code->code = IMX214_MBUS_CODE;
 484
 485	return 0;
 486}
 487
 488static int imx214_enum_frame_size(struct v4l2_subdev *subdev,
 489				  struct v4l2_subdev_state *sd_state,
 490				  struct v4l2_subdev_frame_size_enum *fse)
 491{
 492	if (fse->code != IMX214_MBUS_CODE)
 493		return -EINVAL;
 494
 495	if (fse->index >= ARRAY_SIZE(imx214_modes))
 496		return -EINVAL;
 497
 498	fse->min_width = fse->max_width = imx214_modes[fse->index].width;
 499	fse->min_height = fse->max_height = imx214_modes[fse->index].height;
 500
 501	return 0;
 502}
 503
 504#ifdef CONFIG_VIDEO_ADV_DEBUG
 505static int imx214_s_register(struct v4l2_subdev *subdev,
 506			     const struct v4l2_dbg_register *reg)
 507{
 508	struct imx214 *imx214 = container_of(subdev, struct imx214, sd);
 509
 510	return regmap_write(imx214->regmap, reg->reg, reg->val);
 511}
 512
 513static int imx214_g_register(struct v4l2_subdev *subdev,
 514			     struct v4l2_dbg_register *reg)
 515{
 516	struct imx214 *imx214 = container_of(subdev, struct imx214, sd);
 517	unsigned int aux;
 518	int ret;
 519
 520	reg->size = 1;
 521	ret = regmap_read(imx214->regmap, reg->reg, &aux);
 522	reg->val = aux;
 523
 524	return ret;
 525}
 526#endif
 527
 528static const struct v4l2_subdev_core_ops imx214_core_ops = {
 529#ifdef CONFIG_VIDEO_ADV_DEBUG
 530	.g_register = imx214_g_register,
 531	.s_register = imx214_s_register,
 532#endif
 533};
 534
 535static struct v4l2_mbus_framefmt *
 536__imx214_get_pad_format(struct imx214 *imx214,
 537			struct v4l2_subdev_state *sd_state,
 538			unsigned int pad,
 539			enum v4l2_subdev_format_whence which)
 540{
 541	switch (which) {
 542	case V4L2_SUBDEV_FORMAT_TRY:
 543		return v4l2_subdev_get_try_format(&imx214->sd, sd_state, pad);
 544	case V4L2_SUBDEV_FORMAT_ACTIVE:
 545		return &imx214->fmt;
 546	default:
 547		return NULL;
 548	}
 549}
 550
 551static int imx214_get_format(struct v4l2_subdev *sd,
 552			     struct v4l2_subdev_state *sd_state,
 553			     struct v4l2_subdev_format *format)
 554{
 555	struct imx214 *imx214 = to_imx214(sd);
 556
 557	mutex_lock(&imx214->mutex);
 558	format->format = *__imx214_get_pad_format(imx214, sd_state,
 559						  format->pad,
 560						  format->which);
 561	mutex_unlock(&imx214->mutex);
 562
 563	return 0;
 564}
 565
 566static struct v4l2_rect *
 567__imx214_get_pad_crop(struct imx214 *imx214,
 568		      struct v4l2_subdev_state *sd_state,
 569		      unsigned int pad, enum v4l2_subdev_format_whence which)
 570{
 571	switch (which) {
 572	case V4L2_SUBDEV_FORMAT_TRY:
 573		return v4l2_subdev_get_try_crop(&imx214->sd, sd_state, pad);
 574	case V4L2_SUBDEV_FORMAT_ACTIVE:
 575		return &imx214->crop;
 576	default:
 577		return NULL;
 578	}
 579}
 580
 581static int imx214_set_format(struct v4l2_subdev *sd,
 582			     struct v4l2_subdev_state *sd_state,
 583			     struct v4l2_subdev_format *format)
 584{
 585	struct imx214 *imx214 = to_imx214(sd);
 586	struct v4l2_mbus_framefmt *__format;
 587	struct v4l2_rect *__crop;
 588	const struct imx214_mode *mode;
 589
 590	mutex_lock(&imx214->mutex);
 591
 592	__crop = __imx214_get_pad_crop(imx214, sd_state, format->pad,
 593				       format->which);
 594
 595	mode = v4l2_find_nearest_size(imx214_modes,
 596				      ARRAY_SIZE(imx214_modes), width, height,
 597				      format->format.width,
 598				      format->format.height);
 599
 600	__crop->width = mode->width;
 601	__crop->height = mode->height;
 602
 603	__format = __imx214_get_pad_format(imx214, sd_state, format->pad,
 604					   format->which);
 605	__format->width = __crop->width;
 606	__format->height = __crop->height;
 607	__format->code = IMX214_MBUS_CODE;
 608	__format->field = V4L2_FIELD_NONE;
 609	__format->colorspace = V4L2_COLORSPACE_SRGB;
 610	__format->ycbcr_enc = V4L2_MAP_YCBCR_ENC_DEFAULT(__format->colorspace);
 611	__format->quantization = V4L2_MAP_QUANTIZATION_DEFAULT(true,
 612				__format->colorspace, __format->ycbcr_enc);
 613	__format->xfer_func = V4L2_MAP_XFER_FUNC_DEFAULT(__format->colorspace);
 614
 615	format->format = *__format;
 616
 617	mutex_unlock(&imx214->mutex);
 618
 619	return 0;
 620}
 621
 622static int imx214_get_selection(struct v4l2_subdev *sd,
 623				struct v4l2_subdev_state *sd_state,
 624				struct v4l2_subdev_selection *sel)
 625{
 626	struct imx214 *imx214 = to_imx214(sd);
 627
 628	if (sel->target != V4L2_SEL_TGT_CROP)
 629		return -EINVAL;
 630
 631	mutex_lock(&imx214->mutex);
 632	sel->r = *__imx214_get_pad_crop(imx214, sd_state, sel->pad,
 633					sel->which);
 634	mutex_unlock(&imx214->mutex);
 635	return 0;
 636}
 637
 638static int imx214_entity_init_cfg(struct v4l2_subdev *subdev,
 639				  struct v4l2_subdev_state *sd_state)
 640{
 641	struct v4l2_subdev_format fmt = { };
 642
 643	fmt.which = sd_state ? V4L2_SUBDEV_FORMAT_TRY : V4L2_SUBDEV_FORMAT_ACTIVE;
 644	fmt.format.width = imx214_modes[0].width;
 645	fmt.format.height = imx214_modes[0].height;
 646
 647	imx214_set_format(subdev, sd_state, &fmt);
 648
 649	return 0;
 650}
 651
 652static int imx214_set_ctrl(struct v4l2_ctrl *ctrl)
 653{
 654	struct imx214 *imx214 = container_of(ctrl->handler,
 655					     struct imx214, ctrls);
 656	u8 vals[2];
 657	int ret;
 658
 659	/*
 660	 * Applying V4L2 control value only happens
 661	 * when power is up for streaming
 662	 */
 663	if (!pm_runtime_get_if_in_use(imx214->dev))
 664		return 0;
 665
 666	switch (ctrl->id) {
 667	case V4L2_CID_EXPOSURE:
 668		vals[1] = ctrl->val;
 669		vals[0] = ctrl->val >> 8;
 670		ret = regmap_bulk_write(imx214->regmap, 0x202, vals, 2);
 671		if (ret < 0)
 672			dev_err(imx214->dev, "Error %d\n", ret);
 673		ret = 0;
 674		break;
 675
 676	default:
 677		ret = -EINVAL;
 678	}
 679
 680	pm_runtime_put(imx214->dev);
 681
 682	return ret;
 683}
 684
 685static const struct v4l2_ctrl_ops imx214_ctrl_ops = {
 686	.s_ctrl = imx214_set_ctrl,
 687};
 688
 689#define MAX_CMD 4
 690static int imx214_write_table(struct imx214 *imx214,
 691			      const struct reg_8 table[])
 692{
 693	u8 vals[MAX_CMD];
 694	int i;
 695	int ret;
 696
 697	for (; table->addr != IMX214_TABLE_END ; table++) {
 698		if (table->addr == IMX214_TABLE_WAIT_MS) {
 699			usleep_range(table->val * 1000,
 700				     table->val * 1000 + 500);
 701			continue;
 702		}
 703
 704		for (i = 0; i < MAX_CMD; i++) {
 705			if (table[i].addr != (table[0].addr + i))
 706				break;
 707			vals[i] = table[i].val;
 708		}
 709
 710		ret = regmap_bulk_write(imx214->regmap, table->addr, vals, i);
 711
 712		if (ret) {
 713			dev_err(imx214->dev, "write_table error: %d\n", ret);
 714			return ret;
 715		}
 716
 717		table += i - 1;
 718	}
 719
 720	return 0;
 721}
 722
 723static int imx214_start_streaming(struct imx214 *imx214)
 724{
 725	const struct imx214_mode *mode;
 726	int ret;
 727
 728	mutex_lock(&imx214->mutex);
 729	ret = imx214_write_table(imx214, mode_table_common);
 730	if (ret < 0) {
 731		dev_err(imx214->dev, "could not sent common table %d\n", ret);
 732		goto error;
 733	}
 734
 735	mode = v4l2_find_nearest_size(imx214_modes,
 736				ARRAY_SIZE(imx214_modes), width, height,
 737				imx214->fmt.width, imx214->fmt.height);
 738	ret = imx214_write_table(imx214, mode->reg_table);
 739	if (ret < 0) {
 740		dev_err(imx214->dev, "could not sent mode table %d\n", ret);
 741		goto error;
 742	}
 743	ret = __v4l2_ctrl_handler_setup(&imx214->ctrls);
 744	if (ret < 0) {
 745		dev_err(imx214->dev, "could not sync v4l2 controls\n");
 746		goto error;
 747	}
 748	ret = regmap_write(imx214->regmap, 0x100, 1);
 749	if (ret < 0) {
 750		dev_err(imx214->dev, "could not sent start table %d\n", ret);
 751		goto error;
 752	}
 753
 754	mutex_unlock(&imx214->mutex);
 755	return 0;
 756
 757error:
 758	mutex_unlock(&imx214->mutex);
 759	return ret;
 760}
 761
 762static int imx214_stop_streaming(struct imx214 *imx214)
 763{
 764	int ret;
 765
 766	ret = regmap_write(imx214->regmap, 0x100, 0);
 767	if (ret < 0)
 768		dev_err(imx214->dev, "could not sent stop table %d\n",	ret);
 769
 770	return ret;
 771}
 772
 773static int imx214_s_stream(struct v4l2_subdev *subdev, int enable)
 774{
 775	struct imx214 *imx214 = to_imx214(subdev);
 776	int ret;
 777
 778	if (imx214->streaming == enable)
 779		return 0;
 780
 781	if (enable) {
 782		ret = pm_runtime_resume_and_get(imx214->dev);
 783		if (ret < 0)
 784			return ret;
 785
 786		ret = imx214_start_streaming(imx214);
 787		if (ret < 0)
 788			goto err_rpm_put;
 789	} else {
 790		ret = imx214_stop_streaming(imx214);
 791		if (ret < 0)
 792			goto err_rpm_put;
 793		pm_runtime_put(imx214->dev);
 794	}
 795
 796	imx214->streaming = enable;
 797	return 0;
 798
 799err_rpm_put:
 800	pm_runtime_put(imx214->dev);
 801	return ret;
 802}
 803
 804static int imx214_g_frame_interval(struct v4l2_subdev *subdev,
 805				   struct v4l2_subdev_frame_interval *fival)
 806{
 807	fival->interval.numerator = 1;
 808	fival->interval.denominator = IMX214_FPS;
 809
 810	return 0;
 811}
 812
 813static int imx214_enum_frame_interval(struct v4l2_subdev *subdev,
 814				struct v4l2_subdev_state *sd_state,
 815				struct v4l2_subdev_frame_interval_enum *fie)
 816{
 817	const struct imx214_mode *mode;
 818
 819	if (fie->index != 0)
 820		return -EINVAL;
 821
 822	mode = v4l2_find_nearest_size(imx214_modes,
 823				ARRAY_SIZE(imx214_modes), width, height,
 824				fie->width, fie->height);
 825
 826	fie->code = IMX214_MBUS_CODE;
 827	fie->width = mode->width;
 828	fie->height = mode->height;
 829	fie->interval.numerator = 1;
 830	fie->interval.denominator = IMX214_FPS;
 831
 832	return 0;
 833}
 834
 835static const struct v4l2_subdev_video_ops imx214_video_ops = {
 836	.s_stream = imx214_s_stream,
 837	.g_frame_interval = imx214_g_frame_interval,
 838	.s_frame_interval = imx214_g_frame_interval,
 839};
 840
 841static const struct v4l2_subdev_pad_ops imx214_subdev_pad_ops = {
 842	.enum_mbus_code = imx214_enum_mbus_code,
 843	.enum_frame_size = imx214_enum_frame_size,
 844	.enum_frame_interval = imx214_enum_frame_interval,
 845	.get_fmt = imx214_get_format,
 846	.set_fmt = imx214_set_format,
 847	.get_selection = imx214_get_selection,
 848	.init_cfg = imx214_entity_init_cfg,
 849};
 850
 851static const struct v4l2_subdev_ops imx214_subdev_ops = {
 852	.core = &imx214_core_ops,
 853	.video = &imx214_video_ops,
 854	.pad = &imx214_subdev_pad_ops,
 855};
 856
 857static const struct regmap_config sensor_regmap_config = {
 858	.reg_bits = 16,
 859	.val_bits = 8,
 860	.cache_type = REGCACHE_RBTREE,
 861};
 862
 863static int imx214_get_regulators(struct device *dev, struct imx214 *imx214)
 864{
 865	unsigned int i;
 866
 867	for (i = 0; i < IMX214_NUM_SUPPLIES; i++)
 868		imx214->supplies[i].supply = imx214_supply_name[i];
 869
 870	return devm_regulator_bulk_get(dev, IMX214_NUM_SUPPLIES,
 871				       imx214->supplies);
 872}
 873
 874static int imx214_parse_fwnode(struct device *dev)
 875{
 876	struct fwnode_handle *endpoint;
 877	struct v4l2_fwnode_endpoint bus_cfg = {
 878		.bus_type = V4L2_MBUS_CSI2_DPHY,
 879	};
 880	unsigned int i;
 881	int ret;
 882
 883	endpoint = fwnode_graph_get_next_endpoint(dev_fwnode(dev), NULL);
 884	if (!endpoint) {
 885		dev_err(dev, "endpoint node not found\n");
 886		return -EINVAL;
 887	}
 888
 889	ret = v4l2_fwnode_endpoint_alloc_parse(endpoint, &bus_cfg);
 890	if (ret) {
 891		dev_err(dev, "parsing endpoint node failed\n");
 892		goto done;
 893	}
 894
 895	for (i = 0; i < bus_cfg.nr_of_link_frequencies; i++)
 896		if (bus_cfg.link_frequencies[i] == IMX214_DEFAULT_LINK_FREQ)
 897			break;
 898
 899	if (i == bus_cfg.nr_of_link_frequencies) {
 900		dev_err(dev, "link-frequencies %d not supported, Please review your DT\n",
 901			IMX214_DEFAULT_LINK_FREQ);
 902		ret = -EINVAL;
 903		goto done;
 904	}
 905
 906done:
 907	v4l2_fwnode_endpoint_free(&bus_cfg);
 908	fwnode_handle_put(endpoint);
 909	return ret;
 910}
 911
 912static int __maybe_unused imx214_suspend(struct device *dev)
 913{
 914	struct i2c_client *client = to_i2c_client(dev);
 915	struct v4l2_subdev *sd = i2c_get_clientdata(client);
 916	struct imx214 *imx214 = to_imx214(sd);
 917
 918	if (imx214->streaming)
 919		imx214_stop_streaming(imx214);
 920
 921	return 0;
 922}
 923
 924static int __maybe_unused imx214_resume(struct device *dev)
 925{
 926	struct i2c_client *client = to_i2c_client(dev);
 927	struct v4l2_subdev *sd = i2c_get_clientdata(client);
 928	struct imx214 *imx214 = to_imx214(sd);
 929	int ret;
 930
 931	if (imx214->streaming) {
 932		ret = imx214_start_streaming(imx214);
 933		if (ret)
 934			goto error;
 935	}
 936
 937	return 0;
 938
 939error:
 940	imx214_stop_streaming(imx214);
 941	imx214->streaming = 0;
 942	return ret;
 943}
 944
 945static int imx214_probe(struct i2c_client *client)
 946{
 947	struct device *dev = &client->dev;
 948	struct imx214 *imx214;
 949	static const s64 link_freq[] = {
 950		IMX214_DEFAULT_LINK_FREQ,
 951	};
 952	static const struct v4l2_area unit_size = {
 953		.width = 1120,
 954		.height = 1120,
 955	};
 956	int ret;
 957
 958	ret = imx214_parse_fwnode(dev);
 959	if (ret)
 960		return ret;
 961
 962	imx214 = devm_kzalloc(dev, sizeof(*imx214), GFP_KERNEL);
 963	if (!imx214)
 964		return -ENOMEM;
 965
 966	imx214->dev = dev;
 967
 968	imx214->xclk = devm_clk_get(dev, NULL);
 969	if (IS_ERR(imx214->xclk)) {
 970		dev_err(dev, "could not get xclk");
 971		return PTR_ERR(imx214->xclk);
 972	}
 973
 974	ret = clk_set_rate(imx214->xclk, IMX214_DEFAULT_CLK_FREQ);
 975	if (ret) {
 976		dev_err(dev, "could not set xclk frequency\n");
 977		return ret;
 978	}
 979
 980	ret = imx214_get_regulators(dev, imx214);
 981	if (ret < 0) {
 982		dev_err(dev, "cannot get regulators\n");
 983		return ret;
 984	}
 985
 986	imx214->enable_gpio = devm_gpiod_get(dev, "enable", GPIOD_OUT_LOW);
 987	if (IS_ERR(imx214->enable_gpio)) {
 988		dev_err(dev, "cannot get enable gpio\n");
 989		return PTR_ERR(imx214->enable_gpio);
 990	}
 991
 992	imx214->regmap = devm_regmap_init_i2c(client, &sensor_regmap_config);
 993	if (IS_ERR(imx214->regmap)) {
 994		dev_err(dev, "regmap init failed\n");
 995		return PTR_ERR(imx214->regmap);
 996	}
 997
 998	v4l2_i2c_subdev_init(&imx214->sd, client, &imx214_subdev_ops);
 999
1000	/*
1001	 * Enable power initially, to avoid warnings
1002	 * from clk_disable on power_off
1003	 */
1004	imx214_power_on(imx214->dev);
1005
1006	pm_runtime_set_active(imx214->dev);
1007	pm_runtime_enable(imx214->dev);
1008	pm_runtime_idle(imx214->dev);
1009
1010	v4l2_ctrl_handler_init(&imx214->ctrls, 3);
1011
1012	imx214->pixel_rate = v4l2_ctrl_new_std(&imx214->ctrls, NULL,
1013					       V4L2_CID_PIXEL_RATE, 0,
1014					       IMX214_DEFAULT_PIXEL_RATE, 1,
1015					       IMX214_DEFAULT_PIXEL_RATE);
1016	imx214->link_freq = v4l2_ctrl_new_int_menu(&imx214->ctrls, NULL,
1017						   V4L2_CID_LINK_FREQ,
1018						   ARRAY_SIZE(link_freq) - 1,
1019						   0, link_freq);
1020	if (imx214->link_freq)
1021		imx214->link_freq->flags |= V4L2_CTRL_FLAG_READ_ONLY;
1022
1023	/*
1024	 * WARNING!
1025	 * Values obtained reverse engineering blobs and/or devices.
1026	 * Ranges and functionality might be wrong.
1027	 *
1028	 * Sony, please release some register set documentation for the
1029	 * device.
1030	 *
1031	 * Yours sincerely, Ricardo.
1032	 */
1033	imx214->exposure = v4l2_ctrl_new_std(&imx214->ctrls, &imx214_ctrl_ops,
1034					     V4L2_CID_EXPOSURE,
1035					     0, 3184, 1, 0x0c70);
1036
1037	imx214->unit_size = v4l2_ctrl_new_std_compound(&imx214->ctrls,
1038				NULL,
1039				V4L2_CID_UNIT_CELL_SIZE,
1040				v4l2_ctrl_ptr_create((void *)&unit_size));
1041	ret = imx214->ctrls.error;
1042	if (ret) {
1043		dev_err(&client->dev, "%s control init failed (%d)\n",
1044			__func__, ret);
1045		goto free_ctrl;
1046	}
1047
1048	imx214->sd.ctrl_handler = &imx214->ctrls;
1049	mutex_init(&imx214->mutex);
1050	imx214->ctrls.lock = &imx214->mutex;
1051
1052	imx214->sd.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
1053	imx214->pad.flags = MEDIA_PAD_FL_SOURCE;
1054	imx214->sd.dev = &client->dev;
1055	imx214->sd.entity.function = MEDIA_ENT_F_CAM_SENSOR;
1056
1057	ret = media_entity_pads_init(&imx214->sd.entity, 1, &imx214->pad);
1058	if (ret < 0) {
1059		dev_err(dev, "could not register media entity\n");
1060		goto free_ctrl;
1061	}
1062
1063	imx214_entity_init_cfg(&imx214->sd, NULL);
1064
1065	ret = v4l2_async_register_subdev_sensor(&imx214->sd);
1066	if (ret < 0) {
1067		dev_err(dev, "could not register v4l2 device\n");
1068		goto free_entity;
1069	}
1070
1071	return 0;
1072
1073free_entity:
1074	media_entity_cleanup(&imx214->sd.entity);
1075free_ctrl:
1076	mutex_destroy(&imx214->mutex);
1077	v4l2_ctrl_handler_free(&imx214->ctrls);
1078	pm_runtime_disable(imx214->dev);
1079
1080	return ret;
1081}
1082
1083static void imx214_remove(struct i2c_client *client)
1084{
1085	struct v4l2_subdev *sd = i2c_get_clientdata(client);
1086	struct imx214 *imx214 = to_imx214(sd);
1087
1088	v4l2_async_unregister_subdev(&imx214->sd);
1089	media_entity_cleanup(&imx214->sd.entity);
1090	v4l2_ctrl_handler_free(&imx214->ctrls);
1091
1092	pm_runtime_disable(&client->dev);
1093	pm_runtime_set_suspended(&client->dev);
1094
1095	mutex_destroy(&imx214->mutex);
1096}
1097
1098static const struct of_device_id imx214_of_match[] = {
1099	{ .compatible = "sony,imx214" },
1100	{ }
1101};
1102MODULE_DEVICE_TABLE(of, imx214_of_match);
1103
1104static const struct dev_pm_ops imx214_pm_ops = {
1105	SET_SYSTEM_SLEEP_PM_OPS(imx214_suspend, imx214_resume)
1106	SET_RUNTIME_PM_OPS(imx214_power_off, imx214_power_on, NULL)
1107};
1108
1109static struct i2c_driver imx214_i2c_driver = {
1110	.driver = {
1111		.of_match_table = imx214_of_match,
1112		.pm = &imx214_pm_ops,
1113		.name  = "imx214",
1114	},
1115	.probe_new  = imx214_probe,
1116	.remove = imx214_remove,
1117};
1118
1119module_i2c_driver(imx214_i2c_driver);
1120
1121MODULE_DESCRIPTION("Sony IMX214 Camera driver");
1122MODULE_AUTHOR("Ricardo Ribalda <ribalda@kernel.org>");
1123MODULE_LICENSE("GPL v2");