1/* SPDX-License-Identifier: MIT */
  2/*
  3 * Copyright © 2019 Intel Corporation
  4 */
  5
  6#ifndef __INTEL_DP_H__
  7#define __INTEL_DP_H__
  8
  9#include <linux/types.h>
 10
 11enum intel_output_format;
 12enum pipe;
 13enum port;
 14struct drm_connector_state;
 15struct drm_encoder;
 16struct drm_i915_private;
 17struct drm_modeset_acquire_ctx;
 18struct drm_dp_vsc_sdp;
 19struct intel_atomic_state;
 20struct intel_connector;
 21struct intel_crtc_state;
 22struct intel_digital_port;
 23struct intel_dp;
 24struct intel_encoder;
 25
 26struct link_config_limits {
 27	int min_rate, max_rate;
 28	int min_lane_count, max_lane_count;
 29	int min_bpp, max_bpp;
 30};
 31
 32void intel_edp_fixup_vbt_bpp(struct intel_encoder *encoder, int pipe_bpp);
 33void intel_dp_adjust_compliance_config(struct intel_dp *intel_dp,
 34				       struct intel_crtc_state *pipe_config,
 35				       struct link_config_limits *limits);
 36bool intel_dp_limited_color_range(const struct intel_crtc_state *crtc_state,
 37				  const struct drm_connector_state *conn_state);
 38int intel_dp_min_bpp(enum intel_output_format output_format);
 39bool intel_dp_init_connector(struct intel_digital_port *dig_port,
 40			     struct intel_connector *intel_connector);
 41void intel_dp_set_link_params(struct intel_dp *intel_dp,
 42			      int link_rate, int lane_count);
 43int intel_dp_get_link_train_fallback_values(struct intel_dp *intel_dp,
 44					    int link_rate, u8 lane_count);
 45int intel_dp_retrain_link(struct intel_encoder *encoder,
 46			  struct drm_modeset_acquire_ctx *ctx);
 47void intel_dp_set_power(struct intel_dp *intel_dp, u8 mode);
 48void intel_dp_configure_protocol_converter(struct intel_dp *intel_dp,
 49					   const struct intel_crtc_state *crtc_state);
 50void intel_dp_sink_set_decompression_state(struct intel_dp *intel_dp,
 51					   const struct intel_crtc_state *crtc_state,
 52					   bool enable);
 53void intel_dp_encoder_suspend(struct intel_encoder *intel_encoder);
 54void intel_dp_encoder_shutdown(struct intel_encoder *intel_encoder);
 55void intel_dp_encoder_flush_work(struct drm_encoder *encoder);
 56int intel_dp_compute_config(struct intel_encoder *encoder,
 57			    struct intel_crtc_state *pipe_config,
 58			    struct drm_connector_state *conn_state);
 59bool intel_dp_is_edp(struct intel_dp *intel_dp);
 60bool intel_dp_is_uhbr(const struct intel_crtc_state *crtc_state);
 61bool intel_dp_is_port_edp(struct drm_i915_private *dev_priv, enum port port);
 62enum irqreturn intel_dp_hpd_pulse(struct intel_digital_port *dig_port,
 63				  bool long_hpd);
 64void intel_edp_backlight_on(const struct intel_crtc_state *crtc_state,
 65			    const struct drm_connector_state *conn_state);
 66void intel_edp_backlight_off(const struct drm_connector_state *conn_state);
 67void intel_edp_fixup_vbt_bpp(struct intel_encoder *encoder, int pipe_bpp);
 68void intel_dp_mst_suspend(struct drm_i915_private *dev_priv);
 69void intel_dp_mst_resume(struct drm_i915_private *dev_priv);
 70int intel_dp_max_link_rate(struct intel_dp *intel_dp);
 71int intel_dp_max_lane_count(struct intel_dp *intel_dp);
 72int intel_dp_rate_select(struct intel_dp *intel_dp, int rate);
 73
 74void intel_dp_compute_rate(struct intel_dp *intel_dp, int port_clock,
 75			   u8 *link_bw, u8 *rate_select);
 76bool intel_dp_source_supports_tps3(struct drm_i915_private *i915);
 77bool intel_dp_source_supports_tps4(struct drm_i915_private *i915);
 78
 79bool intel_dp_get_colorimetry_status(struct intel_dp *intel_dp);
 80int intel_dp_link_required(int pixel_clock, int bpp);
 81int intel_dp_max_data_rate(int max_link_rate, int max_lanes);
 82bool intel_dp_can_bigjoiner(struct intel_dp *intel_dp);
 83bool intel_dp_needs_vsc_sdp(const struct intel_crtc_state *crtc_state,
 84			    const struct drm_connector_state *conn_state);
 85void intel_dp_compute_psr_vsc_sdp(struct intel_dp *intel_dp,
 86				  const struct intel_crtc_state *crtc_state,
 87				  const struct drm_connector_state *conn_state,
 88				  struct drm_dp_vsc_sdp *vsc);
 89void intel_write_dp_vsc_sdp(struct intel_encoder *encoder,
 90			    const struct intel_crtc_state *crtc_state,
 91			    const struct drm_dp_vsc_sdp *vsc);
 92void intel_dp_set_infoframes(struct intel_encoder *encoder, bool enable,
 93			     const struct intel_crtc_state *crtc_state,
 94			     const struct drm_connector_state *conn_state);
 95void intel_read_dp_sdp(struct intel_encoder *encoder,
 96		       struct intel_crtc_state *crtc_state,
 97		       unsigned int type);
 98bool intel_digital_port_connected(struct intel_encoder *encoder);
 99
100static inline unsigned int intel_dp_unused_lane_mask(int lane_count)
101{
102	return ~((1 << lane_count) - 1) & 0xf;
103}
104
105u32 intel_dp_mode_to_fec_clock(u32 mode_clock);
106
107void intel_ddi_update_pipe(struct intel_atomic_state *state,
108			   struct intel_encoder *encoder,
109			   const struct intel_crtc_state *crtc_state,
110			   const struct drm_connector_state *conn_state);
111
112bool intel_dp_initial_fastset_check(struct intel_encoder *encoder,
113				    struct intel_crtc_state *crtc_state);
114void intel_dp_sync_state(struct intel_encoder *encoder,
115			 const struct intel_crtc_state *crtc_state);
116
117void intel_dp_check_frl_training(struct intel_dp *intel_dp);
118void intel_dp_pcon_dsc_configure(struct intel_dp *intel_dp,
119				 const struct intel_crtc_state *crtc_state);
120void intel_dp_phy_test(struct intel_encoder *encoder);
121
122void intel_dp_wait_source_oui(struct intel_dp *intel_dp);
123
124#endif /* __INTEL_DP_H__ */