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1// SPDX-License-Identifier: GPL-2.0
2/* smp.c: Sparc SMP support.
3 *
4 * Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu)
5 * Copyright (C) 1998 Jakub Jelinek (jj@sunsite.mff.cuni.cz)
6 * Copyright (C) 2004 Keith M Wesolowski (wesolows@foobazco.org)
7 */
8
9#include <asm/head.h>
10
11#include <linux/kernel.h>
12#include <linux/sched.h>
13#include <linux/threads.h>
14#include <linux/smp.h>
15#include <linux/interrupt.h>
16#include <linux/kernel_stat.h>
17#include <linux/init.h>
18#include <linux/spinlock.h>
19#include <linux/mm.h>
20#include <linux/fs.h>
21#include <linux/seq_file.h>
22#include <linux/cache.h>
23#include <linux/delay.h>
24#include <linux/profile.h>
25#include <linux/cpu.h>
26
27#include <asm/ptrace.h>
28#include <linux/atomic.h>
29
30#include <asm/irq.h>
31#include <asm/page.h>
32#include <asm/oplib.h>
33#include <asm/cacheflush.h>
34#include <asm/tlbflush.h>
35#include <asm/cpudata.h>
36#include <asm/timer.h>
37#include <asm/leon.h>
38
39#include "kernel.h"
40#include "irq.h"
41
42volatile unsigned long cpu_callin_map[NR_CPUS] = {0,};
43
44cpumask_t smp_commenced_mask = CPU_MASK_NONE;
45
46const struct sparc32_ipi_ops *sparc32_ipi_ops;
47
48/* The only guaranteed locking primitive available on all Sparc
49 * processors is 'ldstub [%reg + immediate], %dest_reg' which atomically
50 * places the current byte at the effective address into dest_reg and
51 * places 0xff there afterwards. Pretty lame locking primitive
52 * compared to the Alpha and the Intel no? Most Sparcs have 'swap'
53 * instruction which is much better...
54 */
55
56void smp_store_cpu_info(int id)
57{
58 int cpu_node;
59 int mid;
60
61 cpu_data(id).udelay_val = loops_per_jiffy;
62
63 cpu_find_by_mid(id, &cpu_node);
64 cpu_data(id).clock_tick = prom_getintdefault(cpu_node,
65 "clock-frequency", 0);
66 cpu_data(id).prom_node = cpu_node;
67 mid = cpu_get_hwmid(cpu_node);
68
69 if (mid < 0) {
70 printk(KERN_NOTICE "No MID found for CPU%d at node 0x%08x", id, cpu_node);
71 mid = 0;
72 }
73 cpu_data(id).mid = mid;
74}
75
76void __init smp_cpus_done(unsigned int max_cpus)
77{
78 unsigned long bogosum = 0;
79 int cpu, num = 0;
80
81 for_each_online_cpu(cpu) {
82 num++;
83 bogosum += cpu_data(cpu).udelay_val;
84 }
85
86 printk("Total of %d processors activated (%lu.%02lu BogoMIPS).\n",
87 num, bogosum/(500000/HZ),
88 (bogosum/(5000/HZ))%100);
89
90 switch(sparc_cpu_model) {
91 case sun4m:
92 smp4m_smp_done();
93 break;
94 case sun4d:
95 smp4d_smp_done();
96 break;
97 case sparc_leon:
98 leon_smp_done();
99 break;
100 case sun4e:
101 printk("SUN4E\n");
102 BUG();
103 break;
104 case sun4u:
105 printk("SUN4U\n");
106 BUG();
107 break;
108 default:
109 printk("UNKNOWN!\n");
110 BUG();
111 break;
112 }
113}
114
115void cpu_panic(void)
116{
117 printk("CPU[%d]: Returns from cpu_idle!\n", smp_processor_id());
118 panic("SMP bolixed\n");
119}
120
121struct linux_prom_registers smp_penguin_ctable = { 0 };
122
123void smp_send_reschedule(int cpu)
124{
125 /*
126 * CPU model dependent way of implementing IPI generation targeting
127 * a single CPU. The trap handler needs only to do trap entry/return
128 * to call schedule.
129 */
130 sparc32_ipi_ops->resched(cpu);
131}
132
133void smp_send_stop(void)
134{
135}
136
137void arch_send_call_function_single_ipi(int cpu)
138{
139 /* trigger one IPI single call on one CPU */
140 sparc32_ipi_ops->single(cpu);
141}
142
143void arch_send_call_function_ipi_mask(const struct cpumask *mask)
144{
145 int cpu;
146
147 /* trigger IPI mask call on each CPU */
148 for_each_cpu(cpu, mask)
149 sparc32_ipi_ops->mask_one(cpu);
150}
151
152void smp_resched_interrupt(void)
153{
154 irq_enter();
155 scheduler_ipi();
156 local_cpu_data().irq_resched_count++;
157 irq_exit();
158 /* re-schedule routine called by interrupt return code. */
159}
160
161void smp_call_function_single_interrupt(void)
162{
163 irq_enter();
164 generic_smp_call_function_single_interrupt();
165 local_cpu_data().irq_call_count++;
166 irq_exit();
167}
168
169void smp_call_function_interrupt(void)
170{
171 irq_enter();
172 generic_smp_call_function_interrupt();
173 local_cpu_data().irq_call_count++;
174 irq_exit();
175}
176
177void __init smp_prepare_cpus(unsigned int max_cpus)
178{
179 int i, cpuid, extra;
180
181 printk("Entering SMP Mode...\n");
182
183 extra = 0;
184 for (i = 0; !cpu_find_by_instance(i, NULL, &cpuid); i++) {
185 if (cpuid >= NR_CPUS)
186 extra++;
187 }
188 /* i = number of cpus */
189 if (extra && max_cpus > i - extra)
190 printk("Warning: NR_CPUS is too low to start all cpus\n");
191
192 smp_store_cpu_info(boot_cpu_id);
193
194 switch(sparc_cpu_model) {
195 case sun4m:
196 smp4m_boot_cpus();
197 break;
198 case sun4d:
199 smp4d_boot_cpus();
200 break;
201 case sparc_leon:
202 leon_boot_cpus();
203 break;
204 case sun4e:
205 printk("SUN4E\n");
206 BUG();
207 break;
208 case sun4u:
209 printk("SUN4U\n");
210 BUG();
211 break;
212 default:
213 printk("UNKNOWN!\n");
214 BUG();
215 break;
216 }
217}
218
219/* Set this up early so that things like the scheduler can init
220 * properly. We use the same cpu mask for both the present and
221 * possible cpu map.
222 */
223void __init smp_setup_cpu_possible_map(void)
224{
225 int instance, mid;
226
227 instance = 0;
228 while (!cpu_find_by_instance(instance, NULL, &mid)) {
229 if (mid < NR_CPUS) {
230 set_cpu_possible(mid, true);
231 set_cpu_present(mid, true);
232 }
233 instance++;
234 }
235}
236
237void __init smp_prepare_boot_cpu(void)
238{
239 int cpuid = hard_smp_processor_id();
240
241 if (cpuid >= NR_CPUS) {
242 prom_printf("Serious problem, boot cpu id >= NR_CPUS\n");
243 prom_halt();
244 }
245 if (cpuid != 0)
246 printk("boot cpu id != 0, this could work but is untested\n");
247
248 current_thread_info()->cpu = cpuid;
249 set_cpu_online(cpuid, true);
250 set_cpu_possible(cpuid, true);
251}
252
253int __cpu_up(unsigned int cpu, struct task_struct *tidle)
254{
255 int ret=0;
256
257 switch(sparc_cpu_model) {
258 case sun4m:
259 ret = smp4m_boot_one_cpu(cpu, tidle);
260 break;
261 case sun4d:
262 ret = smp4d_boot_one_cpu(cpu, tidle);
263 break;
264 case sparc_leon:
265 ret = leon_boot_one_cpu(cpu, tidle);
266 break;
267 case sun4e:
268 printk("SUN4E\n");
269 BUG();
270 break;
271 case sun4u:
272 printk("SUN4U\n");
273 BUG();
274 break;
275 default:
276 printk("UNKNOWN!\n");
277 BUG();
278 break;
279 }
280
281 if (!ret) {
282 cpumask_set_cpu(cpu, &smp_commenced_mask);
283 while (!cpu_online(cpu))
284 mb();
285 }
286 return ret;
287}
288
289static void arch_cpu_pre_starting(void *arg)
290{
291 local_ops->cache_all();
292 local_ops->tlb_all();
293
294 switch(sparc_cpu_model) {
295 case sun4m:
296 sun4m_cpu_pre_starting(arg);
297 break;
298 case sun4d:
299 sun4d_cpu_pre_starting(arg);
300 break;
301 case sparc_leon:
302 leon_cpu_pre_starting(arg);
303 break;
304 default:
305 BUG();
306 }
307}
308
309static void arch_cpu_pre_online(void *arg)
310{
311 unsigned int cpuid = hard_smp_processor_id();
312
313 register_percpu_ce(cpuid);
314
315 calibrate_delay();
316 smp_store_cpu_info(cpuid);
317
318 local_ops->cache_all();
319 local_ops->tlb_all();
320
321 switch(sparc_cpu_model) {
322 case sun4m:
323 sun4m_cpu_pre_online(arg);
324 break;
325 case sun4d:
326 sun4d_cpu_pre_online(arg);
327 break;
328 case sparc_leon:
329 leon_cpu_pre_online(arg);
330 break;
331 default:
332 BUG();
333 }
334}
335
336static void sparc_start_secondary(void *arg)
337{
338 unsigned int cpu;
339
340 /*
341 * SMP booting is extremely fragile in some architectures. So run
342 * the cpu initialization code first before anything else.
343 */
344 arch_cpu_pre_starting(arg);
345
346 cpu = smp_processor_id();
347
348 notify_cpu_starting(cpu);
349 arch_cpu_pre_online(arg);
350
351 /* Set the CPU in the cpu_online_mask */
352 set_cpu_online(cpu, true);
353
354 /* Enable local interrupts now */
355 local_irq_enable();
356
357 wmb();
358 cpu_startup_entry(CPUHP_AP_ONLINE_IDLE);
359
360 /* We should never reach here! */
361 BUG();
362}
363
364void smp_callin(void)
365{
366 sparc_start_secondary(NULL);
367}
368
369void smp_bogo(struct seq_file *m)
370{
371 int i;
372
373 for_each_online_cpu(i) {
374 seq_printf(m,
375 "Cpu%dBogo\t: %lu.%02lu\n",
376 i,
377 cpu_data(i).udelay_val/(500000/HZ),
378 (cpu_data(i).udelay_val/(5000/HZ))%100);
379 }
380}
381
382void smp_info(struct seq_file *m)
383{
384 int i;
385
386 seq_printf(m, "State:\n");
387 for_each_online_cpu(i)
388 seq_printf(m, "CPU%d\t\t: online\n", i);
389}
1/* smp.c: Sparc SMP support.
2 *
3 * Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu)
4 * Copyright (C) 1998 Jakub Jelinek (jj@sunsite.mff.cuni.cz)
5 * Copyright (C) 2004 Keith M Wesolowski (wesolows@foobazco.org)
6 */
7
8#include <asm/head.h>
9
10#include <linux/kernel.h>
11#include <linux/sched.h>
12#include <linux/threads.h>
13#include <linux/smp.h>
14#include <linux/interrupt.h>
15#include <linux/kernel_stat.h>
16#include <linux/init.h>
17#include <linux/spinlock.h>
18#include <linux/mm.h>
19#include <linux/fs.h>
20#include <linux/seq_file.h>
21#include <linux/cache.h>
22#include <linux/delay.h>
23
24#include <asm/ptrace.h>
25#include <linux/atomic.h>
26
27#include <asm/irq.h>
28#include <asm/page.h>
29#include <asm/pgalloc.h>
30#include <asm/pgtable.h>
31#include <asm/oplib.h>
32#include <asm/cacheflush.h>
33#include <asm/tlbflush.h>
34#include <asm/cpudata.h>
35#include <asm/leon.h>
36
37#include "irq.h"
38
39volatile unsigned long cpu_callin_map[NR_CPUS] __cpuinitdata = {0,};
40
41cpumask_t smp_commenced_mask = CPU_MASK_NONE;
42
43/* The only guaranteed locking primitive available on all Sparc
44 * processors is 'ldstub [%reg + immediate], %dest_reg' which atomically
45 * places the current byte at the effective address into dest_reg and
46 * places 0xff there afterwards. Pretty lame locking primitive
47 * compared to the Alpha and the Intel no? Most Sparcs have 'swap'
48 * instruction which is much better...
49 */
50
51void __cpuinit smp_store_cpu_info(int id)
52{
53 int cpu_node;
54 int mid;
55
56 cpu_data(id).udelay_val = loops_per_jiffy;
57
58 cpu_find_by_mid(id, &cpu_node);
59 cpu_data(id).clock_tick = prom_getintdefault(cpu_node,
60 "clock-frequency", 0);
61 cpu_data(id).prom_node = cpu_node;
62 mid = cpu_get_hwmid(cpu_node);
63
64 if (mid < 0) {
65 printk(KERN_NOTICE "No MID found for CPU%d at node 0x%08d", id, cpu_node);
66 mid = 0;
67 }
68 cpu_data(id).mid = mid;
69}
70
71void __init smp_cpus_done(unsigned int max_cpus)
72{
73 extern void smp4m_smp_done(void);
74 extern void smp4d_smp_done(void);
75 unsigned long bogosum = 0;
76 int cpu, num = 0;
77
78 for_each_online_cpu(cpu) {
79 num++;
80 bogosum += cpu_data(cpu).udelay_val;
81 }
82
83 printk("Total of %d processors activated (%lu.%02lu BogoMIPS).\n",
84 num, bogosum/(500000/HZ),
85 (bogosum/(5000/HZ))%100);
86
87 switch(sparc_cpu_model) {
88 case sun4:
89 printk("SUN4\n");
90 BUG();
91 break;
92 case sun4c:
93 printk("SUN4C\n");
94 BUG();
95 break;
96 case sun4m:
97 smp4m_smp_done();
98 break;
99 case sun4d:
100 smp4d_smp_done();
101 break;
102 case sparc_leon:
103 leon_smp_done();
104 break;
105 case sun4e:
106 printk("SUN4E\n");
107 BUG();
108 break;
109 case sun4u:
110 printk("SUN4U\n");
111 BUG();
112 break;
113 default:
114 printk("UNKNOWN!\n");
115 BUG();
116 break;
117 }
118}
119
120void cpu_panic(void)
121{
122 printk("CPU[%d]: Returns from cpu_idle!\n", smp_processor_id());
123 panic("SMP bolixed\n");
124}
125
126struct linux_prom_registers smp_penguin_ctable __cpuinitdata = { 0 };
127
128void smp_send_reschedule(int cpu)
129{
130 /*
131 * CPU model dependent way of implementing IPI generation targeting
132 * a single CPU. The trap handler needs only to do trap entry/return
133 * to call schedule.
134 */
135 BTFIXUP_CALL(smp_ipi_resched)(cpu);
136}
137
138void smp_send_stop(void)
139{
140}
141
142void arch_send_call_function_single_ipi(int cpu)
143{
144 /* trigger one IPI single call on one CPU */
145 BTFIXUP_CALL(smp_ipi_single)(cpu);
146}
147
148void arch_send_call_function_ipi_mask(const struct cpumask *mask)
149{
150 int cpu;
151
152 /* trigger IPI mask call on each CPU */
153 for_each_cpu(cpu, mask)
154 BTFIXUP_CALL(smp_ipi_mask_one)(cpu);
155}
156
157void smp_resched_interrupt(void)
158{
159 irq_enter();
160 scheduler_ipi();
161 local_cpu_data().irq_resched_count++;
162 irq_exit();
163 /* re-schedule routine called by interrupt return code. */
164}
165
166void smp_call_function_single_interrupt(void)
167{
168 irq_enter();
169 generic_smp_call_function_single_interrupt();
170 local_cpu_data().irq_call_count++;
171 irq_exit();
172}
173
174void smp_call_function_interrupt(void)
175{
176 irq_enter();
177 generic_smp_call_function_interrupt();
178 local_cpu_data().irq_call_count++;
179 irq_exit();
180}
181
182void smp_flush_cache_all(void)
183{
184 xc0((smpfunc_t) BTFIXUP_CALL(local_flush_cache_all));
185 local_flush_cache_all();
186}
187
188void smp_flush_tlb_all(void)
189{
190 xc0((smpfunc_t) BTFIXUP_CALL(local_flush_tlb_all));
191 local_flush_tlb_all();
192}
193
194void smp_flush_cache_mm(struct mm_struct *mm)
195{
196 if(mm->context != NO_CONTEXT) {
197 cpumask_t cpu_mask;
198 cpumask_copy(&cpu_mask, mm_cpumask(mm));
199 cpumask_clear_cpu(smp_processor_id(), &cpu_mask);
200 if (!cpumask_empty(&cpu_mask))
201 xc1((smpfunc_t) BTFIXUP_CALL(local_flush_cache_mm), (unsigned long) mm);
202 local_flush_cache_mm(mm);
203 }
204}
205
206void smp_flush_tlb_mm(struct mm_struct *mm)
207{
208 if(mm->context != NO_CONTEXT) {
209 cpumask_t cpu_mask;
210 cpumask_copy(&cpu_mask, mm_cpumask(mm));
211 cpumask_clear_cpu(smp_processor_id(), &cpu_mask);
212 if (!cpumask_empty(&cpu_mask)) {
213 xc1((smpfunc_t) BTFIXUP_CALL(local_flush_tlb_mm), (unsigned long) mm);
214 if(atomic_read(&mm->mm_users) == 1 && current->active_mm == mm)
215 cpumask_copy(mm_cpumask(mm),
216 cpumask_of(smp_processor_id()));
217 }
218 local_flush_tlb_mm(mm);
219 }
220}
221
222void smp_flush_cache_range(struct vm_area_struct *vma, unsigned long start,
223 unsigned long end)
224{
225 struct mm_struct *mm = vma->vm_mm;
226
227 if (mm->context != NO_CONTEXT) {
228 cpumask_t cpu_mask;
229 cpumask_copy(&cpu_mask, mm_cpumask(mm));
230 cpumask_clear_cpu(smp_processor_id(), &cpu_mask);
231 if (!cpumask_empty(&cpu_mask))
232 xc3((smpfunc_t) BTFIXUP_CALL(local_flush_cache_range), (unsigned long) vma, start, end);
233 local_flush_cache_range(vma, start, end);
234 }
235}
236
237void smp_flush_tlb_range(struct vm_area_struct *vma, unsigned long start,
238 unsigned long end)
239{
240 struct mm_struct *mm = vma->vm_mm;
241
242 if (mm->context != NO_CONTEXT) {
243 cpumask_t cpu_mask;
244 cpumask_copy(&cpu_mask, mm_cpumask(mm));
245 cpumask_clear_cpu(smp_processor_id(), &cpu_mask);
246 if (!cpumask_empty(&cpu_mask))
247 xc3((smpfunc_t) BTFIXUP_CALL(local_flush_tlb_range), (unsigned long) vma, start, end);
248 local_flush_tlb_range(vma, start, end);
249 }
250}
251
252void smp_flush_cache_page(struct vm_area_struct *vma, unsigned long page)
253{
254 struct mm_struct *mm = vma->vm_mm;
255
256 if(mm->context != NO_CONTEXT) {
257 cpumask_t cpu_mask;
258 cpumask_copy(&cpu_mask, mm_cpumask(mm));
259 cpumask_clear_cpu(smp_processor_id(), &cpu_mask);
260 if (!cpumask_empty(&cpu_mask))
261 xc2((smpfunc_t) BTFIXUP_CALL(local_flush_cache_page), (unsigned long) vma, page);
262 local_flush_cache_page(vma, page);
263 }
264}
265
266void smp_flush_tlb_page(struct vm_area_struct *vma, unsigned long page)
267{
268 struct mm_struct *mm = vma->vm_mm;
269
270 if(mm->context != NO_CONTEXT) {
271 cpumask_t cpu_mask;
272 cpumask_copy(&cpu_mask, mm_cpumask(mm));
273 cpumask_clear_cpu(smp_processor_id(), &cpu_mask);
274 if (!cpumask_empty(&cpu_mask))
275 xc2((smpfunc_t) BTFIXUP_CALL(local_flush_tlb_page), (unsigned long) vma, page);
276 local_flush_tlb_page(vma, page);
277 }
278}
279
280void smp_flush_page_to_ram(unsigned long page)
281{
282 /* Current theory is that those who call this are the one's
283 * who have just dirtied their cache with the pages contents
284 * in kernel space, therefore we only run this on local cpu.
285 *
286 * XXX This experiment failed, research further... -DaveM
287 */
288#if 1
289 xc1((smpfunc_t) BTFIXUP_CALL(local_flush_page_to_ram), page);
290#endif
291 local_flush_page_to_ram(page);
292}
293
294void smp_flush_sig_insns(struct mm_struct *mm, unsigned long insn_addr)
295{
296 cpumask_t cpu_mask;
297 cpumask_copy(&cpu_mask, mm_cpumask(mm));
298 cpumask_clear_cpu(smp_processor_id(), &cpu_mask);
299 if (!cpumask_empty(&cpu_mask))
300 xc2((smpfunc_t) BTFIXUP_CALL(local_flush_sig_insns), (unsigned long) mm, insn_addr);
301 local_flush_sig_insns(mm, insn_addr);
302}
303
304extern unsigned int lvl14_resolution;
305
306/* /proc/profile writes can call this, don't __init it please. */
307static DEFINE_SPINLOCK(prof_setup_lock);
308
309int setup_profiling_timer(unsigned int multiplier)
310{
311 int i;
312 unsigned long flags;
313
314 /* Prevent level14 ticker IRQ flooding. */
315 if((!multiplier) || (lvl14_resolution / multiplier) < 500)
316 return -EINVAL;
317
318 spin_lock_irqsave(&prof_setup_lock, flags);
319 for_each_possible_cpu(i) {
320 load_profile_irq(i, lvl14_resolution / multiplier);
321 prof_multiplier(i) = multiplier;
322 }
323 spin_unlock_irqrestore(&prof_setup_lock, flags);
324
325 return 0;
326}
327
328void __init smp_prepare_cpus(unsigned int max_cpus)
329{
330 extern void __init smp4m_boot_cpus(void);
331 extern void __init smp4d_boot_cpus(void);
332 int i, cpuid, extra;
333
334 printk("Entering SMP Mode...\n");
335
336 extra = 0;
337 for (i = 0; !cpu_find_by_instance(i, NULL, &cpuid); i++) {
338 if (cpuid >= NR_CPUS)
339 extra++;
340 }
341 /* i = number of cpus */
342 if (extra && max_cpus > i - extra)
343 printk("Warning: NR_CPUS is too low to start all cpus\n");
344
345 smp_store_cpu_info(boot_cpu_id);
346
347 switch(sparc_cpu_model) {
348 case sun4:
349 printk("SUN4\n");
350 BUG();
351 break;
352 case sun4c:
353 printk("SUN4C\n");
354 BUG();
355 break;
356 case sun4m:
357 smp4m_boot_cpus();
358 break;
359 case sun4d:
360 smp4d_boot_cpus();
361 break;
362 case sparc_leon:
363 leon_boot_cpus();
364 break;
365 case sun4e:
366 printk("SUN4E\n");
367 BUG();
368 break;
369 case sun4u:
370 printk("SUN4U\n");
371 BUG();
372 break;
373 default:
374 printk("UNKNOWN!\n");
375 BUG();
376 break;
377 }
378}
379
380/* Set this up early so that things like the scheduler can init
381 * properly. We use the same cpu mask for both the present and
382 * possible cpu map.
383 */
384void __init smp_setup_cpu_possible_map(void)
385{
386 int instance, mid;
387
388 instance = 0;
389 while (!cpu_find_by_instance(instance, NULL, &mid)) {
390 if (mid < NR_CPUS) {
391 set_cpu_possible(mid, true);
392 set_cpu_present(mid, true);
393 }
394 instance++;
395 }
396}
397
398void __init smp_prepare_boot_cpu(void)
399{
400 int cpuid = hard_smp_processor_id();
401
402 if (cpuid >= NR_CPUS) {
403 prom_printf("Serious problem, boot cpu id >= NR_CPUS\n");
404 prom_halt();
405 }
406 if (cpuid != 0)
407 printk("boot cpu id != 0, this could work but is untested\n");
408
409 current_thread_info()->cpu = cpuid;
410 set_cpu_online(cpuid, true);
411 set_cpu_possible(cpuid, true);
412}
413
414int __cpuinit __cpu_up(unsigned int cpu)
415{
416 extern int __cpuinit smp4m_boot_one_cpu(int);
417 extern int __cpuinit smp4d_boot_one_cpu(int);
418 int ret=0;
419
420 switch(sparc_cpu_model) {
421 case sun4:
422 printk("SUN4\n");
423 BUG();
424 break;
425 case sun4c:
426 printk("SUN4C\n");
427 BUG();
428 break;
429 case sun4m:
430 ret = smp4m_boot_one_cpu(cpu);
431 break;
432 case sun4d:
433 ret = smp4d_boot_one_cpu(cpu);
434 break;
435 case sparc_leon:
436 ret = leon_boot_one_cpu(cpu);
437 break;
438 case sun4e:
439 printk("SUN4E\n");
440 BUG();
441 break;
442 case sun4u:
443 printk("SUN4U\n");
444 BUG();
445 break;
446 default:
447 printk("UNKNOWN!\n");
448 BUG();
449 break;
450 }
451
452 if (!ret) {
453 cpumask_set_cpu(cpu, &smp_commenced_mask);
454 while (!cpu_online(cpu))
455 mb();
456 }
457 return ret;
458}
459
460void smp_bogo(struct seq_file *m)
461{
462 int i;
463
464 for_each_online_cpu(i) {
465 seq_printf(m,
466 "Cpu%dBogo\t: %lu.%02lu\n",
467 i,
468 cpu_data(i).udelay_val/(500000/HZ),
469 (cpu_data(i).udelay_val/(5000/HZ))%100);
470 }
471}
472
473void smp_info(struct seq_file *m)
474{
475 int i;
476
477 seq_printf(m, "State:\n");
478 for_each_online_cpu(i)
479 seq_printf(m, "CPU%d\t\t: online\n", i);
480}