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1/* SPDX-License-Identifier: GPL-2.0 */
2/*
3 * Copyright IBM Corp. 1999, 2012
4 * Author(s): Hartmut Penner <hp@de.ibm.com>,
5 * Martin Schwidefsky <schwidefsky@de.ibm.com>,
6 * Denis Joseph Barrow,
7 */
8
9#ifndef _ASM_S390_LOWCORE_H
10#define _ASM_S390_LOWCORE_H
11
12#include <linux/types.h>
13#include <asm/ptrace.h>
14#include <asm/cpu.h>
15#include <asm/types.h>
16
17#define LC_ORDER 1
18#define LC_PAGES 2
19
20struct pgm_tdb {
21 u64 data[32];
22};
23
24struct lowcore {
25 __u8 pad_0x0000[0x0014-0x0000]; /* 0x0000 */
26 __u32 ipl_parmblock_ptr; /* 0x0014 */
27 __u8 pad_0x0018[0x0080-0x0018]; /* 0x0018 */
28 __u32 ext_params; /* 0x0080 */
29 union {
30 struct {
31 __u16 ext_cpu_addr; /* 0x0084 */
32 __u16 ext_int_code; /* 0x0086 */
33 };
34 __u32 ext_int_code_addr;
35 };
36 __u32 svc_int_code; /* 0x0088 */
37 union {
38 struct {
39 __u16 pgm_ilc; /* 0x008c */
40 __u16 pgm_code; /* 0x008e */
41 };
42 __u32 pgm_int_code;
43 };
44 __u32 data_exc_code; /* 0x0090 */
45 __u16 mon_class_num; /* 0x0094 */
46 union {
47 struct {
48 __u8 per_code; /* 0x0096 */
49 __u8 per_atmid; /* 0x0097 */
50 };
51 __u16 per_code_combined;
52 };
53 __u64 per_address; /* 0x0098 */
54 __u8 exc_access_id; /* 0x00a0 */
55 __u8 per_access_id; /* 0x00a1 */
56 __u8 op_access_id; /* 0x00a2 */
57 __u8 ar_mode_id; /* 0x00a3 */
58 __u8 pad_0x00a4[0x00a8-0x00a4]; /* 0x00a4 */
59 __u64 trans_exc_code; /* 0x00a8 */
60 __u64 monitor_code; /* 0x00b0 */
61 union {
62 struct {
63 __u16 subchannel_id; /* 0x00b8 */
64 __u16 subchannel_nr; /* 0x00ba */
65 __u32 io_int_parm; /* 0x00bc */
66 __u32 io_int_word; /* 0x00c0 */
67 };
68 struct tpi_info tpi_info; /* 0x00b8 */
69 };
70 __u8 pad_0x00c4[0x00c8-0x00c4]; /* 0x00c4 */
71 __u32 stfl_fac_list; /* 0x00c8 */
72 __u8 pad_0x00cc[0x00e8-0x00cc]; /* 0x00cc */
73 __u64 mcck_interruption_code; /* 0x00e8 */
74 __u8 pad_0x00f0[0x00f4-0x00f0]; /* 0x00f0 */
75 __u32 external_damage_code; /* 0x00f4 */
76 __u64 failing_storage_address; /* 0x00f8 */
77 __u8 pad_0x0100[0x0110-0x0100]; /* 0x0100 */
78 __u64 pgm_last_break; /* 0x0110 */
79 __u8 pad_0x0118[0x0120-0x0118]; /* 0x0118 */
80 psw_t restart_old_psw; /* 0x0120 */
81 psw_t external_old_psw; /* 0x0130 */
82 psw_t svc_old_psw; /* 0x0140 */
83 psw_t program_old_psw; /* 0x0150 */
84 psw_t mcck_old_psw; /* 0x0160 */
85 psw_t io_old_psw; /* 0x0170 */
86 __u8 pad_0x0180[0x01a0-0x0180]; /* 0x0180 */
87 psw_t restart_psw; /* 0x01a0 */
88 psw_t external_new_psw; /* 0x01b0 */
89 psw_t svc_new_psw; /* 0x01c0 */
90 psw_t program_new_psw; /* 0x01d0 */
91 psw_t mcck_new_psw; /* 0x01e0 */
92 psw_t io_new_psw; /* 0x01f0 */
93
94 /* Save areas. */
95 __u64 save_area_sync[8]; /* 0x0200 */
96 __u64 save_area_async[8]; /* 0x0240 */
97 __u64 save_area_restart[1]; /* 0x0280 */
98
99 /* CPU flags. */
100 __u64 cpu_flags; /* 0x0288 */
101
102 /* Return psws. */
103 psw_t return_psw; /* 0x0290 */
104 psw_t return_mcck_psw; /* 0x02a0 */
105
106 __u64 last_break; /* 0x02b0 */
107
108 /* CPU accounting and timing values. */
109 __u64 sys_enter_timer; /* 0x02b8 */
110 __u64 mcck_enter_timer; /* 0x02c0 */
111 __u64 exit_timer; /* 0x02c8 */
112 __u64 user_timer; /* 0x02d0 */
113 __u64 guest_timer; /* 0x02d8 */
114 __u64 system_timer; /* 0x02e0 */
115 __u64 hardirq_timer; /* 0x02e8 */
116 __u64 softirq_timer; /* 0x02f0 */
117 __u64 steal_timer; /* 0x02f8 */
118 __u64 avg_steal_timer; /* 0x0300 */
119 __u64 last_update_timer; /* 0x0308 */
120 __u64 last_update_clock; /* 0x0310 */
121 __u64 int_clock; /* 0x0318*/
122 __u64 mcck_clock; /* 0x0320 */
123 __u64 clock_comparator; /* 0x0328 */
124 __u64 boot_clock[2]; /* 0x0330 */
125
126 /* Current process. */
127 __u64 current_task; /* 0x0340 */
128 __u64 kernel_stack; /* 0x0348 */
129
130 /* Interrupt, DAT-off and restartstack. */
131 __u64 async_stack; /* 0x0350 */
132 __u64 nodat_stack; /* 0x0358 */
133 __u64 restart_stack; /* 0x0360 */
134 __u64 mcck_stack; /* 0x0368 */
135 /* Restart function and parameter. */
136 __u64 restart_fn; /* 0x0370 */
137 __u64 restart_data; /* 0x0378 */
138 __u32 restart_source; /* 0x0380 */
139 __u32 restart_flags; /* 0x0384 */
140
141 /* Address space pointer. */
142 __u64 kernel_asce; /* 0x0388 */
143 __u64 user_asce; /* 0x0390 */
144
145 /*
146 * The lpp and current_pid fields form a
147 * 64-bit value that is set as program
148 * parameter with the LPP instruction.
149 */
150 __u32 lpp; /* 0x0398 */
151 __u32 current_pid; /* 0x039c */
152
153 /* SMP info area */
154 __u32 cpu_nr; /* 0x03a0 */
155 __u32 softirq_pending; /* 0x03a4 */
156 __s32 preempt_count; /* 0x03a8 */
157 __u32 spinlock_lockval; /* 0x03ac */
158 __u32 spinlock_index; /* 0x03b0 */
159 __u32 fpu_flags; /* 0x03b4 */
160 __u64 percpu_offset; /* 0x03b8 */
161 __u8 pad_0x03c0[0x03c8-0x03c0]; /* 0x03c0 */
162 __u64 machine_flags; /* 0x03c8 */
163 __u64 gmap; /* 0x03d0 */
164 __u8 pad_0x03d8[0x0400-0x03d8]; /* 0x03d8 */
165
166 __u32 return_lpswe; /* 0x0400 */
167 __u32 return_mcck_lpswe; /* 0x0404 */
168 __u8 pad_0x040a[0x0e00-0x0408]; /* 0x0408 */
169
170 /*
171 * 0xe00 contains the address of the IPL Parameter Information
172 * block. Dump tools need IPIB for IPL after dump.
173 * Note: do not change the position of any fields in 0x0e00-0x0f00
174 */
175 __u64 ipib; /* 0x0e00 */
176 __u32 ipib_checksum; /* 0x0e08 */
177 __u64 vmcore_info; /* 0x0e0c */
178 __u8 pad_0x0e14[0x0e18-0x0e14]; /* 0x0e14 */
179 __u64 os_info; /* 0x0e18 */
180 __u8 pad_0x0e20[0x11b0-0x0e20]; /* 0x0e20 */
181
182 /* Pointer to the machine check extended save area */
183 __u64 mcesad; /* 0x11b0 */
184
185 /* 64 bit extparam used for pfault/diag 250: defined by architecture */
186 __u64 ext_params2; /* 0x11B8 */
187 __u8 pad_0x11c0[0x1200-0x11C0]; /* 0x11C0 */
188
189 /* CPU register save area: defined by architecture */
190 __u64 floating_pt_save_area[16]; /* 0x1200 */
191 __u64 gpregs_save_area[16]; /* 0x1280 */
192 psw_t psw_save_area; /* 0x1300 */
193 __u8 pad_0x1310[0x1318-0x1310]; /* 0x1310 */
194 __u32 prefixreg_save_area; /* 0x1318 */
195 __u32 fpt_creg_save_area; /* 0x131c */
196 __u8 pad_0x1320[0x1324-0x1320]; /* 0x1320 */
197 __u32 tod_progreg_save_area; /* 0x1324 */
198 __u32 cpu_timer_save_area[2]; /* 0x1328 */
199 __u32 clock_comp_save_area[2]; /* 0x1330 */
200 __u64 last_break_save_area; /* 0x1338 */
201 __u32 access_regs_save_area[16]; /* 0x1340 */
202 __u64 cregs_save_area[16]; /* 0x1380 */
203 __u8 pad_0x1400[0x1500-0x1400]; /* 0x1400 */
204 /* Cryptography-counter designation */
205 __u64 ccd; /* 0x1500 */
206 /* AI-extension counter designation */
207 __u64 aicd; /* 0x1508 */
208 __u8 pad_0x1510[0x1800-0x1510]; /* 0x1510 */
209
210 /* Transaction abort diagnostic block */
211 struct pgm_tdb pgm_tdb; /* 0x1800 */
212 __u8 pad_0x1900[0x2000-0x1900]; /* 0x1900 */
213} __packed __aligned(8192);
214
215#define S390_lowcore (*((struct lowcore *) 0))
216
217extern struct lowcore *lowcore_ptr[];
218
219static inline void set_prefix(__u32 address)
220{
221 asm volatile("spx %0" : : "Q" (address) : "memory");
222}
223
224static inline __u32 store_prefix(void)
225{
226 __u32 address;
227
228 asm volatile("stpx %0" : "=Q" (address));
229 return address;
230}
231
232#endif /* _ASM_S390_LOWCORE_H */
1/*
2 * Copyright IBM Corp. 1999,2010
3 * Author(s): Hartmut Penner <hp@de.ibm.com>,
4 * Martin Schwidefsky <schwidefsky@de.ibm.com>,
5 * Denis Joseph Barrow,
6 */
7
8#ifndef _ASM_S390_LOWCORE_H
9#define _ASM_S390_LOWCORE_H
10
11#include <linux/types.h>
12#include <asm/ptrace.h>
13#include <asm/cpu.h>
14
15void restart_int_handler(void);
16void ext_int_handler(void);
17void system_call(void);
18void pgm_check_handler(void);
19void mcck_int_handler(void);
20void io_int_handler(void);
21void psw_restart_int_handler(void);
22
23#ifdef CONFIG_32BIT
24
25#define LC_ORDER 0
26#define LC_PAGES 1
27
28struct save_area {
29 u32 ext_save;
30 u64 timer;
31 u64 clk_cmp;
32 u8 pad1[24];
33 u8 psw[8];
34 u32 pref_reg;
35 u8 pad2[20];
36 u32 acc_regs[16];
37 u64 fp_regs[4];
38 u32 gp_regs[16];
39 u32 ctrl_regs[16];
40} __packed;
41
42struct _lowcore {
43 psw_t restart_psw; /* 0x0000 */
44 psw_t restart_old_psw; /* 0x0008 */
45 __u8 pad_0x0010[0x0014-0x0010]; /* 0x0010 */
46 __u32 ipl_parmblock_ptr; /* 0x0014 */
47 psw_t external_old_psw; /* 0x0018 */
48 psw_t svc_old_psw; /* 0x0020 */
49 psw_t program_old_psw; /* 0x0028 */
50 psw_t mcck_old_psw; /* 0x0030 */
51 psw_t io_old_psw; /* 0x0038 */
52 __u8 pad_0x0040[0x0058-0x0040]; /* 0x0040 */
53 psw_t external_new_psw; /* 0x0058 */
54 psw_t svc_new_psw; /* 0x0060 */
55 psw_t program_new_psw; /* 0x0068 */
56 psw_t mcck_new_psw; /* 0x0070 */
57 psw_t io_new_psw; /* 0x0078 */
58 __u32 ext_params; /* 0x0080 */
59 __u16 cpu_addr; /* 0x0084 */
60 __u16 ext_int_code; /* 0x0086 */
61 __u16 svc_ilc; /* 0x0088 */
62 __u16 svc_code; /* 0x008a */
63 __u16 pgm_ilc; /* 0x008c */
64 __u16 pgm_code; /* 0x008e */
65 __u32 trans_exc_code; /* 0x0090 */
66 __u16 mon_class_num; /* 0x0094 */
67 __u16 per_perc_atmid; /* 0x0096 */
68 __u32 per_address; /* 0x0098 */
69 __u32 monitor_code; /* 0x009c */
70 __u8 exc_access_id; /* 0x00a0 */
71 __u8 per_access_id; /* 0x00a1 */
72 __u8 op_access_id; /* 0x00a2 */
73 __u8 ar_access_id; /* 0x00a3 */
74 __u8 pad_0x00a4[0x00b8-0x00a4]; /* 0x00a4 */
75 __u16 subchannel_id; /* 0x00b8 */
76 __u16 subchannel_nr; /* 0x00ba */
77 __u32 io_int_parm; /* 0x00bc */
78 __u32 io_int_word; /* 0x00c0 */
79 __u8 pad_0x00c4[0x00c8-0x00c4]; /* 0x00c4 */
80 __u32 stfl_fac_list; /* 0x00c8 */
81 __u8 pad_0x00cc[0x00d4-0x00cc]; /* 0x00cc */
82 __u32 extended_save_area_addr; /* 0x00d4 */
83 __u32 cpu_timer_save_area[2]; /* 0x00d8 */
84 __u32 clock_comp_save_area[2]; /* 0x00e0 */
85 __u32 mcck_interruption_code[2]; /* 0x00e8 */
86 __u8 pad_0x00f0[0x00f4-0x00f0]; /* 0x00f0 */
87 __u32 external_damage_code; /* 0x00f4 */
88 __u32 failing_storage_address; /* 0x00f8 */
89 __u8 pad_0x00fc[0x0100-0x00fc]; /* 0x00fc */
90 psw_t psw_save_area; /* 0x0100 */
91 __u32 prefixreg_save_area; /* 0x0108 */
92 __u8 pad_0x010c[0x0120-0x010c]; /* 0x010c */
93
94 /* CPU register save area: defined by architecture */
95 __u32 access_regs_save_area[16]; /* 0x0120 */
96 __u32 floating_pt_save_area[8]; /* 0x0160 */
97 __u32 gpregs_save_area[16]; /* 0x0180 */
98 __u32 cregs_save_area[16]; /* 0x01c0 */
99
100 /* Return psws. */
101 __u32 save_area[16]; /* 0x0200 */
102 psw_t return_psw; /* 0x0240 */
103 psw_t return_mcck_psw; /* 0x0248 */
104
105 /* CPU time accounting values */
106 __u64 sync_enter_timer; /* 0x0250 */
107 __u64 async_enter_timer; /* 0x0258 */
108 __u64 mcck_enter_timer; /* 0x0260 */
109 __u64 exit_timer; /* 0x0268 */
110 __u64 user_timer; /* 0x0270 */
111 __u64 system_timer; /* 0x0278 */
112 __u64 steal_timer; /* 0x0280 */
113 __u64 last_update_timer; /* 0x0288 */
114 __u64 last_update_clock; /* 0x0290 */
115
116 /* Current process. */
117 __u32 current_task; /* 0x0298 */
118 __u32 thread_info; /* 0x029c */
119 __u32 kernel_stack; /* 0x02a0 */
120
121 /* Interrupt and panic stack. */
122 __u32 async_stack; /* 0x02a4 */
123 __u32 panic_stack; /* 0x02a8 */
124
125 /* Address space pointer. */
126 __u32 kernel_asce; /* 0x02ac */
127 __u32 user_asce; /* 0x02b0 */
128 __u32 current_pid; /* 0x02b4 */
129
130 /* SMP info area */
131 __u32 cpu_nr; /* 0x02b8 */
132 __u32 softirq_pending; /* 0x02bc */
133 __u32 percpu_offset; /* 0x02c0 */
134 __u32 ext_call_fast; /* 0x02c4 */
135 __u64 int_clock; /* 0x02c8 */
136 __u64 mcck_clock; /* 0x02d0 */
137 __u64 clock_comparator; /* 0x02d8 */
138 __u32 machine_flags; /* 0x02e0 */
139 __u32 ftrace_func; /* 0x02e4 */
140 __u8 pad_0x02e8[0x0300-0x02e8]; /* 0x02e8 */
141
142 /* Interrupt response block */
143 __u8 irb[64]; /* 0x0300 */
144
145 __u8 pad_0x0340[0x0e00-0x0340]; /* 0x0340 */
146
147 /*
148 * 0xe00 contains the address of the IPL Parameter Information
149 * block. Dump tools need IPIB for IPL after dump.
150 * Note: do not change the position of any fields in 0x0e00-0x0f00
151 */
152 __u32 ipib; /* 0x0e00 */
153 __u32 ipib_checksum; /* 0x0e04 */
154
155 /* 64 bit save area */
156 __u64 save_area_64; /* 0x0e08 */
157 __u8 pad_0x0e10[0x0f00-0x0e10]; /* 0x0e10 */
158
159 /* Extended facility list */
160 __u64 stfle_fac_list[32]; /* 0x0f00 */
161} __packed;
162
163#else /* CONFIG_32BIT */
164
165#define LC_ORDER 1
166#define LC_PAGES 2
167
168struct save_area {
169 u64 fp_regs[16];
170 u64 gp_regs[16];
171 u8 psw[16];
172 u8 pad1[8];
173 u32 pref_reg;
174 u32 fp_ctrl_reg;
175 u8 pad2[4];
176 u32 tod_reg;
177 u64 timer;
178 u64 clk_cmp;
179 u8 pad3[8];
180 u32 acc_regs[16];
181 u64 ctrl_regs[16];
182} __packed;
183
184struct _lowcore {
185 __u8 pad_0x0000[0x0014-0x0000]; /* 0x0000 */
186 __u32 ipl_parmblock_ptr; /* 0x0014 */
187 __u8 pad_0x0018[0x0080-0x0018]; /* 0x0018 */
188 __u32 ext_params; /* 0x0080 */
189 __u16 cpu_addr; /* 0x0084 */
190 __u16 ext_int_code; /* 0x0086 */
191 __u16 svc_ilc; /* 0x0088 */
192 __u16 svc_code; /* 0x008a */
193 __u16 pgm_ilc; /* 0x008c */
194 __u16 pgm_code; /* 0x008e */
195 __u32 data_exc_code; /* 0x0090 */
196 __u16 mon_class_num; /* 0x0094 */
197 __u16 per_perc_atmid; /* 0x0096 */
198 __u64 per_address; /* 0x0098 */
199 __u8 exc_access_id; /* 0x00a0 */
200 __u8 per_access_id; /* 0x00a1 */
201 __u8 op_access_id; /* 0x00a2 */
202 __u8 ar_access_id; /* 0x00a3 */
203 __u8 pad_0x00a4[0x00a8-0x00a4]; /* 0x00a4 */
204 __u64 trans_exc_code; /* 0x00a8 */
205 __u64 monitor_code; /* 0x00b0 */
206 __u16 subchannel_id; /* 0x00b8 */
207 __u16 subchannel_nr; /* 0x00ba */
208 __u32 io_int_parm; /* 0x00bc */
209 __u32 io_int_word; /* 0x00c0 */
210 __u8 pad_0x00c4[0x00c8-0x00c4]; /* 0x00c4 */
211 __u32 stfl_fac_list; /* 0x00c8 */
212 __u8 pad_0x00cc[0x00e8-0x00cc]; /* 0x00cc */
213 __u32 mcck_interruption_code[2]; /* 0x00e8 */
214 __u8 pad_0x00f0[0x00f4-0x00f0]; /* 0x00f0 */
215 __u32 external_damage_code; /* 0x00f4 */
216 __u64 failing_storage_address; /* 0x00f8 */
217 __u8 pad_0x0100[0x0110-0x0100]; /* 0x0100 */
218 __u64 breaking_event_addr; /* 0x0110 */
219 __u8 pad_0x0118[0x0120-0x0118]; /* 0x0118 */
220 psw_t restart_old_psw; /* 0x0120 */
221 psw_t external_old_psw; /* 0x0130 */
222 psw_t svc_old_psw; /* 0x0140 */
223 psw_t program_old_psw; /* 0x0150 */
224 psw_t mcck_old_psw; /* 0x0160 */
225 psw_t io_old_psw; /* 0x0170 */
226 __u8 pad_0x0180[0x01a0-0x0180]; /* 0x0180 */
227 psw_t restart_psw; /* 0x01a0 */
228 psw_t external_new_psw; /* 0x01b0 */
229 psw_t svc_new_psw; /* 0x01c0 */
230 psw_t program_new_psw; /* 0x01d0 */
231 psw_t mcck_new_psw; /* 0x01e0 */
232 psw_t io_new_psw; /* 0x01f0 */
233
234 /* Entry/exit save area & return psws. */
235 __u64 save_area[16]; /* 0x0200 */
236 psw_t return_psw; /* 0x0280 */
237 psw_t return_mcck_psw; /* 0x0290 */
238
239 /* CPU accounting and timing values. */
240 __u64 sync_enter_timer; /* 0x02a0 */
241 __u64 async_enter_timer; /* 0x02a8 */
242 __u64 mcck_enter_timer; /* 0x02b0 */
243 __u64 exit_timer; /* 0x02b8 */
244 __u64 user_timer; /* 0x02c0 */
245 __u64 system_timer; /* 0x02c8 */
246 __u64 steal_timer; /* 0x02d0 */
247 __u64 last_update_timer; /* 0x02d8 */
248 __u64 last_update_clock; /* 0x02e0 */
249
250 /* Current process. */
251 __u64 current_task; /* 0x02e8 */
252 __u64 thread_info; /* 0x02f0 */
253 __u64 kernel_stack; /* 0x02f8 */
254
255 /* Interrupt and panic stack. */
256 __u64 async_stack; /* 0x0300 */
257 __u64 panic_stack; /* 0x0308 */
258
259 /* Address space pointer. */
260 __u64 kernel_asce; /* 0x0310 */
261 __u64 user_asce; /* 0x0318 */
262 __u64 current_pid; /* 0x0320 */
263
264 /* SMP info area */
265 __u32 cpu_nr; /* 0x0328 */
266 __u32 softirq_pending; /* 0x032c */
267 __u64 percpu_offset; /* 0x0330 */
268 __u64 ext_call_fast; /* 0x0338 */
269 __u64 int_clock; /* 0x0340 */
270 __u64 mcck_clock; /* 0x0348 */
271 __u64 clock_comparator; /* 0x0350 */
272 __u64 vdso_per_cpu_data; /* 0x0358 */
273 __u64 machine_flags; /* 0x0360 */
274 __u64 ftrace_func; /* 0x0368 */
275 __u64 gmap; /* 0x0370 */
276 __u64 cmf_hpp; /* 0x0378 */
277
278 /* Interrupt response block. */
279 __u8 irb[64]; /* 0x0380 */
280
281 /* Per cpu primary space access list */
282 __u32 paste[16]; /* 0x03c0 */
283
284 __u8 pad_0x0400[0x0e00-0x0400]; /* 0x0400 */
285
286 /*
287 * 0xe00 contains the address of the IPL Parameter Information
288 * block. Dump tools need IPIB for IPL after dump.
289 * Note: do not change the position of any fields in 0x0e00-0x0f00
290 */
291 __u64 ipib; /* 0x0e00 */
292 __u32 ipib_checksum; /* 0x0e08 */
293
294 /* 64 bit save area */
295 __u64 save_area_64; /* 0x0e0c */
296 __u8 pad_0x0e14[0x0f00-0x0e14]; /* 0x0e14 */
297
298 /* Extended facility list */
299 __u64 stfle_fac_list[32]; /* 0x0f00 */
300 __u8 pad_0x1000[0x11b8-0x1000]; /* 0x1000 */
301
302 /* 64 bit extparam used for pfault/diag 250: defined by architecture */
303 __u64 ext_params2; /* 0x11B8 */
304 __u8 pad_0x11c0[0x1200-0x11C0]; /* 0x11C0 */
305
306 /* CPU register save area: defined by architecture */
307 __u64 floating_pt_save_area[16]; /* 0x1200 */
308 __u64 gpregs_save_area[16]; /* 0x1280 */
309 psw_t psw_save_area; /* 0x1300 */
310 __u8 pad_0x1310[0x1318-0x1310]; /* 0x1310 */
311 __u32 prefixreg_save_area; /* 0x1318 */
312 __u32 fpt_creg_save_area; /* 0x131c */
313 __u8 pad_0x1320[0x1324-0x1320]; /* 0x1320 */
314 __u32 tod_progreg_save_area; /* 0x1324 */
315 __u32 cpu_timer_save_area[2]; /* 0x1328 */
316 __u32 clock_comp_save_area[2]; /* 0x1330 */
317 __u8 pad_0x1338[0x1340-0x1338]; /* 0x1338 */
318 __u32 access_regs_save_area[16]; /* 0x1340 */
319 __u64 cregs_save_area[16]; /* 0x1380 */
320
321 /* align to the top of the prefix area */
322 __u8 pad_0x1400[0x2000-0x1400]; /* 0x1400 */
323} __packed;
324
325#endif /* CONFIG_32BIT */
326
327#define S390_lowcore (*((struct _lowcore *) 0))
328
329extern struct _lowcore *lowcore_ptr[];
330
331static inline void set_prefix(__u32 address)
332{
333 asm volatile("spx %0" : : "m" (address) : "memory");
334}
335
336static inline __u32 store_prefix(void)
337{
338 __u32 address;
339
340 asm volatile("stpx %0" : "=m" (address));
341 return address;
342}
343
344#endif /* _ASM_S390_LOWCORE_H */