1/*
  2 * P2020 RDB Core1 Device Tree Source in CAMP mode.
  3 *
  4 * In CAMP mode, each core needs to have its own dts. Only mpic and L2 cache
  5 * can be shared, all the other devices must be assigned to one core only.
  6 * This dts allows core1 to have l2, dma2, eth0, pci1, msi.
  7 *
  8 * Please note to add "-b 1" for core1's dts compiling.
  9 *
 10 * Copyright 2009-2011 Freescale Semiconductor Inc.
 11 *
 12 * This program is free software; you can redistribute  it and/or modify it
 13 * under  the terms of  the GNU General  Public License as published by the
 14 * Free Software Foundation;  either version 2 of the  License, or (at your
 15 * option) any later version.
 16 */
 17
 18/include/ "p2020si.dtsi"
 19
 20/ {
 21	model = "fsl,P2020RDB";
 22	compatible = "fsl,P2020RDB", "fsl,MPC85XXRDB-CAMP";
 23
 24	aliases {
 25		ethernet0 = &enet0;
 26		serial0 = &serial1;
 27		pci1 = &pci1;
 28	};
 29
 30	cpus {
 31		PowerPC,P2020@0 {
 32		status = "disabled";
 33		};
 34	};
 35
 36	memory {
 37		device_type = "memory";
 38	};
 39
 40	localbus@ffe05000 {
 41		status = "disabled";
 42	};
 43
 44	soc@ffe00000 {
 45		ecm-law@0 {
 46			status = "disabled";
 47		};
 48
 49		ecm@1000 {
 50			status = "disabled";
 51		};
 52
 53		memory-controller@2000 {
 54			status = "disabled";
 55		};
 56
 57		i2c@3000 {
 58			status = "disabled";
 59		};
 60
 61		i2c@3100 {
 62			status = "disabled";
 63		};
 64
 65		serial0: serial@4500 {
 66			status = "disabled";
 67		};
 68
 69		spi@7000 {
 70			status = "disabled";
 71		};
 72
 73		dma@c300 {
 74			#address-cells = <1>;
 75			#size-cells = <1>;
 76			compatible = "fsl,eloplus-dma";
 77			reg = <0xc300 0x4>;
 78			ranges = <0x0 0xc100 0x200>;
 79			cell-index = <1>;
 80			dma-channel@0 {
 81				compatible = "fsl,eloplus-dma-channel";
 82				reg = <0x0 0x80>;
 83				cell-index = <0>;
 84				interrupt-parent = <&mpic>;
 85				interrupts = <76 2>;
 86			};
 87			dma-channel@80 {
 88				compatible = "fsl,eloplus-dma-channel";
 89				reg = <0x80 0x80>;
 90				cell-index = <1>;
 91				interrupt-parent = <&mpic>;
 92				interrupts = <77 2>;
 93			};
 94			dma-channel@100 {
 95				compatible = "fsl,eloplus-dma-channel";
 96				reg = <0x100 0x80>;
 97				cell-index = <2>;
 98				interrupt-parent = <&mpic>;
 99				interrupts = <78 2>;
100			};
101			dma-channel@180 {
102				compatible = "fsl,eloplus-dma-channel";
103				reg = <0x180 0x80>;
104				cell-index = <3>;
105				interrupt-parent = <&mpic>;
106				interrupts = <79 2>;
107			};
108		};
109
110		gpio: gpio-controller@f000 {
111			status = "disabled";
112		};
113
114		L2: l2-cache-controller@20000 {
115			compatible = "fsl,p2020-l2-cache-controller";
116			reg = <0x20000 0x1000>;
117			cache-line-size = <32>;	// 32 bytes
118			cache-size = <0x80000>; // L2,512K
119			interrupt-parent = <&mpic>;
120		};
121
122		dma@21300 {
123			status = "disabled";
124		};
125
126		usb@22000 {
127			status = "disabled";
128		};
129
130		mdio@24520 {
131			status = "disabled";
132		};
133
134		mdio@25520 {
135			status = "disabled";
136		};
137
138		mdio@26520 {
139			status = "disabled";
140		};
141
142		enet0: ethernet@24000 {
143			fixed-link = <1 1 1000 0 0>;
144			phy-connection-type = "rgmii-id";
145
146		};
147
148		enet1: ethernet@25000 {
149			status = "disabled";
150		};
151
152		enet2: ethernet@26000 {
153			status = "disabled";
154		};
155
156		sdhci@2e000 {
157			status = "disabled";
158		};
159
160		crypto@30000 {
161			status = "disabled";
162		};
163
164		mpic: pic@40000 {
165			protected-sources = <
166			17 18 43 42 59 47 /*ecm, mem, i2c, serial0, spi,gpio */
167			16 20 21 22 23 28 	/* L2, dma1, USB */
168			03 35 36 40 31 32 33 	/* mdio, enet1, enet2 */
169			72 45 58 25 		/* sdhci, crypto , pci */
170			>;
171		};
172
173		msi@41600 {
174			compatible = "fsl,p2020-msi", "fsl,mpic-msi";
175			reg = <0x41600 0x80>;
176			msi-available-ranges = <0 0x100>;
177			interrupts = <
178				0xe0 0
179				0xe1 0
180				0xe2 0
181				0xe3 0
182				0xe4 0
183				0xe5 0
184				0xe6 0
185				0xe7 0>;
186			interrupt-parent = <&mpic>;
187		};
188
189		global-utilities@e0000 {	//global utilities block
190			status = "disabled";
191		};
192
193	};
194
195	pci0: pcie@ffe08000 {
196		status = "disabled";
197	};
198
199	pci1: pcie@ffe09000 {
200		status = "disabled";
201	};
202
203	pci2: pcie@ffe0a000 {
204		ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000
205			  0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>;
206		interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
207		interrupt-map = <
208			/* IDSEL 0x0 */
209			0000 0x0 0x0 0x1 &mpic 0x0 0x1
210			0000 0x0 0x0 0x2 &mpic 0x1 0x1
211			0000 0x0 0x0 0x3 &mpic 0x2 0x1
212			0000 0x0 0x0 0x4 &mpic 0x3 0x1
213			>;
214		pcie@0 {
215			reg = <0x0 0x0 0x0 0x0 0x0>;
216			#size-cells = <2>;
217			#address-cells = <3>;
218			device_type = "pci";
219			ranges = <0x2000000 0x0 0x80000000
220				  0x2000000 0x0 0x80000000
221				  0x0 0x20000000
222
223				  0x1000000 0x0 0x0
224				  0x1000000 0x0 0x0
225				  0x0 0x100000>;
226		};
227	};
228};