1// SPDX-License-Identifier: GPL-2.0
  2/*
  3 * Copyright (c) 2019 MediaTek Inc.
  4 * Author: Ryder Lee <ryder.lee@mediatek.com>
  5 */
  6
  7/dts-v1/;
  8#include <dt-bindings/input/input.h>
  9#include "mt7629.dtsi"
 10
 11/ {
 12	model = "MediaTek MT7629 reference board";
 13	compatible = "mediatek,mt7629-rfb", "mediatek,mt7629";
 14
 15	aliases {
 16		serial0 = &uart0;
 17	};
 18
 19	chosen {
 20		stdout-path = "serial0:115200n8";
 21	};
 22
 23	gpio-keys {
 24		compatible = "gpio-keys";
 25
 26		button-reset {
 27			label = "factory";
 28			linux,code = <KEY_RESTART>;
 29			gpios = <&pio 60 GPIO_ACTIVE_LOW>;
 30		};
 31
 32		button-wps {
 33			label = "wps";
 34			linux,code = <KEY_WPS_BUTTON>;
 35			gpios = <&pio 58 GPIO_ACTIVE_LOW>;
 36		};
 37	};
 38
 39	memory@40000000 {
 40		device_type = "memory";
 41		reg = <0x40000000 0x10000000>;
 42	};
 43
 44	reg_3p3v: regulator-3p3v {
 45		compatible = "regulator-fixed";
 46		regulator-name = "fixed-3.3V";
 47		regulator-min-microvolt = <3300000>;
 48		regulator-max-microvolt = <3300000>;
 49		regulator-boot-on;
 50		regulator-always-on;
 51	};
 52
 53	reg_5v: regulator-5v {
 54		compatible = "regulator-fixed";
 55		regulator-name = "fixed-5V";
 56		regulator-min-microvolt = <5000000>;
 57		regulator-max-microvolt = <5000000>;
 58		regulator-boot-on;
 59		regulator-always-on;
 60	};
 61};
 62
 63&eth {
 64	pinctrl-names = "default";
 65	pinctrl-0 = <&eth_pins>;
 66	pinctrl-1 = <&ephy_leds_pins>;
 67	status = "okay";
 68
 69	gmac0: mac@0 {
 70		compatible = "mediatek,eth-mac";
 71		reg = <0>;
 72		phy-mode = "2500base-x";
 73		fixed-link {
 74			speed = <2500>;
 75			full-duplex;
 76			pause;
 77		};
 78	};
 79
 80	gmac1: mac@1 {
 81		compatible = "mediatek,eth-mac";
 82		reg = <1>;
 83		phy-mode = "gmii";
 84		phy-handle = <&phy0>;
 85	};
 86
 87	mdio: mdio-bus {
 88		#address-cells = <1>;
 89		#size-cells = <0>;
 90
 91		phy0: ethernet-phy@0 {
 92			reg = <0>;
 93		};
 94	};
 95};
 96
 97&i2c {
 98	pinctrl-names = "default";
 99	pinctrl-0 = <&i2c_pins>;
100	status = "okay";
101};
102
103&qspi {
104	pinctrl-names = "default";
105	pinctrl-0 = <&qspi_pins>;
106	status = "okay";
107
108	flash@0 {
109		compatible = "jedec,spi-nor";
110		reg = <0>;
111
112		partitions {
113			compatible = "fixed-partitions";
114			#address-cells = <1>;
115			#size-cells = <1>;
116
117			partition@0 {
118				label = "u-boot";
119				reg = <0x00000 0x60000>;
120				read-only;
121			};
122
123			partition@60000 {
124				label = "u-boot-env";
125				reg = <0x60000 0x10000>;
126				read-only;
127			};
128
129			factory: partition@70000 {
130				label = "factory";
131				reg = <0x70000 0x40000>;
132				read-only;
133			};
134
135			partition@b0000 {
136				label = "kernel";
137				reg = <0xb0000 0xb50000>;
138			};
139		};
140	};
141};
142
143&pcie1 {
144	pinctrl-names = "default";
145	pinctrl-0 = <&pcie_pins>;
146	status = "okay";
147};
148
149&pciephy1 {
150	status = "okay";
151};
152
153&pio {
154	eth_pins: eth-pins {
155		mux {
156			function = "eth";
157			groups = "mdc_mdio";
158		};
159	};
160
161	ephy_leds_pins: ephy-leds-pins {
162		mux {
163			function = "led";
164			groups = "gphy_leds_0", "ephy_leds";
165		};
166	};
167
168	i2c_pins: i2c-pins {
169		mux {
170			function = "i2c";
171			groups =  "i2c_0";
172		};
173
174		conf {
175			pins = "I2C_SDA", "I2C_SCL";
176			drive-strength = <4>;
177			bias-disable;
178		};
179	};
180
181	pcie_pins: pcie-pins {
182		mux {
183			function = "pcie";
184			groups = "pcie_clkreq",
185				 "pcie_pereset",
186				 "pcie_wake";
187		};
188	};
189
190	pwm_pins: pwm-pins {
191		mux {
192			function = "pwm";
193			groups = "pwm_0";
194		};
195	};
196
197	/* SPI-NOR is shared pin with serial NAND */
198	qspi_pins: qspi-pins {
199		mux {
200			function = "flash";
201			groups = "spi_nor";
202		};
203	};
204
205	/* Serial NAND is shared pin with SPI-NOR */
206	serial_nand_pins: serial-nand-pins {
207		mux {
208			function = "flash";
209			groups = "snfi";
210		};
211	};
212
213	spi_pins: spi-pins {
214		mux {
215			function = "spi";
216			groups = "spi_0";
217		};
218	};
219
220	uart0_pins: uart0-pins {
221		mux {
222			function = "uart";
223			groups = "uart0_txd_rxd" ;
224		};
225	};
226
227	uart1_pins: uart1-pins {
228		mux {
229			function = "uart";
230			groups = "uart1_0_tx_rx" ;
231		};
232	};
233
234	uart2_pins: uart2-pins {
235		mux {
236			function = "uart";
237			groups = "uart2_0_txd_rxd" ;
238		};
239	};
240
241	watchdog_pins: watchdog-pins {
242		mux {
243			function = "watchdog";
244			groups = "watchdog";
245		};
246	};
247};
248
249&spi {
250	pinctrl-names = "default";
251	pinctrl-0 = <&spi_pins>;
252	status = "okay";
253};
254
255&ssusb {
256	vusb33-supply = <&reg_3p3v>;
257	vbus-supply = <&reg_5v>;
258	status = "okay";
259};
260
261&u3phy0 {
262	status = "okay";
263};
264
265&uart0 {
266	pinctrl-names = "default";
267	pinctrl-0 = <&uart0_pins>;
268	status = "okay";
269};
270
271&watchdog {
272	pinctrl-names = "default";
273	pinctrl-0 = <&watchdog_pins>;
274	status = "okay";
275};